hw/arm/virt-acpi-build: Fix SMMUv3 GSIV values

[Qemu-devel] [PATCH] hw/arm/virt-acpi-build: Fix SMMUv3 GSIV values

Eric Auger posted 1 patch 5 years, 1 month ago

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git fetch https://github.com/patchew-project/qemu tags/patchew/20190312091031.5185-1-eric.auger@redhat.com

Maintainers: "Michael S. Tsirkin" <mst@redhat.com>, Peter Maydell <peter.maydell@linaro.org>, Igor Mammedov <imammedo@redhat.com>, Shannon Zhao <shannon.zhaosl@gmail.com>

hw/arm/virt-acpi-build.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

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[Qemu-devel] [PATCH] hw/arm/virt-acpi-build: Fix SMMUv3 GSIV values

Posted by Eric Auger 5 years, 1 month ago

The GSIV numbers of the SPI based interrupts is not correct as
ARM_SPI_BASE was not added to the irqmap[VIRT_SMMU] value. So
this may collide with VIRTIO_MMIO irq window.

Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
 hw/arm/virt-acpi-build.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index d7e2e4885b..aa02d8d74e 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -405,7 +405,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
     its->identifiers[0] = 0; /* MADT translation_id */
 
     if (vms->iommu == VIRT_IOMMU_SMMUV3) {
-        int irq =  vms->irqmap[VIRT_SMMU];
+        int irq =  vms->irqmap[VIRT_SMMU] + ARM_SPI_BASE;
 
         /* SMMUv3 node */
         smmu_offset = iort_node_offset + node_size;
-- 
2.20.1

Re: [Qemu-devel] [PATCH] hw/arm/virt-acpi-build: Fix SMMUv3 GSIV values

Posted by Shannon Zhao 5 years, 1 month ago


On 2019/3/12 17:10, Eric Auger wrote:
> The GSIV numbers of the SPI based interrupts is not correct as
> ARM_SPI_BASE was not added to the irqmap[VIRT_SMMU] value. So
> this may collide with VIRTIO_MMIO irq window.
> 
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Shannon Zhao <shannon.zhaosl@gmail.com>

> ---
>   hw/arm/virt-acpi-build.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> index d7e2e4885b..aa02d8d74e 100644
> --- a/hw/arm/virt-acpi-build.c
> +++ b/hw/arm/virt-acpi-build.c
> @@ -405,7 +405,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
>       its->identifiers[0] = 0; /* MADT translation_id */
>   
>       if (vms->iommu == VIRT_IOMMU_SMMUV3) {
> -        int irq =  vms->irqmap[VIRT_SMMU];
> +        int irq =  vms->irqmap[VIRT_SMMU] + ARM_SPI_BASE;
>   
>           /* SMMUv3 node */
>           smmu_offset = iort_node_offset + node_size;
>

Re: [Qemu-devel] [PATCH] hw/arm/virt-acpi-build: Fix SMMUv3 GSIV values

Posted by Peter Maydell 5 years, 1 month ago

On Tue, 12 Mar 2019 at 09:10, Eric Auger <eric.auger@redhat.com> wrote:
>
> The GSIV numbers of the SPI based interrupts is not correct as
> ARM_SPI_BASE was not added to the irqmap[VIRT_SMMU] value. So
> this may collide with VIRTIO_MMIO irq window.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> ---
>  hw/arm/virt-acpi-build.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> index d7e2e4885b..aa02d8d74e 100644
> --- a/hw/arm/virt-acpi-build.c
> +++ b/hw/arm/virt-acpi-build.c
> @@ -405,7 +405,7 @@ build_iort(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
>      its->identifiers[0] = 0; /* MADT translation_id */
>
>      if (vms->iommu == VIRT_IOMMU_SMMUV3) {
> -        int irq =  vms->irqmap[VIRT_SMMU];
> +        int irq =  vms->irqmap[VIRT_SMMU] + ARM_SPI_BASE;
>
>          /* SMMUv3 node */
>          smmu_offset = iort_node_offset + node_size;
> --



Applied to target-arm.next, thanks.

-- PMM