It will ease the introduction of the PSI bridge model for POWER9.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
include/hw/ppc/pnv_psi.h | 21 +++++++++++-
hw/ppc/pnv.c | 2 +-
hw/ppc/pnv_psi.c | 72 ++++++++++++++++++++++++++++------------
3 files changed, 72 insertions(+), 23 deletions(-)
diff --git a/include/hw/ppc/pnv_psi.h b/include/hw/ppc/pnv_psi.h
index 64ac73512e81..585a41cd19b6 100644
--- a/include/hw/ppc/pnv_psi.h
+++ b/include/hw/ppc/pnv_psi.h
@@ -25,6 +25,9 @@
#define TYPE_PNV_PSI "pnv-psi"
#define PNV_PSI(obj) \
OBJECT_CHECK(PnvPsi, (obj), TYPE_PNV_PSI)
+#define TYPE_PNV8_PSI TYPE_PNV_PSI "-POWER8"
+#define PNV8_PSI(obj) \
+ OBJECT_CHECK(PnvPsi, (obj), TYPE_PNV8_PSI)
#define PSIHB_XSCOM_MAX 0x20
@@ -48,6 +51,22 @@ typedef struct PnvPsi {
MemoryRegion xscom_regs;
} PnvPsi;
+#define PNV_PSI_CLASS(klass) \
+ OBJECT_CLASS_CHECK(PnvPsiClass, (klass), TYPE_PNV_PSI)
+#define PNV_PSI_GET_CLASS(obj) \
+ OBJECT_GET_CLASS(PnvPsiClass, (obj), TYPE_PNV_PSI)
+
+typedef struct PnvPsiClass {
+ SysBusDeviceClass parent_class;
+
+ int chip_type;
+ uint32_t xscom_pcba;
+ uint32_t xscom_size;
+ uint64_t bar_mask;
+
+ void (*irq_set)(PnvPsi *psi, int, bool state);
+} PnvPsiClass;
+
/* The PSI and FSP interrupts are muxed on the same IRQ number */
typedef enum PnvPsiIrq {
PSIHB_IRQ_PSI, /* internal use only */
@@ -61,6 +80,6 @@ typedef enum PnvPsiIrq {
#define PSI_NUM_INTERRUPTS 6
-extern void pnv_psi_irq_set(PnvPsi *psi, PnvPsiIrq irq, bool state);
+void pnv_psi_irq_set(PnvPsi *psi, int irq, bool state);
#endif /* _PPC_PNV_PSI_H */
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 7660eaa22cf9..67d40dc3eebc 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -788,7 +788,7 @@ static void pnv_chip_power8_instance_init(Object *obj)
Pnv8Chip *chip8 = PNV8_CHIP(obj);
object_initialize_child(obj, "psi", &chip8->psi, sizeof(chip8->psi),
- TYPE_PNV_PSI, &error_abort, NULL);
+ TYPE_PNV8_PSI, &error_abort, NULL);
object_property_add_const_link(OBJECT(&chip8->psi), "xics",
OBJECT(qdev_get_machine()), &error_abort);
diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c
index e61861bfd3c6..e56b455a61b1 100644
--- a/hw/ppc/pnv_psi.c
+++ b/hw/ppc/pnv_psi.c
@@ -118,10 +118,11 @@
static void pnv_psi_set_bar(PnvPsi *psi, uint64_t bar)
{
+ PnvPsiClass *ppc = PNV_PSI_GET_CLASS(psi);
MemoryRegion *sysmem = get_system_memory();
uint64_t old = psi->regs[PSIHB_XSCOM_BAR];
- psi->regs[PSIHB_XSCOM_BAR] = bar & (PSIHB_BAR_MASK | PSIHB_BAR_EN);
+ psi->regs[PSIHB_XSCOM_BAR] = bar & (ppc->bar_mask | PSIHB_BAR_EN);
/* Update MR, always remove it first */
if (old & PSIHB_BAR_EN) {
@@ -130,7 +131,7 @@ static void pnv_psi_set_bar(PnvPsi *psi, uint64_t bar)
/* Then add it back if needed */
if (bar & PSIHB_BAR_EN) {
- uint64_t addr = bar & PSIHB_BAR_MASK;
+ uint64_t addr = bar & ppc->bar_mask;
memory_region_add_subregion(sysmem, addr, &psi->regs_mr);
}
}
@@ -207,7 +208,12 @@ static const uint64_t stat_bits[] = {
[PSIHB_IRQ_EXTERNAL] = PSIHB_IRQ_STAT_EXT,
};
-void pnv_psi_irq_set(PnvPsi *psi, PnvPsiIrq irq, bool state)
+void pnv_psi_irq_set(PnvPsi *psi, int irq, bool state)
+{
+ PNV_PSI_GET_CLASS(psi)->irq_set(psi, irq, state);
+}
+
+static void pnv_psi_power8_irq_set(PnvPsi *psi, int irq, bool state)
{
uint32_t xivr_reg;
uint32_t stat_reg;
@@ -451,9 +457,9 @@ static void pnv_psi_reset(void *dev)
psi->regs[PSIHB_XSCOM_BAR] = psi->bar | PSIHB_BAR_EN;
}
-static void pnv_psi_init(Object *obj)
+static void pnv_psi_power8_instance_init(Object *obj)
{
- PnvPsi *psi = PNV_PSI(obj);
+ PnvPsi *psi = PNV8_PSI(obj);
object_initialize_child(obj, "ics-psi", &psi->ics, sizeof(psi->ics),
TYPE_ICS_SIMPLE, &error_abort, NULL);
@@ -468,9 +474,9 @@ static const uint8_t irq_to_xivr[] = {
PSIHB_XSCOM_XIVR_EXT,
};
-static void pnv_psi_realize(DeviceState *dev, Error **errp)
+static void pnv_psi_power8_realize(DeviceState *dev, Error **errp)
{
- PnvPsi *psi = PNV_PSI(dev);
+ PnvPsi *psi = PNV8_PSI(dev);
ICSState *ics = &psi->ics;
Object *obj;
Error *err = NULL;
@@ -524,28 +530,28 @@ static void pnv_psi_realize(DeviceState *dev, Error **errp)
qemu_register_reset(pnv_psi_reset, dev);
}
+static const char compat_p8[] = "ibm,power8-psihb-x\0ibm,psihb-x";
+
static int pnv_psi_dt_xscom(PnvXScomInterface *dev, void *fdt, int xscom_offset)
{
- const char compat[] = "ibm,power8-psihb-x\0ibm,psihb-x";
+ PnvPsiClass *ppc = PNV_PSI_GET_CLASS(dev);
char *name;
int offset;
- uint32_t lpc_pcba = PNV_XSCOM_PSIHB_BASE;
uint32_t reg[] = {
- cpu_to_be32(lpc_pcba),
- cpu_to_be32(PNV_XSCOM_PSIHB_SIZE)
+ cpu_to_be32(ppc->xscom_pcba),
+ cpu_to_be32(ppc->xscom_size)
};
- name = g_strdup_printf("psihb@%x", lpc_pcba);
+ name = g_strdup_printf("psihb@%x", ppc->xscom_pcba);
offset = fdt_add_subnode(fdt, xscom_offset, name);
_FDT(offset);
g_free(name);
- _FDT((fdt_setprop(fdt, offset, "reg", reg, sizeof(reg))));
-
- _FDT((fdt_setprop_cell(fdt, offset, "#address-cells", 2)));
- _FDT((fdt_setprop_cell(fdt, offset, "#size-cells", 1)));
- _FDT((fdt_setprop(fdt, offset, "compatible", compat,
- sizeof(compat))));
+ _FDT(fdt_setprop(fdt, offset, "reg", reg, sizeof(reg)));
+ _FDT(fdt_setprop_cell(fdt, offset, "#address-cells", 2));
+ _FDT(fdt_setprop_cell(fdt, offset, "#size-cells", 1));
+ _FDT(fdt_setprop(fdt, offset, "compatible", compat_p8,
+ sizeof(compat_p8)));
return 0;
}
@@ -555,6 +561,28 @@ static Property pnv_psi_properties[] = {
DEFINE_PROP_END_OF_LIST(),
};
+static void pnv_psi_power8_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+ PnvPsiClass *ppc = PNV_PSI_CLASS(klass);
+
+ dc->desc = "PowerNV PSI Controller POWER8";
+ dc->realize = pnv_psi_power8_realize;
+
+ ppc->chip_type = PNV_CHIP_POWER8;
+ ppc->xscom_pcba = PNV_XSCOM_PSIHB_BASE;
+ ppc->xscom_size = PNV_XSCOM_PSIHB_SIZE;
+ ppc->bar_mask = PSIHB_BAR_MASK;
+ ppc->irq_set = pnv_psi_power8_irq_set;
+}
+
+static const TypeInfo pnv_psi_power8_info = {
+ .name = TYPE_PNV8_PSI,
+ .parent = TYPE_PNV_PSI,
+ .instance_init = pnv_psi_power8_instance_init,
+ .class_init = pnv_psi_power8_class_init,
+};
+
static void pnv_psi_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -562,7 +590,7 @@ static void pnv_psi_class_init(ObjectClass *klass, void *data)
xdc->dt_xscom = pnv_psi_dt_xscom;
- dc->realize = pnv_psi_realize;
+ dc->desc = "PowerNV PSI Controller";
dc->props = pnv_psi_properties;
}
@@ -570,8 +598,9 @@ static const TypeInfo pnv_psi_info = {
.name = TYPE_PNV_PSI,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(PnvPsi),
- .instance_init = pnv_psi_init,
.class_init = pnv_psi_class_init,
+ .class_size = sizeof(PnvPsiClass),
+ .abstract = true,
.interfaces = (InterfaceInfo[]) {
{ TYPE_PNV_XSCOM_INTERFACE },
{ }
@@ -581,6 +610,7 @@ static const TypeInfo pnv_psi_info = {
static void pnv_psi_register_types(void)
{
type_register_static(&pnv_psi_info);
+ type_register_static(&pnv_psi_power8_info);
}
-type_init(pnv_psi_register_types)
+type_init(pnv_psi_register_types);
--
2.20.1
On Wed, Mar 06, 2019 at 09:50:19AM +0100, Cédric Le Goater wrote:
> It will ease the introduction of the PSI bridge model for POWER9.
>
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
Applied, thanks.
> ---
> include/hw/ppc/pnv_psi.h | 21 +++++++++++-
> hw/ppc/pnv.c | 2 +-
> hw/ppc/pnv_psi.c | 72 ++++++++++++++++++++++++++++------------
> 3 files changed, 72 insertions(+), 23 deletions(-)
>
> diff --git a/include/hw/ppc/pnv_psi.h b/include/hw/ppc/pnv_psi.h
> index 64ac73512e81..585a41cd19b6 100644
> --- a/include/hw/ppc/pnv_psi.h
> +++ b/include/hw/ppc/pnv_psi.h
> @@ -25,6 +25,9 @@
> #define TYPE_PNV_PSI "pnv-psi"
> #define PNV_PSI(obj) \
> OBJECT_CHECK(PnvPsi, (obj), TYPE_PNV_PSI)
> +#define TYPE_PNV8_PSI TYPE_PNV_PSI "-POWER8"
> +#define PNV8_PSI(obj) \
> + OBJECT_CHECK(PnvPsi, (obj), TYPE_PNV8_PSI)
>
> #define PSIHB_XSCOM_MAX 0x20
>
> @@ -48,6 +51,22 @@ typedef struct PnvPsi {
> MemoryRegion xscom_regs;
> } PnvPsi;
>
> +#define PNV_PSI_CLASS(klass) \
> + OBJECT_CLASS_CHECK(PnvPsiClass, (klass), TYPE_PNV_PSI)
> +#define PNV_PSI_GET_CLASS(obj) \
> + OBJECT_GET_CLASS(PnvPsiClass, (obj), TYPE_PNV_PSI)
> +
> +typedef struct PnvPsiClass {
> + SysBusDeviceClass parent_class;
> +
> + int chip_type;
> + uint32_t xscom_pcba;
> + uint32_t xscom_size;
> + uint64_t bar_mask;
> +
> + void (*irq_set)(PnvPsi *psi, int, bool state);
> +} PnvPsiClass;
> +
> /* The PSI and FSP interrupts are muxed on the same IRQ number */
> typedef enum PnvPsiIrq {
> PSIHB_IRQ_PSI, /* internal use only */
> @@ -61,6 +80,6 @@ typedef enum PnvPsiIrq {
>
> #define PSI_NUM_INTERRUPTS 6
>
> -extern void pnv_psi_irq_set(PnvPsi *psi, PnvPsiIrq irq, bool state);
> +void pnv_psi_irq_set(PnvPsi *psi, int irq, bool state);
>
> #endif /* _PPC_PNV_PSI_H */
> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> index 7660eaa22cf9..67d40dc3eebc 100644
> --- a/hw/ppc/pnv.c
> +++ b/hw/ppc/pnv.c
> @@ -788,7 +788,7 @@ static void pnv_chip_power8_instance_init(Object *obj)
> Pnv8Chip *chip8 = PNV8_CHIP(obj);
>
> object_initialize_child(obj, "psi", &chip8->psi, sizeof(chip8->psi),
> - TYPE_PNV_PSI, &error_abort, NULL);
> + TYPE_PNV8_PSI, &error_abort, NULL);
> object_property_add_const_link(OBJECT(&chip8->psi), "xics",
> OBJECT(qdev_get_machine()), &error_abort);
>
> diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c
> index e61861bfd3c6..e56b455a61b1 100644
> --- a/hw/ppc/pnv_psi.c
> +++ b/hw/ppc/pnv_psi.c
> @@ -118,10 +118,11 @@
>
> static void pnv_psi_set_bar(PnvPsi *psi, uint64_t bar)
> {
> + PnvPsiClass *ppc = PNV_PSI_GET_CLASS(psi);
> MemoryRegion *sysmem = get_system_memory();
> uint64_t old = psi->regs[PSIHB_XSCOM_BAR];
>
> - psi->regs[PSIHB_XSCOM_BAR] = bar & (PSIHB_BAR_MASK | PSIHB_BAR_EN);
> + psi->regs[PSIHB_XSCOM_BAR] = bar & (ppc->bar_mask | PSIHB_BAR_EN);
>
> /* Update MR, always remove it first */
> if (old & PSIHB_BAR_EN) {
> @@ -130,7 +131,7 @@ static void pnv_psi_set_bar(PnvPsi *psi, uint64_t bar)
>
> /* Then add it back if needed */
> if (bar & PSIHB_BAR_EN) {
> - uint64_t addr = bar & PSIHB_BAR_MASK;
> + uint64_t addr = bar & ppc->bar_mask;
> memory_region_add_subregion(sysmem, addr, &psi->regs_mr);
> }
> }
> @@ -207,7 +208,12 @@ static const uint64_t stat_bits[] = {
> [PSIHB_IRQ_EXTERNAL] = PSIHB_IRQ_STAT_EXT,
> };
>
> -void pnv_psi_irq_set(PnvPsi *psi, PnvPsiIrq irq, bool state)
> +void pnv_psi_irq_set(PnvPsi *psi, int irq, bool state)
> +{
> + PNV_PSI_GET_CLASS(psi)->irq_set(psi, irq, state);
> +}
> +
> +static void pnv_psi_power8_irq_set(PnvPsi *psi, int irq, bool state)
> {
> uint32_t xivr_reg;
> uint32_t stat_reg;
> @@ -451,9 +457,9 @@ static void pnv_psi_reset(void *dev)
> psi->regs[PSIHB_XSCOM_BAR] = psi->bar | PSIHB_BAR_EN;
> }
>
> -static void pnv_psi_init(Object *obj)
> +static void pnv_psi_power8_instance_init(Object *obj)
> {
> - PnvPsi *psi = PNV_PSI(obj);
> + PnvPsi *psi = PNV8_PSI(obj);
>
> object_initialize_child(obj, "ics-psi", &psi->ics, sizeof(psi->ics),
> TYPE_ICS_SIMPLE, &error_abort, NULL);
> @@ -468,9 +474,9 @@ static const uint8_t irq_to_xivr[] = {
> PSIHB_XSCOM_XIVR_EXT,
> };
>
> -static void pnv_psi_realize(DeviceState *dev, Error **errp)
> +static void pnv_psi_power8_realize(DeviceState *dev, Error **errp)
> {
> - PnvPsi *psi = PNV_PSI(dev);
> + PnvPsi *psi = PNV8_PSI(dev);
> ICSState *ics = &psi->ics;
> Object *obj;
> Error *err = NULL;
> @@ -524,28 +530,28 @@ static void pnv_psi_realize(DeviceState *dev, Error **errp)
> qemu_register_reset(pnv_psi_reset, dev);
> }
>
> +static const char compat_p8[] = "ibm,power8-psihb-x\0ibm,psihb-x";
> +
> static int pnv_psi_dt_xscom(PnvXScomInterface *dev, void *fdt, int xscom_offset)
> {
> - const char compat[] = "ibm,power8-psihb-x\0ibm,psihb-x";
> + PnvPsiClass *ppc = PNV_PSI_GET_CLASS(dev);
> char *name;
> int offset;
> - uint32_t lpc_pcba = PNV_XSCOM_PSIHB_BASE;
> uint32_t reg[] = {
> - cpu_to_be32(lpc_pcba),
> - cpu_to_be32(PNV_XSCOM_PSIHB_SIZE)
> + cpu_to_be32(ppc->xscom_pcba),
> + cpu_to_be32(ppc->xscom_size)
> };
>
> - name = g_strdup_printf("psihb@%x", lpc_pcba);
> + name = g_strdup_printf("psihb@%x", ppc->xscom_pcba);
> offset = fdt_add_subnode(fdt, xscom_offset, name);
> _FDT(offset);
> g_free(name);
>
> - _FDT((fdt_setprop(fdt, offset, "reg", reg, sizeof(reg))));
> -
> - _FDT((fdt_setprop_cell(fdt, offset, "#address-cells", 2)));
> - _FDT((fdt_setprop_cell(fdt, offset, "#size-cells", 1)));
> - _FDT((fdt_setprop(fdt, offset, "compatible", compat,
> - sizeof(compat))));
> + _FDT(fdt_setprop(fdt, offset, "reg", reg, sizeof(reg)));
> + _FDT(fdt_setprop_cell(fdt, offset, "#address-cells", 2));
> + _FDT(fdt_setprop_cell(fdt, offset, "#size-cells", 1));
> + _FDT(fdt_setprop(fdt, offset, "compatible", compat_p8,
> + sizeof(compat_p8)));
> return 0;
> }
>
> @@ -555,6 +561,28 @@ static Property pnv_psi_properties[] = {
> DEFINE_PROP_END_OF_LIST(),
> };
>
> +static void pnv_psi_power8_class_init(ObjectClass *klass, void *data)
> +{
> + DeviceClass *dc = DEVICE_CLASS(klass);
> + PnvPsiClass *ppc = PNV_PSI_CLASS(klass);
> +
> + dc->desc = "PowerNV PSI Controller POWER8";
> + dc->realize = pnv_psi_power8_realize;
> +
> + ppc->chip_type = PNV_CHIP_POWER8;
> + ppc->xscom_pcba = PNV_XSCOM_PSIHB_BASE;
> + ppc->xscom_size = PNV_XSCOM_PSIHB_SIZE;
> + ppc->bar_mask = PSIHB_BAR_MASK;
> + ppc->irq_set = pnv_psi_power8_irq_set;
> +}
> +
> +static const TypeInfo pnv_psi_power8_info = {
> + .name = TYPE_PNV8_PSI,
> + .parent = TYPE_PNV_PSI,
> + .instance_init = pnv_psi_power8_instance_init,
> + .class_init = pnv_psi_power8_class_init,
> +};
> +
> static void pnv_psi_class_init(ObjectClass *klass, void *data)
> {
> DeviceClass *dc = DEVICE_CLASS(klass);
> @@ -562,7 +590,7 @@ static void pnv_psi_class_init(ObjectClass *klass, void *data)
>
> xdc->dt_xscom = pnv_psi_dt_xscom;
>
> - dc->realize = pnv_psi_realize;
> + dc->desc = "PowerNV PSI Controller";
> dc->props = pnv_psi_properties;
> }
>
> @@ -570,8 +598,9 @@ static const TypeInfo pnv_psi_info = {
> .name = TYPE_PNV_PSI,
> .parent = TYPE_SYS_BUS_DEVICE,
> .instance_size = sizeof(PnvPsi),
> - .instance_init = pnv_psi_init,
> .class_init = pnv_psi_class_init,
> + .class_size = sizeof(PnvPsiClass),
> + .abstract = true,
> .interfaces = (InterfaceInfo[]) {
> { TYPE_PNV_XSCOM_INTERFACE },
> { }
> @@ -581,6 +610,7 @@ static const TypeInfo pnv_psi_info = {
> static void pnv_psi_register_types(void)
> {
> type_register_static(&pnv_psi_info);
> + type_register_static(&pnv_psi_power8_info);
> }
>
> -type_init(pnv_psi_register_types)
> +type_init(pnv_psi_register_types);
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
On Thu, Mar 07, 2019 at 03:05:19PM +1100, David Gibson wrote:
> On Wed, Mar 06, 2019 at 09:50:19AM +0100, Cédric Le Goater wrote:
> > It will ease the introduction of the PSI bridge model for POWER9.
> >
> > Signed-off-by: Cédric Le Goater <clg@kaod.org>
>
> Applied, thanks.
And now unapplied, due to issues revealed in the next patch. See the
comments there.
>
> > ---
> > include/hw/ppc/pnv_psi.h | 21 +++++++++++-
> > hw/ppc/pnv.c | 2 +-
> > hw/ppc/pnv_psi.c | 72 ++++++++++++++++++++++++++++------------
> > 3 files changed, 72 insertions(+), 23 deletions(-)
> >
> > diff --git a/include/hw/ppc/pnv_psi.h b/include/hw/ppc/pnv_psi.h
> > index 64ac73512e81..585a41cd19b6 100644
> > --- a/include/hw/ppc/pnv_psi.h
> > +++ b/include/hw/ppc/pnv_psi.h
> > @@ -25,6 +25,9 @@
> > #define TYPE_PNV_PSI "pnv-psi"
> > #define PNV_PSI(obj) \
> > OBJECT_CHECK(PnvPsi, (obj), TYPE_PNV_PSI)
> > +#define TYPE_PNV8_PSI TYPE_PNV_PSI "-POWER8"
> > +#define PNV8_PSI(obj) \
> > + OBJECT_CHECK(PnvPsi, (obj), TYPE_PNV8_PSI)
> >
> > #define PSIHB_XSCOM_MAX 0x20
> >
> > @@ -48,6 +51,22 @@ typedef struct PnvPsi {
> > MemoryRegion xscom_regs;
> > } PnvPsi;
> >
> > +#define PNV_PSI_CLASS(klass) \
> > + OBJECT_CLASS_CHECK(PnvPsiClass, (klass), TYPE_PNV_PSI)
> > +#define PNV_PSI_GET_CLASS(obj) \
> > + OBJECT_GET_CLASS(PnvPsiClass, (obj), TYPE_PNV_PSI)
> > +
> > +typedef struct PnvPsiClass {
> > + SysBusDeviceClass parent_class;
> > +
> > + int chip_type;
> > + uint32_t xscom_pcba;
> > + uint32_t xscom_size;
> > + uint64_t bar_mask;
> > +
> > + void (*irq_set)(PnvPsi *psi, int, bool state);
> > +} PnvPsiClass;
> > +
> > /* The PSI and FSP interrupts are muxed on the same IRQ number */
> > typedef enum PnvPsiIrq {
> > PSIHB_IRQ_PSI, /* internal use only */
> > @@ -61,6 +80,6 @@ typedef enum PnvPsiIrq {
> >
> > #define PSI_NUM_INTERRUPTS 6
> >
> > -extern void pnv_psi_irq_set(PnvPsi *psi, PnvPsiIrq irq, bool state);
> > +void pnv_psi_irq_set(PnvPsi *psi, int irq, bool state);
> >
> > #endif /* _PPC_PNV_PSI_H */
> > diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> > index 7660eaa22cf9..67d40dc3eebc 100644
> > --- a/hw/ppc/pnv.c
> > +++ b/hw/ppc/pnv.c
> > @@ -788,7 +788,7 @@ static void pnv_chip_power8_instance_init(Object *obj)
> > Pnv8Chip *chip8 = PNV8_CHIP(obj);
> >
> > object_initialize_child(obj, "psi", &chip8->psi, sizeof(chip8->psi),
> > - TYPE_PNV_PSI, &error_abort, NULL);
> > + TYPE_PNV8_PSI, &error_abort, NULL);
> > object_property_add_const_link(OBJECT(&chip8->psi), "xics",
> > OBJECT(qdev_get_machine()), &error_abort);
> >
> > diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c
> > index e61861bfd3c6..e56b455a61b1 100644
> > --- a/hw/ppc/pnv_psi.c
> > +++ b/hw/ppc/pnv_psi.c
> > @@ -118,10 +118,11 @@
> >
> > static void pnv_psi_set_bar(PnvPsi *psi, uint64_t bar)
> > {
> > + PnvPsiClass *ppc = PNV_PSI_GET_CLASS(psi);
> > MemoryRegion *sysmem = get_system_memory();
> > uint64_t old = psi->regs[PSIHB_XSCOM_BAR];
> >
> > - psi->regs[PSIHB_XSCOM_BAR] = bar & (PSIHB_BAR_MASK | PSIHB_BAR_EN);
> > + psi->regs[PSIHB_XSCOM_BAR] = bar & (ppc->bar_mask | PSIHB_BAR_EN);
> >
> > /* Update MR, always remove it first */
> > if (old & PSIHB_BAR_EN) {
> > @@ -130,7 +131,7 @@ static void pnv_psi_set_bar(PnvPsi *psi, uint64_t bar)
> >
> > /* Then add it back if needed */
> > if (bar & PSIHB_BAR_EN) {
> > - uint64_t addr = bar & PSIHB_BAR_MASK;
> > + uint64_t addr = bar & ppc->bar_mask;
> > memory_region_add_subregion(sysmem, addr, &psi->regs_mr);
> > }
> > }
> > @@ -207,7 +208,12 @@ static const uint64_t stat_bits[] = {
> > [PSIHB_IRQ_EXTERNAL] = PSIHB_IRQ_STAT_EXT,
> > };
> >
> > -void pnv_psi_irq_set(PnvPsi *psi, PnvPsiIrq irq, bool state)
> > +void pnv_psi_irq_set(PnvPsi *psi, int irq, bool state)
> > +{
> > + PNV_PSI_GET_CLASS(psi)->irq_set(psi, irq, state);
> > +}
> > +
> > +static void pnv_psi_power8_irq_set(PnvPsi *psi, int irq, bool state)
> > {
> > uint32_t xivr_reg;
> > uint32_t stat_reg;
> > @@ -451,9 +457,9 @@ static void pnv_psi_reset(void *dev)
> > psi->regs[PSIHB_XSCOM_BAR] = psi->bar | PSIHB_BAR_EN;
> > }
> >
> > -static void pnv_psi_init(Object *obj)
> > +static void pnv_psi_power8_instance_init(Object *obj)
> > {
> > - PnvPsi *psi = PNV_PSI(obj);
> > + PnvPsi *psi = PNV8_PSI(obj);
> >
> > object_initialize_child(obj, "ics-psi", &psi->ics, sizeof(psi->ics),
> > TYPE_ICS_SIMPLE, &error_abort, NULL);
> > @@ -468,9 +474,9 @@ static const uint8_t irq_to_xivr[] = {
> > PSIHB_XSCOM_XIVR_EXT,
> > };
> >
> > -static void pnv_psi_realize(DeviceState *dev, Error **errp)
> > +static void pnv_psi_power8_realize(DeviceState *dev, Error **errp)
> > {
> > - PnvPsi *psi = PNV_PSI(dev);
> > + PnvPsi *psi = PNV8_PSI(dev);
> > ICSState *ics = &psi->ics;
> > Object *obj;
> > Error *err = NULL;
> > @@ -524,28 +530,28 @@ static void pnv_psi_realize(DeviceState *dev, Error **errp)
> > qemu_register_reset(pnv_psi_reset, dev);
> > }
> >
> > +static const char compat_p8[] = "ibm,power8-psihb-x\0ibm,psihb-x";
> > +
> > static int pnv_psi_dt_xscom(PnvXScomInterface *dev, void *fdt, int xscom_offset)
> > {
> > - const char compat[] = "ibm,power8-psihb-x\0ibm,psihb-x";
> > + PnvPsiClass *ppc = PNV_PSI_GET_CLASS(dev);
> > char *name;
> > int offset;
> > - uint32_t lpc_pcba = PNV_XSCOM_PSIHB_BASE;
> > uint32_t reg[] = {
> > - cpu_to_be32(lpc_pcba),
> > - cpu_to_be32(PNV_XSCOM_PSIHB_SIZE)
> > + cpu_to_be32(ppc->xscom_pcba),
> > + cpu_to_be32(ppc->xscom_size)
> > };
> >
> > - name = g_strdup_printf("psihb@%x", lpc_pcba);
> > + name = g_strdup_printf("psihb@%x", ppc->xscom_pcba);
> > offset = fdt_add_subnode(fdt, xscom_offset, name);
> > _FDT(offset);
> > g_free(name);
> >
> > - _FDT((fdt_setprop(fdt, offset, "reg", reg, sizeof(reg))));
> > -
> > - _FDT((fdt_setprop_cell(fdt, offset, "#address-cells", 2)));
> > - _FDT((fdt_setprop_cell(fdt, offset, "#size-cells", 1)));
> > - _FDT((fdt_setprop(fdt, offset, "compatible", compat,
> > - sizeof(compat))));
> > + _FDT(fdt_setprop(fdt, offset, "reg", reg, sizeof(reg)));
> > + _FDT(fdt_setprop_cell(fdt, offset, "#address-cells", 2));
> > + _FDT(fdt_setprop_cell(fdt, offset, "#size-cells", 1));
> > + _FDT(fdt_setprop(fdt, offset, "compatible", compat_p8,
> > + sizeof(compat_p8)));
> > return 0;
> > }
> >
> > @@ -555,6 +561,28 @@ static Property pnv_psi_properties[] = {
> > DEFINE_PROP_END_OF_LIST(),
> > };
> >
> > +static void pnv_psi_power8_class_init(ObjectClass *klass, void *data)
> > +{
> > + DeviceClass *dc = DEVICE_CLASS(klass);
> > + PnvPsiClass *ppc = PNV_PSI_CLASS(klass);
> > +
> > + dc->desc = "PowerNV PSI Controller POWER8";
> > + dc->realize = pnv_psi_power8_realize;
> > +
> > + ppc->chip_type = PNV_CHIP_POWER8;
> > + ppc->xscom_pcba = PNV_XSCOM_PSIHB_BASE;
> > + ppc->xscom_size = PNV_XSCOM_PSIHB_SIZE;
> > + ppc->bar_mask = PSIHB_BAR_MASK;
> > + ppc->irq_set = pnv_psi_power8_irq_set;
> > +}
> > +
> > +static const TypeInfo pnv_psi_power8_info = {
> > + .name = TYPE_PNV8_PSI,
> > + .parent = TYPE_PNV_PSI,
> > + .instance_init = pnv_psi_power8_instance_init,
> > + .class_init = pnv_psi_power8_class_init,
> > +};
> > +
> > static void pnv_psi_class_init(ObjectClass *klass, void *data)
> > {
> > DeviceClass *dc = DEVICE_CLASS(klass);
> > @@ -562,7 +590,7 @@ static void pnv_psi_class_init(ObjectClass *klass, void *data)
> >
> > xdc->dt_xscom = pnv_psi_dt_xscom;
> >
> > - dc->realize = pnv_psi_realize;
> > + dc->desc = "PowerNV PSI Controller";
> > dc->props = pnv_psi_properties;
> > }
> >
> > @@ -570,8 +598,9 @@ static const TypeInfo pnv_psi_info = {
> > .name = TYPE_PNV_PSI,
> > .parent = TYPE_SYS_BUS_DEVICE,
> > .instance_size = sizeof(PnvPsi),
> > - .instance_init = pnv_psi_init,
> > .class_init = pnv_psi_class_init,
> > + .class_size = sizeof(PnvPsiClass),
> > + .abstract = true,
> > .interfaces = (InterfaceInfo[]) {
> > { TYPE_PNV_XSCOM_INTERFACE },
> > { }
> > @@ -581,6 +610,7 @@ static const TypeInfo pnv_psi_info = {
> > static void pnv_psi_register_types(void)
> > {
> > type_register_static(&pnv_psi_info);
> > + type_register_static(&pnv_psi_power8_info);
> > }
> >
> > -type_init(pnv_psi_register_types)
> > +type_init(pnv_psi_register_types);
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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