Found by inspection: Rn is the base register against which the
load began; I is the register within the mask being processed.
The exception return should of course be procesed from the loaded PC.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 8f7f5b95aa..ad879e3480 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -10612,7 +10612,7 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
} else if (i == rn) {
loaded_var = tmp;
loaded_base = 1;
- } else if (rn == 15 && exc_return) {
+ } else if (i == 15 && exc_return) {
store_pc_exc_ret(s, tmp);
} else {
store_reg_from_load(s, i, tmp);
--
2.17.2
On 3/1/19 9:29 PM, Richard Henderson wrote:
> Found by inspection: Rn is the base register against which the
> load began; I is the register within the mask being processed.
> The exception return should of course be procesed from the loaded PC.
"processed"
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> target/arm/translate.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/arm/translate.c b/target/arm/translate.c
> index 8f7f5b95aa..ad879e3480 100644
> --- a/target/arm/translate.c
> +++ b/target/arm/translate.c
> @@ -10612,7 +10612,7 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
> } else if (i == rn) {
> loaded_var = tmp;
> loaded_base = 1;
> - } else if (rn == 15 && exc_return) {
> + } else if (i == 15 && exc_return) {
> store_pc_exc_ret(s, tmp);
> } else {
> store_reg_from_load(s, i, tmp);
>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
On Sat, 2 Mar 2019 at 19:10, Philippe Mathieu-Daudé <philmd@redhat.com> wrote:
>
> On 3/1/19 9:29 PM, Richard Henderson wrote:
> > Found by inspection: Rn is the base register against which the
> > load began; I is the register within the mask being processed.
> > The exception return should of course be procesed from the loaded PC.
>
> "processed"
>
> >
> > Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> > ---
> > target/arm/translate.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/target/arm/translate.c b/target/arm/translate.c
> > index 8f7f5b95aa..ad879e3480 100644
> > --- a/target/arm/translate.c
> > +++ b/target/arm/translate.c
> > @@ -10612,7 +10612,7 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
> > } else if (i == rn) {
> > loaded_var = tmp;
> > loaded_base = 1;
> > - } else if (rn == 15 && exc_return) {
> > + } else if (i == 15 && exc_return) {
> > store_pc_exc_ret(s, tmp);
> > } else {
> > store_reg_from_load(s, i, tmp);
> >
>
> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Applied to target-arm.next (with the typo fixed), thanks.
-- PMM
© 2016 - 2025 Red Hat, Inc.