[Qemu-devel] [PULL 0/2] tcg patch queue
[PULL v2.5 00/27] tcg patch queue
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The following changes since commit fc3dbb90f2eb069801bfb4cfe9cbc83cf9c5f4a9:
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v2: Fix target/loongarch printf formats for vaddr
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Include two more reviewed patches.
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Merge remote-tracking branch 'remotes/jnsnow/tags/bitmaps-pull-request' into staging (2019-02-21 13:09:33 +0000)
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This time with actual pull urls. :-/
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r~
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The following changes since commit db7aa99ef894e88fc5eedf02ca2579b8c344b2ec:
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Merge tag 'hw-misc-20250216' of https://github.com/philmd/qemu into staging (2025-02-16 20:48:06 -0500)
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are available in the Git repository at:
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are available in the Git repository at:
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https://github.com/rth7680/qemu.git tags/pull-tcg-20190221
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https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20250215-2
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for you to fetch changes up to 8c6edfdd90522caa4fc429144d393aba5b99f584:
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for you to fetch changes up to a39bdd0f4ba96fcbb6b5bcb6e89591d2b24f52eb:
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include/exec/helper-head.h: support "const void *" in helper calls (2019-02-21 10:22:24 -0800)
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tcg: Remove TCG_TARGET_HAS_{br,set}cond2 from riscv and loongarch64 (2025-02-17 09:52:07 -0800)
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----------------------------------------------------------------
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----------------------------------------------------------------
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Allow const void * as argument to helpers.
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tcg: Remove last traces of TCG_TARGET_NEED_POOL_LABELS
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Remove obsolete TODO file.
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tcg: Cleanups after disallowing 64-on-32
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tcg: Introduce constraint for zero register
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tcg: Remove TCG_TARGET_HAS_{br,set}cond2 from riscv and loongarch64
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tcg/i386: Use tcg_{high,unsigned}_cond in tcg_out_brcond2
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linux-user: Move TARGET_SA_RESTORER out of generic/signal.h
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linux-user: Fix alignment when unmapping excess reservation
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target/sparc: Fix register selection for all F*TOx and FxTO* instructions
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target/sparc: Fix gdbstub incorrectly handling registers f32-f62
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target/sparc: fake UltraSPARC T1 PCR and PIC registers
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----------------------------------------------------------------
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----------------------------------------------------------------
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David Hildenbrand (1):
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Andreas Schwab (1):
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include/exec/helper-head.h: support "const void *" in helper calls
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linux-user: Move TARGET_SA_RESTORER out of generic/signal.h
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Richard Henderson (1):
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Artyom Tarasenko (1):
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tcg: Remove TODO file
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target/sparc: fake UltraSPARC T1 PCR and PIC registers
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include/exec/helper-head.h | 5 +++++
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Fabiano Rosas (1):
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tcg/TODO | 14 --------------
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elfload: Fix alignment when unmapping excess reservation
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2 files changed, 5 insertions(+), 14 deletions(-)
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delete mode 100644 tcg/TODO
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Mikael Szreder (2):
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target/sparc: Fix register selection for all F*TOx and FxTO* instructions
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target/sparc: Fix gdbstub incorrectly handling registers f32-f62
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Richard Henderson (22):
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tcg: Remove last traces of TCG_TARGET_NEED_POOL_LABELS
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tcg: Remove TCG_OVERSIZED_GUEST
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tcg: Drop support for two address registers in gen_ldst
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tcg: Merge INDEX_op_qemu_*_{a32,a64}_*
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tcg/arm: Drop addrhi from prepare_host_addr
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tcg/i386: Drop addrhi from prepare_host_addr
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tcg/mips: Drop addrhi from prepare_host_addr
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tcg/ppc: Drop addrhi from prepare_host_addr
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tcg: Replace addr{lo,hi}_reg with addr_reg in TCGLabelQemuLdst
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plugins: Fix qemu_plugin_read_memory_vaddr parameters
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accel/tcg: Fix tlb_set_page_with_attrs, tlb_set_page
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target/loongarch: Use VADDR_PRIx for logging pc_next
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include/exec: Change vaddr to uintptr_t
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include/exec: Use uintptr_t in CPUTLBEntry
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tcg: Introduce the 'z' constraint for a hardware zero register
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tcg/aarch64: Use 'z' constraint
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tcg/loongarch64: Use 'z' constraint
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tcg/mips: Use 'z' constraint
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tcg/riscv: Use 'z' constraint
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tcg/sparc64: Use 'z' constraint
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tcg/i386: Use tcg_{high,unsigned}_cond in tcg_out_brcond2
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tcg: Remove TCG_TARGET_HAS_{br,set}cond2 from riscv and loongarch64
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include/exec/tlb-common.h | 10 +-
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include/exec/vaddr.h | 16 +-
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include/qemu/atomic.h | 18 +-
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include/tcg/oversized-guest.h | 23 ---
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include/tcg/tcg-opc.h | 28 +--
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include/tcg/tcg.h | 3 +-
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linux-user/aarch64/target_signal.h | 2 +
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linux-user/arm/target_signal.h | 2 +
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linux-user/generic/signal.h | 1 -
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linux-user/i386/target_signal.h | 2 +
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linux-user/m68k/target_signal.h | 1 +
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linux-user/microblaze/target_signal.h | 2 +
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linux-user/ppc/target_signal.h | 2 +
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linux-user/s390x/target_signal.h | 2 +
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linux-user/sh4/target_signal.h | 2 +
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linux-user/x86_64/target_signal.h | 2 +
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linux-user/xtensa/target_signal.h | 2 +
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tcg/aarch64/tcg-target-con-set.h | 12 +-
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tcg/aarch64/tcg-target.h | 2 +
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tcg/loongarch64/tcg-target-con-set.h | 15 +-
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tcg/loongarch64/tcg-target-con-str.h | 1 -
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tcg/loongarch64/tcg-target-has.h | 2 -
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tcg/loongarch64/tcg-target.h | 2 +
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tcg/mips/tcg-target-con-set.h | 26 +--
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tcg/mips/tcg-target-con-str.h | 1 -
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tcg/mips/tcg-target.h | 2 +
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tcg/riscv/tcg-target-con-set.h | 10 +-
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tcg/riscv/tcg-target-con-str.h | 1 -
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tcg/riscv/tcg-target-has.h | 2 -
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tcg/riscv/tcg-target.h | 2 +
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tcg/sparc64/tcg-target-con-set.h | 12 +-
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tcg/sparc64/tcg-target-con-str.h | 1 -
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tcg/sparc64/tcg-target.h | 3 +-
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tcg/tci/tcg-target.h | 1 -
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accel/tcg/cputlb.c | 32 +---
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accel/tcg/tcg-all.c | 9 +-
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linux-user/elfload.c | 4 +-
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plugins/api.c | 2 +-
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target/arm/ptw.c | 34 ----
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target/loongarch/tcg/translate.c | 2 +-
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target/riscv/cpu_helper.c | 13 +-
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target/sparc/gdbstub.c | 18 +-
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target/sparc/translate.c | 19 +++
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tcg/optimize.c | 21 +--
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tcg/tcg-op-ldst.c | 103 +++--------
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tcg/tcg.c | 97 +++++------
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tcg/tci.c | 119 +++----------
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docs/devel/multi-thread-tcg.rst | 1 -
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docs/devel/tcg-ops.rst | 4 +-
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target/loongarch/tcg/insn_trans/trans_atomic.c.inc | 2 +-
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target/sparc/insns.decode | 19 ++-
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tcg/aarch64/tcg-target.c.inc | 86 ++++------
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tcg/arm/tcg-target.c.inc | 114 ++++---------
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tcg/i386/tcg-target.c.inc | 190 +++++----------------
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tcg/loongarch64/tcg-target.c.inc | 72 +++-----
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tcg/mips/tcg-target.c.inc | 169 ++++++------------
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tcg/ppc/tcg-target.c.inc | 164 +++++-------------
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tcg/riscv/tcg-target.c.inc | 56 +++---
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tcg/s390x/tcg-target.c.inc | 40 ++---
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tcg/sparc64/tcg-target.c.inc | 45 ++---
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tcg/tci/tcg-target.c.inc | 60 ++-----
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61 files changed, 548 insertions(+), 1160 deletions(-)
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delete mode 100644 include/tcg/oversized-guest.h
diff view generated by jsdifflib
[Qemu-devel] [PULL 1/2] tcg: Remove TODO file
Deleted patch
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The last update to this file was 9 years ago. In the meantime,
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4 of the 6 ideas have actually been completed. The lat two do
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not actually make sense anymore.
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1
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Suggested-by: Thomas Huth <thuth@redhat.com>
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Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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---
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tcg/TODO | 14 --------------
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1 file changed, 14 deletions(-)
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delete mode 100644 tcg/TODO
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diff --git a/tcg/TODO b/tcg/TODO
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deleted file mode 100644
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index XXXXXXX..XXXXXXX
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--- a/tcg/TODO
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+++ /dev/null
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@@ -XXX,XX +XXX,XX @@
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-- Add new instructions such as: clz, ctz, popcnt.
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-
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-- See if it is worth exporting mul2, mulu2, div2, divu2.
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-
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-- Support of globals saved in fixed registers between TBs.
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-
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-Ideas:
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-
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-- Move the slow part of the qemu_ld/st ops after the end of the TB.
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-
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-- Change exception syntax to get closer to QOP system (exception
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- parameters given with a specific instruction).
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-
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-- Add float and vector support.
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--
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2.17.2
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diff view generated by jsdifflib
[Qemu-devel] [PULL 2/2] include/exec/helper-head.h: support "const void *" in helper calls
Deleted patch
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From: David Hildenbrand <david@redhat.com>
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Especially when dealing with out-of-line gvec helpers, it is often
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helpful to specify some vector pointers as constant. E.g. when
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we have two inputs and one output, marking the two inputs as consts
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pointers helps to avoid bugs.
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Const pointers can be specified via "cptr", however behave in TCG just
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like ordinary pointers. We can specify helpers like:
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DEF_HELPER_FLAGS_4(gvec_vbperm, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32)
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void HELPER(gvec_vbperm)(void *v1, const void *v2, const void *v3,
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uint32_t desc)
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And make sure that here, only v1 will be written (as long as const is
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not casted away, of course).
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Signed-off-by: David Hildenbrand <david@redhat.com>
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Message-Id: <20190221093459.22547-1-david@redhat.com>
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Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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---
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include/exec/helper-head.h | 5 +++++
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1 file changed, 5 insertions(+)
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diff --git a/include/exec/helper-head.h b/include/exec/helper-head.h
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index XXXXXXX..XXXXXXX 100644
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--- a/include/exec/helper-head.h
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+++ b/include/exec/helper-head.h
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@@ -XXX,XX +XXX,XX @@
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#define dh_alias_f32 i32
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#define dh_alias_f64 i64
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#define dh_alias_ptr ptr
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+#define dh_alias_cptr ptr
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#define dh_alias_void void
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#define dh_alias_noreturn noreturn
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#define dh_alias(t) glue(dh_alias_, t)
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@@ -XXX,XX +XXX,XX @@
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#define dh_ctype_f32 float32
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#define dh_ctype_f64 float64
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#define dh_ctype_ptr void *
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+#define dh_ctype_cptr const void *
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#define dh_ctype_void void
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#define dh_ctype_noreturn void QEMU_NORETURN
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#define dh_ctype(t) dh_ctype_##t
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@@ -XXX,XX +XXX,XX @@
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#define dh_is_64bit_i32 0
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#define dh_is_64bit_i64 1
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#define dh_is_64bit_ptr (sizeof(void *) == 8)
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+#define dh_is_64bit_cptr dh_is_64bit_ptr
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#define dh_is_64bit(t) glue(dh_is_64bit_, dh_alias(t))
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#define dh_is_signed_void 0
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@@ -XXX,XX +XXX,XX @@
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extension instructions that may be required, e.g. ia64's addp4. But
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for now we don't support any 64-bit targets with 32-bit pointers. */
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#define dh_is_signed_ptr 0
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+#define dh_is_signed_cptr dh_is_signed_ptr
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#define dh_is_signed_env dh_is_signed_ptr
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#define dh_is_signed(t) dh_is_signed_##t
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@@ -XXX,XX +XXX,XX @@
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#define dh_callflag_f32 0
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#define dh_callflag_f64 0
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#define dh_callflag_ptr 0
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+#define dh_callflag_cptr dh_callflag_ptr
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#define dh_callflag_void 0
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#define dh_callflag_noreturn TCG_CALL_NO_RETURN
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#define dh_callflag(t) glue(dh_callflag_, dh_alias(t))
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--
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2.17.2
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diff view generated by jsdifflib

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