| 1 | v2: drop a couple of RTH's patches that he wants to rework. | 1 | Massively slimmed down v2: MemTag broke bsd-user, and the npcm7xx |
|---|---|---|---|
| 2 | ethernet device failed 'make check' on big-endian hosts. | ||
| 2 | 3 | ||
| 3 | The following changes since commit 0266c739abbed804deabb4ccde2aa449466ac3b4: | 4 | -- PMM |
| 4 | 5 | ||
| 5 | Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-feb-14-2019' into staging (2019-02-14 18:33:00 +0000) | 6 | The following changes since commit 83339e21d05c824ebc9131d644f25c23d0e41ecf: |
| 7 | |||
| 8 | Merge remote-tracking branch 'remotes/stefanha-gitlab/tags/block-pull-request' into staging (2021-02-10 15:42:20 +0000) | ||
| 6 | 9 | ||
| 7 | are available in the Git repository at: | 10 | are available in the Git repository at: |
| 8 | 11 | ||
| 9 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20190215 | 12 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210211-1 |
| 10 | 13 | ||
| 11 | for you to fetch changes up to 0f8b09b22234460cb5b8766a25066cf6b5f06842: | 14 | for you to fetch changes up to d3c1183ffeb71ca3a783eae3d7e1c51e71e8a621: |
| 12 | 15 | ||
| 13 | gdbstub: Send a reply to the vKill packet. (2019-02-15 09:56:41 +0000) | 16 | target/arm: Correctly initialize MDCR_EL2.HPMN (2021-02-11 19:48:09 +0000) |
| 14 | 17 | ||
| 15 | ---------------------------------------------------------------- | 18 | ---------------------------------------------------------------- |
| 16 | target-arm queue: | 19 | target-arm queue: |
| 17 | * gdbstub: Send a reply to the vKill packet | 20 | * Correctly initialize MDCR_EL2.HPMN |
| 18 | * Improve codegen for neon min/max and saturating arithmetic | 21 | * versal: Use nr_apu_cpus in favor of hard coding 2 |
| 19 | * Fix a bug in clearing FPSCR exception status bits | 22 | * accel/tcg: Add URL of clang bug to comment about our workaround |
| 20 | * hw/arm/armsse: Fix miswiring of expansion IRQs | 23 | * Add support for FEAT_DIT, Data Independent Timing |
| 21 | * hw/intc/armv7m_nvic: Allow byte accesses to SHPR1 | 24 | * Remove GPIO from unimplemented NPCM7XX |
| 22 | * MAINTAINERS: Remove Peter Crosthwaite from various entries | 25 | * Fix SCR RES1 handling |
| 23 | * arm: Allow system registers for KVM guests to be changed by QEMU code | 26 | * Don't migrate CPUARMState.features |
| 24 | * linux-user: support HWCAP_CPUID which exposes ID registers to user code | ||
| 25 | * Fix bug in 128-bit cmpxchg for BE Arm guests | ||
| 26 | * Implement (no-op) HACR_EL2 | ||
| 27 | * Fix CRn to be 14 for PMEVTYPER/PMEVCNTR | ||
| 28 | 27 | ||
| 29 | ---------------------------------------------------------------- | 28 | ---------------------------------------------------------------- |
| 30 | Aaron Lindsay OS (1): | 29 | Aaron Lindsay (1): |
| 31 | target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR | 30 | target/arm: Don't migrate CPUARMState.features |
| 32 | 31 | ||
| 33 | Alex Bennée (5): | 32 | Daniel Müller (1): |
| 34 | target/arm: relax permission checks for HWCAP_CPUID registers | 33 | target/arm: Correctly initialize MDCR_EL2.HPMN |
| 35 | target/arm: expose CPUID registers to userspace | ||
| 36 | target/arm: expose MPIDR_EL1 to userspace | ||
| 37 | target/arm: expose remaining CPUID registers as RAZ | ||
| 38 | linux-user/elfload: enable HWCAP_CPUID for AArch64 | ||
| 39 | 34 | ||
| 40 | Catherine Ho (1): | 35 | Edgar E. Iglesias (1): |
| 41 | target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be | 36 | hw/arm: versal: Use nr_apu_cpus in favor of hard coding 2 |
| 42 | 37 | ||
| 43 | Peter Maydell (5): | 38 | Hao Wu (1): |
| 44 | target/arm: Implement HACR_EL2 | 39 | hw/arm: Remove GPIO from unimplemented NPCM7XX |
| 45 | arm: Allow system registers for KVM guests to be changed by QEMU code | ||
| 46 | MAINTAINERS: Remove Peter Crosthwaite from various entries | ||
| 47 | hw/intc/armv7m_nvic: Allow byte accesses to SHPR1 | ||
| 48 | hw/arm/armsse: Fix miswiring of expansion IRQs | ||
| 49 | 40 | ||
| 50 | Richard Henderson (12): | 41 | Mike Nawrocki (1): |
| 51 | target/arm: Rely on optimization within tcg_gen_gvec_or | 42 | target/arm: Fix SCR RES1 handling |
| 52 | target/arm: Use vector minmax expanders for aarch64 | ||
| 53 | target/arm: Use vector minmax expanders for aarch32 | ||
| 54 | target/arm: Use tcg integer min/max primitives for neon | ||
| 55 | target/arm: Remove neon min/max helpers | ||
| 56 | target/arm: Fix vfp_gdb_get/set_reg vs FPSCR | ||
| 57 | target/arm: Fix arm_cpu_dump_state vs FPSCR | ||
| 58 | target/arm: Split out flags setting from vfp compares | ||
| 59 | target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR] | ||
| 60 | target/arm: Split out FPSCR.QC to a vector field | ||
| 61 | target/arm: Use vector operations for saturation | ||
| 62 | target/arm: Add missing clear_tail calls | ||
| 63 | 43 | ||
| 64 | Sandra Loosemore (1): | 44 | Peter Maydell (2): |
| 65 | gdbstub: Send a reply to the vKill packet. | 45 | arm: Update infocenter.arm.com URLs |
| 46 | accel/tcg: Add URL of clang bug to comment about our workaround | ||
| 66 | 47 | ||
| 67 | target/arm/cpu.h | 50 +++++++++- | 48 | Rebecca Cran (4): |
| 68 | target/arm/helper.h | 45 ++++++--- | 49 | target/arm: Add support for FEAT_DIT, Data Independent Timing |
| 69 | target/arm/translate.h | 4 + | 50 | target/arm: Support AA32 DIT by moving PSTATE_SS from cpsr into env->pstate |
| 70 | gdbstub.c | 1 + | 51 | target/arm: Set ID_AA64PFR0.DIT and ID_PFR0.DIT to 1 for "max" AA64 CPU |
| 71 | hw/arm/armsse.c | 2 +- | 52 | target/arm: Set ID_PFR0.DIT to 1 for "max" 32-bit CPU |
| 72 | hw/intc/armv7m_nvic.c | 4 +- | ||
| 73 | linux-user/elfload.c | 1 + | ||
| 74 | target/arm/helper-a64.c | 4 +- | ||
| 75 | target/arm/helper.c | 228 ++++++++++++++++++++++++++++++++++++--------- | ||
| 76 | target/arm/kvm32.c | 20 +--- | ||
| 77 | target/arm/kvm64.c | 2 + | ||
| 78 | target/arm/machine.c | 2 +- | ||
| 79 | target/arm/neon_helper.c | 14 +-- | ||
| 80 | target/arm/translate-a64.c | 77 ++++++--------- | ||
| 81 | target/arm/translate-sve.c | 6 +- | ||
| 82 | target/arm/translate.c | 219 ++++++++++++++++++++++++++++++++++--------- | ||
| 83 | target/arm/vec_helper.c | 134 +++++++++++++++++++++++++- | ||
| 84 | MAINTAINERS | 4 - | ||
| 85 | 18 files changed, 622 insertions(+), 195 deletions(-) | ||
| 86 | 53 | ||
| 54 | include/hw/dma/pl080.h | 7 ++-- | ||
| 55 | include/hw/misc/arm_integrator_debug.h | 2 +- | ||
| 56 | include/hw/ssi/pl022.h | 5 ++- | ||
| 57 | target/arm/cpu.h | 17 ++++++++ | ||
| 58 | target/arm/internals.h | 6 +++ | ||
| 59 | accel/tcg/cpu-exec.c | 25 +++++++++--- | ||
| 60 | hw/arm/aspeed_ast2600.c | 2 +- | ||
| 61 | hw/arm/musca.c | 4 +- | ||
| 62 | hw/arm/npcm7xx.c | 8 ---- | ||
| 63 | hw/arm/xlnx-versal.c | 4 +- | ||
| 64 | hw/misc/arm_integrator_debug.c | 2 +- | ||
| 65 | hw/timer/arm_timer.c | 7 ++-- | ||
| 66 | target/arm/cpu.c | 4 ++ | ||
| 67 | target/arm/cpu64.c | 5 +++ | ||
| 68 | target/arm/helper-a64.c | 27 +++++++++++-- | ||
| 69 | target/arm/helper.c | 71 +++++++++++++++++++++++++++------- | ||
| 70 | target/arm/machine.c | 2 +- | ||
| 71 | target/arm/op_helper.c | 9 +---- | ||
| 72 | target/arm/translate-a64.c | 12 ++++++ | ||
| 73 | 19 files changed, 164 insertions(+), 55 deletions(-) | ||
| 74 | diff view generated by jsdifflib |