hw/arm/bcm2835_peripherals.c | 15 ++ hw/timer/Makefile.objs | 2 + hw/timer/bcm283x_timer.c | 283 +++++++++++++++++++++++++++ include/hw/arm/bcm2835_peripherals.h | 2 + include/hw/timer/bcm283x_timer.h | 37 ++++ 5 files changed, 339 insertions(+) create mode 100644 hw/timer/bcm283x_timer.c create mode 100644 include/hw/timer/bcm283x_timer.h
From cf7dd33136c143d17c623e1a7277c1bf870b0863 Mon Sep 17 00:00:00 2001
From: Mark <alnyan@airmail.cc>
Date: Fri, 8 Feb 2019 16:48:34 +0200
Subject: [PATCH] hw/arm/bcm2835_peripheral: add bcm283x sp804-alike timer
Signed-off-by: Mark <alnyan@airmail.cc>
---
hw/arm/bcm2835_peripherals.c | 15 ++
hw/timer/Makefile.objs | 2 +
hw/timer/bcm283x_timer.c | 283 +++++++++++++++++++++++++++
include/hw/arm/bcm2835_peripherals.h | 2 +
include/hw/timer/bcm283x_timer.h | 37 ++++
5 files changed, 339 insertions(+)
create mode 100644 hw/timer/bcm283x_timer.c
create mode 100644 include/hw/timer/bcm283x_timer.h
diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c
index 6be7660e8c..0c832283db 100644
--- a/hw/arm/bcm2835_peripherals.c
+++ b/hw/arm/bcm2835_peripherals.c
@@ -117,6 +117,11 @@ static void bcm2835_peripherals_init(Object *obj)
OBJECT(&s->sdhci.sdbus), &error_abort);
object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhost",
OBJECT(&s->sdhost.sdbus), &error_abort);
+
+ /* SP804-alike ARM Timer */
+ object_initialize(&s->bcm283xsp804, sizeof(s->bcm283xsp804), TYPE_BCM283xSP804);
+ object_property_add_child(obj, "bcm283xsp804", OBJECT(&s->bcm283xsp804), NULL);
+ qdev_set_parent_bus(DEVICE(&s->bcm283xsp804), sysbus_get_default());
}
static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
@@ -334,6 +339,16 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
error_propagate(errp, err);
return;
}
+
+ /* SP804-alike ARM Timer */
+ object_property_set_bool(OBJECT(&s->bcm283xsp804), true, "realized", &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
+ }
+
+ memory_region_add_subregion(&s->peri_mr, ARMCTRL_TIMER0_1_OFFSET,
+ sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->bcm283xsp804), 0));
}
static void bcm2835_peripherals_class_init(ObjectClass *oc, void *data)
diff --git a/hw/timer/Makefile.objs b/hw/timer/Makefile.objs
index 0e9a4530f8..09a3706701 100644
--- a/hw/timer/Makefile.objs
+++ b/hw/timer/Makefile.objs
@@ -47,3 +47,5 @@ common-obj-$(CONFIG_SUN4V_RTC) += sun4v-rtc.o
common-obj-$(CONFIG_CMSDK_APB_TIMER) += cmsdk-apb-timer.o
common-obj-$(CONFIG_CMSDK_APB_DUALTIMER) += cmsdk-apb-dualtimer.o
common-obj-$(CONFIG_MSF2) += mss-timer.o
+
+common-obj-$(CONFIG_RASPI) += bcm283x_timer.o
diff --git a/hw/timer/bcm283x_timer.c b/hw/timer/bcm283x_timer.c
new file mode 100644
index 0000000000..e7509b37e9
--- /dev/null
+++ b/hw/timer/bcm283x_timer.c
@@ -0,0 +1,283 @@
+#include "qemu/osdep.h"
+#include "hw/sysbus.h"
+#include "qemu/timer.h"
+#include "qemu-common.h"
+#include "hw/qdev.h"
+#include "hw/ptimer.h"
+#include "hw/timer/bcm283x_timer.h"
+#include "qemu/main-loop.h"
+#include "qemu/log.h"
+
+/* TODO: implement free-running timer as per BCM283x peripheral specification */
+
+#define TIMER_CTRL_32BIT (1 << 1)
+#define TIMER_CTRL_DIV1 (0 << 2)
+#define TIMER_CTRL_DIV16 (1 << 2)
+#define TIMER_CTRL_DIV256 (2 << 2)
+#define TIMER_CTRL_IE (1 << 5)
+#define TIMER_CTRL_ENABLE (1 << 7)
+
+struct bcm283x_timer_state {
+ ptimer_state *timer;
+ uint32_t control;
+ uint32_t limit;
+ int freq;
+ int int_level;
+ qemu_irq irq;
+ int prev_div; // Not implemented
+ int free_run_cnt; // Not implemented
+};
+
+static void bcm283x_timer_update(bcm283x_timer_state *s)
+{
+ if (s->int_level && (s->control & TIMER_CTRL_IE)) {
+ qemu_irq_raise(s->irq);
+ } else {
+ qemu_irq_lower(s->irq);
+ }
+}
+
+static uint32_t bcm283x_timer_read(void *opaque, hwaddr offset)
+{
+ bcm283x_timer_state *s = (bcm283x_timer_state *) opaque;
+
+ switch (offset >> 2) {
+ case 0: /* Load register */
+ case 6: /* Reload register */
+ return s->limit;
+ case 1: /* Value register */
+ return ptimer_get_count(s->timer);
+ case 2: /* Control register */
+ return s->control;
+ case 3: /* IRQ clear/ACK register */
+ /* The register is write-only, but returns reverse "ARMT" string bytes */
+ return 0x544D5241;
+ case 4: /* RAW IRQ register */
+ return s->int_level;
+ case 5: /* Masked IRQ register */
+ if ((s->control & TIMER_CTRL_IE) == 0)
+ return 0;
+ return s->int_level;
+ default:
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Bad offset %x\n", __func__, (int) offset);
+ return 0;
+ }
+}
+
+static void bcm283x_timer_recalibrate(bcm283x_timer_state *s, int reload)
+{
+ uint32_t limit;
+
+ /* Consider timer periodic */
+ limit = s->limit;
+
+ ptimer_set_limit(s->timer, limit, reload);
+}
+
+static void bcm283x_timer_write(void *opaque, hwaddr offset, uint32_t value)
+{
+ bcm283x_timer_state *s = (bcm283x_timer_state *) opaque;
+ int freq;
+
+ switch (offset >> 2) {
+ case 0: /* Load register */
+ s->limit = value;
+ bcm283x_timer_recalibrate(s, 1);
+ break;
+ case 1: /* Value register */
+ /* Read only */
+ break;
+ case 2: /* Control register */
+ if (s->control & TIMER_CTRL_ENABLE) {
+ ptimer_stop(s->timer);
+ }
+
+ s->control = value;
+ freq = s->freq;
+
+ /* Set pre-scaler */
+ switch ((value >> 2) & 3) {
+ case 1: freq >>= 4; break; /* 16 */
+ case 2: freq >>= 8; break; /* 256 */
+ }
+
+ bcm283x_timer_recalibrate(s, s->control & TIMER_CTRL_ENABLE);
+ ptimer_set_freq(s->timer, freq);
+ if (s->control & TIMER_CTRL_ENABLE) {
+ ptimer_run(s->timer, 0);
+ }
+ break;
+ case 3: /* IRQ clear/ACK register */
+ s->int_level = 0;
+ break;
+ case 6: /* Reload register */
+ s->limit = value;
+ bcm283x_timer_recalibrate(s, 0);
+ break;
+ default:
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Bad offset %x\n", __func__, (int) offset);
+ break;
+ }
+
+ bcm283x_timer_update(s);
+}
+
+static void bcm283x_timer_tick(void *opaque)
+{
+ bcm283x_timer_state *s = (bcm283x_timer_state *) opaque;
+ s->int_level = 1;
+ bcm283x_timer_update(s);
+}
+
+static const VMStateDescription vmstate_bcm283x_timer = {
+ .name = "bcm283x_timer",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .fields = (VMStateField[]) {
+ VMSTATE_UINT32(control, bcm283x_timer_state),
+ VMSTATE_UINT32(limit, bcm283x_timer_state),
+ VMSTATE_INT32(int_level, bcm283x_timer_state),
+ VMSTATE_PTIMER(timer, bcm283x_timer_state),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+static bcm283x_timer_state *bcm283x_timer_init(uint32_t freq)
+{
+ bcm283x_timer_state *s;
+ QEMUBH *bh;
+
+ s = (bcm283x_timer_state *) g_malloc0(sizeof(bcm283x_timer_state));
+ s->freq = freq;
+ s->control = TIMER_CTRL_IE;
+
+ bh = qemu_bh_new(bcm283x_timer_tick, s);
+ s->timer = ptimer_init(bh, PTIMER_POLICY_DEFAULT);
+ vmstate_register(NULL, -1, &vmstate_bcm283x_timer, s);
+
+ return s;
+}
+
+/* BCM283x's implementation of SP804 ARM timer */
+
+/* XXX: BCM's datasheet does not seem to provide these values and they may differ */
+static const uint8_t bcm283xsp803_ids[] = {
+ /* Timer ID */
+ 0x04, 0x18, 0x14, 0x00,
+ /* PrimeCell ID */
+ 0x0D, 0xF0, 0x05, 0xB1
+};
+
+static void bcm283xsp804_set_irq(void *opaque, int irq, int level)
+{
+ BCM283xSP804State *s = (BCM283xSP804State *) opaque;
+
+ s->level = level;
+ qemu_set_irq(s->irq, s->level);
+}
+
+static uint64_t bcm283xsp804_read(void *opaque, hwaddr offset, unsigned size)
+{
+ BCM283xSP804State *s = (BCM283xSP804State *) opaque;
+
+ if (offset < 0x20) {
+ return bcm283x_timer_read(s->timer, offset);
+ }
+ /* No second timer (0x20 < offset < 0x40) */
+
+ if (offset >= 0xFE0 && offset <= 0xFFC) {
+ return bcm283xsp803_ids[(offset - 0xFE0) >> 2];
+ }
+
+ switch (offset) {
+ /* Unimplemented: integration test control registers */
+ case 0xF00:
+ case 0xF04:
+ qemu_log_mask(LOG_UNIMP,
+ "%s: integration test registers unimplemented\n", __func__);
+ return 0;
+ }
+
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Bad offset %x\n", __func__, (int) offset);
+ return 0;
+}
+
+static void bcm283xsp803_write(void *opaque, hwaddr offset, uint64_t value, unsigned size)
+{
+ BCM283xSP804State *s = (BCM283xSP804State *) opaque;
+
+ if (offset < 0x20) {
+ bcm283x_timer_write(s->timer, offset, value);
+ }
+ /* No second timer (0x20 < offset < 0x40) */
+
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "%s: Bad offset %x\n", __func__, (int) offset);
+}
+
+static const MemoryRegionOps bcm283xsp804_ops = {
+ .read = bcm283xsp804_read,
+ .write = bcm283xsp803_write,
+ .endianness = DEVICE_NATIVE_ENDIAN
+};
+
+static const VMStateDescription vmstate_bcm283xsp804 = {
+ .name = "bcm283xsp804",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .fields = (VMStateField[]) {
+ VMSTATE_INT32(level, BCM283xSP804State),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+static void bcm283xsp804_init(Object *obj)
+{
+ BCM283xSP804State *s = BCM283xSP804(obj);
+ SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+
+ sysbus_init_irq(sbd, &s->irq);
+ memory_region_init_io(&s->iomem, obj, &bcm283xsp804_ops, s, "bcm283xsp804", 0x1000);
+
+ sysbus_init_mmio(sbd, &s->iomem);
+}
+
+static void bcm283xsp804_realize(DeviceState *dev, Error **errp)
+{
+ BCM283xSP804State *s = BCM283xSP804(dev);
+
+ s->timer = bcm283x_timer_init(s->freq0);
+ s->timer->irq = qemu_allocate_irq(bcm283xsp804_set_irq, s, 0);
+}
+
+static Property bcm283xsp804_properties[] = {
+ DEFINE_PROP_UINT32("freq0", BCM283xSP804State, freq0, 1000000),
+ DEFINE_PROP_END_OF_LIST()
+};
+
+static void bcm283xsp804_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *k = DEVICE_CLASS(klass);
+
+ k->realize = bcm283xsp804_realize;
+ k->props = bcm283xsp804_properties;
+ k->vmsd = &vmstate_bcm283xsp804;
+}
+
+static const TypeInfo bcm283xsp804_info = {
+ .name = TYPE_BCM283xSP804,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(BCM283xSP804State),
+ .instance_init = bcm283xsp804_init,
+ .class_init = bcm283xsp804_class_init
+};
+
+static void bcm283x_timer_register_types(void)
+{
+ type_register_static(&bcm283xsp804_info);
+}
+
+type_init(bcm283x_timer_register_types)
diff --git a/include/hw/arm/bcm2835_peripherals.h b/include/hw/arm/bcm2835_peripherals.h
index f5b193f670..d13aad43cb 100644
--- a/include/hw/arm/bcm2835_peripherals.h
+++ b/include/hw/arm/bcm2835_peripherals.h
@@ -23,6 +23,7 @@
#include "hw/sd/sdhci.h"
#include "hw/sd/bcm2835_sdhost.h"
#include "hw/gpio/bcm2835_gpio.h"
+#include "hw/timer/bcm283x_timer.h"
#define TYPE_BCM2835_PERIPHERALS "bcm2835-peripherals"
#define BCM2835_PERIPHERALS(obj) \
@@ -48,6 +49,7 @@ typedef struct BCM2835PeripheralState {
SDHCIState sdhci;
BCM2835SDHostState sdhost;
BCM2835GpioState gpio;
+ BCM283xSP804State bcm283xsp804;
} BCM2835PeripheralState;
#endif /* BCM2835_PERIPHERALS_H */
diff --git a/include/hw/timer/bcm283x_timer.h b/include/hw/timer/bcm283x_timer.h
new file mode 100644
index 0000000000..0755db11af
--- /dev/null
+++ b/include/hw/timer/bcm283x_timer.h
@@ -0,0 +1,37 @@
+/*
+ * Broadcom BCM283x ARM timer variant based on ARM SP804
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef HW_TIMER_BCM2835_TIMER_H
+#define HW_TIMER_BCM2835_TIMER_H
+
+#include "hw/sysbus.h"
+
+#define TYPE_BCM283xSP804 "bcm283xsp804"
+#define BCM283xSP804(obj) OBJECT_CHECK(BCM283xSP804State, (obj), TYPE_BCM283xSP804)
+
+typedef struct bcm283x_timer_state bcm283x_timer_state;
+
+typedef struct {
+ SysBusDevice parent_obj;
+
+ MemoryRegion iomem;
+ bcm283x_timer_state *timer;
+ uint32_t freq0;
+ int level;
+ qemu_irq irq;
+} BCM283xSP804State;
+
+#endif
--
2.20.1
Patchew URL: https://patchew.org/QEMU/20190208224020.GA4670@nyan/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PATCH] hw/arm/bcm2835_peripheral: add bcm283x sp804-alike timer
Type: series
Message-id: 20190208224020.GA4670@nyan
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
t [tag update] patchew/20190130210350.16757-1-luke.r.nels@gmail.com -> patchew/20190130210350.16757-1-luke.r.nels@gmail.com
* [new tag] patchew/20190208224020.GA4670@nyan -> patchew/20190208224020.GA4670@nyan
Switched to a new branch 'test'
a1e2330d4d hw/arm/bcm2835_peripheral: add bcm283x sp804-alike timer
=== OUTPUT BEGIN ===
Argument "m" isn't numeric in numeric eq (==) at ./scripts/checkpatch.pl line 2771.
Argument "m" isn't numeric in numeric eq (==) at ./scripts/checkpatch.pl line 2771.
Use of uninitialized value $1 in concatenation (.) or string at ./scripts/checkpatch.pl line 2772.
WARNING: line over 80 characters
#25: FILE: hw/arm/bcm2835_peripherals.c:122:
+ object_initialize(&s->bcm283xsp804, sizeof(s->bcm283xsp804), TYPE_BCM283xSP804);
WARNING: line over 80 characters
#26: FILE: hw/arm/bcm2835_peripherals.c:123:
+ object_property_add_child(obj, "bcm283xsp804", OBJECT(&s->bcm283xsp804), NULL);
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#59:
new file mode 100644
ERROR: do not use C99 // comments
#90: FILE: hw/timer/bcm283x_timer.c:27:
+ int prev_div; // Not implemented
ERROR: do not use C99 // comments
#91: FILE: hw/timer/bcm283x_timer.c:28:
+ int free_run_cnt; // Not implemented
WARNING: line over 80 characters
#116: FILE: hw/timer/bcm283x_timer.c:53:
+ /* The register is write-only, but returns reverse "ARMT" string bytes */
ERROR: braces {} are necessary for all arms of this statement
#121: FILE: hw/timer/bcm283x_timer.c:58:
+ if ((s->control & TIMER_CTRL_IE) == 0)
[...]
ERROR: switch and case should be at the same indent
#146: FILE: hw/timer/bcm283x_timer.c:83:
+ switch (offset >> 2) {
+ case 0: /* Load register */
[...]
+ case 1: /* Value register */
[...]
+ case 2: /* Control register */
[...]
+ case 3: /* IRQ clear/ACK register */
[...]
+ case 6: /* Reload register */
[...]
+ default:
ERROR: trailing statements should be on next line
#164: FILE: hw/timer/bcm283x_timer.c:101:
+ case 1: freq >>= 4; break; /* 16 */
ERROR: trailing statements should be on next line
#165: FILE: hw/timer/bcm283x_timer.c:102:
+ case 2: freq >>= 8; break; /* 256 */
ERROR: unnecessary cast may hide bugs, use g_new0 instead
#215: FILE: hw/timer/bcm283x_timer.c:152:
+ s = (bcm283x_timer_state *) g_malloc0(sizeof(bcm283x_timer_state));
WARNING: line over 80 characters
#228: FILE: hw/timer/bcm283x_timer.c:165:
+/* XXX: BCM's datasheet does not seem to provide these values and they may differ */
WARNING: line over 80 characters
#262: FILE: hw/timer/bcm283x_timer.c:199:
+ "%s: integration test registers unimplemented\n", __func__);
WARNING: line over 80 characters
#271: FILE: hw/timer/bcm283x_timer.c:208:
+static void bcm283xsp803_write(void *opaque, hwaddr offset, uint64_t value, unsigned size)
WARNING: line over 80 characters
#306: FILE: hw/timer/bcm283x_timer.c:243:
+ memory_region_init_io(&s->iomem, obj, &bcm283xsp804_ops, s, "bcm283xsp804", 0x1000);
WARNING: line over 80 characters
#395: FILE: include/hw/timer/bcm283x_timer.h:23:
+#define BCM283xSP804(obj) OBJECT_CHECK(BCM283xSP804State, (obj), TYPE_BCM283xSP804)
total: 7 errors, 9 warnings, 366 lines checked
Commit a1e2330d4de2 (hw/arm/bcm2835_peripheral: add bcm283x sp804-alike timer) has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/20190208224020.GA4670@nyan/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
Patchew URL: https://patchew.org/QEMU/20190208224020.GA4670@nyan/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PATCH] hw/arm/bcm2835_peripheral: add bcm283x sp804-alike timer
Message-id: 20190208224020.GA4670@nyan
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
- [tag update] patchew/20190130210350.16757-1-luke.r.nels@gmail.com -> patchew/20190130210350.16757-1-luke.r.nels@gmail.com
* [new tag] patchew/20190208224020.GA4670@nyan -> patchew/20190208224020.GA4670@nyan
Submodule 'capstone' (https://git.qemu.org/git/capstone.git) registered for path 'capstone'
Submodule 'dtc' (https://git.qemu.org/git/dtc.git) registered for path 'dtc'
Submodule 'roms/QemuMacDrivers' (https://git.qemu.org/git/QemuMacDrivers.git) registered for path 'roms/QemuMacDrivers'
Submodule 'roms/SLOF' (https://git.qemu.org/git/SLOF.git) registered for path 'roms/SLOF'
Submodule 'roms/ipxe' (https://git.qemu.org/git/ipxe.git) registered for path 'roms/ipxe'
Submodule 'roms/openbios' (https://git.qemu.org/git/openbios.git) registered for path 'roms/openbios'
Submodule 'roms/openhackware' (https://git.qemu.org/git/openhackware.git) registered for path 'roms/openhackware'
Submodule 'roms/qemu-palcode' (https://git.qemu.org/git/qemu-palcode.git) registered for path 'roms/qemu-palcode'
Submodule 'roms/seabios' (https://git.qemu.org/git/seabios.git/) registered for path 'roms/seabios'
Submodule 'roms/seabios-hppa' (https://github.com/hdeller/seabios-hppa.git) registered for path 'roms/seabios-hppa'
Submodule 'roms/sgabios' (https://git.qemu.org/git/sgabios.git) registered for path 'roms/sgabios'
Submodule 'roms/skiboot' (https://git.qemu.org/git/skiboot.git) registered for path 'roms/skiboot'
Submodule 'roms/u-boot' (https://git.qemu.org/git/u-boot.git) registered for path 'roms/u-boot'
Submodule 'roms/u-boot-sam460ex' (https://git.qemu.org/git/u-boot-sam460ex.git) registered for path 'roms/u-boot-sam460ex'
Submodule 'tests/fp/berkeley-softfloat-3' (https://github.com/cota/berkeley-softfloat-3) registered for path 'tests/fp/berkeley-softfloat-3'
Submodule 'tests/fp/berkeley-testfloat-3' (https://github.com/cota/berkeley-testfloat-3) registered for path 'tests/fp/berkeley-testfloat-3'
Submodule 'ui/keycodemapdb' (https://git.qemu.org/git/keycodemapdb.git) registered for path 'ui/keycodemapdb'
Cloning into 'capstone'...
Submodule path 'capstone': checked out '22ead3e0bfdb87516656453336160e0a37b066bf'
Cloning into 'dtc'...
Submodule path 'dtc': checked out '88f18909db731a627456f26d779445f84e449536'
Cloning into 'roms/QemuMacDrivers'...
Submodule path 'roms/QemuMacDrivers': checked out '90c488d5f4a407342247b9ea869df1c2d9c8e266'
Cloning into 'roms/SLOF'...
Submodule path 'roms/SLOF': checked out 'a5b428e1c1eae703bdd62a3f527223c291ee3fdc'
Cloning into 'roms/ipxe'...
Submodule path 'roms/ipxe': checked out 'de4565cbe76ea9f7913a01f331be3ee901bb6e17'
Cloning into 'roms/openbios'...
Submodule path 'roms/openbios': checked out '441a84d3a642a10b948369c63f32367e8ff6395b'
Cloning into 'roms/openhackware'...
Submodule path 'roms/openhackware': checked out 'c559da7c8eec5e45ef1f67978827af6f0b9546f5'
Cloning into 'roms/qemu-palcode'...
Submodule path 'roms/qemu-palcode': checked out '51c237d7e20d05100eacadee2f61abc17e6bc097'
Cloning into 'roms/seabios'...
Submodule path 'roms/seabios': checked out 'a698c8995ffb2838296ec284fe3c4ad33dfca307'
Cloning into 'roms/seabios-hppa'...
Submodule path 'roms/seabios-hppa': checked out '1ef99a01572c2581c30e16e6fe69e9ea2ef92ce0'
Cloning into 'roms/sgabios'...
Submodule path 'roms/sgabios': checked out 'cbaee52287e5f32373181cff50a00b6c4ac9015a'
Cloning into 'roms/skiboot'...
Submodule path 'roms/skiboot': checked out 'e0ee24c27a172bcf482f6f2bc905e6211c134bcc'
Cloning into 'roms/u-boot'...
Submodule path 'roms/u-boot': checked out 'd85ca029f257b53a96da6c2fb421e78a003a9943'
Cloning into 'roms/u-boot-sam460ex'...
Submodule path 'roms/u-boot-sam460ex': checked out '60b3916f33e617a815973c5a6df77055b2e3a588'
Cloning into 'tests/fp/berkeley-softfloat-3'...
Submodule path 'tests/fp/berkeley-softfloat-3': checked out 'b64af41c3276f97f0e181920400ee056b9c88037'
Cloning into 'tests/fp/berkeley-testfloat-3'...
Submodule path 'tests/fp/berkeley-testfloat-3': checked out '5a59dcec19327396a011a17fd924aed4fec416b3'
Cloning into 'ui/keycodemapdb'...
Submodule path 'ui/keycodemapdb': checked out '6b3d716e2b6472eb7189d3220552280ef3d832ce'
Switched to a new branch 'test'
a1e2330 hw/arm/bcm2835_peripheral: add bcm283x sp804-alike timer
=== OUTPUT BEGIN ===
Argument "m" isn't numeric in numeric eq (==) at ./scripts/checkpatch.pl line 2771.
Argument "m" isn't numeric in numeric eq (==) at ./scripts/checkpatch.pl line 2771.
Use of uninitialized value $1 in concatenation (.) or string at ./scripts/checkpatch.pl line 2772.
WARNING: line over 80 characters
#25: FILE: hw/arm/bcm2835_peripherals.c:122:
+ object_initialize(&s->bcm283xsp804, sizeof(s->bcm283xsp804), TYPE_BCM283xSP804);
WARNING: line over 80 characters
#26: FILE: hw/arm/bcm2835_peripherals.c:123:
+ object_property_add_child(obj, "bcm283xsp804", OBJECT(&s->bcm283xsp804), NULL);
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#59:
new file mode 100644
ERROR: do not use C99 // comments
#90: FILE: hw/timer/bcm283x_timer.c:27:
+ int prev_div; // Not implemented
ERROR: do not use C99 // comments
#91: FILE: hw/timer/bcm283x_timer.c:28:
+ int free_run_cnt; // Not implemented
WARNING: line over 80 characters
#116: FILE: hw/timer/bcm283x_timer.c:53:
+ /* The register is write-only, but returns reverse "ARMT" string bytes */
ERROR: braces {} are necessary for all arms of this statement
#121: FILE: hw/timer/bcm283x_timer.c:58:
+ if ((s->control & TIMER_CTRL_IE) == 0)
[...]
ERROR: switch and case should be at the same indent
#146: FILE: hw/timer/bcm283x_timer.c:83:
+ switch (offset >> 2) {
+ case 0: /* Load register */
[...]
+ case 1: /* Value register */
[...]
+ case 2: /* Control register */
[...]
+ case 3: /* IRQ clear/ACK register */
[...]
+ case 6: /* Reload register */
[...]
+ default:
ERROR: trailing statements should be on next line
#164: FILE: hw/timer/bcm283x_timer.c:101:
+ case 1: freq >>= 4; break; /* 16 */
ERROR: trailing statements should be on next line
#165: FILE: hw/timer/bcm283x_timer.c:102:
+ case 2: freq >>= 8; break; /* 256 */
ERROR: unnecessary cast may hide bugs, use g_new0 instead
#215: FILE: hw/timer/bcm283x_timer.c:152:
+ s = (bcm283x_timer_state *) g_malloc0(sizeof(bcm283x_timer_state));
WARNING: line over 80 characters
#228: FILE: hw/timer/bcm283x_timer.c:165:
+/* XXX: BCM's datasheet does not seem to provide these values and they may differ */
WARNING: line over 80 characters
#262: FILE: hw/timer/bcm283x_timer.c:199:
+ "%s: integration test registers unimplemented\n", __func__);
WARNING: line over 80 characters
#271: FILE: hw/timer/bcm283x_timer.c:208:
+static void bcm283xsp803_write(void *opaque, hwaddr offset, uint64_t value, unsigned size)
WARNING: line over 80 characters
#306: FILE: hw/timer/bcm283x_timer.c:243:
+ memory_region_init_io(&s->iomem, obj, &bcm283xsp804_ops, s, "bcm283xsp804", 0x1000);
WARNING: line over 80 characters
#395: FILE: include/hw/timer/bcm283x_timer.h:23:
+#define BCM283xSP804(obj) OBJECT_CHECK(BCM283xSP804State, (obj), TYPE_BCM283xSP804)
total: 7 errors, 9 warnings, 366 lines checked
Commit a1e2330d4de2 (hw/arm/bcm2835_peripheral: add bcm283x sp804-alike timer) has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/20190208224020.GA4670@nyan/testing.checkpatch/?type=message.
---
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