[Qemu-devel] [PATCH 2/2] tricore: fixed RCR_CADDN instruction

David Brenken posted 2 patches 6 years, 9 months ago
Maintainers: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
[Qemu-devel] [PATCH 2/2] tricore: fixed RCR_CADDN instruction
Posted by David Brenken 6 years, 9 months ago
From: David Brenken <david.brenken@efs-auto.de>

Signed-off-by: Christian Richter <christian.richter@efs-auto.de>
Signed-off-by: David Brenken <david.brenken@efs-auto.de>
Signed-off-by: Georg Hofstetter <georg.hofstetter@efs-auto.de>
Signed-off-by: Robert Rasche <robert.rasche@efs-auto.de>
Signed-off-by: Lars Biermanski <lars.biermanski@efs-auto.de>

---
 target/tricore/translate.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/tricore/translate.c b/target/tricore/translate.c
index 0511756..fce0595 100644
--- a/target/tricore/translate.c
+++ b/target/tricore/translate.c
@@ -5871,8 +5871,8 @@ static void decode_rcr_cond_select(CPUTriCoreState *env, DisasContext *ctx)
                       cpu_gpr_d[r3]);
         break;
     case OPC2_32_RCR_CADDN:
-        gen_condi_add(TCG_COND_EQ, cpu_gpr_d[r1], const9, cpu_gpr_d[r3],
-                      cpu_gpr_d[r4]);
+        gen_condi_add(TCG_COND_EQ, cpu_gpr_d[r1], const9, cpu_gpr_d[r4],
+                      cpu_gpr_d[r3]);
         break;
     case OPC2_32_RCR_SEL:
         temp = tcg_const_i32(0);
-- 
2.7.4