[Qemu-devel] [PATCH v4 0/3] arm: microbit Non-Volatile Memory Controller

Stefan Hajnoczi posted 3 patches 5 years, 2 months ago
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git fetch https://github.com/patchew-project/qemu tags/patchew/20190201023357.22596-1-stefanha@redhat.com
Maintainers: Peter Maydell <peter.maydell@linaro.org>, Paolo Bonzini <pbonzini@redhat.com>, Thomas Huth <thuth@redhat.com>, Laurent Vivier <lvivier@redhat.com>, Joel Stanley <joel@jms.id.au>
hw/nvram/Makefile.objs       |   1 +
include/hw/arm/nrf51_soc.h   |   2 +
include/hw/nvram/nrf51_nvm.h |  64 ++++++
hw/arm/nrf51_soc.c           |  41 ++--
hw/nvram/nrf51_nvm.c         | 388 +++++++++++++++++++++++++++++++++++
tests/microbit-test.c        | 108 ++++++++++
6 files changed, 592 insertions(+), 12 deletions(-)
create mode 100644 include/hw/nvram/nrf51_nvm.h
create mode 100644 hw/nvram/nrf51_nvm.c
[Qemu-devel] [PATCH v4 0/3] arm: microbit Non-Volatile Memory Controller
Posted by Stefan Hajnoczi 5 years, 2 months ago
v4:
 * assert(offset + size <= s->flash_size) [Peter]
v3:
 * Fix endianness of s->storage[], tested by Joel Stanley <joel@jms.id.au> on
   big-endian ppc [Peter]
 * Fix off-by-one that prevented clearing the last page of flash
 * Add missing memory_region_flush_rom_device() call to flash_write()
v2:
 * Add Patch 2 to call memory_region_flush_rom_device() from pflash devices
   [Peter]

This series adds the Non-Volatile Memory Controller, which controls access to
the User Information Control Registers (UICR), Factory Information Control
Registers (FICR), and flash memory.

This is the last piece of microbit work needed to make basic programs like
Micropython "Hello world" work under QEMU.

Originally sent as part of Steffen's longer microbit device emulation series, I
extracted this and deferred it until later because cleanups were necessary:

 * Use memory_region_flush_rom_device() to dirty/invalidate memory [Peter]
   ^--- Paolo: I CCed you on this new memory API
 * Fix device-introspect-test segfault due to missing owner when initializing
   FICR and UICR memory regions [Peter]
 * Fix off-by-one assertion checks [Peter]
 * Fix missing whitespace at end of comment [Peter]
 * Clear UICR on reset - we'd need a block device for true non-volatility
   [Peter]

Steffen Görtz (3):
  hw/nvram/nrf51_nvm: Add nRF51 non-volatile memories
  arm: Instantiate NRF51 special NVM's and NVMC
  tests/microbit-test: Add tests for nRF51 NVMC

 hw/nvram/Makefile.objs       |   1 +
 include/hw/arm/nrf51_soc.h   |   2 +
 include/hw/nvram/nrf51_nvm.h |  64 ++++++
 hw/arm/nrf51_soc.c           |  41 ++--
 hw/nvram/nrf51_nvm.c         | 388 +++++++++++++++++++++++++++++++++++
 tests/microbit-test.c        | 108 ++++++++++
 6 files changed, 592 insertions(+), 12 deletions(-)
 create mode 100644 include/hw/nvram/nrf51_nvm.h
 create mode 100644 hw/nvram/nrf51_nvm.c

-- 
2.20.1


Re: [Qemu-devel] [PATCH v4 0/3] arm: microbit Non-Volatile Memory Controller
Posted by Peter Maydell 5 years, 2 months ago
On Fri, 1 Feb 2019 at 02:34, Stefan Hajnoczi <stefanha@redhat.com> wrote:
>
> v4:
>  * assert(offset + size <= s->flash_size) [Peter]
> v3:
>  * Fix endianness of s->storage[], tested by Joel Stanley <joel@jms.id.au> on
>    big-endian ppc [Peter]
>  * Fix off-by-one that prevented clearing the last page of flash
>  * Add missing memory_region_flush_rom_device() call to flash_write()
> v2:
>  * Add Patch 2 to call memory_region_flush_rom_device() from pflash devices
>    [Peter]
>
> This series adds the Non-Volatile Memory Controller, which controls access to
> the User Information Control Registers (UICR), Factory Information Control
> Registers (FICR), and flash memory.
>
> This is the last piece of microbit work needed to make basic programs like
> Micropython "Hello world" work under QEMU.
>
> Originally sent as part of Steffen's longer microbit device emulation series, I
> extracted this and deferred it until later because cleanups were necessary:
>
>  * Use memory_region_flush_rom_device() to dirty/invalidate memory [Peter]
>    ^--- Paolo: I CCed you on this new memory API
>  * Fix device-introspect-test segfault due to missing owner when initializing
>    FICR and UICR memory regions [Peter]
>  * Fix off-by-one assertion checks [Peter]
>  * Fix missing whitespace at end of comment [Peter]
>  * Clear UICR on reset - we'd need a block device for true non-volatility
>    [Peter]
>
> Steffen Görtz (3):
>   hw/nvram/nrf51_nvm: Add nRF51 non-volatile memories
>   arm: Instantiate NRF51 special NVM's and NVMC
>   tests/microbit-test: Add tests for nRF51 NVMC



Applied to target-arm.next, thanks.

-- PMM