[Qemu-devel] [PULL v2 00/48] target-arm queue
[PULL v2 00/11] target-arm queue
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v1->v2 changes: fix a clang warning about bitfields;
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Massively slimmed down v2: MemTag broke bsd-user, and the npcm7xx
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drop a patch from Julia that I accidentally included
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ethernet device failed 'make check' on big-endian hosts.
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(it will likely be in a future series).
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The following changes since commit a8d2b0685681e2f291faaa501efbbd76875f8ec8:
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-- PMM
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Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20190118' into staging (2019-01-18 16:56:15 +0000)
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The following changes since commit 83339e21d05c824ebc9131d644f25c23d0e41ecf:
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Merge remote-tracking branch 'remotes/stefanha-gitlab/tags/block-pull-request' into staging (2021-02-10 15:42:20 +0000)
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are available in the Git repository at:
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are available in the Git repository at:
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20190121
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210211-1
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for you to fetch changes up to 0d4bfd7df809863b1f45fad35229fb9419527d06:
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for you to fetch changes up to d3c1183ffeb71ca3a783eae3d7e1c51e71e8a621:
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target/arm: Implement PMSWINC (2019-01-21 10:38:56 +0000)
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target/arm: Correctly initialize MDCR_EL2.HPMN (2021-02-11 19:48:09 +0000)
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----------------------------------------------------------------
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----------------------------------------------------------------
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target-arm queue:
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target-arm queue:
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* hw/char/stm32f2xx_usart: Do not update data register when device is disabled
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* Correctly initialize MDCR_EL2.HPMN
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* hw/arm/virt-acpi-build: Set COHACC override flag in IORT SMMUv3 node
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* versal: Use nr_apu_cpus in favor of hard coding 2
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* target/arm: Allow Aarch32 exception return to switch from Mon->Hyp
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* accel/tcg: Add URL of clang bug to comment about our workaround
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* ftgmac100: implement the new MDIO interface on Aspeed SoC
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* Add support for FEAT_DIT, Data Independent Timing
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* implement the ARMv8.3-PAuth extension
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* Remove GPIO from unimplemented NPCM7XX
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* improve emulation of the ARM PMU
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* Fix SCR RES1 handling
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* Don't migrate CPUARMState.features
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----------------------------------------------------------------
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----------------------------------------------------------------
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Aaron Lindsay (13):
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Aaron Lindsay (1):
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migration: Add post_save function to VMStateDescription
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target/arm: Don't migrate CPUARMState.features
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target/arm: Reorganize PMCCNTR accesses
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target/arm: Swap PMU values before/after migrations
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target/arm: Filter cycle counter based on PMCCFILTR_EL0
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target/arm: Allow AArch32 access for PMCCFILTR
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target/arm: Implement PMOVSSET
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target/arm: Define FIELDs for ID_DFR0
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target/arm: Make PMCEID[01]_EL0 64 bit registers, add PMCEID[23]
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target/arm: Add array for supported PMU events, generate PMCEID[01]_EL0
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target/arm: Finish implementation of PM[X]EVCNTR and PM[X]EVTYPER
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target/arm: PMU: Add instruction and cycle events
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target/arm: PMU: Set PMCR.N to 4
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target/arm: Implement PMSWINC
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Alexander Graf (1):
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Daniel Müller (1):
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target/arm: Allow Aarch32 exception return to switch from Mon->Hyp
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target/arm: Correctly initialize MDCR_EL2.HPMN
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Cédric Le Goater (1):
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Edgar E. Iglesias (1):
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ftgmac100: implement the new MDIO interface on Aspeed SoC
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hw/arm: versal: Use nr_apu_cpus in favor of hard coding 2
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Eric Auger (1):
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Hao Wu (1):
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hw/arm/virt-acpi-build: Set COHACC override flag in IORT SMMUv3 node
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hw/arm: Remove GPIO from unimplemented NPCM7XX
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Philippe Mathieu-Daudé (1):
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Mike Nawrocki (1):
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hw/char/stm32f2xx_usart: Do not update data register when device is disabled
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target/arm: Fix SCR RES1 handling
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Richard Henderson (31):
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Peter Maydell (2):
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target/arm: Add state for the ARMv8.3-PAuth extension
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arm: Update infocenter.arm.com URLs
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target/arm: Add SCTLR bits through ARMv8.5
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accel/tcg: Add URL of clang bug to comment about our workaround
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target/arm: Add PAuth active bit to tbflags
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target/arm: Introduce raise_exception_ra
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target/arm: Add PAuth helpers
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target/arm: Decode PAuth within system hint space
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target/arm: Rearrange decode in disas_data_proc_1src
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target/arm: Decode PAuth within disas_data_proc_1src
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target/arm: Decode PAuth within disas_data_proc_2src
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target/arm: Move helper_exception_return to helper-a64.c
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target/arm: Add new_pc argument to helper_exception_return
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target/arm: Rearrange decode in disas_uncond_b_reg
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target/arm: Decode PAuth within disas_uncond_b_reg
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target/arm: Decode Load/store register (pac)
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target/arm: Move cpu_mmu_index out of line
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target/arm: Introduce arm_mmu_idx
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target/arm: Introduce arm_stage1_mmu_idx
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target/arm: Create ARMVAParameters and helpers
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target/arm: Merge TBFLAG_AA_TB{0, 1} to TBII
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target/arm: Export aa64_va_parameters to internals.h
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target/arm: Add aa64_va_parameters_both
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target/arm: Decode TBID from TCR
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target/arm: Reuse aa64_va_parameters for setting tbflags
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target/arm: Implement pauth_strip
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target/arm: Implement pauth_auth
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target/arm: Implement pauth_addpac
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target/arm: Implement pauth_computepac
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target/arm: Add PAuth system registers
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target/arm: Enable PAuth for -cpu max
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target/arm: Enable PAuth for user-only
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target/arm: Tidy TBI handling in gen_a64_set_pc
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target/arm/Makefile.objs | 1 +
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Rebecca Cran (4):
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include/hw/acpi/acpi-defs.h | 2 +
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target/arm: Add support for FEAT_DIT, Data Independent Timing
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include/migration/vmstate.h | 1 +
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target/arm: Support AA32 DIT by moving PSTATE_SS from cpsr into env->pstate
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target/arm/cpu.h | 244 +++++----
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target/arm: Set ID_AA64PFR0.DIT and ID_PFR0.DIT to 1 for "max" AA64 CPU
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target/arm/helper-a64.h | 14 +
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target/arm: Set ID_PFR0.DIT to 1 for "max" 32-bit CPU
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target/arm/helper.h | 1 -
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target/arm/internals.h | 77 +++
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target/arm/translate.h | 5 +-
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hw/arm/virt-acpi-build.c | 1 +
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hw/char/stm32f2xx_usart.c | 3 +-
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hw/net/ftgmac100.c | 80 ++-
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migration/vmstate.c | 13 +-
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target/arm/cpu.c | 19 +-
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target/arm/cpu64.c | 68 ++-
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target/arm/helper-a64.c | 155 ++++++
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target/arm/helper.c | 1222 +++++++++++++++++++++++++++++++++----------
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target/arm/machine.c | 24 +
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target/arm/op_helper.c | 174 +-----
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target/arm/pauth_helper.c | 497 ++++++++++++++++++
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target/arm/translate-a64.c | 537 ++++++++++++++++---
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docs/devel/migration.rst | 9 +-
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21 files changed, 2515 insertions(+), 632 deletions(-)
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create mode 100644 target/arm/pauth_helper.c
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include/hw/dma/pl080.h | 7 ++--
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include/hw/misc/arm_integrator_debug.h | 2 +-
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include/hw/ssi/pl022.h | 5 ++-
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target/arm/cpu.h | 17 ++++++++
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target/arm/internals.h | 6 +++
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accel/tcg/cpu-exec.c | 25 +++++++++---
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hw/arm/aspeed_ast2600.c | 2 +-
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hw/arm/musca.c | 4 +-
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hw/arm/npcm7xx.c | 8 ----
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hw/arm/xlnx-versal.c | 4 +-
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hw/misc/arm_integrator_debug.c | 2 +-
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hw/timer/arm_timer.c | 7 ++--
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target/arm/cpu.c | 4 ++
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target/arm/cpu64.c | 5 +++
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target/arm/helper-a64.c | 27 +++++++++++--
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target/arm/helper.c | 71 +++++++++++++++++++++++++++-------
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target/arm/machine.c | 2 +-
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target/arm/op_helper.c | 9 +----
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target/arm/translate-a64.c | 12 ++++++
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19 files changed, 164 insertions(+), 55 deletions(-)
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diff view generated by jsdifflib

Patchew 2.1-devel-b67e4c2

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