[Qemu-devel] [PULL 00/32] tcg patch queue
[PULL 00/16] tcg patch queue
1
The following changes since commit 2d894e48362ad2a576fca929dcca1787f43a8af6:
1
The following changes since commit 48ab886d3da4f3ab94f79f6c0f8b4535b446bbfd:
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3
Merge remote-tracking branch 'remotes/stefanha/tags/tracing-pull-request' into staging (2018-12-13 17:50:45 +0000)
3
Merge tag 'pull-target-arm-20230619' of https://git.linaro.org/people/pmaydell/qemu-arm into staging (2023-06-19 16:32:25 +0200)
4
4
5
are available in the Git repository at:
5
are available in the Git repository at:
6
6
7
https://github.com/rth7680/qemu.git tags/pull-tcg-20181213
7
https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20230620
8
8
9
for you to fetch changes up to 99f70ba5b6b4566509b2069a8d29c6686b8115de:
9
for you to fetch changes up to d7ee93e24359703debf4137f4cc632563aa4e8d1:
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10
11
xxhash: match output against the original xxhash32 (2018-12-13 18:56:11 -0600)
11
cputlb: Restrict SavedIOTLB to system emulation (2023-06-20 10:02:14 +0200)
12
12
13
----------------------------------------------------------------
13
----------------------------------------------------------------
14
- Remove retranslation remenents
14
tcg: Define _CALL_AIX for clang on ppc64
15
- Return success from patch_reloc
15
accel/tcg: Build fix for macos catalina
16
- Preserve 32-bit values as zero-extended on x86_64
16
accel/tcg: Handle MO_ATOM_WITHIN16 in do_st16_leN
17
- Make bswap during memory ops as optional
17
accel/tcg: Restrict SavedIOTLB to system emulation
18
- Cleanup xxhash
18
accel/tcg: Use generic 'helper-proto-common.h' header
19
plugins: Remove unused 'exec/helper-proto.h' header
20
*: Check for CONFIG_USER_ONLY instead of CONFIG_SOFTMMU
19
21
20
----------------------------------------------------------------
22
----------------------------------------------------------------
21
Alistair Francis (1):
23
Philippe Mathieu-Daudé (13):
22
tcg/mips: Improve the add2/sub2 command to use TCG_TARGET_REG_BITS
24
target/i386: Simplify i386_tr_init_disas_context()
25
target/tricore: Remove pointless CONFIG_SOFTMMU guard
26
target/m68k: Check for USER_ONLY definition instead of SOFTMMU one
27
target/ppc: Check for USER_ONLY definition instead of SOFTMMU one
28
hw/core/cpu: Check for USER_ONLY definition instead of SOFTMMU one
29
accel/tcg: Check for USER_ONLY definition instead of SOFTMMU one
30
meson: Alias CONFIG_SOFTMMU -> CONFIG_SYSTEM_ONLY
31
meson: Replace CONFIG_SOFTMMU -> CONFIG_SYSTEM_ONLY
32
meson: Replace softmmu_ss -> system_ss
33
plugins: Remove unused 'exec/helper-proto.h' header
34
accel/tcg/cpu-exec: Use generic 'helper-proto-common.h' header
35
exec/cpu-defs: Check for SOFTMMU instead of !USER_ONLY
36
cputlb: Restrict SavedIOTLB to system emulation
23
37
24
Emilio G. Cota (5):
38
Richard Henderson (3):
25
tcg: Drop nargs from tcg_op_insert_{before,after}
39
host/include/x86_64: Use __m128i for "x" constraints
26
qht-bench: document -p flag
40
accel/tcg: Handle MO_ATOM_WITHIN16 in do_st16_leN
27
exec: introduce qemu_xxhash{2,4,5,6,7}
41
tcg/ppc: Define _CALL_AIX for clang on ppc64(be)
28
include: move exec/tb-hash-xx.h to qemu/xxhash.h
29
xxhash: match output against the original xxhash32
30
42
31
Richard Henderson (26):
43
docs/devel/build-system.rst | 14 +--
32
tcg/i386: Always use %ebp for TCG_AREG0
44
meson.build | 15 +--
33
tcg/i386: Move TCG_REG_CALL_STACK from define to enum
45
accel/tcg/internal.h | 6 +-
34
tcg/aarch64: Remove reloc_pc26_atomic
46
host/include/x86_64/host/atomic128-ldst.h | 25 ++--
35
tcg/aarch64: Fold away "noaddr" branch routines
47
host/include/x86_64/host/load-extract-al16-al8.h | 8 +-
36
tcg/arm: Remove reloc_pc24_atomic
48
include/exec/cpu-defs.h | 12 +-
37
tcg/arm: Fold away "noaddr" branch routines
49
include/hw/core/cpu.h | 10 +-
38
tcg/ppc: Fold away "noaddr" branch routines
50
include/hw/core/tcg-cpu-ops.h | 102 ++++++++--------
39
tcg/s390: Remove retranslation code
51
target/m68k/helper.h | 2 +-
40
tcg/sparc: Remove retranslation code
52
accel/tcg/cpu-exec.c | 6 +-
41
tcg/mips: Remove retranslation code
53
accel/tcg/cputlb.c | 1 +
42
tcg: Return success from patch_reloc
54
plugins/core.c | 1 -
43
tcg/i386: Return false on failure from patch_reloc
55
target/i386/tcg/translate.c | 3 -
44
tcg/aarch64: Return false on failure from patch_reloc
56
target/m68k/cpu.c | 14 +--
45
tcg/arm: Return false on failure from patch_reloc
57
target/m68k/helper.c | 4 +-
46
tcg/ppc: Return false on failure from patch_reloc
58
target/m68k/translate.c | 28 ++---
47
tcg/s390x: Return false on failure from patch_reloc
59
target/ppc/cpu_init.c | 20 +--
48
tcg/i386: Propagate is64 to tcg_out_qemu_ld_direct
60
target/ppc/helper_regs.c | 6 +-
49
tcg/i386: Propagate is64 to tcg_out_qemu_ld_slow_path
61
target/tricore/helper.c | 2 -
50
tcg/i386: Implement INDEX_op_extr{lh}_i64_i32 for 32-bit guests
62
tcg/ppc/tcg-target.c.inc | 23 ++--
51
tcg/i386: Assume 32-bit values are zero-extended
63
accel/meson.build | 4 +-
52
tcg/i386: Precompute all guest_base parameters
64
accel/qtest/meson.build | 2 +-
53
tcg/i386: Add setup_guest_base_seg for FreeBSD
65
accel/stubs/meson.build | 2 +-
54
tcg: Clean up generic bswap32
66
accel/tcg/meson.build | 6 +-
55
tcg: Clean up generic bswap64
67
audio/meson.build | 8 +-
56
tcg/optimize: Optimize bswap
68
backends/meson.build | 20 +--
57
tcg: Add TCG_TARGET_HAS_MEMORY_BSWAP
69
backends/tpm/meson.build | 8 +-
70
block/meson.build | 6 +-
71
block/monitor/meson.build | 2 +-
72
chardev/meson.build | 2 +-
73
disas/meson.build | 2 +-
74
dump/meson.build | 4 +-
75
ebpf/meson.build | 2 +-
76
fsdev/meson.build | 4 +-
77
gdbstub/meson.build | 10 +-
78
hw/9pfs/meson.build | 2 +-
79
hw/acpi/meson.build | 10 +-
80
hw/adc/meson.build | 10 +-
81
hw/arm/meson.build | 8 +-
82
hw/audio/meson.build | 28 ++---
83
hw/block/meson.build | 28 ++---
84
hw/char/meson.build | 70 +++++------
85
hw/core/meson.build | 22 ++--
86
hw/cpu/meson.build | 6 +-
87
hw/cxl/meson.build | 4 +-
88
hw/display/meson.build | 76 ++++++------
89
hw/dma/meson.build | 32 ++---
90
hw/gpio/meson.build | 26 ++--
91
hw/i2c/meson.build | 2 +-
92
hw/i386/kvm/meson.build | 2 +-
93
hw/ide/meson.build | 28 ++---
94
hw/input/meson.build | 32 ++---
95
hw/intc/meson.build | 44 +++----
96
hw/ipack/meson.build | 2 +-
97
hw/ipmi/meson.build | 2 +-
98
hw/isa/meson.build | 18 +--
99
hw/mem/meson.build | 8 +-
100
hw/misc/macio/meson.build | 2 +-
101
hw/misc/meson.build | 148 +++++++++++------------
102
hw/net/can/meson.build | 16 +--
103
hw/net/meson.build | 96 +++++++--------
104
hw/nubus/meson.build | 2 +-
105
hw/nvme/meson.build | 2 +-
106
hw/nvram/meson.build | 26 ++--
107
hw/pci-bridge/meson.build | 4 +-
108
hw/pci-host/meson.build | 2 +-
109
hw/pci/meson.build | 8 +-
110
hw/pcmcia/meson.build | 4 +-
111
hw/rdma/meson.build | 2 +-
112
hw/remote/meson.build | 2 +-
113
hw/rtc/meson.build | 28 ++---
114
hw/scsi/meson.build | 2 +-
115
hw/sd/meson.build | 24 ++--
116
hw/sensor/meson.build | 18 +--
117
hw/smbios/meson.build | 6 +-
118
hw/ssi/meson.build | 26 ++--
119
hw/timer/meson.build | 74 ++++++------
120
hw/tpm/meson.build | 14 +--
121
hw/usb/meson.build | 74 ++++++------
122
hw/virtio/meson.build | 12 +-
123
hw/watchdog/meson.build | 18 +--
124
hw/xen/meson.build | 4 +-
125
migration/meson.build | 12 +-
126
monitor/meson.build | 6 +-
127
net/can/meson.build | 2 +-
128
net/meson.build | 38 +++---
129
qapi/meson.build | 2 +-
130
qom/meson.build | 2 +-
131
replay/meson.build | 2 +-
132
semihosting/meson.build | 2 +-
133
softmmu/meson.build | 12 +-
134
stats/meson.build | 2 +-
135
target/alpha/meson.build | 6 +-
136
target/arm/hvf/meson.build | 2 +-
137
target/arm/meson.build | 6 +-
138
target/arm/tcg/meson.build | 2 +-
139
target/avr/meson.build | 6 +-
140
target/cris/meson.build | 6 +-
141
target/hppa/meson.build | 6 +-
142
target/i386/hax/meson.build | 6 +-
143
target/i386/hvf/meson.build | 2 +-
144
target/i386/kvm/meson.build | 4 +-
145
target/i386/meson.build | 8 +-
146
target/i386/nvmm/meson.build | 4 +-
147
target/i386/tcg/sysemu/meson.build | 2 +-
148
target/i386/whpx/meson.build | 2 +-
149
target/loongarch/meson.build | 6 +-
150
target/m68k/meson.build | 6 +-
151
target/microblaze/meson.build | 6 +-
152
target/mips/meson.build | 4 +-
153
target/mips/sysemu/meson.build | 2 +-
154
target/mips/tcg/sysemu/meson.build | 2 +-
155
target/nios2/meson.build | 6 +-
156
target/openrisc/meson.build | 6 +-
157
target/ppc/meson.build | 10 +-
158
target/riscv/meson.build | 6 +-
159
target/s390x/kvm/meson.build | 2 +-
160
target/s390x/meson.build | 6 +-
161
target/sh4/meson.build | 6 +-
162
target/sparc/meson.build | 6 +-
163
target/tricore/meson.build | 4 +-
164
target/xtensa/meson.build | 6 +-
165
tcg/meson.build | 2 +-
166
trace/meson.build | 2 +-
167
ui/meson.build | 30 ++---
168
125 files changed, 864 insertions(+), 854 deletions(-)
58
169
59
include/exec/tb-hash.h | 4 +-
60
include/{exec/tb-hash-xx.h => qemu/xxhash.h} | 47 ++++--
61
tcg/aarch64/tcg-target.h | 1 +
62
tcg/arm/tcg-target.h | 1 +
63
tcg/i386/tcg-target.h | 17 +--
64
tcg/mips/tcg-target.h | 1 +
65
tcg/ppc/tcg-target.h | 1 +
66
tcg/s390/tcg-target.h | 1 +
67
tcg/sparc/tcg-target.h | 1 +
68
tcg/tcg.h | 4 +-
69
tcg/tci/tcg-target.h | 2 +
70
tcg/aarch64/tcg-target.inc.c | 71 +++------
71
tcg/arm/tcg-target.inc.c | 55 +++----
72
tcg/i386/tcg-target.inc.c | 208 ++++++++++++--------------
73
tcg/mips/tcg-target.inc.c | 12 +-
74
tcg/optimize.c | 16 +-
75
tcg/ppc/tcg-target.inc.c | 60 ++++----
76
tcg/s390/tcg-target.inc.c | 45 +++---
77
tcg/sparc/tcg-target.inc.c | 13 +-
78
tcg/tcg-op.c | 215 ++++++++++++++++++++-------
79
tcg/tcg.c | 18 +--
80
tcg/tci/tcg-target.inc.c | 3 +-
81
tests/qht-bench.c | 5 +-
82
util/qsp.c | 14 +-
83
24 files changed, 452 insertions(+), 363 deletions(-)
84
rename include/{exec/tb-hash-xx.h => qemu/xxhash.h} (73%)
85
diff view generated by jsdifflib
[Qemu-devel] [PULL 01/32] tcg/i386: Always use %ebp for TCG_AREG0
Deleted patch
1
For x86_64, this can remove a REX prefix resulting in smaller code
2
when manipulating globals of type i32, as we move them between backing
3
store via cpu_env, aka TCG_AREG0.
4
1
5
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
6
Reviewed-by: Emilio G. Cota <cota@braap.org>
7
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
8
---
9
tcg/i386/tcg-target.h | 8 ++------
10
1 file changed, 2 insertions(+), 6 deletions(-)
11
12
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
13
index XXXXXXX..XXXXXXX 100644
14
--- a/tcg/i386/tcg-target.h
15
+++ b/tcg/i386/tcg-target.h
16
@@ -XXX,XX +XXX,XX @@ typedef enum {
17
TCG_REG_RBP = TCG_REG_EBP,
18
TCG_REG_RSI = TCG_REG_ESI,
19
TCG_REG_RDI = TCG_REG_EDI,
20
+
21
+ TCG_AREG0 = TCG_REG_EBP,
22
} TCGReg;
23
24
/* used for function call generation */
25
@@ -XXX,XX +XXX,XX @@ extern bool have_avx2;
26
#define TCG_TARGET_extract_i64_valid(ofs, len) \
27
(((ofs) == 8 && (len) == 8) || ((ofs) + (len)) == 32)
28
29
-#if TCG_TARGET_REG_BITS == 64
30
-# define TCG_AREG0 TCG_REG_R14
31
-#else
32
-# define TCG_AREG0 TCG_REG_EBP
33
-#endif
34
-
35
static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
36
{
37
}
38
--
39
2.17.2
40
41
diff view generated by jsdifflib
[Qemu-devel] [PULL 30/32] exec: introduce qemu_xxhash{2,4,5,6,7}
[PULL 01/16] host/include/x86_64: Use __m128i for "x" constraints
1
From: "Emilio G. Cota" <cota@braap.org>
1
The macOS catalina compiler produces an error for __int128_t
2
as the type for allocation with SSE inline asm constraint.
3
Create a new X86Int128Union type and use the vector type for
4
all SSE register inputs and outputs.
2
5
3
Before moving them all to include/qemu/xxhash.h.
6
Tested-by: Peter Maydell <peter.maydell@linaro.org>
4
5
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
6
Signed-off-by: Emilio G. Cota <cota@braap.org>
7
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
7
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
8
---
8
---
9
include/exec/tb-hash-xx.h | 41 +++++++++++++++++++++++++++++----------
9
host/include/x86_64/host/atomic128-ldst.h | 25 ++++++++++++-------
10
include/exec/tb-hash.h | 2 +-
10
.../x86_64/host/load-extract-al16-al8.h | 8 +++---
11
tests/qht-bench.c | 2 +-
11
2 files changed, 20 insertions(+), 13 deletions(-)
12
util/qsp.c | 12 ++++++------
13
4 files changed, 39 insertions(+), 18 deletions(-)
14
12
15
diff --git a/include/exec/tb-hash-xx.h b/include/exec/tb-hash-xx.h
13
diff --git a/host/include/x86_64/host/atomic128-ldst.h b/host/include/x86_64/host/atomic128-ldst.h
16
index XXXXXXX..XXXXXXX 100644
14
index XXXXXXX..XXXXXXX 100644
17
--- a/include/exec/tb-hash-xx.h
15
--- a/host/include/x86_64/host/atomic128-ldst.h
18
+++ b/include/exec/tb-hash-xx.h
16
+++ b/host/include/x86_64/host/atomic128-ldst.h
19
@@ -XXX,XX +XXX,XX @@
17
@@ -XXX,XX +XXX,XX @@
20
#define PRIME32_4 668265263U
18
* atomic primitive is meant to provide.
21
#define PRIME32_5 374761393U
19
*/
22
20
23
-#define TB_HASH_XX_SEED 1
21
-#ifndef AARCH64_ATOMIC128_LDST_H
24
+#define QEMU_XXHASH_SEED 1
22
-#define AARCH64_ATOMIC128_LDST_H
23
+#ifndef X86_64_ATOMIC128_LDST_H
24
+#define X86_64_ATOMIC128_LDST_H
25
26
#ifdef CONFIG_INT128_TYPE
27
#include "host/cpuinfo.h"
28
#include "tcg/debug-assert.h"
29
+#include <immintrin.h>
30
+
31
+typedef union {
32
+ __m128i v;
33
+ __int128_t i;
34
+ Int128 s;
35
+} X86Int128Union;
25
36
26
/*
37
/*
27
* xxhash32, customized for input variables that are not guaranteed to be
38
* Through clang 16, with -mcx16, __atomic_load_n is incorrectly
28
* contiguous in memory.
39
@@ -XXX,XX +XXX,XX @@
29
*/
40
30
static inline uint32_t
41
static inline Int128 atomic16_read_ro(const Int128 *ptr)
31
-tb_hash_func7(uint64_t a0, uint64_t b0, uint32_t e, uint32_t f, uint32_t g)
32
+qemu_xxhash7(uint64_t ab, uint64_t cd, uint32_t e, uint32_t f, uint32_t g)
33
{
42
{
34
- uint32_t v1 = TB_HASH_XX_SEED + PRIME32_1 + PRIME32_2;
43
- Int128Alias r;
35
- uint32_t v2 = TB_HASH_XX_SEED + PRIME32_2;
44
+ X86Int128Union r;
36
- uint32_t v3 = TB_HASH_XX_SEED + 0;
45
37
- uint32_t v4 = TB_HASH_XX_SEED - PRIME32_1;
46
tcg_debug_assert(HAVE_ATOMIC128_RO);
38
- uint32_t a = a0 >> 32;
47
- asm("vmovdqa %1, %0" : "=x" (r.i) : "m" (*ptr));
39
- uint32_t b = a0;
48
+ asm("vmovdqa %1, %0" : "=x" (r.v) : "m" (*ptr));
40
- uint32_t c = b0 >> 32;
49
41
- uint32_t d = b0;
50
return r.s;
42
+ uint32_t v1 = QEMU_XXHASH_SEED + PRIME32_1 + PRIME32_2;
43
+ uint32_t v2 = QEMU_XXHASH_SEED + PRIME32_2;
44
+ uint32_t v3 = QEMU_XXHASH_SEED + 0;
45
+ uint32_t v4 = QEMU_XXHASH_SEED - PRIME32_1;
46
+ uint32_t a = ab >> 32;
47
+ uint32_t b = ab;
48
+ uint32_t c = cd >> 32;
49
+ uint32_t d = cd;
50
uint32_t h32;
51
52
v1 += a * PRIME32_2;
53
@@ -XXX,XX +XXX,XX @@ tb_hash_func7(uint64_t a0, uint64_t b0, uint32_t e, uint32_t f, uint32_t g)
54
return h32;
55
}
51
}
56
52
@@ -XXX,XX +XXX,XX @@ static inline Int128 atomic16_read_ro(const Int128 *ptr)
57
+static inline uint32_t qemu_xxhash2(uint64_t ab)
53
static inline Int128 atomic16_read_rw(Int128 *ptr)
58
+{
54
{
59
+ return qemu_xxhash7(ab, 0, 0, 0, 0);
55
__int128_t *ptr_align = __builtin_assume_aligned(ptr, 16);
60
+}
56
- Int128Alias r;
61
+
57
+ X86Int128Union r;
62
+static inline uint32_t qemu_xxhash4(uint64_t ab, uint64_t cd)
58
63
+{
59
if (HAVE_ATOMIC128_RO) {
64
+ return qemu_xxhash7(ab, cd, 0, 0, 0);
60
- asm("vmovdqa %1, %0" : "=x" (r.i) : "m" (*ptr_align));
65
+}
61
+ asm("vmovdqa %1, %0" : "=x" (r.v) : "m" (*ptr_align));
66
+
62
} else {
67
+static inline uint32_t qemu_xxhash5(uint64_t ab, uint64_t cd, uint32_t e)
63
r.i = __sync_val_compare_and_swap_16(ptr_align, 0, 0);
68
+{
64
}
69
+ return qemu_xxhash7(ab, cd, e, 0, 0);
65
@@ -XXX,XX +XXX,XX @@ static inline Int128 atomic16_read_rw(Int128 *ptr)
70
+}
66
static inline void atomic16_set(Int128 *ptr, Int128 val)
71
+
67
{
72
+static inline uint32_t qemu_xxhash6(uint64_t ab, uint64_t cd, uint32_t e,
68
__int128_t *ptr_align = __builtin_assume_aligned(ptr, 16);
73
+ uint32_t f)
69
- Int128Alias new = { .s = val };
74
+{
70
+ X86Int128Union new = { .s = val };
75
+ return qemu_xxhash7(ab, cd, e, f, 0);
71
76
+}
72
if (HAVE_ATOMIC128_RO) {
77
+
73
- asm("vmovdqa %1, %0" : "=m"(*ptr_align) : "x" (new.i));
78
#endif /* EXEC_TB_HASH_XX_H */
74
+ asm("vmovdqa %1, %0" : "=m"(*ptr_align) : "x" (new.v));
79
diff --git a/include/exec/tb-hash.h b/include/exec/tb-hash.h
75
} else {
76
__int128_t old;
77
do {
78
@@ -XXX,XX +XXX,XX @@ static inline void atomic16_set(Int128 *ptr, Int128 val)
79
#include "host/include/generic/host/atomic128-ldst.h"
80
#endif
81
82
-#endif /* AARCH64_ATOMIC128_LDST_H */
83
+#endif /* X86_64_ATOMIC128_LDST_H */
84
diff --git a/host/include/x86_64/host/load-extract-al16-al8.h b/host/include/x86_64/host/load-extract-al16-al8.h
80
index XXXXXXX..XXXXXXX 100644
85
index XXXXXXX..XXXXXXX 100644
81
--- a/include/exec/tb-hash.h
86
--- a/host/include/x86_64/host/load-extract-al16-al8.h
82
+++ b/include/exec/tb-hash.h
87
+++ b/host/include/x86_64/host/load-extract-al16-al8.h
83
@@ -XXX,XX +XXX,XX @@ static inline
88
@@ -XXX,XX +XXX,XX @@
84
uint32_t tb_hash_func(tb_page_addr_t phys_pc, target_ulong pc, uint32_t flags,
89
#define X86_64_LOAD_EXTRACT_AL16_AL8_H
85
uint32_t cf_mask, uint32_t trace_vcpu_dstate)
90
86
{
91
#ifdef CONFIG_INT128_TYPE
87
- return tb_hash_func7(phys_pc, pc, flags, cf_mask, trace_vcpu_dstate);
92
-#include "host/cpuinfo.h"
88
+ return qemu_xxhash7(phys_pc, pc, flags, cf_mask, trace_vcpu_dstate);
93
+#include "host/atomic128-ldst.h"
94
95
/**
96
* load_atom_extract_al16_or_al8:
97
@@ -XXX,XX +XXX,XX @@ load_atom_extract_al16_or_al8(void *pv, int s)
98
uintptr_t pi = (uintptr_t)pv;
99
__int128_t *ptr_align = (__int128_t *)(pi & ~7);
100
int shr = (pi & 7) * 8;
101
- Int128Alias r;
102
+ X86Int128Union r;
103
104
/*
105
* ptr_align % 16 is now only 0 or 8.
106
@@ -XXX,XX +XXX,XX @@ load_atom_extract_al16_or_al8(void *pv, int s)
107
* when ptr_align % 16 == 0 for 16-byte atomicity.
108
*/
109
if ((cpuinfo & CPUINFO_ATOMIC_VMOVDQU) || (pi & 8)) {
110
- asm("vmovdqu %1, %0" : "=x" (r.i) : "m" (*ptr_align));
111
+ asm("vmovdqu %1, %0" : "=x" (r.v) : "m" (*ptr_align));
112
} else {
113
- asm("vmovdqa %1, %0" : "=x" (r.i) : "m" (*ptr_align));
114
+ asm("vmovdqa %1, %0" : "=x" (r.v) : "m" (*ptr_align));
115
}
116
return int128_getlo(int128_urshift(r.s, shr));
89
}
117
}
90
91
#endif
92
diff --git a/tests/qht-bench.c b/tests/qht-bench.c
93
index XXXXXXX..XXXXXXX 100644
94
--- a/tests/qht-bench.c
95
+++ b/tests/qht-bench.c
96
@@ -XXX,XX +XXX,XX @@ static bool is_equal(const void *ap, const void *bp)
97
98
static uint32_t h(unsigned long v)
99
{
100
- return tb_hash_func7(v, 0, 0, 0, 0);
101
+ return qemu_xxhash2(v);
102
}
103
104
static uint32_t hval(unsigned long v)
105
diff --git a/util/qsp.c b/util/qsp.c
106
index XXXXXXX..XXXXXXX 100644
107
--- a/util/qsp.c
108
+++ b/util/qsp.c
109
@@ -XXX,XX +XXX,XX @@ QemuCondWaitFunc qemu_cond_wait_func = qemu_cond_wait_impl;
110
* without it we still get a pretty unique hash.
111
*/
112
static inline
113
-uint32_t do_qsp_callsite_hash(const QSPCallSite *callsite, uint64_t a)
114
+uint32_t do_qsp_callsite_hash(const QSPCallSite *callsite, uint64_t ab)
115
{
116
- uint64_t b = (uint64_t)(uintptr_t)callsite->obj;
117
+ uint64_t cd = (uint64_t)(uintptr_t)callsite->obj;
118
uint32_t e = callsite->line;
119
uint32_t f = callsite->type;
120
121
- return tb_hash_func7(a, b, e, f, 0);
122
+ return qemu_xxhash6(ab, cd, e, f);
123
}
124
125
static inline
126
@@ -XXX,XX +XXX,XX @@ static uint32_t qsp_entry_no_thread_hash(const QSPEntry *entry)
127
static uint32_t qsp_entry_no_thread_obj_hash(const QSPEntry *entry)
128
{
129
const QSPCallSite *callsite = entry->callsite;
130
- uint64_t a = g_str_hash(callsite->file);
131
- uint64_t b = callsite->line;
132
+ uint64_t ab = g_str_hash(callsite->file);
133
+ uint64_t cd = callsite->line;
134
uint32_t e = callsite->type;
135
136
- return tb_hash_func7(a, b, e, 0, 0);
137
+ return qemu_xxhash5(ab, cd, e);
138
}
139
140
static bool qsp_callsite_cmp(const void *ap, const void *bp)
141
--
118
--
142
2.17.2
119
2.34.1
143
144
diff view generated by jsdifflib
[Qemu-devel] [PULL 32/32] xxhash: match output against the original xxhash32
[PULL 02/16] accel/tcg: Handle MO_ATOM_WITHIN16 in do_st16_leN
1
From: "Emilio G. Cota" <cota@braap.org>
1
Otherwise we hit the default assert not reached.
2
Handle it as MO_ATOM_NONE, because of size and misalignment.
3
We already handle this correctly in do_ld16_beN.
2
4
3
Change the order in which we extract a/b and c/d to
5
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
4
match the output of the upstream xxhash32.
5
6
Tested with:
7
https://github.com/cota/xxhash/tree/qemu
8
9
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
10
Tested-by: Alex Bennée <alex.bennee@linaro.org>
11
Signed-off-by: Emilio G. Cota <cota@braap.org>
12
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
13
---
7
---
14
include/qemu/xxhash.h | 8 ++++----
8
accel/tcg/cputlb.c | 1 +
15
1 file changed, 4 insertions(+), 4 deletions(-)
9
1 file changed, 1 insertion(+)
16
10
17
diff --git a/include/qemu/xxhash.h b/include/qemu/xxhash.h
11
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
18
index XXXXXXX..XXXXXXX 100644
12
index XXXXXXX..XXXXXXX 100644
19
--- a/include/qemu/xxhash.h
13
--- a/accel/tcg/cputlb.c
20
+++ b/include/qemu/xxhash.h
14
+++ b/accel/tcg/cputlb.c
21
@@ -XXX,XX +XXX,XX @@ qemu_xxhash7(uint64_t ab, uint64_t cd, uint32_t e, uint32_t f, uint32_t g)
15
@@ -XXX,XX +XXX,XX @@ static uint64_t do_st16_leN(CPUArchState *env, MMULookupPageData *p,
22
uint32_t v2 = QEMU_XXHASH_SEED + PRIME32_2;
16
* and so neither is atomic.
23
uint32_t v3 = QEMU_XXHASH_SEED + 0;
17
*/
24
uint32_t v4 = QEMU_XXHASH_SEED - PRIME32_1;
18
case MO_ATOM_IFALIGN:
25
- uint32_t a = ab >> 32;
19
+ case MO_ATOM_WITHIN16:
26
- uint32_t b = ab;
20
case MO_ATOM_NONE:
27
- uint32_t c = cd >> 32;
21
stq_le_p(p->haddr, int128_getlo(val_le));
28
- uint32_t d = cd;
22
return store_bytes_leN(p->haddr + 8, p->size - 8,
29
+ uint32_t a = ab;
30
+ uint32_t b = ab >> 32;
31
+ uint32_t c = cd;
32
+ uint32_t d = cd >> 32;
33
uint32_t h32;
34
35
v1 += a * PRIME32_2;
36
--
23
--
37
2.17.2
24
2.34.1
38
39
diff view generated by jsdifflib
[Qemu-devel] [PULL 31/32] include: move exec/tb-hash-xx.h to qemu/xxhash.h
[PULL 03/16] tcg/ppc: Define _CALL_AIX for clang on ppc64(be)
1
From: "Emilio G. Cota" <cota@braap.org>
1
Restructure the ifdef ladder, separating 64-bit from 32-bit,
2
and ensure _CALL_AIX is set for ELF v1. Fixes the build for
3
ppc64 big-endian host with clang.
2
4
3
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
5
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
4
Signed-off-by: Emilio G. Cota <cota@braap.org>
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
---
7
---
7
include/exec/tb-hash.h | 2 +-
8
tcg/ppc/tcg-target.c.inc | 23 ++++++++++++++++-------
8
include/{exec/tb-hash-xx.h => qemu/xxhash.h} | 6 +++---
9
1 file changed, 16 insertions(+), 7 deletions(-)
9
tests/qht-bench.c | 2 +-
10
util/qsp.c | 2 +-
11
4 files changed, 6 insertions(+), 6 deletions(-)
12
rename include/{exec/tb-hash-xx.h => qemu/xxhash.h} (97%)
13
10
14
diff --git a/include/exec/tb-hash.h b/include/exec/tb-hash.h
11
diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc
15
index XXXXXXX..XXXXXXX 100644
12
index XXXXXXX..XXXXXXX 100644
16
--- a/include/exec/tb-hash.h
13
--- a/tcg/ppc/tcg-target.c.inc
17
+++ b/include/exec/tb-hash.h
14
+++ b/tcg/ppc/tcg-target.c.inc
18
@@ -XXX,XX +XXX,XX @@
15
@@ -XXX,XX +XXX,XX @@
19
#ifndef EXEC_TB_HASH_H
16
/*
20
#define EXEC_TB_HASH_H
17
* Standardize on the _CALL_FOO symbols used by GCC:
21
18
* Apple XCode does not define _CALL_DARWIN.
22
-#include "exec/tb-hash-xx.h"
19
- * Clang defines _CALL_ELF (64-bit) but not _CALL_SYSV (32-bit).
23
+#include "qemu/xxhash.h"
20
+ * Clang defines _CALL_ELF (64-bit) but not _CALL_SYSV or _CALL_AIX.
24
25
#ifdef CONFIG_SOFTMMU
26
27
diff --git a/include/exec/tb-hash-xx.h b/include/qemu/xxhash.h
28
similarity index 97%
29
rename from include/exec/tb-hash-xx.h
30
rename to include/qemu/xxhash.h
31
index XXXXXXX..XXXXXXX 100644
32
--- a/include/exec/tb-hash-xx.h
33
+++ b/include/qemu/xxhash.h
34
@@ -XXX,XX +XXX,XX @@
35
* - xxHash source repository : https://github.com/Cyan4973/xxHash
36
*/
21
*/
37
22
-#if !defined(_CALL_SYSV) && \
38
-#ifndef EXEC_TB_HASH_XX_H
23
- !defined(_CALL_DARWIN) && \
39
-#define EXEC_TB_HASH_XX_H
24
- !defined(_CALL_AIX) && \
40
+#ifndef QEMU_XXHASH_H
25
- !defined(_CALL_ELF)
41
+#define QEMU_XXHASH_H
26
-# if defined(__APPLE__)
42
27
+#if TCG_TARGET_REG_BITS == 64
43
#include "qemu/bitops.h"
28
+# ifdef _CALL_AIX
44
29
+ /* ok */
45
@@ -XXX,XX +XXX,XX @@ static inline uint32_t qemu_xxhash6(uint64_t ab, uint64_t cd, uint32_t e,
30
+# elif defined(_CALL_ELF) && _CALL_ELF == 1
46
return qemu_xxhash7(ab, cd, e, f, 0);
31
+# define _CALL_AIX
47
}
32
+# elif defined(_CALL_ELF) && _CALL_ELF == 2
48
33
+ /* ok */
49
-#endif /* EXEC_TB_HASH_XX_H */
34
+# else
50
+#endif /* QEMU_XXHASH_H */
35
+# error "Unknown ABI"
51
diff --git a/tests/qht-bench.c b/tests/qht-bench.c
36
+# endif
52
index XXXXXXX..XXXXXXX 100644
37
+#else
53
--- a/tests/qht-bench.c
38
+# if defined(_CALL_SYSV) || defined(_CALL_DARWIN)
54
+++ b/tests/qht-bench.c
39
+ /* ok */
55
@@ -XXX,XX +XXX,XX @@
40
+# elif defined(__APPLE__)
56
#include "qemu/atomic.h"
41
# define _CALL_DARWIN
57
#include "qemu/qht.h"
42
-# elif defined(__ELF__) && TCG_TARGET_REG_BITS == 32
58
#include "qemu/rcu.h"
43
+# elif defined(__ELF__)
59
-#include "exec/tb-hash-xx.h"
44
# define _CALL_SYSV
60
+#include "qemu/xxhash.h"
45
# else
61
46
# error "Unknown ABI"
62
struct thread_stats {
63
size_t rd;
64
diff --git a/util/qsp.c b/util/qsp.c
65
index XXXXXXX..XXXXXXX 100644
66
--- a/util/qsp.c
67
+++ b/util/qsp.c
68
@@ -XXX,XX +XXX,XX @@
69
#include "qemu/timer.h"
70
#include "qemu/qht.h"
71
#include "qemu/rcu.h"
72
-#include "exec/tb-hash-xx.h"
73
+#include "qemu/xxhash.h"
74
75
enum QSPType {
76
QSP_MUTEX,
77
--
47
--
78
2.17.2
48
2.34.1
79
80
diff view generated by jsdifflib
[Qemu-devel] [PULL 28/32] tcg: Drop nargs from tcg_op_insert_{before, after}
[PULL 04/16] target/i386: Simplify i386_tr_init_disas_context()
1
From: "Emilio G. Cota" <cota@braap.org>
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
2
2
3
It's unused since 75e8b9b7aa0b95a761b9add7e2f09248b101a392.
3
Since cpu_mmu_index() is well-defined for user-only,
4
we can remove the surrounding #ifdef'ry entirely.
4
5
5
Signed-off-by: Emilio G. Cota <cota@braap.org>
6
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
6
Message-Id: <20181209193749.12277-9-cota@braap.org>
7
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
8
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
9
Message-Id: <20230613133347.82210-2-philmd@linaro.org>
8
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
10
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9
---
11
---
10
tcg/tcg.h | 4 ++--
12
target/i386/tcg/translate.c | 3 ---
11
tcg/optimize.c | 4 ++--
13
1 file changed, 3 deletions(-)
12
tcg/tcg.c | 10 ++++------
13
3 files changed, 8 insertions(+), 10 deletions(-)
14
14
15
diff --git a/tcg/tcg.h b/tcg/tcg.h
15
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
16
index XXXXXXX..XXXXXXX 100644
16
index XXXXXXX..XXXXXXX 100644
17
--- a/tcg/tcg.h
17
--- a/target/i386/tcg/translate.c
18
+++ b/tcg/tcg.h
18
+++ b/target/i386/tcg/translate.c
19
@@ -XXX,XX +XXX,XX @@ void tcg_gen_callN(void *func, TCGTemp *ret, int nargs, TCGTemp **args);
19
@@ -XXX,XX +XXX,XX @@ static void i386_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cpu)
20
20
dc->cc_op_dirty = false;
21
TCGOp *tcg_emit_op(TCGOpcode opc);
21
dc->popl_esp_hack = 0;
22
void tcg_op_remove(TCGContext *s, TCGOp *op);
22
/* select memory access functions */
23
-TCGOp *tcg_op_insert_before(TCGContext *s, TCGOp *op, TCGOpcode opc, int narg);
23
- dc->mem_index = 0;
24
-TCGOp *tcg_op_insert_after(TCGContext *s, TCGOp *op, TCGOpcode opc, int narg);
24
-#ifdef CONFIG_SOFTMMU
25
+TCGOp *tcg_op_insert_before(TCGContext *s, TCGOp *op, TCGOpcode opc);
25
dc->mem_index = cpu_mmu_index(env, false);
26
+TCGOp *tcg_op_insert_after(TCGContext *s, TCGOp *op, TCGOpcode opc);
26
-#endif
27
27
dc->cpuid_features = env->features[FEAT_1_EDX];
28
void tcg_optimize(TCGContext *s);
28
dc->cpuid_ext_features = env->features[FEAT_1_ECX];
29
29
dc->cpuid_ext2_features = env->features[FEAT_8000_0001_EDX];
30
diff --git a/tcg/optimize.c b/tcg/optimize.c
31
index XXXXXXX..XXXXXXX 100644
32
--- a/tcg/optimize.c
33
+++ b/tcg/optimize.c
34
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
35
uint64_t a = ((uint64_t)ah << 32) | al;
36
uint64_t b = ((uint64_t)bh << 32) | bl;
37
TCGArg rl, rh;
38
- TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32, 2);
39
+ TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32);
40
41
if (opc == INDEX_op_add2_i32) {
42
a += b;
43
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
44
uint32_t b = arg_info(op->args[3])->val;
45
uint64_t r = (uint64_t)a * b;
46
TCGArg rl, rh;
47
- TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32, 2);
48
+ TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32);
49
50
rl = op->args[0];
51
rh = op->args[1];
52
diff --git a/tcg/tcg.c b/tcg/tcg.c
53
index XXXXXXX..XXXXXXX 100644
54
--- a/tcg/tcg.c
55
+++ b/tcg/tcg.c
56
@@ -XXX,XX +XXX,XX @@ TCGOp *tcg_emit_op(TCGOpcode opc)
57
return op;
58
}
59
60
-TCGOp *tcg_op_insert_before(TCGContext *s, TCGOp *old_op,
61
- TCGOpcode opc, int nargs)
62
+TCGOp *tcg_op_insert_before(TCGContext *s, TCGOp *old_op, TCGOpcode opc)
63
{
64
TCGOp *new_op = tcg_op_alloc(opc);
65
QTAILQ_INSERT_BEFORE(old_op, new_op, link);
66
return new_op;
67
}
68
69
-TCGOp *tcg_op_insert_after(TCGContext *s, TCGOp *old_op,
70
- TCGOpcode opc, int nargs)
71
+TCGOp *tcg_op_insert_after(TCGContext *s, TCGOp *old_op, TCGOpcode opc)
72
{
73
TCGOp *new_op = tcg_op_alloc(opc);
74
QTAILQ_INSERT_AFTER(&s->ops, old_op, new_op, link);
75
@@ -XXX,XX +XXX,XX @@ static bool liveness_pass_2(TCGContext *s)
76
TCGOpcode lopc = (arg_ts->type == TCG_TYPE_I32
77
? INDEX_op_ld_i32
78
: INDEX_op_ld_i64);
79
- TCGOp *lop = tcg_op_insert_before(s, op, lopc, 3);
80
+ TCGOp *lop = tcg_op_insert_before(s, op, lopc);
81
82
lop->args[0] = temp_arg(dir_ts);
83
lop->args[1] = temp_arg(arg_ts->mem_base);
84
@@ -XXX,XX +XXX,XX @@ static bool liveness_pass_2(TCGContext *s)
85
TCGOpcode sopc = (arg_ts->type == TCG_TYPE_I32
86
? INDEX_op_st_i32
87
: INDEX_op_st_i64);
88
- TCGOp *sop = tcg_op_insert_after(s, op, sopc, 3);
89
+ TCGOp *sop = tcg_op_insert_after(s, op, sopc);
90
91
sop->args[0] = temp_arg(dir_ts);
92
sop->args[1] = temp_arg(arg_ts->mem_base);
93
--
30
--
94
2.17.2
31
2.34.1
95
32
96
33
diff view generated by jsdifflib
[Qemu-devel] [PULL 26/32] tcg: Add TCG_TARGET_HAS_MEMORY_BSWAP
[PULL 05/16] target/tricore: Remove pointless CONFIG_SOFTMMU guard
1
For now, defined universally as true, since we previously required
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
2
backends to implement swapped memory operations. Future patches
3
may now remove that support where it is onerous.
4
2
3
We don't build any user emulation target for Tricore,
4
only the system emulation. No need to check for it as
5
it is always defined.
6
7
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
8
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
9
Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
10
Message-Id: <20230613133347.82210-3-philmd@linaro.org>
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
11
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
---
12
---
7
tcg/aarch64/tcg-target.h | 1 +
13
target/tricore/helper.c | 2 --
8
tcg/arm/tcg-target.h | 1 +
14
1 file changed, 2 deletions(-)
9
tcg/i386/tcg-target.h | 2 +
10
tcg/mips/tcg-target.h | 1 +
11
tcg/ppc/tcg-target.h | 1 +
12
tcg/s390/tcg-target.h | 1 +
13
tcg/sparc/tcg-target.h | 1 +
14
tcg/tci/tcg-target.h | 2 +
15
tcg/tcg-op.c | 118 ++++++++++++++++++++++++++++++++++++++-
16
9 files changed, 126 insertions(+), 2 deletions(-)
17
15
18
diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h
16
diff --git a/target/tricore/helper.c b/target/tricore/helper.c
19
index XXXXXXX..XXXXXXX 100644
17
index XXXXXXX..XXXXXXX 100644
20
--- a/tcg/aarch64/tcg-target.h
18
--- a/target/tricore/helper.c
21
+++ b/tcg/aarch64/tcg-target.h
19
+++ b/target/tricore/helper.c
22
@@ -XXX,XX +XXX,XX @@ typedef enum {
23
#define TCG_TARGET_HAS_mul_vec 1
24
25
#define TCG_TARGET_DEFAULT_MO (0)
26
+#define TCG_TARGET_HAS_MEMORY_BSWAP 1
27
28
static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
29
{
30
diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h
31
index XXXXXXX..XXXXXXX 100644
32
--- a/tcg/arm/tcg-target.h
33
+++ b/tcg/arm/tcg-target.h
34
@@ -XXX,XX +XXX,XX @@ enum {
20
@@ -XXX,XX +XXX,XX @@ enum {
21
TLBRET_MATCH = 0
35
};
22
};
36
23
37
#define TCG_TARGET_DEFAULT_MO (0)
24
-#if defined(CONFIG_SOFTMMU)
38
+#define TCG_TARGET_HAS_MEMORY_BSWAP 1
25
static int get_physical_address(CPUTriCoreState *env, hwaddr *physical,
39
26
int *prot, target_ulong address,
40
static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
27
MMUAccessType access_type, int mmu_idx)
41
{
28
@@ -XXX,XX +XXX,XX @@ hwaddr tricore_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
42
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
29
}
43
index XXXXXXX..XXXXXXX 100644
30
return phys_addr;
44
--- a/tcg/i386/tcg-target.h
45
+++ b/tcg/i386/tcg-target.h
46
@@ -XXX,XX +XXX,XX @@ static inline void tb_target_set_jmp_target(uintptr_t tc_ptr,
47
48
#define TCG_TARGET_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD)
49
50
+#define TCG_TARGET_HAS_MEMORY_BSWAP 1
51
+
52
#ifdef CONFIG_SOFTMMU
53
#define TCG_TARGET_NEED_LDST_LABELS
54
#endif
55
diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h
56
index XXXXXXX..XXXXXXX 100644
57
--- a/tcg/mips/tcg-target.h
58
+++ b/tcg/mips/tcg-target.h
59
@@ -XXX,XX +XXX,XX @@ extern bool use_mips32r2_instructions;
60
#endif
61
62
#define TCG_TARGET_DEFAULT_MO (0)
63
+#define TCG_TARGET_HAS_MEMORY_BSWAP 1
64
65
static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
66
{
67
diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h
68
index XXXXXXX..XXXXXXX 100644
69
--- a/tcg/ppc/tcg-target.h
70
+++ b/tcg/ppc/tcg-target.h
71
@@ -XXX,XX +XXX,XX @@ void flush_icache_range(uintptr_t start, uintptr_t stop);
72
void tb_target_set_jmp_target(uintptr_t, uintptr_t, uintptr_t);
73
74
#define TCG_TARGET_DEFAULT_MO (0)
75
+#define TCG_TARGET_HAS_MEMORY_BSWAP 1
76
77
#ifdef CONFIG_SOFTMMU
78
#define TCG_TARGET_NEED_LDST_LABELS
79
diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h
80
index XXXXXXX..XXXXXXX 100644
81
--- a/tcg/s390/tcg-target.h
82
+++ b/tcg/s390/tcg-target.h
83
@@ -XXX,XX +XXX,XX @@ extern uint64_t s390_facilities;
84
#define TCG_TARGET_CALL_STACK_OFFSET    160
85
86
#define TCG_TARGET_EXTEND_ARGS 1
87
+#define TCG_TARGET_HAS_MEMORY_BSWAP 1
88
89
#define TCG_TARGET_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD)
90
91
diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h
92
index XXXXXXX..XXXXXXX 100644
93
--- a/tcg/sparc/tcg-target.h
94
+++ b/tcg/sparc/tcg-target.h
95
@@ -XXX,XX +XXX,XX @@ extern bool use_vis3_instructions;
96
#define TCG_AREG0 TCG_REG_I0
97
98
#define TCG_TARGET_DEFAULT_MO (0)
99
+#define TCG_TARGET_HAS_MEMORY_BSWAP 1
100
101
static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
102
{
103
diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h
104
index XXXXXXX..XXXXXXX 100644
105
--- a/tcg/tci/tcg-target.h
106
+++ b/tcg/tci/tcg-target.h
107
@@ -XXX,XX +XXX,XX @@ static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
108
We prefer consistency across hosts on this. */
109
#define TCG_TARGET_DEFAULT_MO (0)
110
111
+#define TCG_TARGET_HAS_MEMORY_BSWAP 1
112
+
113
static inline void tb_target_set_jmp_target(uintptr_t tc_ptr,
114
uintptr_t jmp_addr, uintptr_t addr)
115
{
116
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c
117
index XXXXXXX..XXXXXXX 100644
118
--- a/tcg/tcg-op.c
119
+++ b/tcg/tcg-op.c
120
@@ -XXX,XX +XXX,XX @@ static void tcg_gen_req_mo(TCGBar type)
121
122
void tcg_gen_qemu_ld_i32(TCGv_i32 val, TCGv addr, TCGArg idx, TCGMemOp memop)
123
{
124
+ TCGMemOp orig_memop;
125
+
126
tcg_gen_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD);
127
memop = tcg_canonicalize_memop(memop, 0, 0);
128
trace_guest_mem_before_tcg(tcg_ctx->cpu, cpu_env,
129
addr, trace_mem_get_info(memop, 0));
130
+
131
+ orig_memop = memop;
132
+ if (!TCG_TARGET_HAS_MEMORY_BSWAP && (memop & MO_BSWAP)) {
133
+ memop &= ~MO_BSWAP;
134
+ /* The bswap primitive requires zero-extended input. */
135
+ if ((memop & MO_SSIZE) == MO_SW) {
136
+ memop &= ~MO_SIGN;
137
+ }
138
+ }
139
+
140
gen_ldst_i32(INDEX_op_qemu_ld_i32, val, addr, memop, idx);
141
+
142
+ if ((orig_memop ^ memop) & MO_BSWAP) {
143
+ switch (orig_memop & MO_SIZE) {
144
+ case MO_16:
145
+ tcg_gen_bswap16_i32(val, val);
146
+ if (orig_memop & MO_SIGN) {
147
+ tcg_gen_ext16s_i32(val, val);
148
+ }
149
+ break;
150
+ case MO_32:
151
+ tcg_gen_bswap32_i32(val, val);
152
+ break;
153
+ default:
154
+ g_assert_not_reached();
155
+ }
156
+ }
157
}
31
}
158
32
-#endif
159
void tcg_gen_qemu_st_i32(TCGv_i32 val, TCGv addr, TCGArg idx, TCGMemOp memop)
33
160
{
34
/* TODO: Add exeption support*/
161
+ TCGv_i32 swap = NULL;
35
static void raise_mmu_exception(CPUTriCoreState *env, target_ulong address,
162
+
163
tcg_gen_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST);
164
memop = tcg_canonicalize_memop(memop, 0, 1);
165
trace_guest_mem_before_tcg(tcg_ctx->cpu, cpu_env,
166
addr, trace_mem_get_info(memop, 1));
167
+
168
+ if (!TCG_TARGET_HAS_MEMORY_BSWAP && (memop & MO_BSWAP)) {
169
+ swap = tcg_temp_new_i32();
170
+ switch (memop & MO_SIZE) {
171
+ case MO_16:
172
+ tcg_gen_ext16u_i32(swap, val);
173
+ tcg_gen_bswap16_i32(swap, swap);
174
+ break;
175
+ case MO_32:
176
+ tcg_gen_bswap32_i32(swap, val);
177
+ break;
178
+ default:
179
+ g_assert_not_reached();
180
+ }
181
+ val = swap;
182
+ memop &= ~MO_BSWAP;
183
+ }
184
+
185
gen_ldst_i32(INDEX_op_qemu_st_i32, val, addr, memop, idx);
186
+
187
+ if (swap) {
188
+ tcg_temp_free_i32(swap);
189
+ }
190
}
191
192
void tcg_gen_qemu_ld_i64(TCGv_i64 val, TCGv addr, TCGArg idx, TCGMemOp memop)
193
{
194
- tcg_gen_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD);
195
+ TCGMemOp orig_memop;
196
+
197
if (TCG_TARGET_REG_BITS == 32 && (memop & MO_SIZE) < MO_64) {
198
tcg_gen_qemu_ld_i32(TCGV_LOW(val), addr, idx, memop);
199
if (memop & MO_SIGN) {
200
@@ -XXX,XX +XXX,XX @@ void tcg_gen_qemu_ld_i64(TCGv_i64 val, TCGv addr, TCGArg idx, TCGMemOp memop)
201
return;
202
}
203
204
+ tcg_gen_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD);
205
memop = tcg_canonicalize_memop(memop, 1, 0);
206
trace_guest_mem_before_tcg(tcg_ctx->cpu, cpu_env,
207
addr, trace_mem_get_info(memop, 0));
208
+
209
+ orig_memop = memop;
210
+ if (!TCG_TARGET_HAS_MEMORY_BSWAP && (memop & MO_BSWAP)) {
211
+ memop &= ~MO_BSWAP;
212
+ /* The bswap primitive requires zero-extended input. */
213
+ if ((memop & MO_SIGN) && (memop & MO_SIZE) < MO_64) {
214
+ memop &= ~MO_SIGN;
215
+ }
216
+ }
217
+
218
gen_ldst_i64(INDEX_op_qemu_ld_i64, val, addr, memop, idx);
219
+
220
+ if ((orig_memop ^ memop) & MO_BSWAP) {
221
+ switch (orig_memop & MO_SIZE) {
222
+ case MO_16:
223
+ tcg_gen_bswap16_i64(val, val);
224
+ if (orig_memop & MO_SIGN) {
225
+ tcg_gen_ext16s_i64(val, val);
226
+ }
227
+ break;
228
+ case MO_32:
229
+ tcg_gen_bswap32_i64(val, val);
230
+ if (orig_memop & MO_SIGN) {
231
+ tcg_gen_ext32s_i64(val, val);
232
+ }
233
+ break;
234
+ case MO_64:
235
+ tcg_gen_bswap64_i64(val, val);
236
+ break;
237
+ default:
238
+ g_assert_not_reached();
239
+ }
240
+ }
241
}
242
243
void tcg_gen_qemu_st_i64(TCGv_i64 val, TCGv addr, TCGArg idx, TCGMemOp memop)
244
{
245
- tcg_gen_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST);
246
+ TCGv_i64 swap = NULL;
247
+
248
if (TCG_TARGET_REG_BITS == 32 && (memop & MO_SIZE) < MO_64) {
249
tcg_gen_qemu_st_i32(TCGV_LOW(val), addr, idx, memop);
250
return;
251
}
252
253
+ tcg_gen_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST);
254
memop = tcg_canonicalize_memop(memop, 1, 1);
255
trace_guest_mem_before_tcg(tcg_ctx->cpu, cpu_env,
256
addr, trace_mem_get_info(memop, 1));
257
+
258
+ if (!TCG_TARGET_HAS_MEMORY_BSWAP && (memop & MO_BSWAP)) {
259
+ swap = tcg_temp_new_i64();
260
+ switch (memop & MO_SIZE) {
261
+ case MO_16:
262
+ tcg_gen_ext16u_i64(swap, val);
263
+ tcg_gen_bswap16_i64(swap, swap);
264
+ break;
265
+ case MO_32:
266
+ tcg_gen_ext32u_i64(swap, val);
267
+ tcg_gen_bswap32_i64(swap, swap);
268
+ break;
269
+ case MO_64:
270
+ tcg_gen_bswap64_i64(swap, val);
271
+ break;
272
+ default:
273
+ g_assert_not_reached();
274
+ }
275
+ val = swap;
276
+ memop &= ~MO_BSWAP;
277
+ }
278
+
279
gen_ldst_i64(INDEX_op_qemu_st_i64, val, addr, memop, idx);
280
+
281
+ if (swap) {
282
+ tcg_temp_free_i64(swap);
283
+ }
284
}
285
286
static void tcg_gen_ext_i32(TCGv_i32 ret, TCGv_i32 val, TCGMemOp opc)
287
--
36
--
288
2.17.2
37
2.34.1
289
38
290
39
diff view generated by jsdifflib
[Qemu-devel] [PULL 20/32] tcg/i386: Assume 32-bit values are zero-extended
[PULL 06/16] target/m68k: Check for USER_ONLY definition instead of SOFTMMU one
1
We now have an invariant that all TCG_TYPE_I32 values are
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
2
zero-extended, which means that we do not need to extend
2
3
them again during qemu_ld/st, either explicitly via a separate
3
Since we *might* have user emulation with softmmu,
4
tcg_out_ext32u or implicitly via P_ADDR32.
4
replace the system emulation check by !user emulation one.
5
5
6
Reviewed-by: Emilio G. Cota <cota@braap.org>
6
Invert some if() ladders for clarity.
7
8
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
9
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
10
Message-Id: <20230613133347.82210-4-philmd@linaro.org>
7
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
11
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
8
---
12
---
9
tcg/i386/tcg-target.inc.c | 103 +++++++++++++++-----------------------
13
target/m68k/helper.h | 2 +-
10
1 file changed, 40 insertions(+), 63 deletions(-)
14
target/m68k/cpu.c | 14 ++++++--------
11
15
target/m68k/helper.c | 4 ++--
12
diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c
16
target/m68k/translate.c | 28 ++++++++++++++--------------
13
index XXXXXXX..XXXXXXX 100644
17
4 files changed, 23 insertions(+), 25 deletions(-)
14
--- a/tcg/i386/tcg-target.inc.c
18
15
+++ b/tcg/i386/tcg-target.inc.c
19
diff --git a/target/m68k/helper.h b/target/m68k/helper.h
16
@@ -XXX,XX +XXX,XX @@ static inline int tcg_target_const_match(tcg_target_long val, TCGType type,
20
index XXXXXXX..XXXXXXX 100644
17
#define P_EXT38 0x200 /* 0x0f 0x38 opcode prefix */
21
--- a/target/m68k/helper.h
18
#define P_DATA16 0x400 /* 0x66 opcode prefix */
22
+++ b/target/m68k/helper.h
19
#if TCG_TARGET_REG_BITS == 64
23
@@ -XXX,XX +XXX,XX @@ DEF_HELPER_FLAGS_4(bfffo_mem, TCG_CALL_NO_WG, i64, env, i32, s32, i32)
20
-# define P_ADDR32 0x800 /* 0x67 opcode prefix */
24
DEF_HELPER_3(chk, void, env, s32, s32)
21
# define P_REXW 0x1000 /* Set REX.W = 1 */
25
DEF_HELPER_4(chk2, void, env, s32, s32, s32)
22
# define P_REXB_R 0x2000 /* REG field as byte register */
26
23
# define P_REXB_RM 0x4000 /* R/M field as byte register */
27
-#if defined(CONFIG_SOFTMMU)
24
# define P_GS 0x8000 /* gs segment override */
28
+#if !defined(CONFIG_USER_ONLY)
25
#else
29
DEF_HELPER_3(ptest, void, env, i32, i32)
26
-# define P_ADDR32    0
30
DEF_HELPER_3(pflush, void, env, i32, i32)
27
# define P_REXW        0
31
DEF_HELPER_FLAGS_1(reset, TCG_CALL_NO_RWG, void, env)
28
# define P_REXB_R    0
32
diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c
29
# define P_REXB_RM    0
33
index XXXXXXX..XXXXXXX 100644
30
@@ -XXX,XX +XXX,XX @@ static void tcg_out_opc(TCGContext *s, int opc, int r, int rm, int x)
34
--- a/target/m68k/cpu.c
31
tcg_debug_assert((opc & P_REXW) == 0);
35
+++ b/target/m68k/cpu.c
32
tcg_out8(s, 0x66);
36
@@ -XXX,XX +XXX,XX @@ static void m68k_cpu_reset_hold(Object *obj)
33
}
37
}
34
- if (opc & P_ADDR32) {
38
35
- tcg_out8(s, 0x67);
39
memset(env, 0, offsetof(CPUM68KState, end_reset_fields));
36
- }
40
-#ifdef CONFIG_SOFTMMU
37
if (opc & P_SIMDF3) {
41
- cpu_m68k_set_sr(env, SR_S | SR_I);
38
tcg_out8(s, 0xf3);
42
-#else
39
} else if (opc & P_SIMDF2) {
43
+#ifdef CONFIG_USER_ONLY
40
@@ -XXX,XX +XXX,XX @@ static inline void tcg_out_tlb_load(TCGContext *s, TCGReg addrlo, TCGReg addrhi,
44
cpu_m68k_set_sr(env, 0);
41
tcg_out_modrm_offset(s, OPC_CMP_GvEv + trexw, r1, r0, 0);
45
+#else
42
46
+ cpu_m68k_set_sr(env, SR_S | SR_I);
43
/* Prepare for both the fast path add of the tlb addend, and the slow
47
#endif
44
- path function argument setup. There are two cases worth note:
48
for (i = 0; i < 8; i++) {
45
- For 32-bit guest and x86_64 host, MOVL zero-extends the guest address
49
env->fregs[i].d = nan;
46
- before the fastpath ADDQ below. For 64-bit guest and x32 host, MOVQ
50
@@ -XXX,XX +XXX,XX @@ static void m68k_cpu_initfn(Object *obj)
47
- copies the entire guest address for the slow path, while truncation
51
cpu_set_cpustate_pointers(cpu);
48
- for the 32-bit host happens with the fastpath ADDL below. */
52
}
49
+ path function argument setup. */
53
50
tcg_out_mov(s, ttype, r1, addrlo);
54
-#if defined(CONFIG_SOFTMMU)
51
55
+#if !defined(CONFIG_USER_ONLY)
52
/* jne slow_path */
56
static bool fpu_needed(void *opaque)
53
@@ -XXX,XX +XXX,XX @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64)
57
{
54
#else
58
M68kCPU *s = opaque;
55
{
59
@@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_m68k_cpu = {
56
int32_t offset = guest_base;
60
NULL
57
- TCGReg base = addrlo;
61
},
58
int index = -1;
62
};
59
int seg = 0;
63
-#endif
60
64
61
- /* For a 32-bit guest, the high 32 bits may contain garbage.
65
-#ifndef CONFIG_USER_ONLY
62
- We can do this with the ADDR32 prefix if we're not using
66
#include "hw/core/sysemu-cpu-ops.h"
63
- a guest base, or when using segmentation. Otherwise we
67
64
- need to zero-extend manually. */
68
static const struct SysemuCPUOps m68k_sysemu_ops = {
65
+ /*
69
.get_phys_page_debug = m68k_cpu_get_phys_page_debug,
66
+ * Recall we store 32-bit values zero-extended. No need for
70
};
67
+ * further manual extension or an addr32 (0x67) prefix.
71
-#endif
68
+ */
72
+#endif /* !CONFIG_USER_ONLY */
69
if (guest_base == 0 || guest_base_flags) {
73
70
seg = guest_base_flags;
74
#include "hw/core/tcg-cpu-ops.h"
71
offset = 0;
75
72
- if (TCG_TARGET_REG_BITS > TARGET_LONG_BITS) {
76
@@ -XXX,XX +XXX,XX @@ static void m68k_cpu_class_init(ObjectClass *c, void *data)
73
- seg |= P_ADDR32;
77
cc->get_pc = m68k_cpu_get_pc;
74
- }
78
cc->gdb_read_register = m68k_cpu_gdb_read_register;
75
- } else if (TCG_TARGET_REG_BITS == 64) {
79
cc->gdb_write_register = m68k_cpu_gdb_write_register;
76
- if (TARGET_LONG_BITS == 32) {
80
-#if defined(CONFIG_SOFTMMU)
77
- tcg_out_ext32u(s, TCG_REG_L0, base);
81
+#if !defined(CONFIG_USER_ONLY)
78
- base = TCG_REG_L0;
82
dc->vmsd = &vmstate_m68k_cpu;
79
- }
83
cc->sysemu_ops = &m68k_sysemu_ops;
80
- if (offset != guest_base) {
84
#endif
81
- tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_L1, guest_base);
85
diff --git a/target/m68k/helper.c b/target/m68k/helper.c
82
- index = TCG_REG_L1;
86
index XXXXXXX..XXXXXXX 100644
83
- offset = 0;
87
--- a/target/m68k/helper.c
84
- }
88
+++ b/target/m68k/helper.c
85
+ } else if (TCG_TARGET_REG_BITS == 64 && offset != guest_base) {
89
@@ -XXX,XX +XXX,XX @@ void HELPER(set_mac_extu)(CPUM68KState *env, uint32_t val, uint32_t acc)
86
+ tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_L1, guest_base);
90
env->macc[acc + 1] = res;
87
+ index = TCG_REG_L1;
91
}
88
+ offset = 0;
92
89
}
93
-#if defined(CONFIG_SOFTMMU)
90
94
+#if !defined(CONFIG_USER_ONLY)
91
tcg_out_qemu_ld_direct(s, datalo, datahi,
95
void HELPER(ptest)(CPUM68KState *env, uint32_t addr, uint32_t is_read)
92
- base, index, offset, seg, is64, opc);
96
{
93
+ addrlo, index, offset, seg, is64, opc);
97
hwaddr physical;
98
@@ -XXX,XX +XXX,XX @@ void HELPER(reset)(CPUM68KState *env)
99
{
100
/* FIXME: reset all except CPU */
101
}
102
-#endif
103
+#endif /* !CONFIG_USER_ONLY */
104
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
105
index XXXXXXX..XXXXXXX 100644
106
--- a/target/m68k/translate.c
107
+++ b/target/m68k/translate.c
108
@@ -XXX,XX +XXX,XX @@ DISAS_INSN(swap)
109
110
DISAS_INSN(bkpt)
111
{
112
-#if defined(CONFIG_SOFTMMU)
113
- gen_exception(s, s->base.pc_next, EXCP_ILLEGAL);
114
-#else
115
+#if defined(CONFIG_USER_ONLY)
116
gen_exception(s, s->base.pc_next, EXCP_DEBUG);
117
+#else
118
+ gen_exception(s, s->base.pc_next, EXCP_ILLEGAL);
119
#endif
120
}
121
122
@@ -XXX,XX +XXX,XX @@ DISAS_INSN(unlk)
123
tcg_gen_addi_i32(QREG_SP, src, 4);
124
}
125
126
-#if defined(CONFIG_SOFTMMU)
127
+#if !defined(CONFIG_USER_ONLY)
128
DISAS_INSN(reset)
129
{
130
if (IS_USER(s)) {
131
@@ -XXX,XX +XXX,XX @@ DISAS_INSN(move_from_sr)
132
DEST_EA(env, insn, OS_WORD, sr, NULL);
133
}
134
135
-#if defined(CONFIG_SOFTMMU)
136
+#if !defined(CONFIG_USER_ONLY)
137
DISAS_INSN(moves)
138
{
139
int opsize;
140
@@ -XXX,XX +XXX,XX @@ DISAS_INSN(cinv)
141
/* Invalidate cache line. Implement as no-op. */
142
}
143
144
-#if defined(CONFIG_SOFTMMU)
145
+#if !defined(CONFIG_USER_ONLY)
146
DISAS_INSN(pflush)
147
{
148
TCGv opmode;
149
@@ -XXX,XX +XXX,XX @@ DISAS_INSN(ftrapcc)
150
do_trapcc(s, &c);
151
}
152
153
-#if defined(CONFIG_SOFTMMU)
154
+#if !defined(CONFIG_USER_ONLY)
155
DISAS_INSN(frestore)
156
{
157
TCGv addr;
158
@@ -XXX,XX +XXX,XX @@ void register_m68k_insns (CPUM68KState *env)
159
BASE(bitop_im, 08c0, ffc0);
160
INSN(arith_im, 0a80, fff8, CF_ISA_A);
161
INSN(arith_im, 0a00, ff00, M68K);
162
-#if defined(CONFIG_SOFTMMU)
163
+#if !defined(CONFIG_USER_ONLY)
164
INSN(moves, 0e00, ff00, M68K);
165
#endif
166
INSN(cas, 0ac0, ffc0, CAS);
167
@@ -XXX,XX +XXX,XX @@ void register_m68k_insns (CPUM68KState *env)
168
BASE(move_to_ccr, 44c0, ffc0);
169
INSN(not, 4680, fff8, CF_ISA_A);
170
INSN(not, 4600, ff00, M68K);
171
-#if defined(CONFIG_SOFTMMU)
172
+#if !defined(CONFIG_USER_ONLY)
173
BASE(move_to_sr, 46c0, ffc0);
174
#endif
175
INSN(nbcd, 4800, ffc0, M68K);
176
@@ -XXX,XX +XXX,XX @@ void register_m68k_insns (CPUM68KState *env)
177
BASE(tst, 4a00, ff00);
178
INSN(tas, 4ac0, ffc0, CF_ISA_B);
179
INSN(tas, 4ac0, ffc0, M68K);
180
-#if defined(CONFIG_SOFTMMU)
181
+#if !defined(CONFIG_USER_ONLY)
182
INSN(halt, 4ac8, ffff, CF_ISA_A);
183
INSN(halt, 4ac8, ffff, M68K);
184
#endif
185
@@ -XXX,XX +XXX,XX @@ void register_m68k_insns (CPUM68KState *env)
186
BASE(trap, 4e40, fff0);
187
BASE(link, 4e50, fff8);
188
BASE(unlk, 4e58, fff8);
189
-#if defined(CONFIG_SOFTMMU)
190
+#if !defined(CONFIG_USER_ONLY)
191
INSN(move_to_usp, 4e60, fff8, USP);
192
INSN(move_from_usp, 4e68, fff8, USP);
193
INSN(reset, 4e70, ffff, M68K);
194
@@ -XXX,XX +XXX,XX @@ void register_m68k_insns (CPUM68KState *env)
195
INSN(ftrapcc, f27a, fffe, FPU); /* opmode 010, 011 */
196
INSN(ftrapcc, f27c, ffff, FPU); /* opmode 100 */
197
INSN(fbcc, f280, ff80, FPU);
198
-#if defined(CONFIG_SOFTMMU)
199
+#if !defined(CONFIG_USER_ONLY)
200
INSN(frestore, f340, ffc0, CF_FPU);
201
INSN(fsave, f300, ffc0, CF_FPU);
202
INSN(frestore, f340, ffc0, FPU);
203
@@ -XXX,XX +XXX,XX @@ void m68k_cpu_dump_state(CPUState *cs, FILE *f, int flags)
204
break;
94
}
205
}
95
#endif
206
qemu_fprintf(f, "\n");
96
}
207
-#ifdef CONFIG_SOFTMMU
97
208
+#ifndef CONFIG_USER_ONLY
98
static void tcg_out_qemu_st_direct(TCGContext *s, TCGReg datalo, TCGReg datahi,
209
qemu_fprintf(f, "%sA7(MSP) = %08x %sA7(USP) = %08x %sA7(ISP) = %08x\n",
99
- TCGReg base, intptr_t ofs, int seg,
210
env->current_sp == M68K_SSP ? "->" : " ", env->sp[M68K_SSP],
100
- TCGMemOp memop)
211
env->current_sp == M68K_USP ? "->" : " ", env->sp[M68K_USP],
101
+ TCGReg base, int index, intptr_t ofs,
212
@@ -XXX,XX +XXX,XX @@ void m68k_cpu_dump_state(CPUState *cs, FILE *f, int flags)
102
+ int seg, TCGMemOp memop)
213
env->mmu.ttr[M68K_ITTR0], env->mmu.ttr[M68K_ITTR1]);
103
{
214
qemu_fprintf(f, "MMUSR %08x, fault at %08x\n",
104
/* ??? Ideally we wouldn't need a scratch register. For user-only,
215
env->mmu.mmusr, env->mmu.ar);
105
we could perform the bswap twice to restore the original value
216
-#endif
106
@@ -XXX,XX +XXX,XX @@ static void tcg_out_qemu_st_direct(TCGContext *s, TCGReg datalo, TCGReg datahi,
217
+#endif /* !CONFIG_USER_ONLY */
107
tcg_out_mov(s, TCG_TYPE_I32, scratch, datalo);
108
datalo = scratch;
109
}
110
- tcg_out_modrm_offset(s, OPC_MOVB_EvGv + P_REXB_R + seg,
111
- datalo, base, ofs);
112
+ tcg_out_modrm_sib_offset(s, OPC_MOVB_EvGv + P_REXB_R + seg,
113
+ datalo, base, index, 0, ofs);
114
break;
115
case MO_16:
116
if (bswap) {
117
@@ -XXX,XX +XXX,XX @@ static void tcg_out_qemu_st_direct(TCGContext *s, TCGReg datalo, TCGReg datahi,
118
tcg_out_rolw_8(s, scratch);
119
datalo = scratch;
120
}
121
- tcg_out_modrm_offset(s, movop + P_DATA16 + seg, datalo, base, ofs);
122
+ tcg_out_modrm_sib_offset(s, movop + P_DATA16 + seg, datalo,
123
+ base, index, 0, ofs);
124
break;
125
case MO_32:
126
if (bswap) {
127
@@ -XXX,XX +XXX,XX @@ static void tcg_out_qemu_st_direct(TCGContext *s, TCGReg datalo, TCGReg datahi,
128
tcg_out_bswap32(s, scratch);
129
datalo = scratch;
130
}
131
- tcg_out_modrm_offset(s, movop + seg, datalo, base, ofs);
132
+ tcg_out_modrm_sib_offset(s, movop + seg, datalo, base, index, 0, ofs);
133
break;
134
case MO_64:
135
if (TCG_TARGET_REG_BITS == 64) {
136
@@ -XXX,XX +XXX,XX @@ static void tcg_out_qemu_st_direct(TCGContext *s, TCGReg datalo, TCGReg datahi,
137
tcg_out_bswap64(s, scratch);
138
datalo = scratch;
139
}
140
- tcg_out_modrm_offset(s, movop + P_REXW + seg, datalo, base, ofs);
141
+ tcg_out_modrm_sib_offset(s, movop + P_REXW + seg, datalo,
142
+ base, index, 0, ofs);
143
} else if (bswap) {
144
tcg_out_mov(s, TCG_TYPE_I32, scratch, datahi);
145
tcg_out_bswap32(s, scratch);
146
- tcg_out_modrm_offset(s, OPC_MOVL_EvGv + seg, scratch, base, ofs);
147
+ tcg_out_modrm_sib_offset(s, OPC_MOVL_EvGv + seg, scratch,
148
+ base, index, 0, ofs);
149
tcg_out_mov(s, TCG_TYPE_I32, scratch, datalo);
150
tcg_out_bswap32(s, scratch);
151
- tcg_out_modrm_offset(s, OPC_MOVL_EvGv + seg, scratch, base, ofs+4);
152
+ tcg_out_modrm_sib_offset(s, OPC_MOVL_EvGv + seg, scratch,
153
+ base, index, 0, ofs + 4);
154
} else {
155
if (real_bswap) {
156
int t = datalo;
157
datalo = datahi;
158
datahi = t;
159
}
160
- tcg_out_modrm_offset(s, movop + seg, datalo, base, ofs);
161
- tcg_out_modrm_offset(s, movop + seg, datahi, base, ofs+4);
162
+ tcg_out_modrm_sib_offset(s, movop + seg, datalo,
163
+ base, index, 0, ofs);
164
+ tcg_out_modrm_sib_offset(s, movop + seg, datahi,
165
+ base, index, 0, ofs + 4);
166
}
167
break;
168
default:
169
@@ -XXX,XX +XXX,XX @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64)
170
label_ptr, offsetof(CPUTLBEntry, addr_write));
171
172
/* TLB Hit. */
173
- tcg_out_qemu_st_direct(s, datalo, datahi, TCG_REG_L1, 0, 0, opc);
174
+ tcg_out_qemu_st_direct(s, datalo, datahi, TCG_REG_L1, -1, 0, 0, opc);
175
176
/* Record the current context of a store into ldst label */
177
add_qemu_ldst_label(s, false, is64, oi, datalo, datahi, addrlo, addrhi,
178
@@ -XXX,XX +XXX,XX @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64)
179
#else
180
{
181
int32_t offset = guest_base;
182
- TCGReg base = addrlo;
183
+ int index = -1;
184
int seg = 0;
185
186
- /* See comment in tcg_out_qemu_ld re zero-extension of addrlo. */
187
+ /*
188
+ * Recall we store 32-bit values zero-extended. No need for
189
+ * further manual extension or an addr32 (0x67) prefix.
190
+ */
191
if (guest_base == 0 || guest_base_flags) {
192
seg = guest_base_flags;
193
offset = 0;
194
- if (TCG_TARGET_REG_BITS > TARGET_LONG_BITS) {
195
- seg |= P_ADDR32;
196
- }
197
- } else if (TCG_TARGET_REG_BITS == 64) {
198
- /* ??? Note that we can't use the same SIB addressing scheme
199
- as for loads, since we require L0 free for bswap. */
200
- if (offset != guest_base) {
201
- if (TARGET_LONG_BITS == 32) {
202
- tcg_out_ext32u(s, TCG_REG_L0, base);
203
- base = TCG_REG_L0;
204
- }
205
- tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_L1, guest_base);
206
- tgen_arithr(s, ARITH_ADD + P_REXW, TCG_REG_L1, base);
207
- base = TCG_REG_L1;
208
- offset = 0;
209
- } else if (TARGET_LONG_BITS == 32) {
210
- tcg_out_ext32u(s, TCG_REG_L1, base);
211
- base = TCG_REG_L1;
212
- }
213
+ } else if (TCG_TARGET_REG_BITS == 64 && offset != guest_base) {
214
+ /* ??? Note that we require L0 free for bswap. */
215
+ tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_L1, guest_base);
216
+ index = TCG_REG_L1;
217
+ offset = 0;
218
}
219
220
- tcg_out_qemu_st_direct(s, datalo, datahi, base, offset, seg, opc);
221
+ tcg_out_qemu_st_direct(s, datalo, datahi,
222
+ addrlo, index, offset, seg, opc);
223
}
224
#endif
225
}
218
}
226
--
219
--
227
2.17.2
220
2.34.1
228
221
229
222
diff view generated by jsdifflib
[Qemu-devel] [PULL 15/32] tcg/ppc: Return false on failure from patch_reloc
[PULL 07/16] target/ppc: Check for USER_ONLY definition instead of SOFTMMU one
1
The reloc_pc{14,24}_val routines retain their asserts.
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
2
Use these directly within the slow paths.
3
2
4
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
3
Since we *might* have user emulation with softmmu,
4
replace the system emulation check by !user emulation one.
5
6
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
8
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
9
Message-Id: <20230613133347.82210-5-philmd@linaro.org>
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
10
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
---
11
---
7
tcg/ppc/tcg-target.inc.c | 32 +++++++++++++++++++++-----------
12
target/ppc/cpu_init.c | 20 ++++++++++----------
8
1 file changed, 21 insertions(+), 11 deletions(-)
13
target/ppc/helper_regs.c | 6 ++----
14
2 files changed, 12 insertions(+), 14 deletions(-)
9
15
10
diff --git a/tcg/ppc/tcg-target.inc.c b/tcg/ppc/tcg-target.inc.c
16
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
11
index XXXXXXX..XXXXXXX 100644
17
index XXXXXXX..XXXXXXX 100644
12
--- a/tcg/ppc/tcg-target.inc.c
18
--- a/target/ppc/cpu_init.c
13
+++ b/tcg/ppc/tcg-target.inc.c
19
+++ b/target/ppc/cpu_init.c
14
@@ -XXX,XX +XXX,XX @@ static uint32_t reloc_pc24_val(tcg_insn_unit *pc, tcg_insn_unit *target)
20
@@ -XXX,XX +XXX,XX @@ POWERPC_FAMILY(970)(ObjectClass *oc, void *data)
15
return disp & 0x3fffffc;
21
(1ull << MSR_PMM) |
22
(1ull << MSR_RI);
23
pcc->mmu_model = POWERPC_MMU_64B;
24
-#if defined(CONFIG_SOFTMMU)
25
+#if !defined(CONFIG_USER_ONLY)
26
pcc->hash64_opts = &ppc_hash64_opts_basic;
27
#endif
28
pcc->excp_model = POWERPC_EXCP_970;
29
@@ -XXX,XX +XXX,XX @@ POWERPC_FAMILY(POWER5P)(ObjectClass *oc, void *data)
30
pcc->lpcr_mask = LPCR_RMLS | LPCR_ILE | LPCR_LPES0 | LPCR_LPES1 |
31
LPCR_RMI | LPCR_HDICE;
32
pcc->mmu_model = POWERPC_MMU_2_03;
33
-#if defined(CONFIG_SOFTMMU)
34
+#if !defined(CONFIG_USER_ONLY)
35
pcc->hash64_opts = &ppc_hash64_opts_basic;
36
pcc->lrg_decr_bits = 32;
37
#endif
38
@@ -XXX,XX +XXX,XX @@ POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data)
39
LPCR_LPES0 | LPCR_LPES1 | LPCR_HDICE;
40
pcc->lpcr_pm = LPCR_P7_PECE0 | LPCR_P7_PECE1 | LPCR_P7_PECE2;
41
pcc->mmu_model = POWERPC_MMU_2_06;
42
-#if defined(CONFIG_SOFTMMU)
43
+#if !defined(CONFIG_USER_ONLY)
44
pcc->hash64_opts = &ppc_hash64_opts_POWER7;
45
pcc->lrg_decr_bits = 32;
46
#endif
47
@@ -XXX,XX +XXX,XX @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
48
pcc->lpcr_pm = LPCR_P8_PECE0 | LPCR_P8_PECE1 | LPCR_P8_PECE2 |
49
LPCR_P8_PECE3 | LPCR_P8_PECE4;
50
pcc->mmu_model = POWERPC_MMU_2_07;
51
-#if defined(CONFIG_SOFTMMU)
52
+#if !defined(CONFIG_USER_ONLY)
53
pcc->hash64_opts = &ppc_hash64_opts_POWER7;
54
pcc->lrg_decr_bits = 32;
55
pcc->n_host_threads = 8;
56
@@ -XXX,XX +XXX,XX @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
57
pcc->l1_icache_size = 0x8000;
16
}
58
}
17
59
18
-static void reloc_pc24(tcg_insn_unit *pc, tcg_insn_unit *target)
60
-#ifdef CONFIG_SOFTMMU
19
+static bool reloc_pc24(tcg_insn_unit *pc, tcg_insn_unit *target)
61
+#ifndef CONFIG_USER_ONLY
62
/*
63
* Radix pg sizes and AP encodings for dt node ibm,processor-radix-AP-encodings
64
* Encoded as array of int_32s in the form:
65
@@ -XXX,XX +XXX,XX @@ static struct ppc_radix_page_info POWER9_radix_page_info = {
66
0x4000001e /* 1G - enc: 0x2 */
67
}
68
};
69
-#endif /* CONFIG_SOFTMMU */
70
+#endif /* CONFIG_USER_ONLY */
71
72
static void init_proc_POWER9(CPUPPCState *env)
20
{
73
{
21
- *pc = (*pc & ~0x3fffffc) | reloc_pc24_val(pc, target);
74
@@ -XXX,XX +XXX,XX @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data)
22
+ ptrdiff_t disp = tcg_ptr_byte_diff(target, pc);
75
LPCR_HEIC | LPCR_LPES0 | LPCR_HVICE | LPCR_HDICE;
23
+ if (in_range_b(disp)) {
76
pcc->lpcr_pm = LPCR_PDEE | LPCR_HDEE | LPCR_EEE | LPCR_DEE | LPCR_OEE;
24
+ *pc = (*pc & ~0x3fffffc) | (disp & 0x3fffffc);
77
pcc->mmu_model = POWERPC_MMU_3_00;
25
+ return true;
78
-#if defined(CONFIG_SOFTMMU)
26
+ }
79
+#if !defined(CONFIG_USER_ONLY)
27
+ return false;
80
/* segment page size remain the same */
81
pcc->hash64_opts = &ppc_hash64_opts_POWER7;
82
pcc->radix_page_info = &POWER9_radix_page_info;
83
@@ -XXX,XX +XXX,XX @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data)
84
pcc->l1_icache_size = 0x8000;
28
}
85
}
29
86
30
static uint16_t reloc_pc14_val(tcg_insn_unit *pc, tcg_insn_unit *target)
87
-#ifdef CONFIG_SOFTMMU
31
@@ -XXX,XX +XXX,XX @@ static uint16_t reloc_pc14_val(tcg_insn_unit *pc, tcg_insn_unit *target)
88
+#ifndef CONFIG_USER_ONLY
32
return disp & 0xfffc;
89
/*
90
* Radix pg sizes and AP encodings for dt node ibm,processor-radix-AP-encodings
91
* Encoded as array of int_32s in the form:
92
@@ -XXX,XX +XXX,XX @@ static struct ppc_radix_page_info POWER10_radix_page_info = {
93
0x4000001e /* 1G - enc: 0x2 */
94
}
95
};
96
-#endif /* CONFIG_SOFTMMU */
97
+#endif /* !CONFIG_USER_ONLY */
98
99
static void init_proc_POWER10(CPUPPCState *env)
100
{
101
@@ -XXX,XX +XXX,XX @@ POWERPC_FAMILY(POWER10)(ObjectClass *oc, void *data)
102
103
pcc->lpcr_pm = LPCR_PDEE | LPCR_HDEE | LPCR_EEE | LPCR_DEE | LPCR_OEE;
104
pcc->mmu_model = POWERPC_MMU_3_00;
105
-#if defined(CONFIG_SOFTMMU)
106
+#if !defined(CONFIG_USER_ONLY)
107
/* segment page size remain the same */
108
pcc->hash64_opts = &ppc_hash64_opts_POWER7;
109
pcc->radix_page_info = &POWER10_radix_page_info;
110
diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c
111
index XXXXXXX..XXXXXXX 100644
112
--- a/target/ppc/helper_regs.c
113
+++ b/target/ppc/helper_regs.c
114
@@ -XXX,XX +XXX,XX @@ int hreg_store_msr(CPUPPCState *env, target_ulong value, int alter_hv)
115
return excp;
33
}
116
}
34
117
35
-static void reloc_pc14(tcg_insn_unit *pc, tcg_insn_unit *target)
118
-#ifdef CONFIG_SOFTMMU
36
+static bool reloc_pc14(tcg_insn_unit *pc, tcg_insn_unit *target)
119
+#ifndef CONFIG_USER_ONLY
120
void store_40x_sler(CPUPPCState *env, uint32_t val)
37
{
121
{
38
- *pc = (*pc & ~0xfffc) | reloc_pc14_val(pc, target);
122
/* XXX: TO BE FIXED */
39
+ ptrdiff_t disp = tcg_ptr_byte_diff(target, pc);
123
@@ -XXX,XX +XXX,XX @@ void store_40x_sler(CPUPPCState *env, uint32_t val)
40
+ if (disp == (int16_t) disp) {
124
}
41
+ *pc = (*pc & ~0xfffc) | (disp & 0xfffc);
125
env->spr[SPR_405_SLER] = val;
42
+ return true;
43
+ }
44
+ return false;
45
}
126
}
46
127
-#endif /* CONFIG_SOFTMMU */
47
/* parse target specific constraints */
128
48
@@ -XXX,XX +XXX,XX @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
129
-#ifndef CONFIG_USER_ONLY
49
130
void check_tlb_flush(CPUPPCState *env, bool global)
50
switch (type) {
131
{
51
case R_PPC_REL14:
132
CPUState *cs = env_cpu(env);
52
- reloc_pc14(code_ptr, target);
133
@@ -XXX,XX +XXX,XX @@ void check_tlb_flush(CPUPPCState *env, bool global)
53
- break;
134
tlb_flush(cs);
54
+ return reloc_pc14(code_ptr, target);
135
}
55
case R_PPC_REL24:
136
}
56
- reloc_pc24(code_ptr, target);
137
-#endif
57
- break;
138
+#endif /* !CONFIG_USER_ONLY */
58
+ return reloc_pc24(code_ptr, target);
139
59
case R_PPC_ADDR16:
140
/**
60
/* We are abusing this relocation type. This points to a pair
141
* _spr_register
61
of insns, addis + load. If the displacement is small, we
62
@@ -XXX,XX +XXX,XX @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
63
} else {
64
int16_t lo = value;
65
int hi = value - lo;
66
- assert(hi + lo == value);
67
+ if (hi + lo != value) {
68
+ return false;
69
+ }
70
code_ptr[0] = deposit32(code_ptr[0], 0, 16, hi >> 16);
71
code_ptr[1] = deposit32(code_ptr[1], 0, 16, lo);
72
}
73
@@ -XXX,XX +XXX,XX @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
74
TCGMemOp opc = get_memop(oi);
75
TCGReg hi, lo, arg = TCG_REG_R3;
76
77
- reloc_pc14(lb->label_ptr[0], s->code_ptr);
78
+ **lb->label_ptr |= reloc_pc14_val(*lb->label_ptr, s->code_ptr);
79
80
tcg_out_mov(s, TCG_TYPE_PTR, arg++, TCG_AREG0);
81
82
@@ -XXX,XX +XXX,XX @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
83
TCGMemOp s_bits = opc & MO_SIZE;
84
TCGReg hi, lo, arg = TCG_REG_R3;
85
86
- reloc_pc14(lb->label_ptr[0], s->code_ptr);
87
+ **lb->label_ptr |= reloc_pc14_val(*lb->label_ptr, s->code_ptr);
88
89
tcg_out_mov(s, TCG_TYPE_PTR, arg++, TCG_AREG0);
90
91
--
142
--
92
2.17.2
143
2.34.1
93
144
94
145
diff view generated by jsdifflib
[Qemu-devel] [PULL 27/32] tcg/mips: Improve the add2/sub2 command to use TCG_TARGET_REG_BITS
[PULL 08/16] hw/core/cpu: Check for USER_ONLY definition instead of SOFTMMU one
1
From: Alistair Francis <Alistair.Francis@wdc.com>
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
2
2
3
Instead of hard coding 31 for the shift right use TCG_TARGET_REG_BITS - 1.
3
Since we *might* have user emulation with softmmu,
4
replace the system emulation check by !user emulation one.
4
5
5
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
6
Invert the #ifdef'ry in TCGCPUOps structure for clarity.
6
Message-Id: <7dfbddf7014a595150aa79011ddb342c3cc17ec3.1544648105.git.alistair.francis@wdc.com>
7
8
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
9
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
10
Message-Id: <20230613133347.82210-6-philmd@linaro.org>
8
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
11
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9
---
12
---
10
tcg/mips/tcg-target.inc.c | 2 +-
13
include/hw/core/cpu.h | 4 +-
11
1 file changed, 1 insertion(+), 1 deletion(-)
14
include/hw/core/tcg-cpu-ops.h | 102 +++++++++++++++++-----------------
15
2 files changed, 53 insertions(+), 53 deletions(-)
12
16
13
diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c
17
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
14
index XXXXXXX..XXXXXXX 100644
18
index XXXXXXX..XXXXXXX 100644
15
--- a/tcg/mips/tcg-target.inc.c
19
--- a/include/hw/core/cpu.h
16
+++ b/tcg/mips/tcg-target.inc.c
20
+++ b/include/hw/core/cpu.h
17
@@ -XXX,XX +XXX,XX @@ static void tcg_out_addsub2(TCGContext *s, TCGReg rl, TCGReg rh, TCGReg al,
21
@@ -XXX,XX +XXX,XX @@ void page_size_init(void);
18
tcg_out_opc_imm(s, OPC_ADDIU, rl, al, bl);
22
19
tcg_out_opc_imm(s, OPC_SLTIU, TCG_TMP0, rl, bl);
23
#ifdef NEED_CPU_H
20
} else if (rl == al && rl == bl) {
24
21
- tcg_out_opc_sa(s, OPC_SRL, TCG_TMP0, al, 31);
25
-#ifdef CONFIG_SOFTMMU
22
+ tcg_out_opc_sa(s, OPC_SRL, TCG_TMP0, al, TCG_TARGET_REG_BITS - 1);
26
+#ifndef CONFIG_USER_ONLY
23
tcg_out_opc_reg(s, OPC_ADDU, rl, al, bl);
27
24
} else {
28
extern const VMStateDescription vmstate_cpu_common;
25
tcg_out_opc_reg(s, OPC_ADDU, rl, al, bl);
29
30
@@ -XXX,XX +XXX,XX @@ extern const VMStateDescription vmstate_cpu_common;
31
.flags = VMS_STRUCT, \
32
.offset = 0, \
33
}
34
-#endif /* CONFIG_SOFTMMU */
35
+#endif /* !CONFIG_USER_ONLY */
36
37
#endif /* NEED_CPU_H */
38
39
diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h
40
index XXXXXXX..XXXXXXX 100644
41
--- a/include/hw/core/tcg-cpu-ops.h
42
+++ b/include/hw/core/tcg-cpu-ops.h
43
@@ -XXX,XX +XXX,XX @@ struct TCGCPUOps {
44
*/
45
void (*do_interrupt)(CPUState *cpu);
46
#endif /* !CONFIG_USER_ONLY || !TARGET_I386 */
47
-#ifdef CONFIG_SOFTMMU
48
+#ifdef CONFIG_USER_ONLY
49
+ /**
50
+ * record_sigsegv:
51
+ * @cpu: cpu context
52
+ * @addr: faulting guest address
53
+ * @access_type: access was read/write/execute
54
+ * @maperr: true for invalid page, false for permission fault
55
+ * @ra: host pc for unwinding
56
+ *
57
+ * We are about to raise SIGSEGV with si_code set for @maperr,
58
+ * and si_addr set for @addr. Record anything further needed
59
+ * for the signal ucontext_t.
60
+ *
61
+ * If the emulated kernel does not provide anything to the signal
62
+ * handler with anything besides the user context registers, and
63
+ * the siginfo_t, then this hook need do nothing and may be omitted.
64
+ * Otherwise, record the data and return; the caller will raise
65
+ * the signal, unwind the cpu state, and return to the main loop.
66
+ *
67
+ * If it is simpler to re-use the sysemu tlb_fill code, @ra is provided
68
+ * so that a "normal" cpu exception can be raised. In this case,
69
+ * the signal must be raised by the architecture cpu_loop.
70
+ */
71
+ void (*record_sigsegv)(CPUState *cpu, vaddr addr,
72
+ MMUAccessType access_type,
73
+ bool maperr, uintptr_t ra);
74
+ /**
75
+ * record_sigbus:
76
+ * @cpu: cpu context
77
+ * @addr: misaligned guest address
78
+ * @access_type: access was read/write/execute
79
+ * @ra: host pc for unwinding
80
+ *
81
+ * We are about to raise SIGBUS with si_code BUS_ADRALN,
82
+ * and si_addr set for @addr. Record anything further needed
83
+ * for the signal ucontext_t.
84
+ *
85
+ * If the emulated kernel does not provide the signal handler with
86
+ * anything besides the user context registers, and the siginfo_t,
87
+ * then this hook need do nothing and may be omitted.
88
+ * Otherwise, record the data and return; the caller will raise
89
+ * the signal, unwind the cpu state, and return to the main loop.
90
+ *
91
+ * If it is simpler to re-use the sysemu do_unaligned_access code,
92
+ * @ra is provided so that a "normal" cpu exception can be raised.
93
+ * In this case, the signal must be raised by the architecture cpu_loop.
94
+ */
95
+ void (*record_sigbus)(CPUState *cpu, vaddr addr,
96
+ MMUAccessType access_type, uintptr_t ra);
97
+#else
98
/** @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec */
99
bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request);
100
/**
101
@@ -XXX,XX +XXX,XX @@ struct TCGCPUOps {
102
*/
103
bool (*io_recompile_replay_branch)(CPUState *cpu,
104
const TranslationBlock *tb);
105
-#else
106
- /**
107
- * record_sigsegv:
108
- * @cpu: cpu context
109
- * @addr: faulting guest address
110
- * @access_type: access was read/write/execute
111
- * @maperr: true for invalid page, false for permission fault
112
- * @ra: host pc for unwinding
113
- *
114
- * We are about to raise SIGSEGV with si_code set for @maperr,
115
- * and si_addr set for @addr. Record anything further needed
116
- * for the signal ucontext_t.
117
- *
118
- * If the emulated kernel does not provide anything to the signal
119
- * handler with anything besides the user context registers, and
120
- * the siginfo_t, then this hook need do nothing and may be omitted.
121
- * Otherwise, record the data and return; the caller will raise
122
- * the signal, unwind the cpu state, and return to the main loop.
123
- *
124
- * If it is simpler to re-use the sysemu tlb_fill code, @ra is provided
125
- * so that a "normal" cpu exception can be raised. In this case,
126
- * the signal must be raised by the architecture cpu_loop.
127
- */
128
- void (*record_sigsegv)(CPUState *cpu, vaddr addr,
129
- MMUAccessType access_type,
130
- bool maperr, uintptr_t ra);
131
- /**
132
- * record_sigbus:
133
- * @cpu: cpu context
134
- * @addr: misaligned guest address
135
- * @access_type: access was read/write/execute
136
- * @ra: host pc for unwinding
137
- *
138
- * We are about to raise SIGBUS with si_code BUS_ADRALN,
139
- * and si_addr set for @addr. Record anything further needed
140
- * for the signal ucontext_t.
141
- *
142
- * If the emulated kernel does not provide the signal handler with
143
- * anything besides the user context registers, and the siginfo_t,
144
- * then this hook need do nothing and may be omitted.
145
- * Otherwise, record the data and return; the caller will raise
146
- * the signal, unwind the cpu state, and return to the main loop.
147
- *
148
- * If it is simpler to re-use the sysemu do_unaligned_access code,
149
- * @ra is provided so that a "normal" cpu exception can be raised.
150
- * In this case, the signal must be raised by the architecture cpu_loop.
151
- */
152
- void (*record_sigbus)(CPUState *cpu, vaddr addr,
153
- MMUAccessType access_type, uintptr_t ra);
154
-#endif /* CONFIG_SOFTMMU */
155
+#endif /* !CONFIG_USER_ONLY */
156
#endif /* NEED_CPU_H */
157
158
};
26
--
159
--
27
2.17.2
160
2.34.1
28
161
29
162
diff view generated by jsdifflib
[Qemu-devel] [PULL 13/32] tcg/aarch64: Return false on failure from patch_reloc
[PULL 09/16] accel/tcg: Check for USER_ONLY definition instead of SOFTMMU one
1
This does require an extra two checks within the slow paths
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
2
to replace the assert that we're moving.
3
2
4
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
3
Since we *might* have user emulation with softmmu,
4
replace the system emulation check by !user emulation one.
5
6
Invert some if() ladders for clarity.
7
8
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
9
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
10
Message-Id: <20230613133347.82210-7-philmd@linaro.org>
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
11
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
---
12
---
7
tcg/aarch64/tcg-target.inc.c | 37 ++++++++++++++++++++----------------
13
accel/tcg/internal.h | 6 +++---
8
1 file changed, 21 insertions(+), 16 deletions(-)
14
accel/tcg/cpu-exec.c | 4 ++--
15
2 files changed, 5 insertions(+), 5 deletions(-)
9
16
10
diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c
17
diff --git a/accel/tcg/internal.h b/accel/tcg/internal.h
11
index XXXXXXX..XXXXXXX 100644
18
index XXXXXXX..XXXXXXX 100644
12
--- a/tcg/aarch64/tcg-target.inc.c
19
--- a/accel/tcg/internal.h
13
+++ b/tcg/aarch64/tcg-target.inc.c
20
+++ b/accel/tcg/internal.h
14
@@ -XXX,XX +XXX,XX @@ static const int tcg_target_call_oarg_regs[1] = {
21
@@ -XXX,XX +XXX,XX @@
15
#define TCG_REG_GUEST_BASE TCG_REG_X28
22
* memory related structures are protected with mmap_lock.
23
* In !user-mode we use per-page locks.
24
*/
25
-#ifdef CONFIG_SOFTMMU
26
-#define assert_memory_lock()
27
-#else
28
+#ifdef CONFIG_USER_ONLY
29
#define assert_memory_lock() tcg_debug_assert(have_mmap_lock())
30
+#else
31
+#define assert_memory_lock()
16
#endif
32
#endif
17
33
18
-static inline void reloc_pc26(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
34
#if defined(CONFIG_SOFTMMU) && defined(CONFIG_DEBUG_TCG)
19
+static inline bool reloc_pc26(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
35
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
20
{
36
index XXXXXXX..XXXXXXX 100644
21
ptrdiff_t offset = target - code_ptr;
37
--- a/accel/tcg/cpu-exec.c
22
- tcg_debug_assert(offset == sextract64(offset, 0, 26));
38
+++ b/accel/tcg/cpu-exec.c
23
- /* read instruction, mask away previous PC_REL26 parameter contents,
39
@@ -XXX,XX +XXX,XX @@ void cpu_exec_step_atomic(CPUState *cpu)
24
- set the proper offset, then write back the instruction. */
40
cpu_tb_exec(cpu, tb, &tb_exit);
25
- *code_ptr = deposit32(*code_ptr, 0, 26, offset);
41
cpu_exec_exit(cpu);
26
+ if (offset == sextract64(offset, 0, 26)) {
42
} else {
27
+ /* read instruction, mask away previous PC_REL26 parameter contents,
43
-#ifndef CONFIG_SOFTMMU
28
+ set the proper offset, then write back the instruction. */
44
+#ifdef CONFIG_USER_ONLY
29
+ *code_ptr = deposit32(*code_ptr, 0, 26, offset);
45
clear_helper_retaddr();
30
+ return true;
46
if (have_mmap_lock()) {
31
+ }
47
mmap_unlock();
32
+ return false;
48
@@ -XXX,XX +XXX,XX @@ static int cpu_exec_setjmp(CPUState *cpu, SyncClocks *sc)
33
}
49
/* Non-buggy compilers preserve this; assert the correct value. */
34
50
g_assert(cpu == current_cpu);
35
-static inline void reloc_pc19(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
51
36
+static inline bool reloc_pc19(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
52
-#ifndef CONFIG_SOFTMMU
37
{
53
+#ifdef CONFIG_USER_ONLY
38
ptrdiff_t offset = target - code_ptr;
54
clear_helper_retaddr();
39
- tcg_debug_assert(offset == sextract64(offset, 0, 19));
55
if (have_mmap_lock()) {
40
- *code_ptr = deposit32(*code_ptr, 5, 19, offset);
56
mmap_unlock();
41
+ if (offset == sextract64(offset, 0, 19)) {
42
+ *code_ptr = deposit32(*code_ptr, 5, 19, offset);
43
+ return true;
44
+ }
45
+ return false;
46
}
47
48
static inline bool patch_reloc(tcg_insn_unit *code_ptr, int type,
49
@@ -XXX,XX +XXX,XX @@ static inline bool patch_reloc(tcg_insn_unit *code_ptr, int type,
50
switch (type) {
51
case R_AARCH64_JUMP26:
52
case R_AARCH64_CALL26:
53
- reloc_pc26(code_ptr, (tcg_insn_unit *)value);
54
- break;
55
+ return reloc_pc26(code_ptr, (tcg_insn_unit *)value);
56
case R_AARCH64_CONDBR19:
57
- reloc_pc19(code_ptr, (tcg_insn_unit *)value);
58
- break;
59
+ return reloc_pc19(code_ptr, (tcg_insn_unit *)value);
60
default:
61
- tcg_abort();
62
+ g_assert_not_reached();
63
}
64
- return true;
65
}
66
67
#define TCG_CT_CONST_AIMM 0x100
68
@@ -XXX,XX +XXX,XX @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
69
TCGMemOp opc = get_memop(oi);
70
TCGMemOp size = opc & MO_SIZE;
71
72
- reloc_pc19(lb->label_ptr[0], s->code_ptr);
73
+ bool ok = reloc_pc19(lb->label_ptr[0], s->code_ptr);
74
+ tcg_debug_assert(ok);
75
76
tcg_out_mov(s, TCG_TYPE_PTR, TCG_REG_X0, TCG_AREG0);
77
tcg_out_mov(s, TARGET_LONG_BITS == 64, TCG_REG_X1, lb->addrlo_reg);
78
@@ -XXX,XX +XXX,XX @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
79
TCGMemOp opc = get_memop(oi);
80
TCGMemOp size = opc & MO_SIZE;
81
82
- reloc_pc19(lb->label_ptr[0], s->code_ptr);
83
+ bool ok = reloc_pc19(lb->label_ptr[0], s->code_ptr);
84
+ tcg_debug_assert(ok);
85
86
tcg_out_mov(s, TCG_TYPE_PTR, TCG_REG_X0, TCG_AREG0);
87
tcg_out_mov(s, TARGET_LONG_BITS == 64, TCG_REG_X1, lb->addrlo_reg);
88
--
57
--
89
2.17.2
58
2.34.1
90
59
91
60
diff view generated by jsdifflib
[Qemu-devel] [PULL 29/32] qht-bench: document -p flag
[PULL 10/16] meson: Alias CONFIG_SOFTMMU -> CONFIG_SYSTEM_ONLY
1
From: "Emilio G. Cota" <cota@braap.org>
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
2
2
3
Which we forgot to do in bd224fce60 ("qht-bench: add -p flag
3
We use the CONFIG_USER_ONLY key to describe user emulation,
4
to precompute hash values", 2018-09-26).
4
and the CONFIG_SOFTMMU key to describe system emulation. Alias
5
it as 'CONFIG_SYSTEM_ONLY' for parity with user emulation.
5
6
6
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
7
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7
Signed-off-by: Emilio G. Cota <cota@braap.org>
8
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
9
Message-Id: <20230613133347.82210-8-philmd@linaro.org>
8
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
10
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9
---
11
---
10
tests/qht-bench.c | 1 +
12
meson.build | 1 +
11
1 file changed, 1 insertion(+)
13
1 file changed, 1 insertion(+)
12
14
13
diff --git a/tests/qht-bench.c b/tests/qht-bench.c
15
diff --git a/meson.build b/meson.build
14
index XXXXXXX..XXXXXXX 100644
16
index XXXXXXX..XXXXXXX 100644
15
--- a/tests/qht-bench.c
17
--- a/meson.build
16
+++ b/tests/qht-bench.c
18
+++ b/meson.build
17
@@ -XXX,XX +XXX,XX @@ static const char commands_string[] =
19
@@ -XXX,XX +XXX,XX @@ foreach target : target_dirs
18
" -n = number of threads\n"
20
endif
19
"\n"
21
config_target += { 'CONFIG_BSD_USER': 'y' }
20
" -o = offset at which keys start\n"
22
elif target.endswith('softmmu')
21
+ " -p = precompute hashes\n"
23
+ config_target += { 'CONFIG_SYSTEM_ONLY': 'y' }
22
"\n"
24
config_target += { 'CONFIG_SOFTMMU': 'y' }
23
" -g = set -s,-k,-K,-l,-r to the same value\n"
25
endif
24
" -s = initial size hint\n"
26
if target.endswith('-user')
25
--
27
--
26
2.17.2
28
2.34.1
27
29
28
30
diff view generated by jsdifflib
[Qemu-devel] [PULL 23/32] tcg: Clean up generic bswap32
[PULL 11/16] meson: Replace CONFIG_SOFTMMU -> CONFIG_SYSTEM_ONLY
1
Based on the only current user, Sparc:
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
2
2
3
New code uses 1 constant that takes 2 insns to create, plus 8.
3
Since we *might* have user emulation with softmmu,
4
Old code used 2 constants that took 2 insns to create, plus 9.
4
use the clearer 'CONFIG_SYSTEM_ONLY' key to check
5
The result is a new total of 10 vs an old total of 13.
5
for system emulation.
6
6
7
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
8
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
9
Message-Id: <20230613133347.82210-9-philmd@linaro.org>
7
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
10
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
8
---
11
---
9
tcg/tcg-op.c | 54 ++++++++++++++++++++++++++--------------------------
12
meson.build | 4 ++--
10
1 file changed, 27 insertions(+), 27 deletions(-)
13
accel/qtest/meson.build | 2 +-
11
14
accel/stubs/meson.build | 2 +-
12
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c
15
accel/tcg/meson.build | 6 +++---
13
index XXXXXXX..XXXXXXX 100644
16
dump/meson.build | 2 +-
14
--- a/tcg/tcg-op.c
17
hw/i386/kvm/meson.build | 2 +-
15
+++ b/tcg/tcg-op.c
18
migration/meson.build | 2 +-
16
@@ -XXX,XX +XXX,XX @@ void tcg_gen_bswap32_i32(TCGv_i32 ret, TCGv_i32 arg)
19
monitor/meson.build | 2 +-
17
if (TCG_TARGET_HAS_bswap32_i32) {
20
qapi/meson.build | 2 +-
18
tcg_gen_op2_i32(INDEX_op_bswap32_i32, ret, arg);
21
semihosting/meson.build | 2 +-
19
} else {
22
softmmu/meson.build | 4 ++--
20
- TCGv_i32 t0, t1;
23
target/i386/tcg/sysemu/meson.build | 2 +-
21
- t0 = tcg_temp_new_i32();
24
ui/meson.build | 4 ++--
22
- t1 = tcg_temp_new_i32();
25
13 files changed, 18 insertions(+), 18 deletions(-)
23
+ TCGv_i32 t0 = tcg_temp_new_i32();
26
24
+ TCGv_i32 t1 = tcg_temp_new_i32();
27
diff --git a/meson.build b/meson.build
25
+ TCGv_i32 t2 = tcg_const_i32(0x00ff00ff);
28
index XXXXXXX..XXXXXXX 100644
26
29
--- a/meson.build
27
- tcg_gen_shli_i32(t0, arg, 24);
30
+++ b/meson.build
28
+ /* arg = abcd */
31
@@ -XXX,XX +XXX,XX @@ config_all += config_host
29
+ tcg_gen_shri_i32(t0, arg, 8); /* t0 = .abc */
32
config_all += config_all_disas
30
+ tcg_gen_and_i32(t1, arg, t2); /* t1 = .b.d */
33
config_all += {
31
+ tcg_gen_and_i32(t0, t0, t2); /* t0 = .a.c */
34
'CONFIG_XEN': xen.found(),
32
+ tcg_temp_free_i32(t2);
35
- 'CONFIG_SOFTMMU': have_system,
33
+ tcg_gen_shli_i32(t1, t1, 8); /* t1 = b.d. */
36
+ 'CONFIG_SYSTEM_ONLY': have_system,
34
+ tcg_gen_or_i32(ret, t0, t1); /* ret = badc */
37
'CONFIG_USER_ONLY': have_user,
35
38
'CONFIG_ALL': true,
36
- tcg_gen_andi_i32(t1, arg, 0x0000ff00);
39
}
37
- tcg_gen_shli_i32(t1, t1, 8);
40
@@ -XXX,XX +XXX,XX @@ endif
38
- tcg_gen_or_i32(t0, t0, t1);
41
softmmu_ss.add(authz, blockdev, chardev, crypto, io, qmp)
39
+ tcg_gen_shri_i32(t0, ret, 16); /* t0 = ..ba */
42
common_ss.add(qom, qemuutil)
40
+ tcg_gen_shli_i32(t1, ret, 16); /* t1 = dc.. */
43
41
+ tcg_gen_or_i32(ret, t0, t1); /* ret = dcba */
44
-common_ss.add_all(when: 'CONFIG_SOFTMMU', if_true: [softmmu_ss])
42
45
+common_ss.add_all(when: 'CONFIG_SYSTEM_ONLY', if_true: [softmmu_ss])
43
- tcg_gen_shri_i32(t1, arg, 8);
46
common_ss.add_all(when: 'CONFIG_USER_ONLY', if_true: user_ss)
44
- tcg_gen_andi_i32(t1, t1, 0x0000ff00);
47
45
- tcg_gen_or_i32(t0, t0, t1);
48
common_all = common_ss.apply(config_all, strict: false)
46
-
49
diff --git a/accel/qtest/meson.build b/accel/qtest/meson.build
47
- tcg_gen_shri_i32(t1, arg, 24);
50
index XXXXXXX..XXXXXXX 100644
48
- tcg_gen_or_i32(ret, t0, t1);
51
--- a/accel/qtest/meson.build
49
tcg_temp_free_i32(t0);
52
+++ b/accel/qtest/meson.build
50
tcg_temp_free_i32(t1);
53
@@ -1 +1 @@
51
}
54
-qtest_module_ss.add(when: ['CONFIG_SOFTMMU'], if_true: files('qtest.c'))
52
@@ -XXX,XX +XXX,XX @@ void tcg_gen_bswap32_i64(TCGv_i64 ret, TCGv_i64 arg)
55
+qtest_module_ss.add(when: ['CONFIG_SYSTEM_ONLY'], if_true: files('qtest.c'))
53
} else if (TCG_TARGET_HAS_bswap32_i64) {
56
diff --git a/accel/stubs/meson.build b/accel/stubs/meson.build
54
tcg_gen_op2_i64(INDEX_op_bswap32_i64, ret, arg);
57
index XXXXXXX..XXXXXXX 100644
55
} else {
58
--- a/accel/stubs/meson.build
56
- TCGv_i64 t0, t1;
59
+++ b/accel/stubs/meson.build
57
- t0 = tcg_temp_new_i64();
60
@@ -XXX,XX +XXX,XX @@ sysemu_stubs_ss.add(when: 'CONFIG_XEN', if_false: files('xen-stub.c'))
58
- t1 = tcg_temp_new_i64();
61
sysemu_stubs_ss.add(when: 'CONFIG_KVM', if_false: files('kvm-stub.c'))
59
+ TCGv_i64 t0 = tcg_temp_new_i64();
62
sysemu_stubs_ss.add(when: 'CONFIG_TCG', if_false: files('tcg-stub.c'))
60
+ TCGv_i64 t1 = tcg_temp_new_i64();
63
61
+ TCGv_i64 t2 = tcg_const_i64(0x00ff00ff);
64
-specific_ss.add_all(when: ['CONFIG_SOFTMMU'], if_true: sysemu_stubs_ss)
62
65
+specific_ss.add_all(when: ['CONFIG_SYSTEM_ONLY'], if_true: sysemu_stubs_ss)
63
- tcg_gen_shli_i64(t0, arg, 24);
66
diff --git a/accel/tcg/meson.build b/accel/tcg/meson.build
64
- tcg_gen_ext32u_i64(t0, t0);
67
index XXXXXXX..XXXXXXX 100644
65
+ /* arg = ....abcd */
68
--- a/accel/tcg/meson.build
66
+ tcg_gen_shri_i64(t0, arg, 8); /* t0 = .....abc */
69
+++ b/accel/tcg/meson.build
67
+ tcg_gen_and_i64(t1, arg, t2); /* t1 = .....b.d */
70
@@ -XXX,XX +XXX,XX @@ tcg_ss.add(files(
68
+ tcg_gen_and_i64(t0, t0, t2); /* t0 = .....a.c */
71
'translator.c',
69
+ tcg_temp_free_i64(t2);
72
))
70
+ tcg_gen_shli_i64(t1, t1, 8); /* t1 = ....b.d. */
73
tcg_ss.add(when: 'CONFIG_USER_ONLY', if_true: files('user-exec.c'))
71
+ tcg_gen_or_i64(ret, t0, t1); /* ret = ....badc */
74
-tcg_ss.add(when: 'CONFIG_SOFTMMU', if_false: files('user-exec-stub.c'))
72
75
+tcg_ss.add(when: 'CONFIG_SYSTEM_ONLY', if_false: files('user-exec-stub.c'))
73
- tcg_gen_andi_i64(t1, arg, 0x0000ff00);
76
tcg_ss.add(when: 'CONFIG_PLUGIN', if_true: [files('plugin-gen.c')])
74
- tcg_gen_shli_i64(t1, t1, 8);
77
tcg_ss.add(when: libdw, if_true: files('debuginfo.c'))
75
- tcg_gen_or_i64(t0, t0, t1);
78
tcg_ss.add(when: 'CONFIG_LINUX', if_true: files('perf.c'))
76
+ tcg_gen_shli_i64(t1, ret, 48); /* t1 = dc...... */
79
specific_ss.add_all(when: 'CONFIG_TCG', if_true: tcg_ss)
77
+ tcg_gen_shri_i64(t0, ret, 16); /* t0 = ......ba */
80
78
+ tcg_gen_shri_i64(t1, ret, 32); /* t1 = ....dc.. */
81
-specific_ss.add(when: ['CONFIG_SOFTMMU', 'CONFIG_TCG'], if_true: files(
79
+ tcg_gen_or_i64(ret, t0, t1); /* ret = ....dcba */
82
+specific_ss.add(when: ['CONFIG_SYSTEM_ONLY', 'CONFIG_TCG'], if_true: files(
80
83
'cputlb.c',
81
- tcg_gen_shri_i64(t1, arg, 8);
84
'monitor.c',
82
- tcg_gen_andi_i64(t1, t1, 0x0000ff00);
85
))
83
- tcg_gen_or_i64(t0, t0, t1);
86
84
-
87
-tcg_module_ss.add(when: ['CONFIG_SOFTMMU', 'CONFIG_TCG'], if_true: files(
85
- tcg_gen_shri_i64(t1, arg, 24);
88
+tcg_module_ss.add(when: ['CONFIG_SYSTEM_ONLY', 'CONFIG_TCG'], if_true: files(
86
- tcg_gen_or_i64(ret, t0, t1);
89
'tcg-accel-ops.c',
87
tcg_temp_free_i64(t0);
90
'tcg-accel-ops-mttcg.c',
88
tcg_temp_free_i64(t1);
91
'tcg-accel-ops-icount.c',
89
}
92
diff --git a/dump/meson.build b/dump/meson.build
93
index XXXXXXX..XXXXXXX 100644
94
--- a/dump/meson.build
95
+++ b/dump/meson.build
96
@@ -XXX,XX +XXX,XX @@
97
softmmu_ss.add([files('dump.c', 'dump-hmp-cmds.c'), snappy, lzo])
98
-specific_ss.add(when: 'CONFIG_SOFTMMU', if_true: files('win_dump.c'))
99
+specific_ss.add(when: 'CONFIG_SYSTEM_ONLY', if_true: files('win_dump.c'))
100
diff --git a/hw/i386/kvm/meson.build b/hw/i386/kvm/meson.build
101
index XXXXXXX..XXXXXXX 100644
102
--- a/hw/i386/kvm/meson.build
103
+++ b/hw/i386/kvm/meson.build
104
@@ -XXX,XX +XXX,XX @@ xen_stubs_ss.add(when: 'CONFIG_XEN_EMU', if_false: files(
105
'xen-stubs.c',
106
))
107
108
-specific_ss.add_all(when: 'CONFIG_SOFTMMU', if_true: xen_stubs_ss)
109
+specific_ss.add_all(when: 'CONFIG_SYSTEM_ONLY', if_true: xen_stubs_ss)
110
diff --git a/migration/meson.build b/migration/meson.build
111
index XXXXXXX..XXXXXXX 100644
112
--- a/migration/meson.build
113
+++ b/migration/meson.build
114
@@ -XXX,XX +XXX,XX @@ if get_option('live_block_migration').allowed()
115
endif
116
softmmu_ss.add(when: zstd, if_true: files('multifd-zstd.c'))
117
118
-specific_ss.add(when: 'CONFIG_SOFTMMU',
119
+specific_ss.add(when: 'CONFIG_SYSTEM_ONLY',
120
if_true: files('ram.c',
121
'target.c'))
122
diff --git a/monitor/meson.build b/monitor/meson.build
123
index XXXXXXX..XXXXXXX 100644
124
--- a/monitor/meson.build
125
+++ b/monitor/meson.build
126
@@ -XXX,XX +XXX,XX @@ softmmu_ss.add(files(
127
))
128
softmmu_ss.add([spice_headers, files('qmp-cmds.c')])
129
130
-specific_ss.add(when: 'CONFIG_SOFTMMU',
131
+specific_ss.add(when: 'CONFIG_SYSTEM_ONLY',
132
        if_true: [files( 'hmp-cmds-target.c', 'hmp-target.c'), spice])
133
diff --git a/qapi/meson.build b/qapi/meson.build
134
index XXXXXXX..XXXXXXX 100644
135
--- a/qapi/meson.build
136
+++ b/qapi/meson.build
137
@@ -XXX,XX +XXX,XX @@ foreach output : qapi_specific_outputs + qapi_nonmodule_outputs
138
if output.endswith('.trace-events')
139
qapi_trace_events += qapi_files[i]
140
endif
141
- specific_ss.add(when: 'CONFIG_SOFTMMU', if_true: qapi_files[i])
142
+ specific_ss.add(when: 'CONFIG_SYSTEM_ONLY', if_true: qapi_files[i])
143
i = i + 1
144
endforeach
145
diff --git a/semihosting/meson.build b/semihosting/meson.build
146
index XXXXXXX..XXXXXXX 100644
147
--- a/semihosting/meson.build
148
+++ b/semihosting/meson.build
149
@@ -XXX,XX +XXX,XX @@ specific_ss.add(when: 'CONFIG_SEMIHOSTING', if_true: files(
150
'syscalls.c',
151
))
152
153
-specific_ss.add(when: ['CONFIG_SEMIHOSTING', 'CONFIG_SOFTMMU'], if_true: files(
154
+specific_ss.add(when: ['CONFIG_SEMIHOSTING', 'CONFIG_SYSTEM_ONLY'], if_true: files(
155
'config.c',
156
'console.c',
157
'uaccess.c',
158
diff --git a/softmmu/meson.build b/softmmu/meson.build
159
index XXXXXXX..XXXXXXX 100644
160
--- a/softmmu/meson.build
161
+++ b/softmmu/meson.build
162
@@ -XXX,XX +XXX,XX @@
163
-specific_ss.add(when: 'CONFIG_SOFTMMU', if_true: [files(
164
+specific_ss.add(when: 'CONFIG_SYSTEM_ONLY', if_true: [files(
165
'arch_init.c',
166
'ioport.c',
167
'memory.c',
168
@@ -XXX,XX +XXX,XX @@ specific_ss.add(when: 'CONFIG_SOFTMMU', if_true: [files(
169
'watchpoint.c',
170
)])
171
172
-specific_ss.add(when: ['CONFIG_SOFTMMU', 'CONFIG_TCG'], if_true: [files(
173
+specific_ss.add(when: ['CONFIG_SYSTEM_ONLY', 'CONFIG_TCG'], if_true: [files(
174
'icount.c',
175
)])
176
177
diff --git a/target/i386/tcg/sysemu/meson.build b/target/i386/tcg/sysemu/meson.build
178
index XXXXXXX..XXXXXXX 100644
179
--- a/target/i386/tcg/sysemu/meson.build
180
+++ b/target/i386/tcg/sysemu/meson.build
181
@@ -XXX,XX +XXX,XX @@
182
-i386_softmmu_ss.add(when: ['CONFIG_TCG', 'CONFIG_SOFTMMU'], if_true: files(
183
+i386_softmmu_ss.add(when: ['CONFIG_TCG', 'CONFIG_SYSTEM_ONLY'], if_true: files(
184
'tcg-cpu.c',
185
'smm_helper.c',
186
'excp_helper.c',
187
diff --git a/ui/meson.build b/ui/meson.build
188
index XXXXXXX..XXXXXXX 100644
189
--- a/ui/meson.build
190
+++ b/ui/meson.build
191
@@ -XXX,XX +XXX,XX @@
192
softmmu_ss.add(pixman)
193
-specific_ss.add(when: ['CONFIG_SOFTMMU'], if_true: pixman) # for the include path
194
-specific_ss.add(when: ['CONFIG_SOFTMMU'], if_true: opengl) # for the include path
195
+specific_ss.add(when: ['CONFIG_SYSTEM_ONLY'], if_true: pixman) # for the include path
196
+specific_ss.add(when: ['CONFIG_SYSTEM_ONLY'], if_true: opengl) # for the include path
197
198
softmmu_ss.add(png)
199
softmmu_ss.add(files(
90
--
200
--
91
2.17.2
201
2.34.1
92
202
93
203
diff view generated by jsdifflib
[Qemu-devel] [PULL 14/32] tcg/arm: Return false on failure from patch_reloc
[PULL 12/16] meson: Replace softmmu_ss -> system_ss
1
This does require an extra two checks within the slow paths
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
2
to replace the assert that we're moving.
3
2
4
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
3
We use the user_ss[] array to hold the user emulation sources,
4
and the softmmu_ss[] array to hold the system emulation ones.
5
Hold the latter in the 'system_ss[]' array for parity with user
6
emulation.
7
8
Mechanical change doing:
9
10
$ sed -i -e s/softmmu_ss/system_ss/g $(git grep -l softmmu_ss)
11
12
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
13
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
14
Message-Id: <20230613133347.82210-10-philmd@linaro.org>
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
15
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
---
16
---
7
tcg/arm/tcg-target.inc.c | 22 ++++++++++++++++------
17
docs/devel/build-system.rst | 14 +--
8
1 file changed, 16 insertions(+), 6 deletions(-)
18
meson.build | 12 +--
19
accel/meson.build | 4 +-
20
audio/meson.build | 8 +-
21
backends/meson.build | 20 ++--
22
backends/tpm/meson.build | 8 +-
23
block/meson.build | 6 +-
24
block/monitor/meson.build | 2 +-
25
chardev/meson.build | 2 +-
26
disas/meson.build | 2 +-
27
dump/meson.build | 2 +-
28
ebpf/meson.build | 2 +-
29
fsdev/meson.build | 4 +-
30
gdbstub/meson.build | 10 +-
31
hw/9pfs/meson.build | 2 +-
32
hw/acpi/meson.build | 10 +-
33
hw/adc/meson.build | 10 +-
34
hw/arm/meson.build | 8 +-
35
hw/audio/meson.build | 28 +++---
36
hw/block/meson.build | 28 +++---
37
hw/char/meson.build | 70 +++++++-------
38
hw/core/meson.build | 22 ++---
39
hw/cpu/meson.build | 6 +-
40
hw/cxl/meson.build | 4 +-
41
hw/display/meson.build | 76 +++++++--------
42
hw/dma/meson.build | 32 +++----
43
hw/gpio/meson.build | 26 ++---
44
hw/i2c/meson.build | 2 +-
45
hw/ide/meson.build | 28 +++---
46
hw/input/meson.build | 32 +++----
47
hw/intc/meson.build | 44 ++++-----
48
hw/ipack/meson.build | 2 +-
49
hw/ipmi/meson.build | 2 +-
50
hw/isa/meson.build | 18 ++--
51
hw/mem/meson.build | 8 +-
52
hw/misc/macio/meson.build | 2 +-
53
hw/misc/meson.build | 148 ++++++++++++++---------------
54
hw/net/can/meson.build | 16 ++--
55
hw/net/meson.build | 96 +++++++++----------
56
hw/nubus/meson.build | 2 +-
57
hw/nvme/meson.build | 2 +-
58
hw/nvram/meson.build | 26 ++---
59
hw/pci-bridge/meson.build | 4 +-
60
hw/pci-host/meson.build | 2 +-
61
hw/pci/meson.build | 8 +-
62
hw/pcmcia/meson.build | 4 +-
63
hw/rdma/meson.build | 2 +-
64
hw/remote/meson.build | 2 +-
65
hw/rtc/meson.build | 28 +++---
66
hw/scsi/meson.build | 2 +-
67
hw/sd/meson.build | 24 ++---
68
hw/sensor/meson.build | 18 ++--
69
hw/smbios/meson.build | 6 +-
70
hw/ssi/meson.build | 26 ++---
71
hw/timer/meson.build | 74 +++++++--------
72
hw/tpm/meson.build | 14 +--
73
hw/usb/meson.build | 74 +++++++--------
74
hw/virtio/meson.build | 12 +--
75
hw/watchdog/meson.build | 18 ++--
76
hw/xen/meson.build | 4 +-
77
migration/meson.build | 10 +-
78
monitor/meson.build | 4 +-
79
net/can/meson.build | 2 +-
80
net/meson.build | 38 ++++----
81
qom/meson.build | 2 +-
82
replay/meson.build | 2 +-
83
softmmu/meson.build | 8 +-
84
stats/meson.build | 2 +-
85
target/alpha/meson.build | 6 +-
86
target/arm/hvf/meson.build | 2 +-
87
target/arm/meson.build | 6 +-
88
target/arm/tcg/meson.build | 2 +-
89
target/avr/meson.build | 6 +-
90
target/cris/meson.build | 6 +-
91
target/hppa/meson.build | 6 +-
92
target/i386/hax/meson.build | 6 +-
93
target/i386/hvf/meson.build | 2 +-
94
target/i386/kvm/meson.build | 4 +-
95
target/i386/meson.build | 8 +-
96
target/i386/nvmm/meson.build | 4 +-
97
target/i386/tcg/sysemu/meson.build | 2 +-
98
target/i386/whpx/meson.build | 2 +-
99
target/loongarch/meson.build | 6 +-
100
target/m68k/meson.build | 6 +-
101
target/microblaze/meson.build | 6 +-
102
target/mips/meson.build | 4 +-
103
target/mips/sysemu/meson.build | 2 +-
104
target/mips/tcg/sysemu/meson.build | 2 +-
105
target/nios2/meson.build | 6 +-
106
target/openrisc/meson.build | 6 +-
107
target/ppc/meson.build | 10 +-
108
target/riscv/meson.build | 6 +-
109
target/s390x/kvm/meson.build | 2 +-
110
target/s390x/meson.build | 6 +-
111
target/sh4/meson.build | 6 +-
112
target/sparc/meson.build | 6 +-
113
target/tricore/meson.build | 4 +-
114
target/xtensa/meson.build | 6 +-
115
tcg/meson.build | 2 +-
116
trace/meson.build | 2 +-
117
ui/meson.build | 26 ++---
118
101 files changed, 706 insertions(+), 706 deletions(-)
9
119
10
diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c
120
diff --git a/docs/devel/build-system.rst b/docs/devel/build-system.rst
11
index XXXXXXX..XXXXXXX 100644
121
index XXXXXXX..XXXXXXX 100644
12
--- a/tcg/arm/tcg-target.inc.c
122
--- a/docs/devel/build-system.rst
13
+++ b/tcg/arm/tcg-target.inc.c
123
+++ b/docs/devel/build-system.rst
14
@@ -XXX,XX +XXX,XX @@ static const uint8_t tcg_cond_to_arm_cond[] = {
124
@@ -XXX,XX +XXX,XX @@ Target-independent emulator sourcesets:
15
[TCG_COND_GTU] = COND_HI,
125
This includes error handling infrastructure, standard data structures,
16
};
126
platform portability wrapper functions, etc.
17
127
18
-static inline void reloc_pc24(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
128
- Target-independent code lives in the ``common_ss``, ``softmmu_ss`` and
19
+static inline bool reloc_pc24(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
129
+ Target-independent code lives in the ``common_ss``, ``system_ss`` and
20
{
130
``user_ss`` sourcesets. ``common_ss`` is linked into all emulators,
21
ptrdiff_t offset = (tcg_ptr_byte_diff(target, code_ptr) - 8) >> 2;
131
- ``softmmu_ss`` only in system emulators, ``user_ss`` only in user-mode
22
- *code_ptr = (*code_ptr & ~0xffffff) | (offset & 0xffffff);
132
+ ``system_ss`` only in system emulators, ``user_ss`` only in user-mode
23
+ if (offset == sextract32(offset, 0, 24)) {
133
emulators.
24
+ *code_ptr = (*code_ptr & ~0xffffff) | (offset & 0xffffff);
134
25
+ return true;
135
Target-independent sourcesets must exercise particular care when using
26
+ }
136
@@ -XXX,XX +XXX,XX @@ Target-independent emulator sourcesets:
27
+ return false;
137
symbol::
28
}
138
29
139
# Some targets have CONFIG_ACPI, some don't, so this is not enough
30
static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
140
- softmmu_ss.add(when: 'CONFIG_ACPI', if_true: files('acpi.c'),
31
@@ -XXX,XX +XXX,XX @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
141
+ system_ss.add(when: 'CONFIG_ACPI', if_true: files('acpi.c'),
32
tcg_debug_assert(addend == 0);
142
if_false: files('acpi-stub.c'))
33
143
34
if (type == R_ARM_PC24) {
144
# This is required as well:
35
- reloc_pc24(code_ptr, (tcg_insn_unit *)value);
145
- softmmu_ss.add(when: 'CONFIG_ALL', if_true: files('acpi-stub.c'))
36
+ return reloc_pc24(code_ptr, (tcg_insn_unit *)value);
146
+ system_ss.add(when: 'CONFIG_ALL', if_true: files('acpi-stub.c'))
37
} else if (type == R_ARM_PC13) {
147
38
intptr_t diff = value - (uintptr_t)(code_ptr + 2);
148
Target-dependent emulator sourcesets:
39
tcg_insn_unit insn = *code_ptr;
149
In the target-dependent set lives CPU emulation, some device emulation and
40
@@ -XXX,XX +XXX,XX @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
150
@@ -XXX,XX +XXX,XX @@ Target-dependent emulator sourcesets:
41
} else {
151
for all emulators and for system emulators only. For example::
42
int rd = extract32(insn, 12, 4);
152
43
int rt = rd == TCG_REG_PC ? TCG_REG_TMP : rd;
153
arm_ss = ss.source_set()
44
- assert(diff >= 0x1000 && diff < 0x100000);
154
- arm_softmmu_ss = ss.source_set()
45
+
155
+ arm_system_ss = ss.source_set()
46
+ if (diff < 0x1000 || diff >= 0x100000) {
156
...
47
+ return false;
157
target_arch += {'arm': arm_ss}
48
+ }
158
- target_softmmu_arch += {'arm': arm_softmmu_ss}
49
+
159
+ target_softmmu_arch += {'arm': arm_system_ss}
50
/* add rt, pc, #high */
160
51
*code_ptr++ = ((insn & 0xf0000000) | (1 << 25) | ARITH_ADD
161
Module sourcesets:
52
| (TCG_REG_PC << 16) | (rt << 12)
162
There are two dictionaries for modules: ``modules`` is used for
53
@@ -XXX,XX +XXX,XX @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
163
target-independent modules and ``target_modules`` is used for
54
TCGMemOp opc = get_memop(oi);
164
target-dependent modules. When modules are disabled the ``module``
55
void *func;
165
- source sets are added to ``softmmu_ss`` and the ``target_modules``
56
166
+ source sets are added to ``system_ss`` and the ``target_modules``
57
- reloc_pc24(lb->label_ptr[0], s->code_ptr);
167
source sets are added to ``specific_ss``.
58
+ bool ok = reloc_pc24(lb->label_ptr[0], s->code_ptr);
168
59
+ tcg_debug_assert(ok);
169
Both dictionaries are nested. One dictionary is created per
60
170
diff --git a/meson.build b/meson.build
61
argreg = tcg_out_arg_reg32(s, TCG_REG_R0, TCG_AREG0);
171
index XXXXXXX..XXXXXXX 100644
62
if (TARGET_LONG_BITS == 64) {
172
--- a/meson.build
63
@@ -XXX,XX +XXX,XX @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
173
+++ b/meson.build
64
TCGMemOpIdx oi = lb->oi;
174
@@ -XXX,XX +XXX,XX @@ hwcore_ss = ss.source_set()
65
TCGMemOp opc = get_memop(oi);
175
io_ss = ss.source_set()
66
176
qmp_ss = ss.source_set()
67
- reloc_pc24(lb->label_ptr[0], s->code_ptr);
177
qom_ss = ss.source_set()
68
+ bool ok = reloc_pc24(lb->label_ptr[0], s->code_ptr);
178
-softmmu_ss = ss.source_set()
69
+ tcg_debug_assert(ok);
179
+system_ss = ss.source_set()
70
180
specific_fuzz_ss = ss.source_set()
71
argreg = TCG_REG_R0;
181
specific_ss = ss.source_set()
72
argreg = tcg_out_arg_reg32(s, argreg, TCG_AREG0);
182
stub_ss = ss.source_set()
183
@@ -XXX,XX +XXX,XX @@ if have_block
184
# os-posix.c contains POSIX-specific functions used by qemu-storage-daemon,
185
# os-win32.c does not
186
blockdev_ss.add(when: 'CONFIG_POSIX', if_true: files('os-posix.c'))
187
- softmmu_ss.add(when: 'CONFIG_WIN32', if_true: [files('os-win32.c')])
188
+ system_ss.add(when: 'CONFIG_WIN32', if_true: [files('os-win32.c')])
189
endif
190
191
common_ss.add(files('cpus-common.c'))
192
@@ -XXX,XX +XXX,XX @@ foreach d, list : modules
193
if d == 'block'
194
block_ss.add_all(module_ss)
195
else
196
- softmmu_ss.add_all(module_ss)
197
+ system_ss.add_all(module_ss)
198
endif
199
endif
200
endforeach
201
@@ -XXX,XX +XXX,XX @@ libmigration = static_library('migration', sources: migration_files + genh,
202
build_by_default: false)
203
migration = declare_dependency(link_with: libmigration,
204
dependencies: [zlib, qom, io])
205
-softmmu_ss.add(migration)
206
+system_ss.add(migration)
207
208
block_ss = block_ss.apply(config_host, strict: false)
209
libblock = static_library('block', block_ss.sources() + genh,
210
@@ -XXX,XX +XXX,XX @@ if emulator_modules.length() > 0
211
alias_target('modules', emulator_modules)
212
endif
213
214
-softmmu_ss.add(authz, blockdev, chardev, crypto, io, qmp)
215
+system_ss.add(authz, blockdev, chardev, crypto, io, qmp)
216
common_ss.add(qom, qemuutil)
217
218
-common_ss.add_all(when: 'CONFIG_SYSTEM_ONLY', if_true: [softmmu_ss])
219
+common_ss.add_all(when: 'CONFIG_SYSTEM_ONLY', if_true: [system_ss])
220
common_ss.add_all(when: 'CONFIG_USER_ONLY', if_true: user_ss)
221
222
common_all = common_ss.apply(config_all, strict: false)
223
diff --git a/accel/meson.build b/accel/meson.build
224
index XXXXXXX..XXXXXXX 100644
225
--- a/accel/meson.build
226
+++ b/accel/meson.build
227
@@ -XXX,XX +XXX,XX @@
228
specific_ss.add(files('accel-common.c', 'accel-blocker.c'))
229
-softmmu_ss.add(files('accel-softmmu.c'))
230
+system_ss.add(files('accel-softmmu.c'))
231
user_ss.add(files('accel-user.c'))
232
233
subdir('tcg')
234
@@ -XXX,XX +XXX,XX @@ if have_system
235
endif
236
237
# qtest
238
-softmmu_ss.add(files('dummy-cpus.c'))
239
+system_ss.add(files('dummy-cpus.c'))
240
diff --git a/audio/meson.build b/audio/meson.build
241
index XXXXXXX..XXXXXXX 100644
242
--- a/audio/meson.build
243
+++ b/audio/meson.build
244
@@ -XXX,XX +XXX,XX @@
245
-softmmu_ss.add([spice_headers, files('audio.c')])
246
-softmmu_ss.add(files(
247
+system_ss.add([spice_headers, files('audio.c')])
248
+system_ss.add(files(
249
'audio-hmp-cmds.c',
250
'audio_legacy.c',
251
'mixeng.c',
252
@@ -XXX,XX +XXX,XX @@ softmmu_ss.add(files(
253
'wavcapture.c',
254
))
255
256
-softmmu_ss.add(when: coreaudio, if_true: files('coreaudio.m'))
257
-softmmu_ss.add(when: dsound, if_true: files('dsoundaudio.c', 'audio_win_int.c'))
258
+system_ss.add(when: coreaudio, if_true: files('coreaudio.m'))
259
+system_ss.add(when: dsound, if_true: files('dsoundaudio.c', 'audio_win_int.c'))
260
261
audio_modules = {}
262
foreach m : [
263
diff --git a/backends/meson.build b/backends/meson.build
264
index XXXXXXX..XXXXXXX 100644
265
--- a/backends/meson.build
266
+++ b/backends/meson.build
267
@@ -XXX,XX +XXX,XX @@
268
-softmmu_ss.add([files(
269
+system_ss.add([files(
270
'cryptodev-builtin.c',
271
'cryptodev-hmp-cmds.c',
272
'cryptodev.c',
273
@@ -XXX,XX +XXX,XX @@ softmmu_ss.add([files(
274
'confidential-guest-support.c',
275
), numa])
276
277
-softmmu_ss.add(when: 'CONFIG_POSIX', if_true: files('rng-random.c'))
278
-softmmu_ss.add(when: 'CONFIG_POSIX', if_true: files('hostmem-file.c'))
279
-softmmu_ss.add(when: 'CONFIG_LINUX', if_true: files('hostmem-memfd.c'))
280
+system_ss.add(when: 'CONFIG_POSIX', if_true: files('rng-random.c'))
281
+system_ss.add(when: 'CONFIG_POSIX', if_true: files('hostmem-file.c'))
282
+system_ss.add(when: 'CONFIG_LINUX', if_true: files('hostmem-memfd.c'))
283
if keyutils.found()
284
- softmmu_ss.add(keyutils, files('cryptodev-lkcf.c'))
285
+ system_ss.add(keyutils, files('cryptodev-lkcf.c'))
286
endif
287
if have_vhost_user
288
- softmmu_ss.add(when: 'CONFIG_VIRTIO', if_true: files('vhost-user.c'))
289
+ system_ss.add(when: 'CONFIG_VIRTIO', if_true: files('vhost-user.c'))
290
endif
291
-softmmu_ss.add(when: 'CONFIG_VIRTIO_CRYPTO', if_true: files('cryptodev-vhost.c'))
292
+system_ss.add(when: 'CONFIG_VIRTIO_CRYPTO', if_true: files('cryptodev-vhost.c'))
293
if have_vhost_user_crypto
294
- softmmu_ss.add(when: 'CONFIG_VIRTIO_CRYPTO', if_true: files('cryptodev-vhost-user.c'))
295
+ system_ss.add(when: 'CONFIG_VIRTIO_CRYPTO', if_true: files('cryptodev-vhost-user.c'))
296
endif
297
-softmmu_ss.add(when: gio, if_true: files('dbus-vmstate.c'))
298
-softmmu_ss.add(when: 'CONFIG_SGX', if_true: files('hostmem-epc.c'))
299
+system_ss.add(when: gio, if_true: files('dbus-vmstate.c'))
300
+system_ss.add(when: 'CONFIG_SGX', if_true: files('hostmem-epc.c'))
301
302
subdir('tpm')
303
diff --git a/backends/tpm/meson.build b/backends/tpm/meson.build
304
index XXXXXXX..XXXXXXX 100644
305
--- a/backends/tpm/meson.build
306
+++ b/backends/tpm/meson.build
307
@@ -XXX,XX +XXX,XX @@
308
if have_tpm
309
- softmmu_ss.add(files('tpm_backend.c'))
310
- softmmu_ss.add(files('tpm_util.c'))
311
- softmmu_ss.add(when: 'CONFIG_TPM_PASSTHROUGH', if_true: files('tpm_passthrough.c'))
312
- softmmu_ss.add(when: 'CONFIG_TPM_EMULATOR', if_true: files('tpm_emulator.c'))
313
+ system_ss.add(files('tpm_backend.c'))
314
+ system_ss.add(files('tpm_util.c'))
315
+ system_ss.add(when: 'CONFIG_TPM_PASSTHROUGH', if_true: files('tpm_passthrough.c'))
316
+ system_ss.add(when: 'CONFIG_TPM_EMULATOR', if_true: files('tpm_emulator.c'))
317
endif
318
diff --git a/block/meson.build b/block/meson.build
319
index XXXXXXX..XXXXXXX 100644
320
--- a/block/meson.build
321
+++ b/block/meson.build
322
@@ -XXX,XX +XXX,XX @@ block_ss.add(files(
323
'write-threshold.c',
324
), zstd, zlib, gnutls)
325
326
-softmmu_ss.add(when: 'CONFIG_TCG', if_true: files('blkreplay.c'))
327
-softmmu_ss.add(files('block-ram-registrar.c'))
328
+system_ss.add(when: 'CONFIG_TCG', if_true: files('blkreplay.c'))
329
+system_ss.add(files('block-ram-registrar.c'))
330
331
if get_option('qcow1').allowed()
332
block_ss.add(files('qcow.c'))
333
@@ -XXX,XX +XXX,XX @@ block_ss.add(block_gen_c)
334
335
block_ss.add(files('stream.c'))
336
337
-softmmu_ss.add(files('qapi-sysemu.c'))
338
+system_ss.add(files('qapi-sysemu.c'))
339
340
subdir('export')
341
subdir('monitor')
342
diff --git a/block/monitor/meson.build b/block/monitor/meson.build
343
index XXXXXXX..XXXXXXX 100644
344
--- a/block/monitor/meson.build
345
+++ b/block/monitor/meson.build
346
@@ -XXX,XX +XXX,XX @@
347
-softmmu_ss.add(files('block-hmp-cmds.c'))
348
+system_ss.add(files('block-hmp-cmds.c'))
349
block_ss.add(files('bitmap-qmp-cmds.c'))
350
diff --git a/chardev/meson.build b/chardev/meson.build
351
index XXXXXXX..XXXXXXX 100644
352
--- a/chardev/meson.build
353
+++ b/chardev/meson.build
354
@@ -XXX,XX +XXX,XX @@ chardev_ss.add(when: 'CONFIG_WIN32', if_true: files(
355
356
chardev_ss = chardev_ss.apply(config_host, strict: false)
357
358
-softmmu_ss.add(files(
359
+system_ss.add(files(
360
'char-hmp-cmds.c',
361
'msmouse.c',
362
'wctablet.c',
363
diff --git a/disas/meson.build b/disas/meson.build
364
index XXXXXXX..XXXXXXX 100644
365
--- a/disas/meson.build
366
+++ b/disas/meson.build
367
@@ -XXX,XX +XXX,XX @@ common_ss.add(when: 'CONFIG_XTENSA_DIS', if_true: files('xtensa.c'))
368
common_ss.add(when: capstone, if_true: [files('capstone.c'), capstone])
369
common_ss.add(files('disas.c'))
370
371
-softmmu_ss.add(files('disas-mon.c'))
372
+system_ss.add(files('disas-mon.c'))
373
specific_ss.add(capstone)
374
diff --git a/dump/meson.build b/dump/meson.build
375
index XXXXXXX..XXXXXXX 100644
376
--- a/dump/meson.build
377
+++ b/dump/meson.build
378
@@ -XXX,XX +XXX,XX @@
379
-softmmu_ss.add([files('dump.c', 'dump-hmp-cmds.c'), snappy, lzo])
380
+system_ss.add([files('dump.c', 'dump-hmp-cmds.c'), snappy, lzo])
381
specific_ss.add(when: 'CONFIG_SYSTEM_ONLY', if_true: files('win_dump.c'))
382
diff --git a/ebpf/meson.build b/ebpf/meson.build
383
index XXXXXXX..XXXXXXX 100644
384
--- a/ebpf/meson.build
385
+++ b/ebpf/meson.build
386
@@ -1 +1 @@
387
-softmmu_ss.add(when: libbpf, if_true: files('ebpf_rss.c'), if_false: files('ebpf_rss-stub.c'))
388
+system_ss.add(when: libbpf, if_true: files('ebpf_rss.c'), if_false: files('ebpf_rss-stub.c'))
389
diff --git a/fsdev/meson.build b/fsdev/meson.build
390
index XXXXXXX..XXXXXXX 100644
391
--- a/fsdev/meson.build
392
+++ b/fsdev/meson.build
393
@@ -XXX,XX +XXX,XX @@ fsdev_ss.add(when: ['CONFIG_FSDEV_9P'], if_true: files(
394
'9p-marshal.c',
395
'qemu-fsdev.c',
396
), if_false: files('qemu-fsdev-dummy.c'))
397
-softmmu_ss.add_all(when: 'CONFIG_LINUX', if_true: fsdev_ss)
398
-softmmu_ss.add_all(when: 'CONFIG_DARWIN', if_true: fsdev_ss)
399
+system_ss.add_all(when: 'CONFIG_LINUX', if_true: fsdev_ss)
400
+system_ss.add_all(when: 'CONFIG_DARWIN', if_true: fsdev_ss)
401
402
if have_virtfs_proxy_helper
403
executable('virtfs-proxy-helper',
404
diff --git a/gdbstub/meson.build b/gdbstub/meson.build
405
index XXXXXXX..XXXXXXX 100644
406
--- a/gdbstub/meson.build
407
+++ b/gdbstub/meson.build
408
@@ -XXX,XX +XXX,XX @@
409
# cflags so:
410
411
gdb_user_ss = ss.source_set()
412
-gdb_softmmu_ss = ss.source_set()
413
+gdb_system_ss = ss.source_set()
414
415
# We build two versions of gdbstub, one for each mode
416
gdb_user_ss.add(files('gdbstub.c', 'user.c'))
417
-gdb_softmmu_ss.add(files('gdbstub.c', 'softmmu.c'))
418
+gdb_system_ss.add(files('gdbstub.c', 'softmmu.c'))
419
420
gdb_user_ss = gdb_user_ss.apply(config_host, strict: false)
421
-gdb_softmmu_ss = gdb_softmmu_ss.apply(config_host, strict: false)
422
+gdb_system_ss = gdb_system_ss.apply(config_host, strict: false)
423
424
libgdb_user = static_library('gdb_user',
425
gdb_user_ss.sources() + genh,
426
@@ -XXX,XX +XXX,XX @@ libgdb_user = static_library('gdb_user',
427
build_by_default: have_user)
428
429
libgdb_softmmu = static_library('gdb_softmmu',
430
- gdb_softmmu_ss.sources() + genh,
431
+ gdb_system_ss.sources() + genh,
432
name_suffix: 'fa',
433
build_by_default: have_system)
434
435
gdb_user = declare_dependency(link_whole: libgdb_user)
436
user_ss.add(gdb_user)
437
gdb_softmmu = declare_dependency(link_whole: libgdb_softmmu)
438
-softmmu_ss.add(gdb_softmmu)
439
+system_ss.add(gdb_softmmu)
440
441
common_ss.add(files('syscalls.c'))
442
443
diff --git a/hw/9pfs/meson.build b/hw/9pfs/meson.build
444
index XXXXXXX..XXXXXXX 100644
445
--- a/hw/9pfs/meson.build
446
+++ b/hw/9pfs/meson.build
447
@@ -XXX,XX +XXX,XX @@ fs_ss.add(files(
448
fs_ss.add(when: 'CONFIG_LINUX', if_true: files('9p-util-linux.c'))
449
fs_ss.add(when: 'CONFIG_DARWIN', if_true: files('9p-util-darwin.c'))
450
fs_ss.add(when: 'CONFIG_XEN_BUS', if_true: files('xen-9p-backend.c'))
451
-softmmu_ss.add_all(when: 'CONFIG_FSDEV_9P', if_true: fs_ss)
452
+system_ss.add_all(when: 'CONFIG_FSDEV_9P', if_true: fs_ss)
453
454
specific_ss.add(when: 'CONFIG_VIRTIO_9P', if_true: files('virtio-9p-device.c'))
455
diff --git a/hw/acpi/meson.build b/hw/acpi/meson.build
456
index XXXXXXX..XXXXXXX 100644
457
--- a/hw/acpi/meson.build
458
+++ b/hw/acpi/meson.build
459
@@ -XXX,XX +XXX,XX @@ acpi_ss.add(when: 'CONFIG_PC', if_false: files('acpi-x86-stub.c'))
460
if have_tpm
461
acpi_ss.add(files('tpm.c'))
462
endif
463
-softmmu_ss.add(when: 'CONFIG_ACPI', if_false: files('acpi-stub.c', 'aml-build-stub.c', 'ghes-stub.c', 'acpi_interface.c'))
464
-softmmu_ss.add(when: 'CONFIG_ACPI_PCI_BRIDGE', if_false: files('pci-bridge-stub.c'))
465
-softmmu_ss.add_all(when: 'CONFIG_ACPI', if_true: acpi_ss)
466
-softmmu_ss.add(when: 'CONFIG_ALL', if_true: files('acpi-stub.c', 'aml-build-stub.c',
467
+system_ss.add(when: 'CONFIG_ACPI', if_false: files('acpi-stub.c', 'aml-build-stub.c', 'ghes-stub.c', 'acpi_interface.c'))
468
+system_ss.add(when: 'CONFIG_ACPI_PCI_BRIDGE', if_false: files('pci-bridge-stub.c'))
469
+system_ss.add_all(when: 'CONFIG_ACPI', if_true: acpi_ss)
470
+system_ss.add(when: 'CONFIG_ALL', if_true: files('acpi-stub.c', 'aml-build-stub.c',
471
'acpi-x86-stub.c', 'ipmi-stub.c', 'ghes-stub.c',
472
'acpi-mem-hotplug-stub.c', 'acpi-cpu-hotplug-stub.c',
473
'acpi-pci-hotplug-stub.c', 'acpi-nvdimm-stub.c',
474
'cxl-stub.c', 'pci-bridge-stub.c'))
475
-softmmu_ss.add(files('acpi-qmp-cmds.c'))
476
+system_ss.add(files('acpi-qmp-cmds.c'))
477
diff --git a/hw/adc/meson.build b/hw/adc/meson.build
478
index XXXXXXX..XXXXXXX 100644
479
--- a/hw/adc/meson.build
480
+++ b/hw/adc/meson.build
481
@@ -XXX,XX +XXX,XX @@
482
-softmmu_ss.add(when: 'CONFIG_STM32F2XX_ADC', if_true: files('stm32f2xx_adc.c'))
483
-softmmu_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_adc.c'))
484
-softmmu_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_adc.c'))
485
-softmmu_ss.add(when: 'CONFIG_ZYNQ', if_true: files('zynq-xadc.c'))
486
-softmmu_ss.add(when: 'CONFIG_MAX111X', if_true: files('max111x.c'))
487
+system_ss.add(when: 'CONFIG_STM32F2XX_ADC', if_true: files('stm32f2xx_adc.c'))
488
+system_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_adc.c'))
489
+system_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_adc.c'))
490
+system_ss.add(when: 'CONFIG_ZYNQ', if_true: files('zynq-xadc.c'))
491
+system_ss.add(when: 'CONFIG_MAX111X', if_true: files('max111x.c'))
492
diff --git a/hw/arm/meson.build b/hw/arm/meson.build
493
index XXXXXXX..XXXXXXX 100644
494
--- a/hw/arm/meson.build
495
+++ b/hw/arm/meson.build
496
@@ -XXX,XX +XXX,XX @@ arm_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_soc.c'))
497
arm_ss.add(when: 'CONFIG_XEN', if_true: files('xen_arm.c'))
498
arm_ss.add_all(xen_ss)
499
500
-softmmu_ss.add(when: 'CONFIG_ARM_SMMUV3', if_true: files('smmu-common.c'))
501
-softmmu_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4_boards.c'))
502
-softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_peripherals.c'))
503
-softmmu_ss.add(when: 'CONFIG_TOSA', if_true: files('tosa.c'))
504
+system_ss.add(when: 'CONFIG_ARM_SMMUV3', if_true: files('smmu-common.c'))
505
+system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4_boards.c'))
506
+system_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_peripherals.c'))
507
+system_ss.add(when: 'CONFIG_TOSA', if_true: files('tosa.c'))
508
509
hw_arch += {'arm': arm_ss}
510
diff --git a/hw/audio/meson.build b/hw/audio/meson.build
511
index XXXXXXX..XXXXXXX 100644
512
--- a/hw/audio/meson.build
513
+++ b/hw/audio/meson.build
514
@@ -XXX,XX +XXX,XX @@
515
-softmmu_ss.add(files('soundhw.c'))
516
-softmmu_ss.add(when: 'CONFIG_AC97', if_true: files('ac97.c'))
517
-softmmu_ss.add(when: 'CONFIG_ADLIB', if_true: files('fmopl.c', 'adlib.c'))
518
-softmmu_ss.add(when: 'CONFIG_CS4231', if_true: files('cs4231.c'))
519
-softmmu_ss.add(when: 'CONFIG_CS4231A', if_true: files('cs4231a.c'))
520
-softmmu_ss.add(when: 'CONFIG_ES1370', if_true: files('es1370.c'))
521
-softmmu_ss.add(when: 'CONFIG_GUS', if_true: files('gus.c', 'gusemu_hal.c', 'gusemu_mixer.c'))
522
-softmmu_ss.add(when: 'CONFIG_HDA', if_true: files('intel-hda.c', 'hda-codec.c'))
523
-softmmu_ss.add(when: 'CONFIG_MARVELL_88W8618', if_true: files('marvell_88w8618.c'))
524
-softmmu_ss.add(when: 'CONFIG_PCSPK', if_true: files('pcspk.c'))
525
-softmmu_ss.add(when: 'CONFIG_PL041', if_true: files('pl041.c', 'lm4549.c'))
526
-softmmu_ss.add(when: 'CONFIG_SB16', if_true: files('sb16.c'))
527
-softmmu_ss.add(when: 'CONFIG_VT82C686', if_true: files('via-ac97.c'))
528
-softmmu_ss.add(when: 'CONFIG_WM8750', if_true: files('wm8750.c'))
529
+system_ss.add(files('soundhw.c'))
530
+system_ss.add(when: 'CONFIG_AC97', if_true: files('ac97.c'))
531
+system_ss.add(when: 'CONFIG_ADLIB', if_true: files('fmopl.c', 'adlib.c'))
532
+system_ss.add(when: 'CONFIG_CS4231', if_true: files('cs4231.c'))
533
+system_ss.add(when: 'CONFIG_CS4231A', if_true: files('cs4231a.c'))
534
+system_ss.add(when: 'CONFIG_ES1370', if_true: files('es1370.c'))
535
+system_ss.add(when: 'CONFIG_GUS', if_true: files('gus.c', 'gusemu_hal.c', 'gusemu_mixer.c'))
536
+system_ss.add(when: 'CONFIG_HDA', if_true: files('intel-hda.c', 'hda-codec.c'))
537
+system_ss.add(when: 'CONFIG_MARVELL_88W8618', if_true: files('marvell_88w8618.c'))
538
+system_ss.add(when: 'CONFIG_PCSPK', if_true: files('pcspk.c'))
539
+system_ss.add(when: 'CONFIG_PL041', if_true: files('pl041.c', 'lm4549.c'))
540
+system_ss.add(when: 'CONFIG_SB16', if_true: files('sb16.c'))
541
+system_ss.add(when: 'CONFIG_VT82C686', if_true: files('via-ac97.c'))
542
+system_ss.add(when: 'CONFIG_WM8750', if_true: files('wm8750.c'))
543
diff --git a/hw/block/meson.build b/hw/block/meson.build
544
index XXXXXXX..XXXXXXX 100644
545
--- a/hw/block/meson.build
546
+++ b/hw/block/meson.build
547
@@ -XXX,XX +XXX,XX @@
548
-softmmu_ss.add(files(
549
+system_ss.add(files(
550
'block.c',
551
'cdrom.c',
552
'hd-geometry.c'
553
))
554
-softmmu_ss.add(when: 'CONFIG_ECC', if_true: files('ecc.c'))
555
-softmmu_ss.add(when: 'CONFIG_FDC', if_true: files('fdc.c'))
556
-softmmu_ss.add(when: 'CONFIG_FDC_ISA', if_true: files('fdc-isa.c'))
557
-softmmu_ss.add(when: 'CONFIG_FDC_SYSBUS', if_true: files('fdc-sysbus.c'))
558
-softmmu_ss.add(when: 'CONFIG_NAND', if_true: files('nand.c'))
559
-softmmu_ss.add(when: 'CONFIG_ONENAND', if_true: files('onenand.c'))
560
-softmmu_ss.add(when: 'CONFIG_PFLASH_CFI01', if_true: files('pflash_cfi01.c'))
561
-softmmu_ss.add(when: 'CONFIG_PFLASH_CFI02', if_true: files('pflash_cfi02.c'))
562
-softmmu_ss.add(when: 'CONFIG_SSI_M25P80', if_true: files('m25p80.c'))
563
-softmmu_ss.add(when: 'CONFIG_SSI_M25P80', if_true: files('m25p80_sfdp.c'))
564
-softmmu_ss.add(when: 'CONFIG_SWIM', if_true: files('swim.c'))
565
-softmmu_ss.add(when: 'CONFIG_XEN_BUS', if_true: files('xen-block.c'))
566
-softmmu_ss.add(when: 'CONFIG_TC58128', if_true: files('tc58128.c'))
567
+system_ss.add(when: 'CONFIG_ECC', if_true: files('ecc.c'))
568
+system_ss.add(when: 'CONFIG_FDC', if_true: files('fdc.c'))
569
+system_ss.add(when: 'CONFIG_FDC_ISA', if_true: files('fdc-isa.c'))
570
+system_ss.add(when: 'CONFIG_FDC_SYSBUS', if_true: files('fdc-sysbus.c'))
571
+system_ss.add(when: 'CONFIG_NAND', if_true: files('nand.c'))
572
+system_ss.add(when: 'CONFIG_ONENAND', if_true: files('onenand.c'))
573
+system_ss.add(when: 'CONFIG_PFLASH_CFI01', if_true: files('pflash_cfi01.c'))
574
+system_ss.add(when: 'CONFIG_PFLASH_CFI02', if_true: files('pflash_cfi02.c'))
575
+system_ss.add(when: 'CONFIG_SSI_M25P80', if_true: files('m25p80.c'))
576
+system_ss.add(when: 'CONFIG_SSI_M25P80', if_true: files('m25p80_sfdp.c'))
577
+system_ss.add(when: 'CONFIG_SWIM', if_true: files('swim.c'))
578
+system_ss.add(when: 'CONFIG_XEN_BUS', if_true: files('xen-block.c'))
579
+system_ss.add(when: 'CONFIG_TC58128', if_true: files('tc58128.c'))
580
581
specific_ss.add(when: 'CONFIG_VIRTIO_BLK', if_true: files('virtio-blk.c', 'virtio-blk-common.c'))
582
specific_ss.add(when: 'CONFIG_VHOST_USER_BLK', if_true: files('vhost-user-blk.c', 'virtio-blk-common.c'))
583
diff --git a/hw/char/meson.build b/hw/char/meson.build
584
index XXXXXXX..XXXXXXX 100644
585
--- a/hw/char/meson.build
586
+++ b/hw/char/meson.build
587
@@ -XXX,XX +XXX,XX @@
588
-softmmu_ss.add(when: 'CONFIG_CADENCE', if_true: files('cadence_uart.c'))
589
-softmmu_ss.add(when: 'CONFIG_CMSDK_APB_UART', if_true: files('cmsdk-apb-uart.c'))
590
-softmmu_ss.add(when: 'CONFIG_ESCC', if_true: files('escc.c'))
591
-softmmu_ss.add(when: 'CONFIG_ETRAXFS', if_true: files('etraxfs_ser.c'))
592
-softmmu_ss.add(when: 'CONFIG_GRLIB', if_true: files('grlib_apbuart.c'))
593
-softmmu_ss.add(when: 'CONFIG_IBEX', if_true: files('ibex_uart.c'))
594
-softmmu_ss.add(when: 'CONFIG_IMX', if_true: files('imx_serial.c'))
595
-softmmu_ss.add(when: 'CONFIG_IPACK', if_true: files('ipoctal232.c'))
596
-softmmu_ss.add(when: 'CONFIG_ISA_BUS', if_true: files('parallel-isa.c'))
597
-softmmu_ss.add(when: 'CONFIG_ISA_DEBUG', if_true: files('debugcon.c'))
598
-softmmu_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_uart.c'))
599
-softmmu_ss.add(when: 'CONFIG_PARALLEL', if_true: files('parallel.c'))
600
-softmmu_ss.add(when: 'CONFIG_PL011', if_true: files('pl011.c'))
601
-softmmu_ss.add(when: 'CONFIG_SCLPCONSOLE', if_true: files('sclpconsole.c', 'sclpconsole-lm.c'))
602
-softmmu_ss.add(when: 'CONFIG_SERIAL', if_true: files('serial.c'))
603
-softmmu_ss.add(when: 'CONFIG_SERIAL_ISA', if_true: files('serial-isa.c'))
604
-softmmu_ss.add(when: 'CONFIG_SERIAL_PCI', if_true: files('serial-pci.c'))
605
-softmmu_ss.add(when: 'CONFIG_SERIAL_PCI_MULTI', if_true: files('serial-pci-multi.c'))
606
-softmmu_ss.add(when: 'CONFIG_SHAKTI_UART', if_true: files('shakti_uart.c'))
607
-softmmu_ss.add(when: 'CONFIG_VIRTIO_SERIAL', if_true: files('virtio-console.c'))
608
-softmmu_ss.add(when: 'CONFIG_XEN_BUS', if_true: files('xen_console.c'))
609
-softmmu_ss.add(when: 'CONFIG_XILINX', if_true: files('xilinx_uartlite.c'))
610
+system_ss.add(when: 'CONFIG_CADENCE', if_true: files('cadence_uart.c'))
611
+system_ss.add(when: 'CONFIG_CMSDK_APB_UART', if_true: files('cmsdk-apb-uart.c'))
612
+system_ss.add(when: 'CONFIG_ESCC', if_true: files('escc.c'))
613
+system_ss.add(when: 'CONFIG_ETRAXFS', if_true: files('etraxfs_ser.c'))
614
+system_ss.add(when: 'CONFIG_GRLIB', if_true: files('grlib_apbuart.c'))
615
+system_ss.add(when: 'CONFIG_IBEX', if_true: files('ibex_uart.c'))
616
+system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_serial.c'))
617
+system_ss.add(when: 'CONFIG_IPACK', if_true: files('ipoctal232.c'))
618
+system_ss.add(when: 'CONFIG_ISA_BUS', if_true: files('parallel-isa.c'))
619
+system_ss.add(when: 'CONFIG_ISA_DEBUG', if_true: files('debugcon.c'))
620
+system_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_uart.c'))
621
+system_ss.add(when: 'CONFIG_PARALLEL', if_true: files('parallel.c'))
622
+system_ss.add(when: 'CONFIG_PL011', if_true: files('pl011.c'))
623
+system_ss.add(when: 'CONFIG_SCLPCONSOLE', if_true: files('sclpconsole.c', 'sclpconsole-lm.c'))
624
+system_ss.add(when: 'CONFIG_SERIAL', if_true: files('serial.c'))
625
+system_ss.add(when: 'CONFIG_SERIAL_ISA', if_true: files('serial-isa.c'))
626
+system_ss.add(when: 'CONFIG_SERIAL_PCI', if_true: files('serial-pci.c'))
627
+system_ss.add(when: 'CONFIG_SERIAL_PCI_MULTI', if_true: files('serial-pci-multi.c'))
628
+system_ss.add(when: 'CONFIG_SHAKTI_UART', if_true: files('shakti_uart.c'))
629
+system_ss.add(when: 'CONFIG_VIRTIO_SERIAL', if_true: files('virtio-console.c'))
630
+system_ss.add(when: 'CONFIG_XEN_BUS', if_true: files('xen_console.c'))
631
+system_ss.add(when: 'CONFIG_XILINX', if_true: files('xilinx_uartlite.c'))
632
633
-softmmu_ss.add(when: 'CONFIG_AVR_USART', if_true: files('avr_usart.c'))
634
-softmmu_ss.add(when: 'CONFIG_COLDFIRE', if_true: files('mcf_uart.c'))
635
-softmmu_ss.add(when: 'CONFIG_DIGIC', if_true: files('digic-uart.c'))
636
-softmmu_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_uart.c'))
637
-softmmu_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_uart.c'))
638
-softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_aux.c'))
639
-softmmu_ss.add(when: 'CONFIG_RENESAS_SCI', if_true: files('renesas_sci.c'))
640
-softmmu_ss.add(when: 'CONFIG_SIFIVE_UART', if_true: files('sifive_uart.c'))
641
-softmmu_ss.add(when: 'CONFIG_SH_SCI', if_true: files('sh_serial.c'))
642
-softmmu_ss.add(when: 'CONFIG_STM32F2XX_USART', if_true: files('stm32f2xx_usart.c'))
643
-softmmu_ss.add(when: 'CONFIG_MCHP_PFSOC_MMUART', if_true: files('mchp_pfsoc_mmuart.c'))
644
-softmmu_ss.add(when: 'CONFIG_HTIF', if_true: files('riscv_htif.c'))
645
-softmmu_ss.add(when: 'CONFIG_GOLDFISH_TTY', if_true: files('goldfish_tty.c'))
646
+system_ss.add(when: 'CONFIG_AVR_USART', if_true: files('avr_usart.c'))
647
+system_ss.add(when: 'CONFIG_COLDFIRE', if_true: files('mcf_uart.c'))
648
+system_ss.add(when: 'CONFIG_DIGIC', if_true: files('digic-uart.c'))
649
+system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_uart.c'))
650
+system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_uart.c'))
651
+system_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_aux.c'))
652
+system_ss.add(when: 'CONFIG_RENESAS_SCI', if_true: files('renesas_sci.c'))
653
+system_ss.add(when: 'CONFIG_SIFIVE_UART', if_true: files('sifive_uart.c'))
654
+system_ss.add(when: 'CONFIG_SH_SCI', if_true: files('sh_serial.c'))
655
+system_ss.add(when: 'CONFIG_STM32F2XX_USART', if_true: files('stm32f2xx_usart.c'))
656
+system_ss.add(when: 'CONFIG_MCHP_PFSOC_MMUART', if_true: files('mchp_pfsoc_mmuart.c'))
657
+system_ss.add(when: 'CONFIG_HTIF', if_true: files('riscv_htif.c'))
658
+system_ss.add(when: 'CONFIG_GOLDFISH_TTY', if_true: files('goldfish_tty.c'))
659
660
specific_ss.add(when: 'CONFIG_TERMINAL3270', if_true: files('terminal3270.c'))
661
specific_ss.add(when: 'CONFIG_VIRTIO', if_true: files('virtio-serial-bus.c'))
662
diff --git a/hw/core/meson.build b/hw/core/meson.build
663
index XXXXXXX..XXXXXXX 100644
664
--- a/hw/core/meson.build
665
+++ b/hw/core/meson.build
666
@@ -XXX,XX +XXX,XX @@ endif
667
668
common_ss.add(files('cpu-common.c'))
669
common_ss.add(files('machine-smp.c'))
670
-softmmu_ss.add(when: 'CONFIG_FITLOADER', if_true: files('loader-fit.c'))
671
-softmmu_ss.add(when: 'CONFIG_GENERIC_LOADER', if_true: files('generic-loader.c'))
672
-softmmu_ss.add(when: ['CONFIG_GUEST_LOADER', fdt], if_true: files('guest-loader.c'))
673
-softmmu_ss.add(when: 'CONFIG_OR_IRQ', if_true: files('or-irq.c'))
674
-softmmu_ss.add(when: 'CONFIG_PLATFORM_BUS', if_true: files('platform-bus.c'))
675
-softmmu_ss.add(when: 'CONFIG_PTIMER', if_true: files('ptimer.c'))
676
-softmmu_ss.add(when: 'CONFIG_REGISTER', if_true: files('register.c'))
677
-softmmu_ss.add(when: 'CONFIG_SPLIT_IRQ', if_true: files('split-irq.c'))
678
-softmmu_ss.add(when: 'CONFIG_XILINX_AXI', if_true: files('stream.c'))
679
-softmmu_ss.add(when: 'CONFIG_PLATFORM_BUS', if_true: files('sysbus-fdt.c'))
680
+system_ss.add(when: 'CONFIG_FITLOADER', if_true: files('loader-fit.c'))
681
+system_ss.add(when: 'CONFIG_GENERIC_LOADER', if_true: files('generic-loader.c'))
682
+system_ss.add(when: ['CONFIG_GUEST_LOADER', fdt], if_true: files('guest-loader.c'))
683
+system_ss.add(when: 'CONFIG_OR_IRQ', if_true: files('or-irq.c'))
684
+system_ss.add(when: 'CONFIG_PLATFORM_BUS', if_true: files('platform-bus.c'))
685
+system_ss.add(when: 'CONFIG_PTIMER', if_true: files('ptimer.c'))
686
+system_ss.add(when: 'CONFIG_REGISTER', if_true: files('register.c'))
687
+system_ss.add(when: 'CONFIG_SPLIT_IRQ', if_true: files('split-irq.c'))
688
+system_ss.add(when: 'CONFIG_XILINX_AXI', if_true: files('stream.c'))
689
+system_ss.add(when: 'CONFIG_PLATFORM_BUS', if_true: files('sysbus-fdt.c'))
690
691
-softmmu_ss.add(files(
692
+system_ss.add(files(
693
'cpu-sysemu.c',
694
'fw-path-provider.c',
695
'gpio.c',
696
diff --git a/hw/cpu/meson.build b/hw/cpu/meson.build
697
index XXXXXXX..XXXXXXX 100644
698
--- a/hw/cpu/meson.build
699
+++ b/hw/cpu/meson.build
700
@@ -XXX,XX +XXX,XX @@
701
-softmmu_ss.add(files('core.c', 'cluster.c'))
702
+system_ss.add(files('core.c', 'cluster.c'))
703
704
-softmmu_ss.add(when: 'CONFIG_ARM11MPCORE', if_true: files('arm11mpcore.c'))
705
-softmmu_ss.add(when: 'CONFIG_REALVIEW', if_true: files('realview_mpcore.c'))
706
+system_ss.add(when: 'CONFIG_ARM11MPCORE', if_true: files('arm11mpcore.c'))
707
+system_ss.add(when: 'CONFIG_REALVIEW', if_true: files('realview_mpcore.c'))
708
specific_ss.add(when: 'CONFIG_A9MPCORE', if_true: files('a9mpcore.c'))
709
specific_ss.add(when: 'CONFIG_A15MPCORE', if_true: files('a15mpcore.c'))
710
diff --git a/hw/cxl/meson.build b/hw/cxl/meson.build
711
index XXXXXXX..XXXXXXX 100644
712
--- a/hw/cxl/meson.build
713
+++ b/hw/cxl/meson.build
714
@@ -XXX,XX +XXX,XX @@
715
-softmmu_ss.add(when: 'CONFIG_CXL',
716
+system_ss.add(when: 'CONFIG_CXL',
717
if_true: files(
718
'cxl-component-utils.c',
719
'cxl-device-utils.c',
720
@@ -XXX,XX +XXX,XX @@ softmmu_ss.add(when: 'CONFIG_CXL',
721
'cxl-host-stubs.c',
722
))
723
724
-softmmu_ss.add(when: 'CONFIG_ALL', if_true: files('cxl-host-stubs.c'))
725
+system_ss.add(when: 'CONFIG_ALL', if_true: files('cxl-host-stubs.c'))
726
diff --git a/hw/display/meson.build b/hw/display/meson.build
727
index XXXXXXX..XXXXXXX 100644
728
--- a/hw/display/meson.build
729
+++ b/hw/display/meson.build
730
@@ -XXX,XX +XXX,XX @@
731
hw_display_modules = {}
732
733
-softmmu_ss.add(when: 'CONFIG_DDC', if_true: files('i2c-ddc.c'))
734
-softmmu_ss.add(when: 'CONFIG_EDID', if_true: files('edid-generate.c', 'edid-region.c'))
735
+system_ss.add(when: 'CONFIG_DDC', if_true: files('i2c-ddc.c'))
736
+system_ss.add(when: 'CONFIG_EDID', if_true: files('edid-generate.c', 'edid-region.c'))
737
738
-softmmu_ss.add(when: 'CONFIG_FW_CFG_DMA', if_true: files('ramfb.c'))
739
-softmmu_ss.add(when: 'CONFIG_FW_CFG_DMA', if_true: files('ramfb-standalone.c'))
740
+system_ss.add(when: 'CONFIG_FW_CFG_DMA', if_true: files('ramfb.c'))
741
+system_ss.add(when: 'CONFIG_FW_CFG_DMA', if_true: files('ramfb-standalone.c'))
742
743
-softmmu_ss.add(when: 'CONFIG_VGA_CIRRUS', if_true: files('cirrus_vga.c'))
744
-softmmu_ss.add(when: ['CONFIG_VGA_CIRRUS', 'CONFIG_VGA_ISA'], if_true: files('cirrus_vga_isa.c'))
745
-softmmu_ss.add(when: 'CONFIG_G364FB', if_true: files('g364fb.c'))
746
-softmmu_ss.add(when: 'CONFIG_JAZZ_LED', if_true: files('jazz_led.c'))
747
-softmmu_ss.add(when: 'CONFIG_PL110', if_true: files('pl110.c'))
748
-softmmu_ss.add(when: 'CONFIG_SII9022', if_true: files('sii9022.c'))
749
-softmmu_ss.add(when: 'CONFIG_SSD0303', if_true: files('ssd0303.c'))
750
-softmmu_ss.add(when: 'CONFIG_SSD0323', if_true: files('ssd0323.c'))
751
-softmmu_ss.add(when: 'CONFIG_XEN_BUS', if_true: files('xenfb.c'))
752
+system_ss.add(when: 'CONFIG_VGA_CIRRUS', if_true: files('cirrus_vga.c'))
753
+system_ss.add(when: ['CONFIG_VGA_CIRRUS', 'CONFIG_VGA_ISA'], if_true: files('cirrus_vga_isa.c'))
754
+system_ss.add(when: 'CONFIG_G364FB', if_true: files('g364fb.c'))
755
+system_ss.add(when: 'CONFIG_JAZZ_LED', if_true: files('jazz_led.c'))
756
+system_ss.add(when: 'CONFIG_PL110', if_true: files('pl110.c'))
757
+system_ss.add(when: 'CONFIG_SII9022', if_true: files('sii9022.c'))
758
+system_ss.add(when: 'CONFIG_SSD0303', if_true: files('ssd0303.c'))
759
+system_ss.add(when: 'CONFIG_SSD0323', if_true: files('ssd0323.c'))
760
+system_ss.add(when: 'CONFIG_XEN_BUS', if_true: files('xenfb.c'))
761
762
-softmmu_ss.add(when: 'CONFIG_VGA_PCI', if_true: files('vga-pci.c'))
763
-softmmu_ss.add(when: 'CONFIG_VGA_ISA', if_true: files('vga-isa.c'))
764
-softmmu_ss.add(when: 'CONFIG_VGA_MMIO', if_true: files('vga-mmio.c'))
765
-softmmu_ss.add(when: 'CONFIG_VMWARE_VGA', if_true: files('vmware_vga.c'))
766
-softmmu_ss.add(when: 'CONFIG_BOCHS_DISPLAY', if_true: files('bochs-display.c'))
767
+system_ss.add(when: 'CONFIG_VGA_PCI', if_true: files('vga-pci.c'))
768
+system_ss.add(when: 'CONFIG_VGA_ISA', if_true: files('vga-isa.c'))
769
+system_ss.add(when: 'CONFIG_VGA_MMIO', if_true: files('vga-mmio.c'))
770
+system_ss.add(when: 'CONFIG_VMWARE_VGA', if_true: files('vmware_vga.c'))
771
+system_ss.add(when: 'CONFIG_BOCHS_DISPLAY', if_true: files('bochs-display.c'))
772
773
-softmmu_ss.add(when: 'CONFIG_BLIZZARD', if_true: files('blizzard.c'))
774
-softmmu_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_fimd.c'))
775
-softmmu_ss.add(when: 'CONFIG_FRAMEBUFFER', if_true: files('framebuffer.c'))
776
-softmmu_ss.add(when: 'CONFIG_ZAURUS', if_true: files('tc6393xb.c'))
777
+system_ss.add(when: 'CONFIG_BLIZZARD', if_true: files('blizzard.c'))
778
+system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_fimd.c'))
779
+system_ss.add(when: 'CONFIG_FRAMEBUFFER', if_true: files('framebuffer.c'))
780
+system_ss.add(when: 'CONFIG_ZAURUS', if_true: files('tc6393xb.c'))
781
782
-softmmu_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_dss.c'))
783
-softmmu_ss.add(when: 'CONFIG_PXA2XX', if_true: files('pxa2xx_lcd.c'))
784
-softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_fb.c'))
785
-softmmu_ss.add(when: 'CONFIG_SM501', if_true: files('sm501.c'))
786
-softmmu_ss.add(when: 'CONFIG_TCX', if_true: files('tcx.c'))
787
-softmmu_ss.add(when: 'CONFIG_CG3', if_true: files('cg3.c'))
788
-softmmu_ss.add(when: 'CONFIG_MACFB', if_true: files('macfb.c'))
789
-softmmu_ss.add(when: 'CONFIG_NEXTCUBE', if_true: files('next-fb.c'))
790
+system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_dss.c'))
791
+system_ss.add(when: 'CONFIG_PXA2XX', if_true: files('pxa2xx_lcd.c'))
792
+system_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_fb.c'))
793
+system_ss.add(when: 'CONFIG_SM501', if_true: files('sm501.c'))
794
+system_ss.add(when: 'CONFIG_TCX', if_true: files('tcx.c'))
795
+system_ss.add(when: 'CONFIG_CG3', if_true: files('cg3.c'))
796
+system_ss.add(when: 'CONFIG_MACFB', if_true: files('macfb.c'))
797
+system_ss.add(when: 'CONFIG_NEXTCUBE', if_true: files('next-fb.c'))
798
799
-softmmu_ss.add(when: 'CONFIG_VGA', if_true: files('vga.c'))
800
+system_ss.add(when: 'CONFIG_VGA', if_true: files('vga.c'))
801
802
if (config_all_devices.has_key('CONFIG_VGA_CIRRUS') or
803
config_all_devices.has_key('CONFIG_VGA_PCI') or
804
config_all_devices.has_key('CONFIG_VMWARE_VGA') or
805
config_all_devices.has_key('CONFIG_ATI_VGA')
806
)
807
- softmmu_ss.add(when: 'CONFIG_ACPI', if_true: files('acpi-vga.c'),
808
+ system_ss.add(when: 'CONFIG_ACPI', if_true: files('acpi-vga.c'),
809
if_false: files('acpi-vga-stub.c'))
810
endif
811
812
@@ -XXX,XX +XXX,XX @@ if config_all_devices.has_key('CONFIG_QXL')
813
hw_display_modules += {'qxl': qxl_ss}
814
endif
815
816
-softmmu_ss.add(when: 'CONFIG_DPCD', if_true: files('dpcd.c'))
817
-softmmu_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx_dp.c'))
818
+system_ss.add(when: 'CONFIG_DPCD', if_true: files('dpcd.c'))
819
+system_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx_dp.c'))
820
821
-softmmu_ss.add(when: 'CONFIG_ARTIST', if_true: files('artist.c'))
822
+system_ss.add(when: 'CONFIG_ARTIST', if_true: files('artist.c'))
823
824
-softmmu_ss.add(when: [pixman, 'CONFIG_ATI_VGA'], if_true: files('ati.c', 'ati_2d.c', 'ati_dbg.c'))
825
+system_ss.add(when: [pixman, 'CONFIG_ATI_VGA'], if_true: files('ati.c', 'ati_2d.c', 'ati_dbg.c'))
826
827
828
if config_all_devices.has_key('CONFIG_VIRTIO_GPU')
829
@@ -XXX,XX +XXX,XX @@ if config_all_devices.has_key('CONFIG_VIRTIO_VGA')
830
hw_display_modules += {'virtio-vga-gl': virtio_vga_gl_ss}
831
endif
832
833
-softmmu_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_lcdc.c'))
834
+system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_lcdc.c'))
835
836
-softmmu_ss.add(when: 'CONFIG_ALL', if_true: files('acpi-vga-stub.c'))
837
+system_ss.add(when: 'CONFIG_ALL', if_true: files('acpi-vga-stub.c'))
838
modules += { 'hw-display': hw_display_modules }
839
diff --git a/hw/dma/meson.build b/hw/dma/meson.build
840
index XXXXXXX..XXXXXXX 100644
841
--- a/hw/dma/meson.build
842
+++ b/hw/dma/meson.build
843
@@ -XXX,XX +XXX,XX @@
844
-softmmu_ss.add(when: 'CONFIG_RC4030', if_true: files('rc4030.c'))
845
-softmmu_ss.add(when: 'CONFIG_PL080', if_true: files('pl080.c'))
846
-softmmu_ss.add(when: 'CONFIG_PL330', if_true: files('pl330.c'))
847
-softmmu_ss.add(when: 'CONFIG_I82374', if_true: files('i82374.c'))
848
-softmmu_ss.add(when: 'CONFIG_I8257', if_true: files('i8257.c'))
849
-softmmu_ss.add(when: 'CONFIG_XILINX_AXI', if_true: files('xilinx_axidma.c'))
850
-softmmu_ss.add(when: 'CONFIG_ZYNQ_DEVCFG', if_true: files('xlnx-zynq-devcfg.c'))
851
-softmmu_ss.add(when: 'CONFIG_ETRAXFS', if_true: files('etraxfs_dma.c'))
852
-softmmu_ss.add(when: 'CONFIG_STP2000', if_true: files('sparc32_dma.c'))
853
-softmmu_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx_dpdma.c'))
854
-softmmu_ss.add(when: 'CONFIG_XLNX_ZDMA', if_true: files('xlnx-zdma.c'))
855
-softmmu_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_dma.c', 'soc_dma.c'))
856
-softmmu_ss.add(when: 'CONFIG_PXA2XX', if_true: files('pxa2xx_dma.c'))
857
-softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_dma.c'))
858
-softmmu_ss.add(when: 'CONFIG_SIFIVE_PDMA', if_true: files('sifive_pdma.c'))
859
-softmmu_ss.add(when: 'CONFIG_XLNX_CSU_DMA', if_true: files('xlnx_csu_dma.c'))
860
+system_ss.add(when: 'CONFIG_RC4030', if_true: files('rc4030.c'))
861
+system_ss.add(when: 'CONFIG_PL080', if_true: files('pl080.c'))
862
+system_ss.add(when: 'CONFIG_PL330', if_true: files('pl330.c'))
863
+system_ss.add(when: 'CONFIG_I82374', if_true: files('i82374.c'))
864
+system_ss.add(when: 'CONFIG_I8257', if_true: files('i8257.c'))
865
+system_ss.add(when: 'CONFIG_XILINX_AXI', if_true: files('xilinx_axidma.c'))
866
+system_ss.add(when: 'CONFIG_ZYNQ_DEVCFG', if_true: files('xlnx-zynq-devcfg.c'))
867
+system_ss.add(when: 'CONFIG_ETRAXFS', if_true: files('etraxfs_dma.c'))
868
+system_ss.add(when: 'CONFIG_STP2000', if_true: files('sparc32_dma.c'))
869
+system_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx_dpdma.c'))
870
+system_ss.add(when: 'CONFIG_XLNX_ZDMA', if_true: files('xlnx-zdma.c'))
871
+system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_dma.c', 'soc_dma.c'))
872
+system_ss.add(when: 'CONFIG_PXA2XX', if_true: files('pxa2xx_dma.c'))
873
+system_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_dma.c'))
874
+system_ss.add(when: 'CONFIG_SIFIVE_PDMA', if_true: files('sifive_pdma.c'))
875
+system_ss.add(when: 'CONFIG_XLNX_CSU_DMA', if_true: files('xlnx_csu_dma.c'))
876
diff --git a/hw/gpio/meson.build b/hw/gpio/meson.build
877
index XXXXXXX..XXXXXXX 100644
878
--- a/hw/gpio/meson.build
879
+++ b/hw/gpio/meson.build
880
@@ -XXX,XX +XXX,XX @@
881
-softmmu_ss.add(when: 'CONFIG_GPIO_KEY', if_true: files('gpio_key.c'))
882
-softmmu_ss.add(when: 'CONFIG_GPIO_MPC8XXX', if_true: files('mpc8xxx.c'))
883
-softmmu_ss.add(when: 'CONFIG_GPIO_PWR', if_true: files('gpio_pwr.c'))
884
-softmmu_ss.add(when: 'CONFIG_MAX7310', if_true: files('max7310.c'))
885
-softmmu_ss.add(when: 'CONFIG_PL061', if_true: files('pl061.c'))
886
-softmmu_ss.add(when: 'CONFIG_ZAURUS', if_true: files('zaurus.c'))
887
+system_ss.add(when: 'CONFIG_GPIO_KEY', if_true: files('gpio_key.c'))
888
+system_ss.add(when: 'CONFIG_GPIO_MPC8XXX', if_true: files('mpc8xxx.c'))
889
+system_ss.add(when: 'CONFIG_GPIO_PWR', if_true: files('gpio_pwr.c'))
890
+system_ss.add(when: 'CONFIG_MAX7310', if_true: files('max7310.c'))
891
+system_ss.add(when: 'CONFIG_PL061', if_true: files('pl061.c'))
892
+system_ss.add(when: 'CONFIG_ZAURUS', if_true: files('zaurus.c'))
893
894
-softmmu_ss.add(when: 'CONFIG_IMX', if_true: files('imx_gpio.c'))
895
-softmmu_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_gpio.c'))
896
-softmmu_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_gpio.c'))
897
-softmmu_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_gpio.c'))
898
-softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_gpio.c'))
899
-softmmu_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_gpio.c'))
900
-softmmu_ss.add(when: 'CONFIG_SIFIVE_GPIO', if_true: files('sifive_gpio.c'))
901
+system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_gpio.c'))
902
+system_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_gpio.c'))
903
+system_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_gpio.c'))
904
+system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_gpio.c'))
905
+system_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_gpio.c'))
906
+system_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_gpio.c'))
907
+system_ss.add(when: 'CONFIG_SIFIVE_GPIO', if_true: files('sifive_gpio.c'))
908
diff --git a/hw/i2c/meson.build b/hw/i2c/meson.build
909
index XXXXXXX..XXXXXXX 100644
910
--- a/hw/i2c/meson.build
911
+++ b/hw/i2c/meson.build
912
@@ -XXX,XX +XXX,XX @@ i2c_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_i2c.c'))
913
i2c_ss.add(when: 'CONFIG_PPC4XX', if_true: files('ppc4xx_i2c.c'))
914
i2c_ss.add(when: 'CONFIG_PCA954X', if_true: files('i2c_mux_pca954x.c'))
915
i2c_ss.add(when: 'CONFIG_PMBUS', if_true: files('pmbus_device.c'))
916
-softmmu_ss.add_all(when: 'CONFIG_I2C', if_true: i2c_ss)
917
+system_ss.add_all(when: 'CONFIG_I2C', if_true: i2c_ss)
918
diff --git a/hw/ide/meson.build b/hw/ide/meson.build
919
index XXXXXXX..XXXXXXX 100644
920
--- a/hw/ide/meson.build
921
+++ b/hw/ide/meson.build
922
@@ -XXX,XX +XXX,XX @@
923
-softmmu_ss.add(when: 'CONFIG_AHCI', if_true: files('ahci.c'))
924
-softmmu_ss.add(when: 'CONFIG_AHCI_ICH9', if_true: files('ich.c'))
925
-softmmu_ss.add(when: 'CONFIG_ALLWINNER_A10', if_true: files('ahci-allwinner.c'))
926
-softmmu_ss.add(when: 'CONFIG_IDE_CMD646', if_true: files('cmd646.c'))
927
-softmmu_ss.add(when: 'CONFIG_IDE_CORE', if_true: files('core.c', 'atapi.c'))
928
-softmmu_ss.add(when: 'CONFIG_IDE_ISA', if_true: files('isa.c', 'ioport.c'))
929
-softmmu_ss.add(when: 'CONFIG_IDE_MACIO', if_true: files('macio.c'))
930
-softmmu_ss.add(when: 'CONFIG_IDE_MMIO', if_true: files('mmio.c'))
931
-softmmu_ss.add(when: 'CONFIG_IDE_PCI', if_true: files('pci.c'))
932
-softmmu_ss.add(when: 'CONFIG_IDE_PIIX', if_true: files('piix.c', 'ioport.c'))
933
-softmmu_ss.add(when: 'CONFIG_IDE_QDEV', if_true: files('qdev.c'))
934
-softmmu_ss.add(when: 'CONFIG_IDE_SII3112', if_true: files('sii3112.c'))
935
-softmmu_ss.add(when: 'CONFIG_IDE_VIA', if_true: files('via.c'))
936
-softmmu_ss.add(when: 'CONFIG_MICRODRIVE', if_true: files('microdrive.c'))
937
+system_ss.add(when: 'CONFIG_AHCI', if_true: files('ahci.c'))
938
+system_ss.add(when: 'CONFIG_AHCI_ICH9', if_true: files('ich.c'))
939
+system_ss.add(when: 'CONFIG_ALLWINNER_A10', if_true: files('ahci-allwinner.c'))
940
+system_ss.add(when: 'CONFIG_IDE_CMD646', if_true: files('cmd646.c'))
941
+system_ss.add(when: 'CONFIG_IDE_CORE', if_true: files('core.c', 'atapi.c'))
942
+system_ss.add(when: 'CONFIG_IDE_ISA', if_true: files('isa.c', 'ioport.c'))
943
+system_ss.add(when: 'CONFIG_IDE_MACIO', if_true: files('macio.c'))
944
+system_ss.add(when: 'CONFIG_IDE_MMIO', if_true: files('mmio.c'))
945
+system_ss.add(when: 'CONFIG_IDE_PCI', if_true: files('pci.c'))
946
+system_ss.add(when: 'CONFIG_IDE_PIIX', if_true: files('piix.c', 'ioport.c'))
947
+system_ss.add(when: 'CONFIG_IDE_QDEV', if_true: files('qdev.c'))
948
+system_ss.add(when: 'CONFIG_IDE_SII3112', if_true: files('sii3112.c'))
949
+system_ss.add(when: 'CONFIG_IDE_VIA', if_true: files('via.c'))
950
+system_ss.add(when: 'CONFIG_MICRODRIVE', if_true: files('microdrive.c'))
951
diff --git a/hw/input/meson.build b/hw/input/meson.build
952
index XXXXXXX..XXXXXXX 100644
953
--- a/hw/input/meson.build
954
+++ b/hw/input/meson.build
955
@@ -XXX,XX +XXX,XX @@
956
-softmmu_ss.add(files('hid.c'))
957
-softmmu_ss.add(when: 'CONFIG_ADB', if_true: files('adb.c', 'adb-mouse.c', 'adb-kbd.c'))
958
-softmmu_ss.add(when: 'CONFIG_ADS7846', if_true: files('ads7846.c'))
959
-softmmu_ss.add(when: 'CONFIG_LM832X', if_true: files('lm832x.c'))
960
-softmmu_ss.add(when: 'CONFIG_PCKBD', if_true: files('pckbd.c'))
961
-softmmu_ss.add(when: 'CONFIG_PL050', if_true: files('pl050.c'))
962
-softmmu_ss.add(when: 'CONFIG_PS2', if_true: files('ps2.c'))
963
-softmmu_ss.add(when: 'CONFIG_STELLARIS_INPUT', if_true: files('stellaris_input.c'))
964
-softmmu_ss.add(when: 'CONFIG_TSC2005', if_true: files('tsc2005.c'))
965
+system_ss.add(files('hid.c'))
966
+system_ss.add(when: 'CONFIG_ADB', if_true: files('adb.c', 'adb-mouse.c', 'adb-kbd.c'))
967
+system_ss.add(when: 'CONFIG_ADS7846', if_true: files('ads7846.c'))
968
+system_ss.add(when: 'CONFIG_LM832X', if_true: files('lm832x.c'))
969
+system_ss.add(when: 'CONFIG_PCKBD', if_true: files('pckbd.c'))
970
+system_ss.add(when: 'CONFIG_PL050', if_true: files('pl050.c'))
971
+system_ss.add(when: 'CONFIG_PS2', if_true: files('ps2.c'))
972
+system_ss.add(when: 'CONFIG_STELLARIS_INPUT', if_true: files('stellaris_input.c'))
973
+system_ss.add(when: 'CONFIG_TSC2005', if_true: files('tsc2005.c'))
974
975
-softmmu_ss.add(when: 'CONFIG_VIRTIO_INPUT', if_true: files('virtio-input.c'))
976
-softmmu_ss.add(when: 'CONFIG_VIRTIO_INPUT', if_true: files('virtio-input-hid.c'))
977
-softmmu_ss.add(when: 'CONFIG_VIRTIO_INPUT_HOST', if_true: files('virtio-input-host.c'))
978
-softmmu_ss.add(when: 'CONFIG_VHOST_USER_INPUT', if_true: files('vhost-user-input.c'))
979
+system_ss.add(when: 'CONFIG_VIRTIO_INPUT', if_true: files('virtio-input.c'))
980
+system_ss.add(when: 'CONFIG_VIRTIO_INPUT', if_true: files('virtio-input-hid.c'))
981
+system_ss.add(when: 'CONFIG_VIRTIO_INPUT_HOST', if_true: files('virtio-input-host.c'))
982
+system_ss.add(when: 'CONFIG_VHOST_USER_INPUT', if_true: files('vhost-user-input.c'))
983
984
-softmmu_ss.add(when: 'CONFIG_PXA2XX', if_true: files('pxa2xx_keypad.c'))
985
-softmmu_ss.add(when: 'CONFIG_TSC210X', if_true: files('tsc210x.c'))
986
-softmmu_ss.add(when: 'CONFIG_LASIPS2', if_true: files('lasips2.c'))
987
+system_ss.add(when: 'CONFIG_PXA2XX', if_true: files('pxa2xx_keypad.c'))
988
+system_ss.add(when: 'CONFIG_TSC210X', if_true: files('tsc210x.c'))
989
+system_ss.add(when: 'CONFIG_LASIPS2', if_true: files('lasips2.c'))
990
diff --git a/hw/intc/meson.build b/hw/intc/meson.build
991
index XXXXXXX..XXXXXXX 100644
992
--- a/hw/intc/meson.build
993
+++ b/hw/intc/meson.build
994
@@ -XXX,XX +XXX,XX @@
995
-softmmu_ss.add(files('intc.c'))
996
-softmmu_ss.add(when: 'CONFIG_ARM_GIC', if_true: files(
997
+system_ss.add(files('intc.c'))
998
+system_ss.add(when: 'CONFIG_ARM_GIC', if_true: files(
999
'arm_gic.c',
1000
'arm_gic_common.c',
1001
'arm_gicv2m.c',
1002
'arm_gicv3_common.c',
1003
'arm_gicv3_its_common.c',
1004
))
1005
-softmmu_ss.add(when: 'CONFIG_ARM_GICV3_TCG', if_true: files(
1006
+system_ss.add(when: 'CONFIG_ARM_GICV3_TCG', if_true: files(
1007
'arm_gicv3.c',
1008
'arm_gicv3_dist.c',
1009
'arm_gicv3_its.c',
1010
'arm_gicv3_redist.c',
1011
))
1012
-softmmu_ss.add(when: 'CONFIG_ALLWINNER_A10_PIC', if_true: files('allwinner-a10-pic.c'))
1013
-softmmu_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_vic.c'))
1014
-softmmu_ss.add(when: 'CONFIG_ETRAXFS', if_true: files('etraxfs_pic.c'))
1015
-softmmu_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_gic.c', 'exynos4210_combiner.c'))
1016
-softmmu_ss.add(when: 'CONFIG_GOLDFISH_PIC', if_true: files('goldfish_pic.c'))
1017
-softmmu_ss.add(when: 'CONFIG_HEATHROW_PIC', if_true: files('heathrow_pic.c'))
1018
-softmmu_ss.add(when: 'CONFIG_I8259', if_true: files('i8259_common.c', 'i8259.c'))
1019
-softmmu_ss.add(when: 'CONFIG_IMX', if_true: files('imx_avic.c', 'imx_gpcv2.c'))
1020
-softmmu_ss.add(when: 'CONFIG_IOAPIC', if_true: files('ioapic_common.c'))
1021
-softmmu_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_intc.c'))
1022
-softmmu_ss.add(when: 'CONFIG_OPENPIC', if_true: files('openpic.c'))
1023
-softmmu_ss.add(when: 'CONFIG_PL190', if_true: files('pl190.c'))
1024
-softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_ic.c', 'bcm2836_control.c'))
1025
-softmmu_ss.add(when: 'CONFIG_REALVIEW', if_true: files('realview_gic.c'))
1026
-softmmu_ss.add(when: 'CONFIG_SLAVIO', if_true: files('slavio_intctl.c'))
1027
-softmmu_ss.add(when: 'CONFIG_XILINX', if_true: files('xilinx_intc.c'))
1028
-softmmu_ss.add(when: 'CONFIG_XLNX_ZYNQMP', if_true: files('xlnx-zynqmp-ipi.c'))
1029
-softmmu_ss.add(when: 'CONFIG_XLNX_ZYNQMP_PMU', if_true: files('xlnx-pmu-iomod-intc.c'))
1030
+system_ss.add(when: 'CONFIG_ALLWINNER_A10_PIC', if_true: files('allwinner-a10-pic.c'))
1031
+system_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_vic.c'))
1032
+system_ss.add(when: 'CONFIG_ETRAXFS', if_true: files('etraxfs_pic.c'))
1033
+system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_gic.c', 'exynos4210_combiner.c'))
1034
+system_ss.add(when: 'CONFIG_GOLDFISH_PIC', if_true: files('goldfish_pic.c'))
1035
+system_ss.add(when: 'CONFIG_HEATHROW_PIC', if_true: files('heathrow_pic.c'))
1036
+system_ss.add(when: 'CONFIG_I8259', if_true: files('i8259_common.c', 'i8259.c'))
1037
+system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_avic.c', 'imx_gpcv2.c'))
1038
+system_ss.add(when: 'CONFIG_IOAPIC', if_true: files('ioapic_common.c'))
1039
+system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_intc.c'))
1040
+system_ss.add(when: 'CONFIG_OPENPIC', if_true: files('openpic.c'))
1041
+system_ss.add(when: 'CONFIG_PL190', if_true: files('pl190.c'))
1042
+system_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_ic.c', 'bcm2836_control.c'))
1043
+system_ss.add(when: 'CONFIG_REALVIEW', if_true: files('realview_gic.c'))
1044
+system_ss.add(when: 'CONFIG_SLAVIO', if_true: files('slavio_intctl.c'))
1045
+system_ss.add(when: 'CONFIG_XILINX', if_true: files('xilinx_intc.c'))
1046
+system_ss.add(when: 'CONFIG_XLNX_ZYNQMP', if_true: files('xlnx-zynqmp-ipi.c'))
1047
+system_ss.add(when: 'CONFIG_XLNX_ZYNQMP_PMU', if_true: files('xlnx-pmu-iomod-intc.c'))
1048
1049
if config_all_devices.has_key('CONFIG_APIC') or \
1050
config_all_devices.has_key('CONFIG_I8259') or \
1051
config_all_devices.has_key('CONFIG_MC146818RTC')
1052
- softmmu_ss.add(files('kvm_irqcount.c'))
1053
+ system_ss.add(files('kvm_irqcount.c'))
1054
endif
1055
1056
specific_ss.add(when: 'CONFIG_APIC', if_true: files('apic.c', 'apic_common.c'))
1057
diff --git a/hw/ipack/meson.build b/hw/ipack/meson.build
1058
index XXXXXXX..XXXXXXX 100644
1059
--- a/hw/ipack/meson.build
1060
+++ b/hw/ipack/meson.build
1061
@@ -1 +1 @@
1062
-softmmu_ss.add(when: 'CONFIG_IPACK', if_true: files('ipack.c', 'tpci200.c'))
1063
+system_ss.add(when: 'CONFIG_IPACK', if_true: files('ipack.c', 'tpci200.c'))
1064
diff --git a/hw/ipmi/meson.build b/hw/ipmi/meson.build
1065
index XXXXXXX..XXXXXXX 100644
1066
--- a/hw/ipmi/meson.build
1067
+++ b/hw/ipmi/meson.build
1068
@@ -XXX,XX +XXX,XX @@ ipmi_ss.add(when: 'CONFIG_ISA_IPMI_BT', if_true: files('isa_ipmi_bt.c'))
1069
ipmi_ss.add(when: 'CONFIG_PCI_IPMI_BT', if_true: files('pci_ipmi_bt.c'))
1070
ipmi_ss.add(when: 'CONFIG_IPMI_SSIF', if_true: files('smbus_ipmi.c'))
1071
1072
-softmmu_ss.add_all(when: 'CONFIG_IPMI', if_true: ipmi_ss)
1073
+system_ss.add_all(when: 'CONFIG_IPMI', if_true: ipmi_ss)
1074
diff --git a/hw/isa/meson.build b/hw/isa/meson.build
1075
index XXXXXXX..XXXXXXX 100644
1076
--- a/hw/isa/meson.build
1077
+++ b/hw/isa/meson.build
1078
@@ -XXX,XX +XXX,XX @@
1079
-softmmu_ss.add(when: 'CONFIG_APM', if_true: files('apm.c'))
1080
-softmmu_ss.add(when: 'CONFIG_I82378', if_true: files('i82378.c'))
1081
-softmmu_ss.add(when: 'CONFIG_ISA_BUS', if_true: files('isa-bus.c'))
1082
-softmmu_ss.add(when: 'CONFIG_ISA_SUPERIO', if_true: files('isa-superio.c'))
1083
-softmmu_ss.add(when: 'CONFIG_PC87312', if_true: files('pc87312.c'))
1084
-softmmu_ss.add(when: 'CONFIG_PIIX3', if_true: files('piix3.c'))
1085
-softmmu_ss.add(when: 'CONFIG_PIIX4', if_true: files('piix4.c'))
1086
-softmmu_ss.add(when: 'CONFIG_SMC37C669', if_true: files('smc37c669-superio.c'))
1087
-softmmu_ss.add(when: 'CONFIG_VT82C686', if_true: files('vt82c686.c'))
1088
+system_ss.add(when: 'CONFIG_APM', if_true: files('apm.c'))
1089
+system_ss.add(when: 'CONFIG_I82378', if_true: files('i82378.c'))
1090
+system_ss.add(when: 'CONFIG_ISA_BUS', if_true: files('isa-bus.c'))
1091
+system_ss.add(when: 'CONFIG_ISA_SUPERIO', if_true: files('isa-superio.c'))
1092
+system_ss.add(when: 'CONFIG_PC87312', if_true: files('pc87312.c'))
1093
+system_ss.add(when: 'CONFIG_PIIX3', if_true: files('piix3.c'))
1094
+system_ss.add(when: 'CONFIG_PIIX4', if_true: files('piix4.c'))
1095
+system_ss.add(when: 'CONFIG_SMC37C669', if_true: files('smc37c669-superio.c'))
1096
+system_ss.add(when: 'CONFIG_VT82C686', if_true: files('vt82c686.c'))
1097
1098
specific_ss.add(when: 'CONFIG_LPC_ICH9', if_true: files('lpc_ich9.c'))
1099
diff --git a/hw/mem/meson.build b/hw/mem/meson.build
1100
index XXXXXXX..XXXXXXX 100644
1101
--- a/hw/mem/meson.build
1102
+++ b/hw/mem/meson.build
1103
@@ -XXX,XX +XXX,XX @@ mem_ss.add(when: 'CONFIG_DIMM', if_true: files('pc-dimm.c'))
1104
mem_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_mc.c'))
1105
mem_ss.add(when: 'CONFIG_NVDIMM', if_true: files('nvdimm.c'))
1106
mem_ss.add(when: 'CONFIG_CXL_MEM_DEVICE', if_true: files('cxl_type3.c'))
1107
-softmmu_ss.add(when: 'CONFIG_CXL_MEM_DEVICE', if_false: files('cxl_type3_stubs.c'))
1108
-softmmu_ss.add(when: 'CONFIG_ALL', if_true: files('cxl_type3_stubs.c'))
1109
+system_ss.add(when: 'CONFIG_CXL_MEM_DEVICE', if_false: files('cxl_type3_stubs.c'))
1110
+system_ss.add(when: 'CONFIG_ALL', if_true: files('cxl_type3_stubs.c'))
1111
1112
-softmmu_ss.add_all(when: 'CONFIG_MEM_DEVICE', if_true: mem_ss)
1113
+system_ss.add_all(when: 'CONFIG_MEM_DEVICE', if_true: mem_ss)
1114
1115
-softmmu_ss.add(when: 'CONFIG_SPARSE_MEM', if_true: files('sparse-mem.c'))
1116
+system_ss.add(when: 'CONFIG_SPARSE_MEM', if_true: files('sparse-mem.c'))
1117
diff --git a/hw/misc/macio/meson.build b/hw/misc/macio/meson.build
1118
index XXXXXXX..XXXXXXX 100644
1119
--- a/hw/misc/macio/meson.build
1120
+++ b/hw/misc/macio/meson.build
1121
@@ -XXX,XX +XXX,XX @@ macio_ss.add(when: 'CONFIG_MACIO_GPIO', if_true: files('gpio.c'))
1122
macio_ss.add(when: 'CONFIG_MAC_DBDMA', if_true: files('mac_dbdma.c'))
1123
macio_ss.add(when: 'CONFIG_MAC_PMU', if_true: files('pmu.c'))
1124
1125
-softmmu_ss.add_all(when: 'CONFIG_MACIO', if_true: macio_ss)
1126
+system_ss.add_all(when: 'CONFIG_MACIO', if_true: macio_ss)
1127
diff --git a/hw/misc/meson.build b/hw/misc/meson.build
1128
index XXXXXXX..XXXXXXX 100644
1129
--- a/hw/misc/meson.build
1130
+++ b/hw/misc/meson.build
1131
@@ -XXX,XX +XXX,XX @@
1132
-softmmu_ss.add(when: 'CONFIG_APPLESMC', if_true: files('applesmc.c'))
1133
-softmmu_ss.add(when: 'CONFIG_EDU', if_true: files('edu.c'))
1134
-softmmu_ss.add(when: 'CONFIG_FW_CFG_DMA', if_true: files('vmcoreinfo.c'))
1135
-softmmu_ss.add(when: 'CONFIG_ISA_DEBUG', if_true: files('debugexit.c'))
1136
-softmmu_ss.add(when: 'CONFIG_ISA_TESTDEV', if_true: files('pc-testdev.c'))
1137
-softmmu_ss.add(when: 'CONFIG_PCA9552', if_true: files('pca9552.c'))
1138
-softmmu_ss.add(when: 'CONFIG_PCI_TESTDEV', if_true: files('pci-testdev.c'))
1139
-softmmu_ss.add(when: 'CONFIG_UNIMP', if_true: files('unimp.c'))
1140
-softmmu_ss.add(when: 'CONFIG_EMPTY_SLOT', if_true: files('empty_slot.c'))
1141
-softmmu_ss.add(when: 'CONFIG_LED', if_true: files('led.c'))
1142
-softmmu_ss.add(when: 'CONFIG_PVPANIC_COMMON', if_true: files('pvpanic.c'))
1143
+system_ss.add(when: 'CONFIG_APPLESMC', if_true: files('applesmc.c'))
1144
+system_ss.add(when: 'CONFIG_EDU', if_true: files('edu.c'))
1145
+system_ss.add(when: 'CONFIG_FW_CFG_DMA', if_true: files('vmcoreinfo.c'))
1146
+system_ss.add(when: 'CONFIG_ISA_DEBUG', if_true: files('debugexit.c'))
1147
+system_ss.add(when: 'CONFIG_ISA_TESTDEV', if_true: files('pc-testdev.c'))
1148
+system_ss.add(when: 'CONFIG_PCA9552', if_true: files('pca9552.c'))
1149
+system_ss.add(when: 'CONFIG_PCI_TESTDEV', if_true: files('pci-testdev.c'))
1150
+system_ss.add(when: 'CONFIG_UNIMP', if_true: files('unimp.c'))
1151
+system_ss.add(when: 'CONFIG_EMPTY_SLOT', if_true: files('empty_slot.c'))
1152
+system_ss.add(when: 'CONFIG_LED', if_true: files('led.c'))
1153
+system_ss.add(when: 'CONFIG_PVPANIC_COMMON', if_true: files('pvpanic.c'))
1154
1155
# ARM devices
1156
-softmmu_ss.add(when: 'CONFIG_PL310', if_true: files('arm_l2x0.c'))
1157
-softmmu_ss.add(when: 'CONFIG_INTEGRATOR_DEBUG', if_true: files('arm_integrator_debug.c'))
1158
-softmmu_ss.add(when: 'CONFIG_A9SCU', if_true: files('a9scu.c'))
1159
-softmmu_ss.add(when: 'CONFIG_ARM11SCU', if_true: files('arm11scu.c'))
1160
+system_ss.add(when: 'CONFIG_PL310', if_true: files('arm_l2x0.c'))
1161
+system_ss.add(when: 'CONFIG_INTEGRATOR_DEBUG', if_true: files('arm_integrator_debug.c'))
1162
+system_ss.add(when: 'CONFIG_A9SCU', if_true: files('a9scu.c'))
1163
+system_ss.add(when: 'CONFIG_ARM11SCU', if_true: files('arm11scu.c'))
1164
1165
-softmmu_ss.add(when: 'CONFIG_ARM_V7M', if_true: files('armv7m_ras.c'))
1166
+system_ss.add(when: 'CONFIG_ARM_V7M', if_true: files('armv7m_ras.c'))
1167
1168
# Mac devices
1169
-softmmu_ss.add(when: 'CONFIG_MOS6522', if_true: files('mos6522.c'))
1170
+system_ss.add(when: 'CONFIG_MOS6522', if_true: files('mos6522.c'))
1171
1172
# virt devices
1173
-softmmu_ss.add(when: 'CONFIG_VIRT_CTRL', if_true: files('virt_ctrl.c'))
1174
+system_ss.add(when: 'CONFIG_VIRT_CTRL', if_true: files('virt_ctrl.c'))
1175
1176
# RISC-V devices
1177
-softmmu_ss.add(when: 'CONFIG_MCHP_PFSOC_DMC', if_true: files('mchp_pfsoc_dmc.c'))
1178
-softmmu_ss.add(when: 'CONFIG_MCHP_PFSOC_IOSCB', if_true: files('mchp_pfsoc_ioscb.c'))
1179
-softmmu_ss.add(when: 'CONFIG_MCHP_PFSOC_SYSREG', if_true: files('mchp_pfsoc_sysreg.c'))
1180
-softmmu_ss.add(when: 'CONFIG_SIFIVE_TEST', if_true: files('sifive_test.c'))
1181
-softmmu_ss.add(when: 'CONFIG_SIFIVE_E_PRCI', if_true: files('sifive_e_prci.c'))
1182
-softmmu_ss.add(when: 'CONFIG_SIFIVE_U_OTP', if_true: files('sifive_u_otp.c'))
1183
-softmmu_ss.add(when: 'CONFIG_SIFIVE_U_PRCI', if_true: files('sifive_u_prci.c'))
1184
+system_ss.add(when: 'CONFIG_MCHP_PFSOC_DMC', if_true: files('mchp_pfsoc_dmc.c'))
1185
+system_ss.add(when: 'CONFIG_MCHP_PFSOC_IOSCB', if_true: files('mchp_pfsoc_ioscb.c'))
1186
+system_ss.add(when: 'CONFIG_MCHP_PFSOC_SYSREG', if_true: files('mchp_pfsoc_sysreg.c'))
1187
+system_ss.add(when: 'CONFIG_SIFIVE_TEST', if_true: files('sifive_test.c'))
1188
+system_ss.add(when: 'CONFIG_SIFIVE_E_PRCI', if_true: files('sifive_e_prci.c'))
1189
+system_ss.add(when: 'CONFIG_SIFIVE_U_OTP', if_true: files('sifive_u_otp.c'))
1190
+system_ss.add(when: 'CONFIG_SIFIVE_U_PRCI', if_true: files('sifive_u_prci.c'))
1191
1192
subdir('macio')
1193
1194
-softmmu_ss.add(when: 'CONFIG_IVSHMEM_DEVICE', if_true: files('ivshmem.c'))
1195
+system_ss.add(when: 'CONFIG_IVSHMEM_DEVICE', if_true: files('ivshmem.c'))
1196
1197
-softmmu_ss.add(when: 'CONFIG_ALLWINNER_SRAMC', if_true: files('allwinner-sramc.c'))
1198
-softmmu_ss.add(when: 'CONFIG_ALLWINNER_A10_CCM', if_true: files('allwinner-a10-ccm.c'))
1199
-softmmu_ss.add(when: 'CONFIG_ALLWINNER_A10_DRAMC', if_true: files('allwinner-a10-dramc.c'))
1200
-softmmu_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-h3-ccu.c'))
1201
+system_ss.add(when: 'CONFIG_ALLWINNER_SRAMC', if_true: files('allwinner-sramc.c'))
1202
+system_ss.add(when: 'CONFIG_ALLWINNER_A10_CCM', if_true: files('allwinner-a10-ccm.c'))
1203
+system_ss.add(when: 'CONFIG_ALLWINNER_A10_DRAMC', if_true: files('allwinner-a10-dramc.c'))
1204
+system_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-h3-ccu.c'))
1205
specific_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-cpucfg.c'))
1206
-softmmu_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-h3-dramc.c'))
1207
-softmmu_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-h3-sysctrl.c'))
1208
-softmmu_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-sid.c'))
1209
-softmmu_ss.add(when: 'CONFIG_ALLWINNER_R40', if_true: files('allwinner-r40-ccu.c'))
1210
-softmmu_ss.add(when: 'CONFIG_ALLWINNER_R40', if_true: files('allwinner-r40-dramc.c'))
1211
-softmmu_ss.add(when: 'CONFIG_AXP2XX_PMU', if_true: files('axp2xx.c'))
1212
-softmmu_ss.add(when: 'CONFIG_REALVIEW', if_true: files('arm_sysctl.c'))
1213
-softmmu_ss.add(when: 'CONFIG_NSERIES', if_true: files('cbus.c'))
1214
-softmmu_ss.add(when: 'CONFIG_ECCMEMCTL', if_true: files('eccmemctl.c'))
1215
-softmmu_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_pmu.c', 'exynos4210_clk.c', 'exynos4210_rng.c'))
1216
-softmmu_ss.add(when: 'CONFIG_IMX', if_true: files(
1217
+system_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-h3-dramc.c'))
1218
+system_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-h3-sysctrl.c'))
1219
+system_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-sid.c'))
1220
+system_ss.add(when: 'CONFIG_ALLWINNER_R40', if_true: files('allwinner-r40-ccu.c'))
1221
+system_ss.add(when: 'CONFIG_ALLWINNER_R40', if_true: files('allwinner-r40-dramc.c'))
1222
+system_ss.add(when: 'CONFIG_AXP2XX_PMU', if_true: files('axp2xx.c'))
1223
+system_ss.add(when: 'CONFIG_REALVIEW', if_true: files('arm_sysctl.c'))
1224
+system_ss.add(when: 'CONFIG_NSERIES', if_true: files('cbus.c'))
1225
+system_ss.add(when: 'CONFIG_ECCMEMCTL', if_true: files('eccmemctl.c'))
1226
+system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_pmu.c', 'exynos4210_clk.c', 'exynos4210_rng.c'))
1227
+system_ss.add(when: 'CONFIG_IMX', if_true: files(
1228
'imx25_ccm.c',
1229
'imx31_ccm.c',
1230
'imx6_ccm.c',
1231
@@ -XXX,XX +XXX,XX @@ softmmu_ss.add(when: 'CONFIG_IMX', if_true: files(
1232
'imx_ccm.c',
1233
'imx_rngc.c',
1234
))
1235
-softmmu_ss.add(when: 'CONFIG_MAINSTONE', if_true: files('mst_fpga.c'))
1236
-softmmu_ss.add(when: 'CONFIG_NPCM7XX', if_true: files(
1237
+system_ss.add(when: 'CONFIG_MAINSTONE', if_true: files('mst_fpga.c'))
1238
+system_ss.add(when: 'CONFIG_NPCM7XX', if_true: files(
1239
'npcm7xx_clk.c',
1240
'npcm7xx_gcr.c',
1241
'npcm7xx_mft.c',
1242
'npcm7xx_pwm.c',
1243
'npcm7xx_rng.c',
1244
))
1245
-softmmu_ss.add(when: 'CONFIG_OMAP', if_true: files(
1246
+system_ss.add(when: 'CONFIG_OMAP', if_true: files(
1247
'omap_clk.c',
1248
'omap_gpmc.c',
1249
'omap_l4.c',
1250
'omap_sdrc.c',
1251
'omap_tap.c',
1252
))
1253
-softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files(
1254
+system_ss.add(when: 'CONFIG_RASPI', if_true: files(
1255
'bcm2835_mbox.c',
1256
'bcm2835_mphi.c',
1257
'bcm2835_property.c',
1258
@@ -XXX,XX +XXX,XX @@ softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files(
1259
'bcm2835_cprman.c',
1260
'bcm2835_powermgt.c',
1261
))
1262
-softmmu_ss.add(when: 'CONFIG_SLAVIO', if_true: files('slavio_misc.c'))
1263
-softmmu_ss.add(when: 'CONFIG_ZYNQ', if_true: files('zynq_slcr.c'))
1264
-softmmu_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx-zynqmp-crf.c'))
1265
-softmmu_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx-zynqmp-apu-ctrl.c'))
1266
+system_ss.add(when: 'CONFIG_SLAVIO', if_true: files('slavio_misc.c'))
1267
+system_ss.add(when: 'CONFIG_ZYNQ', if_true: files('zynq_slcr.c'))
1268
+system_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx-zynqmp-crf.c'))
1269
+system_ss.add(when: 'CONFIG_XLNX_ZYNQMP_ARM', if_true: files('xlnx-zynqmp-apu-ctrl.c'))
1270
specific_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files('xlnx-versal-crl.c'))
1271
-softmmu_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files(
1272
+system_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files(
1273
'xlnx-versal-xramc.c',
1274
'xlnx-versal-pmc-iou-slcr.c',
1275
))
1276
-softmmu_ss.add(when: 'CONFIG_STM32F2XX_SYSCFG', if_true: files('stm32f2xx_syscfg.c'))
1277
-softmmu_ss.add(when: 'CONFIG_STM32F4XX_SYSCFG', if_true: files('stm32f4xx_syscfg.c'))
1278
-softmmu_ss.add(when: 'CONFIG_STM32F4XX_EXTI', if_true: files('stm32f4xx_exti.c'))
1279
-softmmu_ss.add(when: 'CONFIG_MPS2_FPGAIO', if_true: files('mps2-fpgaio.c'))
1280
-softmmu_ss.add(when: 'CONFIG_MPS2_SCC', if_true: files('mps2-scc.c'))
1281
+system_ss.add(when: 'CONFIG_STM32F2XX_SYSCFG', if_true: files('stm32f2xx_syscfg.c'))
1282
+system_ss.add(when: 'CONFIG_STM32F4XX_SYSCFG', if_true: files('stm32f4xx_syscfg.c'))
1283
+system_ss.add(when: 'CONFIG_STM32F4XX_EXTI', if_true: files('stm32f4xx_exti.c'))
1284
+system_ss.add(when: 'CONFIG_MPS2_FPGAIO', if_true: files('mps2-fpgaio.c'))
1285
+system_ss.add(when: 'CONFIG_MPS2_SCC', if_true: files('mps2-scc.c'))
1286
1287
-softmmu_ss.add(when: 'CONFIG_TZ_MPC', if_true: files('tz-mpc.c'))
1288
-softmmu_ss.add(when: 'CONFIG_TZ_MSC', if_true: files('tz-msc.c'))
1289
-softmmu_ss.add(when: 'CONFIG_TZ_PPC', if_true: files('tz-ppc.c'))
1290
-softmmu_ss.add(when: 'CONFIG_IOTKIT_SECCTL', if_true: files('iotkit-secctl.c'))
1291
-softmmu_ss.add(when: 'CONFIG_IOTKIT_SYSCTL', if_true: files('iotkit-sysctl.c'))
1292
-softmmu_ss.add(when: 'CONFIG_IOTKIT_SYSINFO', if_true: files('iotkit-sysinfo.c'))
1293
-softmmu_ss.add(when: 'CONFIG_ARMSSE_CPU_PWRCTRL', if_true: files('armsse-cpu-pwrctrl.c'))
1294
-softmmu_ss.add(when: 'CONFIG_ARMSSE_CPUID', if_true: files('armsse-cpuid.c'))
1295
-softmmu_ss.add(when: 'CONFIG_ARMSSE_MHU', if_true: files('armsse-mhu.c'))
1296
+system_ss.add(when: 'CONFIG_TZ_MPC', if_true: files('tz-mpc.c'))
1297
+system_ss.add(when: 'CONFIG_TZ_MSC', if_true: files('tz-msc.c'))
1298
+system_ss.add(when: 'CONFIG_TZ_PPC', if_true: files('tz-ppc.c'))
1299
+system_ss.add(when: 'CONFIG_IOTKIT_SECCTL', if_true: files('iotkit-secctl.c'))
1300
+system_ss.add(when: 'CONFIG_IOTKIT_SYSCTL', if_true: files('iotkit-sysctl.c'))
1301
+system_ss.add(when: 'CONFIG_IOTKIT_SYSINFO', if_true: files('iotkit-sysinfo.c'))
1302
+system_ss.add(when: 'CONFIG_ARMSSE_CPU_PWRCTRL', if_true: files('armsse-cpu-pwrctrl.c'))
1303
+system_ss.add(when: 'CONFIG_ARMSSE_CPUID', if_true: files('armsse-cpuid.c'))
1304
+system_ss.add(when: 'CONFIG_ARMSSE_MHU', if_true: files('armsse-mhu.c'))
1305
1306
-softmmu_ss.add(when: 'CONFIG_PVPANIC_ISA', if_true: files('pvpanic-isa.c'))
1307
-softmmu_ss.add(when: 'CONFIG_PVPANIC_PCI', if_true: files('pvpanic-pci.c'))
1308
-softmmu_ss.add(when: 'CONFIG_AUX', if_true: files('auxbus.c'))
1309
-softmmu_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
1310
+system_ss.add(when: 'CONFIG_PVPANIC_ISA', if_true: files('pvpanic-isa.c'))
1311
+system_ss.add(when: 'CONFIG_PVPANIC_PCI', if_true: files('pvpanic-pci.c'))
1312
+system_ss.add(when: 'CONFIG_AUX', if_true: files('auxbus.c'))
1313
+system_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
1314
'aspeed_hace.c',
1315
'aspeed_i3c.c',
1316
'aspeed_lpc.c',
1317
@@ -XXX,XX +XXX,XX @@ softmmu_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files(
1318
'aspeed_xdma.c',
1319
'aspeed_peci.c'))
1320
1321
-softmmu_ss.add(when: 'CONFIG_MSF2', if_true: files('msf2-sysreg.c'))
1322
-softmmu_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_rng.c'))
1323
+system_ss.add(when: 'CONFIG_MSF2', if_true: files('msf2-sysreg.c'))
1324
+system_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_rng.c'))
1325
1326
-softmmu_ss.add(when: 'CONFIG_GRLIB', if_true: files('grlib_ahb_apb_pnp.c'))
1327
+system_ss.add(when: 'CONFIG_GRLIB', if_true: files('grlib_ahb_apb_pnp.c'))
1328
1329
-softmmu_ss.add(when: 'CONFIG_I2C', if_true: files('i2c-echo.c'))
1330
+system_ss.add(when: 'CONFIG_I2C', if_true: files('i2c-echo.c'))
1331
1332
specific_ss.add(when: 'CONFIG_AVR_POWER', if_true: files('avr_power.c'))
1333
1334
@@ -XXX,XX +XXX,XX @@ specific_ss.add(when: 'CONFIG_MAC_VIA', if_true: files('mac_via.c'))
1335
specific_ss.add(when: 'CONFIG_MIPS_CPS', if_true: files('mips_cmgcr.c', 'mips_cpc.c'))
1336
specific_ss.add(when: 'CONFIG_MIPS_ITU', if_true: files('mips_itu.c'))
1337
1338
-softmmu_ss.add(when: 'CONFIG_SBSA_REF', if_true: files('sbsa_ec.c'))
1339
+system_ss.add(when: 'CONFIG_SBSA_REF', if_true: files('sbsa_ec.c'))
1340
1341
# HPPA devices
1342
-softmmu_ss.add(when: 'CONFIG_LASI', if_true: files('lasi.c'))
1343
+system_ss.add(when: 'CONFIG_LASI', if_true: files('lasi.c'))
1344
diff --git a/hw/net/can/meson.build b/hw/net/can/meson.build
1345
index XXXXXXX..XXXXXXX 100644
1346
--- a/hw/net/can/meson.build
1347
+++ b/hw/net/can/meson.build
1348
@@ -XXX,XX +XXX,XX @@
1349
-softmmu_ss.add(when: 'CONFIG_CAN_SJA1000', if_true: files('can_sja1000.c'))
1350
-softmmu_ss.add(when: 'CONFIG_CAN_PCI', if_true: files('can_kvaser_pci.c'))
1351
-softmmu_ss.add(when: 'CONFIG_CAN_PCI', if_true: files('can_pcm3680_pci.c'))
1352
-softmmu_ss.add(when: 'CONFIG_CAN_PCI', if_true: files('can_mioe3680_pci.c'))
1353
-softmmu_ss.add(when: 'CONFIG_CAN_CTUCANFD', if_true: files('ctucan_core.c'))
1354
-softmmu_ss.add(when: 'CONFIG_CAN_CTUCANFD_PCI', if_true: files('ctucan_pci.c'))
1355
-softmmu_ss.add(when: 'CONFIG_XLNX_ZYNQMP', if_true: files('xlnx-zynqmp-can.c'))
1356
-softmmu_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files('xlnx-versal-canfd.c'))
1357
+system_ss.add(when: 'CONFIG_CAN_SJA1000', if_true: files('can_sja1000.c'))
1358
+system_ss.add(when: 'CONFIG_CAN_PCI', if_true: files('can_kvaser_pci.c'))
1359
+system_ss.add(when: 'CONFIG_CAN_PCI', if_true: files('can_pcm3680_pci.c'))
1360
+system_ss.add(when: 'CONFIG_CAN_PCI', if_true: files('can_mioe3680_pci.c'))
1361
+system_ss.add(when: 'CONFIG_CAN_CTUCANFD', if_true: files('ctucan_core.c'))
1362
+system_ss.add(when: 'CONFIG_CAN_CTUCANFD_PCI', if_true: files('ctucan_pci.c'))
1363
+system_ss.add(when: 'CONFIG_XLNX_ZYNQMP', if_true: files('xlnx-zynqmp-can.c'))
1364
+system_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files('xlnx-versal-canfd.c'))
1365
diff --git a/hw/net/meson.build b/hw/net/meson.build
1366
index XXXXXXX..XXXXXXX 100644
1367
--- a/hw/net/meson.build
1368
+++ b/hw/net/meson.build
1369
@@ -XXX,XX +XXX,XX @@
1370
-softmmu_ss.add(when: 'CONFIG_DP8393X', if_true: files('dp8393x.c'))
1371
-softmmu_ss.add(when: 'CONFIG_XEN', if_true: files('xen_nic.c'))
1372
-softmmu_ss.add(when: 'CONFIG_NE2000_COMMON', if_true: files('ne2000.c'))
1373
+system_ss.add(when: 'CONFIG_DP8393X', if_true: files('dp8393x.c'))
1374
+system_ss.add(when: 'CONFIG_XEN', if_true: files('xen_nic.c'))
1375
+system_ss.add(when: 'CONFIG_NE2000_COMMON', if_true: files('ne2000.c'))
1376
1377
# PCI network cards
1378
-softmmu_ss.add(when: 'CONFIG_NE2000_PCI', if_true: files('ne2000-pci.c'))
1379
-softmmu_ss.add(when: 'CONFIG_EEPRO100_PCI', if_true: files('eepro100.c'))
1380
-softmmu_ss.add(when: 'CONFIG_PCNET_PCI', if_true: files('pcnet-pci.c'))
1381
-softmmu_ss.add(when: 'CONFIG_PCNET_COMMON', if_true: files('pcnet.c'))
1382
-softmmu_ss.add(when: 'CONFIG_E1000_PCI', if_true: files('e1000.c', 'e1000x_common.c'))
1383
-softmmu_ss.add(when: 'CONFIG_E1000E_PCI_EXPRESS', if_true: files('net_tx_pkt.c', 'net_rx_pkt.c'))
1384
-softmmu_ss.add(when: 'CONFIG_E1000E_PCI_EXPRESS', if_true: files('e1000e.c', 'e1000e_core.c', 'e1000x_common.c'))
1385
-softmmu_ss.add(when: 'CONFIG_IGB_PCI_EXPRESS', if_true: files('net_tx_pkt.c', 'net_rx_pkt.c'))
1386
-softmmu_ss.add(when: 'CONFIG_IGB_PCI_EXPRESS', if_true: files('igb.c', 'igbvf.c', 'igb_core.c'))
1387
-softmmu_ss.add(when: 'CONFIG_RTL8139_PCI', if_true: files('rtl8139.c'))
1388
-softmmu_ss.add(when: 'CONFIG_TULIP', if_true: files('tulip.c'))
1389
-softmmu_ss.add(when: 'CONFIG_VMXNET3_PCI', if_true: files('net_tx_pkt.c', 'net_rx_pkt.c'))
1390
-softmmu_ss.add(when: 'CONFIG_VMXNET3_PCI', if_true: files('vmxnet3.c'))
1391
+system_ss.add(when: 'CONFIG_NE2000_PCI', if_true: files('ne2000-pci.c'))
1392
+system_ss.add(when: 'CONFIG_EEPRO100_PCI', if_true: files('eepro100.c'))
1393
+system_ss.add(when: 'CONFIG_PCNET_PCI', if_true: files('pcnet-pci.c'))
1394
+system_ss.add(when: 'CONFIG_PCNET_COMMON', if_true: files('pcnet.c'))
1395
+system_ss.add(when: 'CONFIG_E1000_PCI', if_true: files('e1000.c', 'e1000x_common.c'))
1396
+system_ss.add(when: 'CONFIG_E1000E_PCI_EXPRESS', if_true: files('net_tx_pkt.c', 'net_rx_pkt.c'))
1397
+system_ss.add(when: 'CONFIG_E1000E_PCI_EXPRESS', if_true: files('e1000e.c', 'e1000e_core.c', 'e1000x_common.c'))
1398
+system_ss.add(when: 'CONFIG_IGB_PCI_EXPRESS', if_true: files('net_tx_pkt.c', 'net_rx_pkt.c'))
1399
+system_ss.add(when: 'CONFIG_IGB_PCI_EXPRESS', if_true: files('igb.c', 'igbvf.c', 'igb_core.c'))
1400
+system_ss.add(when: 'CONFIG_RTL8139_PCI', if_true: files('rtl8139.c'))
1401
+system_ss.add(when: 'CONFIG_TULIP', if_true: files('tulip.c'))
1402
+system_ss.add(when: 'CONFIG_VMXNET3_PCI', if_true: files('net_tx_pkt.c', 'net_rx_pkt.c'))
1403
+system_ss.add(when: 'CONFIG_VMXNET3_PCI', if_true: files('vmxnet3.c'))
1404
1405
-softmmu_ss.add(when: 'CONFIG_SMC91C111', if_true: files('smc91c111.c'))
1406
-softmmu_ss.add(when: 'CONFIG_LAN9118', if_true: files('lan9118.c'))
1407
-softmmu_ss.add(when: 'CONFIG_NE2000_ISA', if_true: files('ne2000-isa.c'))
1408
-softmmu_ss.add(when: 'CONFIG_OPENCORES_ETH', if_true: files('opencores_eth.c'))
1409
-softmmu_ss.add(when: 'CONFIG_XGMAC', if_true: files('xgmac.c'))
1410
-softmmu_ss.add(when: 'CONFIG_MIPSNET', if_true: files('mipsnet.c'))
1411
-softmmu_ss.add(when: 'CONFIG_XILINX_AXI', if_true: files('xilinx_axienet.c'))
1412
-softmmu_ss.add(when: 'CONFIG_ALLWINNER_EMAC', if_true: files('allwinner_emac.c'))
1413
-softmmu_ss.add(when: 'CONFIG_ALLWINNER_SUN8I_EMAC', if_true: files('allwinner-sun8i-emac.c'))
1414
-softmmu_ss.add(when: 'CONFIG_IMX_FEC', if_true: files('imx_fec.c'))
1415
-softmmu_ss.add(when: 'CONFIG_MSF2', if_true: files('msf2-emac.c'))
1416
-softmmu_ss.add(when: 'CONFIG_MARVELL_88W8618', if_true: files('mv88w8618_eth.c'))
1417
+system_ss.add(when: 'CONFIG_SMC91C111', if_true: files('smc91c111.c'))
1418
+system_ss.add(when: 'CONFIG_LAN9118', if_true: files('lan9118.c'))
1419
+system_ss.add(when: 'CONFIG_NE2000_ISA', if_true: files('ne2000-isa.c'))
1420
+system_ss.add(when: 'CONFIG_OPENCORES_ETH', if_true: files('opencores_eth.c'))
1421
+system_ss.add(when: 'CONFIG_XGMAC', if_true: files('xgmac.c'))
1422
+system_ss.add(when: 'CONFIG_MIPSNET', if_true: files('mipsnet.c'))
1423
+system_ss.add(when: 'CONFIG_XILINX_AXI', if_true: files('xilinx_axienet.c'))
1424
+system_ss.add(when: 'CONFIG_ALLWINNER_EMAC', if_true: files('allwinner_emac.c'))
1425
+system_ss.add(when: 'CONFIG_ALLWINNER_SUN8I_EMAC', if_true: files('allwinner-sun8i-emac.c'))
1426
+system_ss.add(when: 'CONFIG_IMX_FEC', if_true: files('imx_fec.c'))
1427
+system_ss.add(when: 'CONFIG_MSF2', if_true: files('msf2-emac.c'))
1428
+system_ss.add(when: 'CONFIG_MARVELL_88W8618', if_true: files('mv88w8618_eth.c'))
1429
1430
-softmmu_ss.add(when: 'CONFIG_CADENCE', if_true: files('cadence_gem.c'))
1431
-softmmu_ss.add(when: 'CONFIG_STELLARIS_ENET', if_true: files('stellaris_enet.c'))
1432
-softmmu_ss.add(when: 'CONFIG_LANCE', if_true: files('lance.c'))
1433
-softmmu_ss.add(when: 'CONFIG_LASI_I82596', if_true: files('lasi_i82596.c'))
1434
-softmmu_ss.add(when: 'CONFIG_I82596_COMMON', if_true: files('i82596.c'))
1435
-softmmu_ss.add(when: 'CONFIG_SUNHME', if_true: files('sunhme.c'))
1436
-softmmu_ss.add(when: 'CONFIG_FTGMAC100', if_true: files('ftgmac100.c'))
1437
-softmmu_ss.add(when: 'CONFIG_SUNGEM', if_true: files('sungem.c'))
1438
-softmmu_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_emc.c'))
1439
+system_ss.add(when: 'CONFIG_CADENCE', if_true: files('cadence_gem.c'))
1440
+system_ss.add(when: 'CONFIG_STELLARIS_ENET', if_true: files('stellaris_enet.c'))
1441
+system_ss.add(when: 'CONFIG_LANCE', if_true: files('lance.c'))
1442
+system_ss.add(when: 'CONFIG_LASI_I82596', if_true: files('lasi_i82596.c'))
1443
+system_ss.add(when: 'CONFIG_I82596_COMMON', if_true: files('i82596.c'))
1444
+system_ss.add(when: 'CONFIG_SUNHME', if_true: files('sunhme.c'))
1445
+system_ss.add(when: 'CONFIG_FTGMAC100', if_true: files('ftgmac100.c'))
1446
+system_ss.add(when: 'CONFIG_SUNGEM', if_true: files('sungem.c'))
1447
+system_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_emc.c'))
1448
1449
-softmmu_ss.add(when: 'CONFIG_ETRAXFS', if_true: files('etraxfs_eth.c'))
1450
-softmmu_ss.add(when: 'CONFIG_COLDFIRE', if_true: files('mcf_fec.c'))
1451
+system_ss.add(when: 'CONFIG_ETRAXFS', if_true: files('etraxfs_eth.c'))
1452
+system_ss.add(when: 'CONFIG_COLDFIRE', if_true: files('mcf_fec.c'))
1453
specific_ss.add(when: 'CONFIG_PSERIES', if_true: files('spapr_llan.c'))
1454
-softmmu_ss.add(when: 'CONFIG_XILINX_ETHLITE', if_true: files('xilinx_ethlite.c'))
1455
+system_ss.add(when: 'CONFIG_XILINX_ETHLITE', if_true: files('xilinx_ethlite.c'))
1456
1457
-softmmu_ss.add(when: 'CONFIG_VIRTIO_NET', if_true: files('net_rx_pkt.c'))
1458
+system_ss.add(when: 'CONFIG_VIRTIO_NET', if_true: files('net_rx_pkt.c'))
1459
specific_ss.add(when: 'CONFIG_VIRTIO_NET', if_true: files('virtio-net.c'))
1460
1461
if have_vhost_net
1462
- softmmu_ss.add(when: 'CONFIG_VIRTIO_NET', if_true: files('vhost_net.c'), if_false: files('vhost_net-stub.c'))
1463
- softmmu_ss.add(when: 'CONFIG_ALL', if_true: files('vhost_net-stub.c'))
1464
+ system_ss.add(when: 'CONFIG_VIRTIO_NET', if_true: files('vhost_net.c'), if_false: files('vhost_net-stub.c'))
1465
+ system_ss.add(when: 'CONFIG_ALL', if_true: files('vhost_net-stub.c'))
1466
else
1467
- softmmu_ss.add(files('vhost_net-stub.c'))
1468
+ system_ss.add(files('vhost_net-stub.c'))
1469
endif
1470
1471
-softmmu_ss.add(when: 'CONFIG_ETSEC', if_true: files(
1472
+system_ss.add(when: 'CONFIG_ETSEC', if_true: files(
1473
'fsl_etsec/etsec.c',
1474
'fsl_etsec/miim.c',
1475
'fsl_etsec/registers.c',
1476
'fsl_etsec/rings.c',
1477
))
1478
1479
-softmmu_ss.add(when: 'CONFIG_ROCKER', if_true: files(
1480
+system_ss.add(when: 'CONFIG_ROCKER', if_true: files(
1481
'rocker/rocker.c',
1482
'rocker/rocker_desc.c',
1483
'rocker/rocker_fp.c',
1484
'rocker/rocker_of_dpa.c',
1485
'rocker/rocker_world.c',
1486
), if_false: files('rocker/qmp-norocker.c'))
1487
-softmmu_ss.add(when: 'CONFIG_ALL', if_true: files('rocker/qmp-norocker.c'))
1488
-softmmu_ss.add(files('rocker/rocker-hmp-cmds.c'))
1489
+system_ss.add(when: 'CONFIG_ALL', if_true: files('rocker/qmp-norocker.c'))
1490
+system_ss.add(files('rocker/rocker-hmp-cmds.c'))
1491
1492
subdir('can')
1493
diff --git a/hw/nubus/meson.build b/hw/nubus/meson.build
1494
index XXXXXXX..XXXXXXX 100644
1495
--- a/hw/nubus/meson.build
1496
+++ b/hw/nubus/meson.build
1497
@@ -XXX,XX +XXX,XX @@ nubus_ss.add(files('nubus-bus.c'))
1498
nubus_ss.add(files('nubus-bridge.c'))
1499
nubus_ss.add(when: 'CONFIG_Q800', if_true: files('mac-nubus-bridge.c'))
1500
1501
-softmmu_ss.add_all(when: 'CONFIG_NUBUS', if_true: nubus_ss)
1502
+system_ss.add_all(when: 'CONFIG_NUBUS', if_true: nubus_ss)
1503
diff --git a/hw/nvme/meson.build b/hw/nvme/meson.build
1504
index XXXXXXX..XXXXXXX 100644
1505
--- a/hw/nvme/meson.build
1506
+++ b/hw/nvme/meson.build
1507
@@ -1 +1 @@
1508
-softmmu_ss.add(when: 'CONFIG_NVME_PCI', if_true: files('ctrl.c', 'dif.c', 'ns.c', 'subsys.c'))
1509
+system_ss.add(when: 'CONFIG_NVME_PCI', if_true: files('ctrl.c', 'dif.c', 'ns.c', 'subsys.c'))
1510
diff --git a/hw/nvram/meson.build b/hw/nvram/meson.build
1511
index XXXXXXX..XXXXXXX 100644
1512
--- a/hw/nvram/meson.build
1513
+++ b/hw/nvram/meson.build
1514
@@ -XXX,XX +XXX,XX @@ if have_system or have_tools
1515
qom_ss.add(files('fw_cfg-interface.c'))
1516
endif
1517
1518
-softmmu_ss.add(files('fw_cfg.c'))
1519
-softmmu_ss.add(when: 'CONFIG_CHRP_NVRAM', if_true: files('chrp_nvram.c'))
1520
-softmmu_ss.add(when: 'CONFIG_DS1225Y', if_true: files('ds1225y.c'))
1521
-softmmu_ss.add(when: 'CONFIG_NMC93XX_EEPROM', if_true: files('eeprom93xx.c'))
1522
-softmmu_ss.add(when: 'CONFIG_AT24C', if_true: files('eeprom_at24c.c'))
1523
-softmmu_ss.add(when: 'CONFIG_MAC_NVRAM', if_true: files('mac_nvram.c'))
1524
-softmmu_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_otp.c'))
1525
-softmmu_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_nvm.c'))
1526
-softmmu_ss.add(when: 'CONFIG_XLNX_EFUSE_CRC', if_true: files('xlnx-efuse-crc.c'))
1527
-softmmu_ss.add(when: 'CONFIG_XLNX_EFUSE', if_true: files('xlnx-efuse.c'))
1528
-softmmu_ss.add(when: 'CONFIG_XLNX_EFUSE_VERSAL', if_true: files(
1529
+system_ss.add(files('fw_cfg.c'))
1530
+system_ss.add(when: 'CONFIG_CHRP_NVRAM', if_true: files('chrp_nvram.c'))
1531
+system_ss.add(when: 'CONFIG_DS1225Y', if_true: files('ds1225y.c'))
1532
+system_ss.add(when: 'CONFIG_NMC93XX_EEPROM', if_true: files('eeprom93xx.c'))
1533
+system_ss.add(when: 'CONFIG_AT24C', if_true: files('eeprom_at24c.c'))
1534
+system_ss.add(when: 'CONFIG_MAC_NVRAM', if_true: files('mac_nvram.c'))
1535
+system_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_otp.c'))
1536
+system_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_nvm.c'))
1537
+system_ss.add(when: 'CONFIG_XLNX_EFUSE_CRC', if_true: files('xlnx-efuse-crc.c'))
1538
+system_ss.add(when: 'CONFIG_XLNX_EFUSE', if_true: files('xlnx-efuse.c'))
1539
+system_ss.add(when: 'CONFIG_XLNX_EFUSE_VERSAL', if_true: files(
1540
'xlnx-versal-efuse-cache.c',
1541
'xlnx-versal-efuse-ctrl.c'))
1542
-softmmu_ss.add(when: 'CONFIG_XLNX_EFUSE_ZYNQMP', if_true: files(
1543
+system_ss.add(when: 'CONFIG_XLNX_EFUSE_ZYNQMP', if_true: files(
1544
'xlnx-zynqmp-efuse.c'))
1545
-softmmu_ss.add(when: 'CONFIG_XLNX_BBRAM', if_true: files('xlnx-bbram.c'))
1546
+system_ss.add(when: 'CONFIG_XLNX_BBRAM', if_true: files('xlnx-bbram.c'))
1547
1548
specific_ss.add(when: 'CONFIG_PSERIES', if_true: files('spapr_nvram.c'))
1549
diff --git a/hw/pci-bridge/meson.build b/hw/pci-bridge/meson.build
1550
index XXXXXXX..XXXXXXX 100644
1551
--- a/hw/pci-bridge/meson.build
1552
+++ b/hw/pci-bridge/meson.build
1553
@@ -XXX,XX +XXX,XX @@ pci_ss.add(when: 'CONFIG_CXL', if_true: files('cxl_root_port.c', 'cxl_upstream.c
1554
# Sun4u
1555
pci_ss.add(when: 'CONFIG_SIMBA', if_true: files('simba.c'))
1556
1557
-softmmu_ss.add_all(when: 'CONFIG_PCI', if_true: pci_ss)
1558
+system_ss.add_all(when: 'CONFIG_PCI', if_true: pci_ss)
1559
1560
-softmmu_ss.add(when: 'CONFIG_ALL', if_true: files('pci_expander_bridge_stubs.c'))
1561
+system_ss.add(when: 'CONFIG_ALL', if_true: files('pci_expander_bridge_stubs.c'))
1562
diff --git a/hw/pci-host/meson.build b/hw/pci-host/meson.build
1563
index XXXXXXX..XXXXXXX 100644
1564
--- a/hw/pci-host/meson.build
1565
+++ b/hw/pci-host/meson.build
1566
@@ -XXX,XX +XXX,XX @@ pci_ss.add(when: 'CONFIG_VERSATILE_PCI', if_true: files('versatile.c'))
1567
# HPPA devices
1568
pci_ss.add(when: 'CONFIG_DINO', if_true: files('dino.c'))
1569
1570
-softmmu_ss.add_all(when: 'CONFIG_PCI', if_true: pci_ss)
1571
+system_ss.add_all(when: 'CONFIG_PCI', if_true: pci_ss)
1572
1573
specific_ss.add(when: 'CONFIG_PCI_POWERNV', if_true: files(
1574
'pnv_phb3.c',
1575
diff --git a/hw/pci/meson.build b/hw/pci/meson.build
1576
index XXXXXXX..XXXXXXX 100644
1577
--- a/hw/pci/meson.build
1578
+++ b/hw/pci/meson.build
1579
@@ -XXX,XX +XXX,XX @@ pci_ss.add(files(
1580
# CONFIG_PCI_EXPRESS=n.
1581
pci_ss.add(files('pcie.c', 'pcie_aer.c'))
1582
pci_ss.add(files('pcie_doe.c'))
1583
-softmmu_ss.add(when: 'CONFIG_PCI_EXPRESS', if_true: files('pcie_port.c', 'pcie_host.c'))
1584
-softmmu_ss.add_all(when: 'CONFIG_PCI', if_true: pci_ss)
1585
+system_ss.add(when: 'CONFIG_PCI_EXPRESS', if_true: files('pcie_port.c', 'pcie_host.c'))
1586
+system_ss.add_all(when: 'CONFIG_PCI', if_true: pci_ss)
1587
1588
-softmmu_ss.add(when: 'CONFIG_PCI', if_false: files('pci-stub.c'))
1589
-softmmu_ss.add(when: 'CONFIG_ALL', if_true: files('pci-stub.c'))
1590
+system_ss.add(when: 'CONFIG_PCI', if_false: files('pci-stub.c'))
1591
+system_ss.add(when: 'CONFIG_ALL', if_true: files('pci-stub.c'))
1592
diff --git a/hw/pcmcia/meson.build b/hw/pcmcia/meson.build
1593
index XXXXXXX..XXXXXXX 100644
1594
--- a/hw/pcmcia/meson.build
1595
+++ b/hw/pcmcia/meson.build
1596
@@ -XXX,XX +XXX,XX @@
1597
-softmmu_ss.add(when: 'CONFIG_PCMCIA', if_true: files('pcmcia.c'))
1598
-softmmu_ss.add(when: 'CONFIG_PXA2XX', if_true: files('pxa2xx.c'))
1599
+system_ss.add(when: 'CONFIG_PCMCIA', if_true: files('pcmcia.c'))
1600
+system_ss.add(when: 'CONFIG_PXA2XX', if_true: files('pxa2xx.c'))
1601
diff --git a/hw/rdma/meson.build b/hw/rdma/meson.build
1602
index XXXXXXX..XXXXXXX 100644
1603
--- a/hw/rdma/meson.build
1604
+++ b/hw/rdma/meson.build
1605
@@ -XXX,XX +XXX,XX @@
1606
-softmmu_ss.add(when: 'CONFIG_VMW_PVRDMA', if_true: files(
1607
+system_ss.add(when: 'CONFIG_VMW_PVRDMA', if_true: files(
1608
'rdma.c',
1609
'rdma_backend.c',
1610
'rdma_utils.c',
1611
diff --git a/hw/remote/meson.build b/hw/remote/meson.build
1612
index XXXXXXX..XXXXXXX 100644
1613
--- a/hw/remote/meson.build
1614
+++ b/hw/remote/meson.build
1615
@@ -XXX,XX +XXX,XX @@ remote_ss.add(when: 'CONFIG_VFIO_USER_SERVER', if_true: libvfio_user_dep)
1616
specific_ss.add(when: 'CONFIG_MULTIPROCESS', if_true: files('memory.c'))
1617
specific_ss.add(when: 'CONFIG_MULTIPROCESS', if_true: files('proxy-memory-listener.c'))
1618
1619
-softmmu_ss.add_all(when: 'CONFIG_MULTIPROCESS', if_true: remote_ss)
1620
+system_ss.add_all(when: 'CONFIG_MULTIPROCESS', if_true: remote_ss)
1621
diff --git a/hw/rtc/meson.build b/hw/rtc/meson.build
1622
index XXXXXXX..XXXXXXX 100644
1623
--- a/hw/rtc/meson.build
1624
+++ b/hw/rtc/meson.build
1625
@@ -XXX,XX +XXX,XX @@
1626
1627
-softmmu_ss.add(when: 'CONFIG_DS1338', if_true: files('ds1338.c'))
1628
-softmmu_ss.add(when: 'CONFIG_M41T80', if_true: files('m41t80.c'))
1629
-softmmu_ss.add(when: 'CONFIG_M48T59', if_true: files('m48t59.c'))
1630
-softmmu_ss.add(when: 'CONFIG_PL031', if_true: files('pl031.c'))
1631
-softmmu_ss.add(when: 'CONFIG_TWL92230', if_true: files('twl92230.c'))
1632
-softmmu_ss.add(when: ['CONFIG_ISA_BUS', 'CONFIG_M48T59'], if_true: files('m48t59-isa.c'))
1633
-softmmu_ss.add(when: 'CONFIG_XLNX_ZYNQMP', if_true: files('xlnx-zynqmp-rtc.c'))
1634
+system_ss.add(when: 'CONFIG_DS1338', if_true: files('ds1338.c'))
1635
+system_ss.add(when: 'CONFIG_M41T80', if_true: files('m41t80.c'))
1636
+system_ss.add(when: 'CONFIG_M48T59', if_true: files('m48t59.c'))
1637
+system_ss.add(when: 'CONFIG_PL031', if_true: files('pl031.c'))
1638
+system_ss.add(when: 'CONFIG_TWL92230', if_true: files('twl92230.c'))
1639
+system_ss.add(when: ['CONFIG_ISA_BUS', 'CONFIG_M48T59'], if_true: files('m48t59-isa.c'))
1640
+system_ss.add(when: 'CONFIG_XLNX_ZYNQMP', if_true: files('xlnx-zynqmp-rtc.c'))
1641
1642
-softmmu_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_rtc.c'))
1643
-softmmu_ss.add(when: 'CONFIG_SUN4V_RTC', if_true: files('sun4v-rtc.c'))
1644
-softmmu_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_rtc.c'))
1645
-softmmu_ss.add(when: 'CONFIG_GOLDFISH_RTC', if_true: files('goldfish_rtc.c'))
1646
-softmmu_ss.add(when: 'CONFIG_LS7A_RTC', if_true: files('ls7a_rtc.c'))
1647
-softmmu_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-rtc.c'))
1648
-softmmu_ss.add(when: 'CONFIG_MC146818RTC', if_true: files('mc146818rtc.c'))
1649
+system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_rtc.c'))
1650
+system_ss.add(when: 'CONFIG_SUN4V_RTC', if_true: files('sun4v-rtc.c'))
1651
+system_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_rtc.c'))
1652
+system_ss.add(when: 'CONFIG_GOLDFISH_RTC', if_true: files('goldfish_rtc.c'))
1653
+system_ss.add(when: 'CONFIG_LS7A_RTC', if_true: files('ls7a_rtc.c'))
1654
+system_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-rtc.c'))
1655
+system_ss.add(when: 'CONFIG_MC146818RTC', if_true: files('mc146818rtc.c'))
1656
diff --git a/hw/scsi/meson.build b/hw/scsi/meson.build
1657
index XXXXXXX..XXXXXXX 100644
1658
--- a/hw/scsi/meson.build
1659
+++ b/hw/scsi/meson.build
1660
@@ -XXX,XX +XXX,XX @@ scsi_ss.add(when: 'CONFIG_LSI_SCSI_PCI', if_true: files('lsi53c895a.c'))
1661
scsi_ss.add(when: 'CONFIG_MEGASAS_SCSI_PCI', if_true: files('megasas.c'))
1662
scsi_ss.add(when: 'CONFIG_MPTSAS_SCSI_PCI', if_true: files('mptsas.c', 'mptconfig.c', 'mptendian.c'))
1663
scsi_ss.add(when: 'CONFIG_VMW_PVSCSI_SCSI_PCI', if_true: files('vmw_pvscsi.c'))
1664
-softmmu_ss.add_all(when: 'CONFIG_SCSI', if_true: scsi_ss)
1665
+system_ss.add_all(when: 'CONFIG_SCSI', if_true: scsi_ss)
1666
1667
specific_scsi_ss = ss.source_set()
1668
1669
diff --git a/hw/sd/meson.build b/hw/sd/meson.build
1670
index XXXXXXX..XXXXXXX 100644
1671
--- a/hw/sd/meson.build
1672
+++ b/hw/sd/meson.build
1673
@@ -XXX,XX +XXX,XX @@
1674
-softmmu_ss.add(when: 'CONFIG_PL181', if_true: files('pl181.c'))
1675
-softmmu_ss.add(when: 'CONFIG_SD', if_true: files('sd.c', 'core.c', 'sdmmc-internal.c'))
1676
-softmmu_ss.add(when: 'CONFIG_SDHCI', if_true: files('sdhci.c'))
1677
-softmmu_ss.add(when: 'CONFIG_SDHCI_PCI', if_true: files('sdhci-pci.c'))
1678
-softmmu_ss.add(when: 'CONFIG_SSI_SD', if_true: files('ssi-sd.c'))
1679
+system_ss.add(when: 'CONFIG_PL181', if_true: files('pl181.c'))
1680
+system_ss.add(when: 'CONFIG_SD', if_true: files('sd.c', 'core.c', 'sdmmc-internal.c'))
1681
+system_ss.add(when: 'CONFIG_SDHCI', if_true: files('sdhci.c'))
1682
+system_ss.add(when: 'CONFIG_SDHCI_PCI', if_true: files('sdhci-pci.c'))
1683
+system_ss.add(when: 'CONFIG_SSI_SD', if_true: files('ssi-sd.c'))
1684
1685
-softmmu_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_mmc.c'))
1686
-softmmu_ss.add(when: 'CONFIG_PXA2XX', if_true: files('pxa2xx_mmci.c'))
1687
-softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_sdhost.c'))
1688
-softmmu_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_sdhci.c'))
1689
-softmmu_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-sdhost.c'))
1690
-softmmu_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_sdhci.c'))
1691
-softmmu_ss.add(when: 'CONFIG_CADENCE_SDHCI', if_true: files('cadence_sdhci.c'))
1692
+system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_mmc.c'))
1693
+system_ss.add(when: 'CONFIG_PXA2XX', if_true: files('pxa2xx_mmci.c'))
1694
+system_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_sdhost.c'))
1695
+system_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_sdhci.c'))
1696
+system_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-sdhost.c'))
1697
+system_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_sdhci.c'))
1698
+system_ss.add(when: 'CONFIG_CADENCE_SDHCI', if_true: files('cadence_sdhci.c'))
1699
diff --git a/hw/sensor/meson.build b/hw/sensor/meson.build
1700
index XXXXXXX..XXXXXXX 100644
1701
--- a/hw/sensor/meson.build
1702
+++ b/hw/sensor/meson.build
1703
@@ -XXX,XX +XXX,XX @@
1704
-softmmu_ss.add(when: 'CONFIG_TMP105', if_true: files('tmp105.c'))
1705
-softmmu_ss.add(when: 'CONFIG_TMP421', if_true: files('tmp421.c'))
1706
-softmmu_ss.add(when: 'CONFIG_DPS310', if_true: files('dps310.c'))
1707
-softmmu_ss.add(when: 'CONFIG_EMC141X', if_true: files('emc141x.c'))
1708
-softmmu_ss.add(when: 'CONFIG_ADM1272', if_true: files('adm1272.c'))
1709
-softmmu_ss.add(when: 'CONFIG_MAX34451', if_true: files('max34451.c'))
1710
-softmmu_ss.add(when: 'CONFIG_LSM303DLHC_MAG', if_true: files('lsm303dlhc_mag.c'))
1711
-softmmu_ss.add(when: 'CONFIG_ISL_PMBUS_VR', if_true: files('isl_pmbus_vr.c'))
1712
-softmmu_ss.add(when: 'CONFIG_MAX31785', if_true: files('max31785.c'))
1713
+system_ss.add(when: 'CONFIG_TMP105', if_true: files('tmp105.c'))
1714
+system_ss.add(when: 'CONFIG_TMP421', if_true: files('tmp421.c'))
1715
+system_ss.add(when: 'CONFIG_DPS310', if_true: files('dps310.c'))
1716
+system_ss.add(when: 'CONFIG_EMC141X', if_true: files('emc141x.c'))
1717
+system_ss.add(when: 'CONFIG_ADM1272', if_true: files('adm1272.c'))
1718
+system_ss.add(when: 'CONFIG_MAX34451', if_true: files('max34451.c'))
1719
+system_ss.add(when: 'CONFIG_LSM303DLHC_MAG', if_true: files('lsm303dlhc_mag.c'))
1720
+system_ss.add(when: 'CONFIG_ISL_PMBUS_VR', if_true: files('isl_pmbus_vr.c'))
1721
+system_ss.add(when: 'CONFIG_MAX31785', if_true: files('max31785.c'))
1722
diff --git a/hw/smbios/meson.build b/hw/smbios/meson.build
1723
index XXXXXXX..XXXXXXX 100644
1724
--- a/hw/smbios/meson.build
1725
+++ b/hw/smbios/meson.build
1726
@@ -XXX,XX +XXX,XX @@ smbios_ss.add(when: 'CONFIG_IPMI',
1727
if_true: files('smbios_type_38.c'),
1728
if_false: files('smbios_type_38-stub.c'))
1729
1730
-softmmu_ss.add_all(when: 'CONFIG_SMBIOS', if_true: smbios_ss)
1731
-softmmu_ss.add(when: 'CONFIG_SMBIOS', if_false: files('smbios-stub.c'))
1732
+system_ss.add_all(when: 'CONFIG_SMBIOS', if_true: smbios_ss)
1733
+system_ss.add(when: 'CONFIG_SMBIOS', if_false: files('smbios-stub.c'))
1734
1735
-softmmu_ss.add(when: 'CONFIG_ALL', if_true: files(
1736
+system_ss.add(when: 'CONFIG_ALL', if_true: files(
1737
'smbios-stub.c',
1738
'smbios_type_38-stub.c',
1739
))
1740
diff --git a/hw/ssi/meson.build b/hw/ssi/meson.build
1741
index XXXXXXX..XXXXXXX 100644
1742
--- a/hw/ssi/meson.build
1743
+++ b/hw/ssi/meson.build
1744
@@ -XXX,XX +XXX,XX @@
1745
-softmmu_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_smc.c'))
1746
-softmmu_ss.add(when: 'CONFIG_MSF2', if_true: files('mss-spi.c'))
1747
-softmmu_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_fiu.c', 'npcm_pspi.c'))
1748
-softmmu_ss.add(when: 'CONFIG_PL022', if_true: files('pl022.c'))
1749
-softmmu_ss.add(when: 'CONFIG_SIFIVE_SPI', if_true: files('sifive_spi.c'))
1750
-softmmu_ss.add(when: 'CONFIG_SSI', if_true: files('ssi.c'))
1751
-softmmu_ss.add(when: 'CONFIG_STM32F2XX_SPI', if_true: files('stm32f2xx_spi.c'))
1752
-softmmu_ss.add(when: 'CONFIG_XILINX_SPI', if_true: files('xilinx_spi.c'))
1753
-softmmu_ss.add(when: 'CONFIG_XILINX_SPIPS', if_true: files('xilinx_spips.c'))
1754
-softmmu_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files('xlnx-versal-ospi.c'))
1755
-softmmu_ss.add(when: 'CONFIG_IMX', if_true: files('imx_spi.c'))
1756
-softmmu_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_spi.c'))
1757
-softmmu_ss.add(when: 'CONFIG_IBEX', if_true: files('ibex_spi_host.c'))
1758
+system_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_smc.c'))
1759
+system_ss.add(when: 'CONFIG_MSF2', if_true: files('mss-spi.c'))
1760
+system_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_fiu.c', 'npcm_pspi.c'))
1761
+system_ss.add(when: 'CONFIG_PL022', if_true: files('pl022.c'))
1762
+system_ss.add(when: 'CONFIG_SIFIVE_SPI', if_true: files('sifive_spi.c'))
1763
+system_ss.add(when: 'CONFIG_SSI', if_true: files('ssi.c'))
1764
+system_ss.add(when: 'CONFIG_STM32F2XX_SPI', if_true: files('stm32f2xx_spi.c'))
1765
+system_ss.add(when: 'CONFIG_XILINX_SPI', if_true: files('xilinx_spi.c'))
1766
+system_ss.add(when: 'CONFIG_XILINX_SPIPS', if_true: files('xilinx_spips.c'))
1767
+system_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files('xlnx-versal-ospi.c'))
1768
+system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_spi.c'))
1769
+system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_spi.c'))
1770
+system_ss.add(when: 'CONFIG_IBEX', if_true: files('ibex_spi_host.c'))
1771
diff --git a/hw/timer/meson.build b/hw/timer/meson.build
1772
index XXXXXXX..XXXXXXX 100644
1773
--- a/hw/timer/meson.build
1774
+++ b/hw/timer/meson.build
1775
@@ -XXX,XX +XXX,XX @@
1776
-softmmu_ss.add(when: 'CONFIG_A9_GTIMER', if_true: files('a9gtimer.c'))
1777
-softmmu_ss.add(when: 'CONFIG_ALLWINNER_A10_PIT', if_true: files('allwinner-a10-pit.c'))
1778
-softmmu_ss.add(when: 'CONFIG_ALTERA_TIMER', if_true: files('altera_timer.c'))
1779
-softmmu_ss.add(when: 'CONFIG_ARM_MPTIMER', if_true: files('arm_mptimer.c'))
1780
-softmmu_ss.add(when: 'CONFIG_ARM_TIMER', if_true: files('arm_timer.c'))
1781
-softmmu_ss.add(when: 'CONFIG_ARM_V7M', if_true: files('armv7m_systick.c'))
1782
-softmmu_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_timer.c'))
1783
-softmmu_ss.add(when: 'CONFIG_CADENCE', if_true: files('cadence_ttc.c'))
1784
-softmmu_ss.add(when: 'CONFIG_CMSDK_APB_DUALTIMER', if_true: files('cmsdk-apb-dualtimer.c'))
1785
-softmmu_ss.add(when: 'CONFIG_CMSDK_APB_TIMER', if_true: files('cmsdk-apb-timer.c'))
1786
-softmmu_ss.add(when: 'CONFIG_RENESAS_TMR', if_true: files('renesas_tmr.c'))
1787
-softmmu_ss.add(when: 'CONFIG_RENESAS_CMT', if_true: files('renesas_cmt.c'))
1788
-softmmu_ss.add(when: 'CONFIG_DIGIC', if_true: files('digic-timer.c'))
1789
-softmmu_ss.add(when: 'CONFIG_ETRAXFS', if_true: files('etraxfs_timer.c'))
1790
-softmmu_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_mct.c'))
1791
-softmmu_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_pwm.c'))
1792
-softmmu_ss.add(when: 'CONFIG_GRLIB', if_true: files('grlib_gptimer.c'))
1793
-softmmu_ss.add(when: 'CONFIG_HPET', if_true: files('hpet.c'))
1794
-softmmu_ss.add(when: 'CONFIG_I8254', if_true: files('i8254_common.c', 'i8254.c'))
1795
-softmmu_ss.add(when: 'CONFIG_IMX', if_true: files('imx_epit.c'))
1796
-softmmu_ss.add(when: 'CONFIG_IMX', if_true: files('imx_gpt.c'))
1797
-softmmu_ss.add(when: 'CONFIG_MIPS_CPS', if_true: files('mips_gictimer.c'))
1798
-softmmu_ss.add(when: 'CONFIG_MSF2', if_true: files('mss-timer.c'))
1799
-softmmu_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_timer.c'))
1800
-softmmu_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_timer.c'))
1801
-softmmu_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_gptimer.c'))
1802
-softmmu_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_synctimer.c'))
1803
-softmmu_ss.add(when: 'CONFIG_PXA2XX', if_true: files('pxa2xx_timer.c'))
1804
-softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_systmr.c'))
1805
-softmmu_ss.add(when: 'CONFIG_SH_TIMER', if_true: files('sh_timer.c'))
1806
-softmmu_ss.add(when: 'CONFIG_SLAVIO', if_true: files('slavio_timer.c'))
1807
-softmmu_ss.add(when: 'CONFIG_SSE_COUNTER', if_true: files('sse-counter.c'))
1808
-softmmu_ss.add(when: 'CONFIG_SSE_TIMER', if_true: files('sse-timer.c'))
1809
-softmmu_ss.add(when: 'CONFIG_STELLARIS_GPTM', if_true: files('stellaris-gptm.c'))
1810
-softmmu_ss.add(when: 'CONFIG_STM32F2XX_TIMER', if_true: files('stm32f2xx_timer.c'))
1811
-softmmu_ss.add(when: 'CONFIG_XILINX', if_true: files('xilinx_timer.c'))
1812
+system_ss.add(when: 'CONFIG_A9_GTIMER', if_true: files('a9gtimer.c'))
1813
+system_ss.add(when: 'CONFIG_ALLWINNER_A10_PIT', if_true: files('allwinner-a10-pit.c'))
1814
+system_ss.add(when: 'CONFIG_ALTERA_TIMER', if_true: files('altera_timer.c'))
1815
+system_ss.add(when: 'CONFIG_ARM_MPTIMER', if_true: files('arm_mptimer.c'))
1816
+system_ss.add(when: 'CONFIG_ARM_TIMER', if_true: files('arm_timer.c'))
1817
+system_ss.add(when: 'CONFIG_ARM_V7M', if_true: files('armv7m_systick.c'))
1818
+system_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_timer.c'))
1819
+system_ss.add(when: 'CONFIG_CADENCE', if_true: files('cadence_ttc.c'))
1820
+system_ss.add(when: 'CONFIG_CMSDK_APB_DUALTIMER', if_true: files('cmsdk-apb-dualtimer.c'))
1821
+system_ss.add(when: 'CONFIG_CMSDK_APB_TIMER', if_true: files('cmsdk-apb-timer.c'))
1822
+system_ss.add(when: 'CONFIG_RENESAS_TMR', if_true: files('renesas_tmr.c'))
1823
+system_ss.add(when: 'CONFIG_RENESAS_CMT', if_true: files('renesas_cmt.c'))
1824
+system_ss.add(when: 'CONFIG_DIGIC', if_true: files('digic-timer.c'))
1825
+system_ss.add(when: 'CONFIG_ETRAXFS', if_true: files('etraxfs_timer.c'))
1826
+system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_mct.c'))
1827
+system_ss.add(when: 'CONFIG_EXYNOS4', if_true: files('exynos4210_pwm.c'))
1828
+system_ss.add(when: 'CONFIG_GRLIB', if_true: files('grlib_gptimer.c'))
1829
+system_ss.add(when: 'CONFIG_HPET', if_true: files('hpet.c'))
1830
+system_ss.add(when: 'CONFIG_I8254', if_true: files('i8254_common.c', 'i8254.c'))
1831
+system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_epit.c'))
1832
+system_ss.add(when: 'CONFIG_IMX', if_true: files('imx_gpt.c'))
1833
+system_ss.add(when: 'CONFIG_MIPS_CPS', if_true: files('mips_gictimer.c'))
1834
+system_ss.add(when: 'CONFIG_MSF2', if_true: files('mss-timer.c'))
1835
+system_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_timer.c'))
1836
+system_ss.add(when: 'CONFIG_NRF51_SOC', if_true: files('nrf51_timer.c'))
1837
+system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_gptimer.c'))
1838
+system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_synctimer.c'))
1839
+system_ss.add(when: 'CONFIG_PXA2XX', if_true: files('pxa2xx_timer.c'))
1840
+system_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_systmr.c'))
1841
+system_ss.add(when: 'CONFIG_SH_TIMER', if_true: files('sh_timer.c'))
1842
+system_ss.add(when: 'CONFIG_SLAVIO', if_true: files('slavio_timer.c'))
1843
+system_ss.add(when: 'CONFIG_SSE_COUNTER', if_true: files('sse-counter.c'))
1844
+system_ss.add(when: 'CONFIG_SSE_TIMER', if_true: files('sse-timer.c'))
1845
+system_ss.add(when: 'CONFIG_STELLARIS_GPTM', if_true: files('stellaris-gptm.c'))
1846
+system_ss.add(when: 'CONFIG_STM32F2XX_TIMER', if_true: files('stm32f2xx_timer.c'))
1847
+system_ss.add(when: 'CONFIG_XILINX', if_true: files('xilinx_timer.c'))
1848
specific_ss.add(when: 'CONFIG_IBEX', if_true: files('ibex_timer.c'))
1849
-softmmu_ss.add(when: 'CONFIG_SIFIVE_PWM', if_true: files('sifive_pwm.c'))
1850
+system_ss.add(when: 'CONFIG_SIFIVE_PWM', if_true: files('sifive_pwm.c'))
1851
1852
specific_ss.add(when: 'CONFIG_AVR_TIMER16', if_true: files('avr_timer16.c'))
1853
diff --git a/hw/tpm/meson.build b/hw/tpm/meson.build
1854
index XXXXXXX..XXXXXXX 100644
1855
--- a/hw/tpm/meson.build
1856
+++ b/hw/tpm/meson.build
1857
@@ -XXX,XX +XXX,XX @@
1858
-softmmu_ss.add(when: 'CONFIG_TPM_TIS', if_true: files('tpm_tis_common.c'))
1859
-softmmu_ss.add(when: 'CONFIG_TPM_TIS_ISA', if_true: files('tpm_tis_isa.c'))
1860
-softmmu_ss.add(when: 'CONFIG_TPM_TIS_SYSBUS', if_true: files('tpm_tis_sysbus.c'))
1861
-softmmu_ss.add(when: 'CONFIG_TPM_TIS_I2C', if_true: files('tpm_tis_i2c.c'))
1862
-softmmu_ss.add(when: 'CONFIG_TPM_CRB', if_true: files('tpm_crb.c'))
1863
-softmmu_ss.add(when: 'CONFIG_TPM_TIS', if_true: files('tpm_ppi.c'))
1864
-softmmu_ss.add(when: 'CONFIG_TPM_CRB', if_true: files('tpm_ppi.c'))
1865
+system_ss.add(when: 'CONFIG_TPM_TIS', if_true: files('tpm_tis_common.c'))
1866
+system_ss.add(when: 'CONFIG_TPM_TIS_ISA', if_true: files('tpm_tis_isa.c'))
1867
+system_ss.add(when: 'CONFIG_TPM_TIS_SYSBUS', if_true: files('tpm_tis_sysbus.c'))
1868
+system_ss.add(when: 'CONFIG_TPM_TIS_I2C', if_true: files('tpm_tis_i2c.c'))
1869
+system_ss.add(when: 'CONFIG_TPM_CRB', if_true: files('tpm_crb.c'))
1870
+system_ss.add(when: 'CONFIG_TPM_TIS', if_true: files('tpm_ppi.c'))
1871
+system_ss.add(when: 'CONFIG_TPM_CRB', if_true: files('tpm_ppi.c'))
1872
1873
specific_ss.add(when: 'CONFIG_TPM_SPAPR', if_true: files('tpm_spapr.c'))
1874
diff --git a/hw/usb/meson.build b/hw/usb/meson.build
1875
index XXXXXXX..XXXXXXX 100644
1876
--- a/hw/usb/meson.build
1877
+++ b/hw/usb/meson.build
1878
@@ -XXX,XX +XXX,XX @@
1879
hw_usb_modules = {}
1880
1881
# usb subsystem core
1882
-softmmu_ss.add(when: 'CONFIG_USB', if_true: files(
1883
+system_ss.add(when: 'CONFIG_USB', if_true: files(
1884
'bus.c',
1885
'combined-packet.c',
1886
'core.c',
1887
@@ -XXX,XX +XXX,XX @@ softmmu_ss.add(when: 'CONFIG_USB', if_true: files(
1888
))
1889
1890
# usb host adapters
1891
-softmmu_ss.add(when: 'CONFIG_USB_UHCI', if_true: files('hcd-uhci.c'))
1892
-softmmu_ss.add(when: 'CONFIG_USB_OHCI', if_true: files('hcd-ohci.c'))
1893
-softmmu_ss.add(when: 'CONFIG_USB_OHCI_PCI', if_true: files('hcd-ohci-pci.c'))
1894
-softmmu_ss.add(when: 'CONFIG_USB_EHCI', if_true: files('hcd-ehci.c'))
1895
-softmmu_ss.add(when: 'CONFIG_USB_EHCI_PCI', if_true: files('hcd-ehci-pci.c'))
1896
-softmmu_ss.add(when: 'CONFIG_USB_EHCI_SYSBUS', if_true: files('hcd-ehci.c', 'hcd-ehci-sysbus.c'))
1897
-softmmu_ss.add(when: 'CONFIG_USB_XHCI', if_true: files('hcd-xhci.c'))
1898
-softmmu_ss.add(when: 'CONFIG_USB_XHCI_PCI', if_true: files('hcd-xhci-pci.c'))
1899
-softmmu_ss.add(when: 'CONFIG_USB_XHCI_SYSBUS', if_true: files('hcd-xhci-sysbus.c'))
1900
-softmmu_ss.add(when: 'CONFIG_USB_XHCI_NEC', if_true: files('hcd-xhci-nec.c'))
1901
-softmmu_ss.add(when: 'CONFIG_USB_MUSB', if_true: files('hcd-musb.c'))
1902
-softmmu_ss.add(when: 'CONFIG_USB_DWC2', if_true: files('hcd-dwc2.c'))
1903
-softmmu_ss.add(when: 'CONFIG_USB_DWC3', if_true: files('hcd-dwc3.c'))
1904
+system_ss.add(when: 'CONFIG_USB_UHCI', if_true: files('hcd-uhci.c'))
1905
+system_ss.add(when: 'CONFIG_USB_OHCI', if_true: files('hcd-ohci.c'))
1906
+system_ss.add(when: 'CONFIG_USB_OHCI_PCI', if_true: files('hcd-ohci-pci.c'))
1907
+system_ss.add(when: 'CONFIG_USB_EHCI', if_true: files('hcd-ehci.c'))
1908
+system_ss.add(when: 'CONFIG_USB_EHCI_PCI', if_true: files('hcd-ehci-pci.c'))
1909
+system_ss.add(when: 'CONFIG_USB_EHCI_SYSBUS', if_true: files('hcd-ehci.c', 'hcd-ehci-sysbus.c'))
1910
+system_ss.add(when: 'CONFIG_USB_XHCI', if_true: files('hcd-xhci.c'))
1911
+system_ss.add(when: 'CONFIG_USB_XHCI_PCI', if_true: files('hcd-xhci-pci.c'))
1912
+system_ss.add(when: 'CONFIG_USB_XHCI_SYSBUS', if_true: files('hcd-xhci-sysbus.c'))
1913
+system_ss.add(when: 'CONFIG_USB_XHCI_NEC', if_true: files('hcd-xhci-nec.c'))
1914
+system_ss.add(when: 'CONFIG_USB_MUSB', if_true: files('hcd-musb.c'))
1915
+system_ss.add(when: 'CONFIG_USB_DWC2', if_true: files('hcd-dwc2.c'))
1916
+system_ss.add(when: 'CONFIG_USB_DWC3', if_true: files('hcd-dwc3.c'))
1917
1918
-softmmu_ss.add(when: 'CONFIG_TUSB6010', if_true: files('tusb6010.c'))
1919
-softmmu_ss.add(when: 'CONFIG_IMX', if_true: files('chipidea.c'))
1920
-softmmu_ss.add(when: 'CONFIG_IMX_USBPHY', if_true: files('imx-usb-phy.c'))
1921
-softmmu_ss.add(when: 'CONFIG_VT82C686', if_true: files('vt82c686-uhci-pci.c'))
1922
-softmmu_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files('xlnx-versal-usb2-ctrl-regs.c'))
1923
-softmmu_ss.add(when: 'CONFIG_XLNX_USB_SUBSYS', if_true: files('xlnx-usb-subsystem.c'))
1924
+system_ss.add(when: 'CONFIG_TUSB6010', if_true: files('tusb6010.c'))
1925
+system_ss.add(when: 'CONFIG_IMX', if_true: files('chipidea.c'))
1926
+system_ss.add(when: 'CONFIG_IMX_USBPHY', if_true: files('imx-usb-phy.c'))
1927
+system_ss.add(when: 'CONFIG_VT82C686', if_true: files('vt82c686-uhci-pci.c'))
1928
+system_ss.add(when: 'CONFIG_XLNX_VERSAL', if_true: files('xlnx-versal-usb2-ctrl-regs.c'))
1929
+system_ss.add(when: 'CONFIG_XLNX_USB_SUBSYS', if_true: files('xlnx-usb-subsystem.c'))
1930
1931
# emulated usb devices
1932
-softmmu_ss.add(when: 'CONFIG_USB', if_true: files('dev-hub.c'))
1933
-softmmu_ss.add(when: 'CONFIG_USB', if_true: files('dev-hid.c'))
1934
-softmmu_ss.add(when: 'CONFIG_USB_TABLET_WACOM', if_true: files('dev-wacom.c'))
1935
-softmmu_ss.add(when: 'CONFIG_USB_STORAGE_CORE', if_true: files('dev-storage.c'))
1936
-softmmu_ss.add(when: 'CONFIG_USB_STORAGE_BOT', if_true: files('dev-storage-bot.c'))
1937
-softmmu_ss.add(when: 'CONFIG_USB_STORAGE_CLASSIC', if_true: files('dev-storage-classic.c'))
1938
-softmmu_ss.add(when: 'CONFIG_USB_STORAGE_UAS', if_true: files('dev-uas.c'))
1939
-softmmu_ss.add(when: 'CONFIG_USB_AUDIO', if_true: files('dev-audio.c'))
1940
-softmmu_ss.add(when: 'CONFIG_USB_SERIAL', if_true: files('dev-serial.c'))
1941
-softmmu_ss.add(when: 'CONFIG_USB_NETWORK', if_true: files('dev-network.c'))
1942
-softmmu_ss.add(when: ['CONFIG_POSIX', 'CONFIG_USB_STORAGE_MTP'], if_true: files('dev-mtp.c'))
1943
+system_ss.add(when: 'CONFIG_USB', if_true: files('dev-hub.c'))
1944
+system_ss.add(when: 'CONFIG_USB', if_true: files('dev-hid.c'))
1945
+system_ss.add(when: 'CONFIG_USB_TABLET_WACOM', if_true: files('dev-wacom.c'))
1946
+system_ss.add(when: 'CONFIG_USB_STORAGE_CORE', if_true: files('dev-storage.c'))
1947
+system_ss.add(when: 'CONFIG_USB_STORAGE_BOT', if_true: files('dev-storage-bot.c'))
1948
+system_ss.add(when: 'CONFIG_USB_STORAGE_CLASSIC', if_true: files('dev-storage-classic.c'))
1949
+system_ss.add(when: 'CONFIG_USB_STORAGE_UAS', if_true: files('dev-uas.c'))
1950
+system_ss.add(when: 'CONFIG_USB_AUDIO', if_true: files('dev-audio.c'))
1951
+system_ss.add(when: 'CONFIG_USB_SERIAL', if_true: files('dev-serial.c'))
1952
+system_ss.add(when: 'CONFIG_USB_NETWORK', if_true: files('dev-network.c'))
1953
+system_ss.add(when: ['CONFIG_POSIX', 'CONFIG_USB_STORAGE_MTP'], if_true: files('dev-mtp.c'))
1954
1955
# smartcard
1956
-softmmu_ss.add(when: 'CONFIG_USB_SMARTCARD', if_true: files('dev-smartcard-reader.c'))
1957
+system_ss.add(when: 'CONFIG_USB_SMARTCARD', if_true: files('dev-smartcard-reader.c'))
1958
1959
if cacard.found()
1960
usbsmartcard_ss = ss.source_set()
1961
@@ -XXX,XX +XXX,XX @@ if cacard.found()
1962
endif
1963
1964
# U2F
1965
-softmmu_ss.add(when: 'CONFIG_USB_U2F', if_true: files('u2f.c'))
1966
-softmmu_ss.add(when: ['CONFIG_LINUX', 'CONFIG_USB_U2F'], if_true: [libudev, files('u2f-passthru.c')])
1967
+system_ss.add(when: 'CONFIG_USB_U2F', if_true: files('u2f.c'))
1968
+system_ss.add(when: ['CONFIG_LINUX', 'CONFIG_USB_U2F'], if_true: [libudev, files('u2f-passthru.c')])
1969
if u2f.found()
1970
- softmmu_ss.add(when: 'CONFIG_USB_U2F', if_true: [u2f, files('u2f-emulated.c')])
1971
+ system_ss.add(when: 'CONFIG_USB_U2F', if_true: [u2f, files('u2f-emulated.c')])
1972
endif
1973
1974
# CanoKey
1975
if canokey.found()
1976
- softmmu_ss.add(when: 'CONFIG_USB_CANOKEY', if_true: [canokey, files('canokey.c')])
1977
+ system_ss.add(when: 'CONFIG_USB_CANOKEY', if_true: [canokey, files('canokey.c')])
1978
endif
1979
1980
# usb redirect
1981
@@ -XXX,XX +XXX,XX @@ if libusb.found()
1982
hw_usb_modules += {'host': usbhost_ss}
1983
endif
1984
1985
-softmmu_ss.add(when: ['CONFIG_USB', 'CONFIG_XEN_BUS', libusb], if_true: files('xen-usb.c'))
1986
+system_ss.add(when: ['CONFIG_USB', 'CONFIG_XEN_BUS', libusb], if_true: files('xen-usb.c'))
1987
1988
modules += { 'hw-usb': hw_usb_modules }
1989
diff --git a/hw/virtio/meson.build b/hw/virtio/meson.build
1990
index XXXXXXX..XXXXXXX 100644
1991
--- a/hw/virtio/meson.build
1992
+++ b/hw/virtio/meson.build
1993
@@ -XXX,XX +XXX,XX @@ virtio_pci_ss.add(when: 'CONFIG_VHOST_VDPA_DEV', if_true: files('vdpa-dev-pci.c'
1994
1995
specific_virtio_ss.add_all(when: 'CONFIG_VIRTIO_PCI', if_true: virtio_pci_ss)
1996
1997
-softmmu_ss.add_all(when: 'CONFIG_VIRTIO', if_true: softmmu_virtio_ss)
1998
-softmmu_ss.add(when: 'CONFIG_VIRTIO', if_false: files('vhost-stub.c'))
1999
-softmmu_ss.add(when: 'CONFIG_VIRTIO', if_false: files('virtio-stub.c'))
2000
-softmmu_ss.add(when: 'CONFIG_ALL', if_true: files('vhost-stub.c'))
2001
-softmmu_ss.add(when: 'CONFIG_ALL', if_true: files('virtio-stub.c'))
2002
-softmmu_ss.add(files('virtio-hmp-cmds.c'))
2003
+system_ss.add_all(when: 'CONFIG_VIRTIO', if_true: softmmu_virtio_ss)
2004
+system_ss.add(when: 'CONFIG_VIRTIO', if_false: files('vhost-stub.c'))
2005
+system_ss.add(when: 'CONFIG_VIRTIO', if_false: files('virtio-stub.c'))
2006
+system_ss.add(when: 'CONFIG_ALL', if_true: files('vhost-stub.c'))
2007
+system_ss.add(when: 'CONFIG_ALL', if_true: files('virtio-stub.c'))
2008
+system_ss.add(files('virtio-hmp-cmds.c'))
2009
2010
specific_ss.add_all(when: 'CONFIG_VIRTIO', if_true: specific_virtio_ss)
2011
diff --git a/hw/watchdog/meson.build b/hw/watchdog/meson.build
2012
index XXXXXXX..XXXXXXX 100644
2013
--- a/hw/watchdog/meson.build
2014
+++ b/hw/watchdog/meson.build
2015
@@ -XXX,XX +XXX,XX @@
2016
-softmmu_ss.add(files('watchdog.c'))
2017
-softmmu_ss.add(when: 'CONFIG_ALLWINNER_WDT', if_true: files('allwinner-wdt.c'))
2018
-softmmu_ss.add(when: 'CONFIG_CMSDK_APB_WATCHDOG', if_true: files('cmsdk-apb-watchdog.c'))
2019
-softmmu_ss.add(when: 'CONFIG_WDT_IB6300ESB', if_true: files('wdt_i6300esb.c'))
2020
-softmmu_ss.add(when: 'CONFIG_WDT_IB700', if_true: files('wdt_ib700.c'))
2021
-softmmu_ss.add(when: 'CONFIG_WDT_DIAG288', if_true: files('wdt_diag288.c'))
2022
-softmmu_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('wdt_aspeed.c'))
2023
-softmmu_ss.add(when: 'CONFIG_WDT_IMX2', if_true: files('wdt_imx2.c'))
2024
-softmmu_ss.add(when: 'CONFIG_WDT_SBSA', if_true: files('sbsa_gwdt.c'))
2025
+system_ss.add(files('watchdog.c'))
2026
+system_ss.add(when: 'CONFIG_ALLWINNER_WDT', if_true: files('allwinner-wdt.c'))
2027
+system_ss.add(when: 'CONFIG_CMSDK_APB_WATCHDOG', if_true: files('cmsdk-apb-watchdog.c'))
2028
+system_ss.add(when: 'CONFIG_WDT_IB6300ESB', if_true: files('wdt_i6300esb.c'))
2029
+system_ss.add(when: 'CONFIG_WDT_IB700', if_true: files('wdt_ib700.c'))
2030
+system_ss.add(when: 'CONFIG_WDT_DIAG288', if_true: files('wdt_diag288.c'))
2031
+system_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('wdt_aspeed.c'))
2032
+system_ss.add(when: 'CONFIG_WDT_IMX2', if_true: files('wdt_imx2.c'))
2033
+system_ss.add(when: 'CONFIG_WDT_SBSA', if_true: files('sbsa_gwdt.c'))
2034
specific_ss.add(when: 'CONFIG_PSERIES', if_true: files('spapr_watchdog.c'))
2035
diff --git a/hw/xen/meson.build b/hw/xen/meson.build
2036
index XXXXXXX..XXXXXXX 100644
2037
--- a/hw/xen/meson.build
2038
+++ b/hw/xen/meson.build
2039
@@ -XXX,XX +XXX,XX @@
2040
-softmmu_ss.add(when: ['CONFIG_XEN_BUS'], if_true: files(
2041
+system_ss.add(when: ['CONFIG_XEN_BUS'], if_true: files(
2042
'xen-backend.c',
2043
'xen-bus-helper.c',
2044
'xen-bus.c',
2045
@@ -XXX,XX +XXX,XX @@ softmmu_ss.add(when: ['CONFIG_XEN_BUS'], if_true: files(
2046
'xen_pvdev.c',
2047
))
2048
2049
-softmmu_ss.add(when: ['CONFIG_XEN', xen], if_true: files(
2050
+system_ss.add(when: ['CONFIG_XEN', xen], if_true: files(
2051
'xen-operations.c',
2052
))
2053
2054
diff --git a/migration/meson.build b/migration/meson.build
2055
index XXXXXXX..XXXXXXX 100644
2056
--- a/migration/meson.build
2057
+++ b/migration/meson.build
2058
@@ -XXX,XX +XXX,XX @@ migration_files = files(
2059
'yank_functions.c',
2060
)
2061
2062
-softmmu_ss.add(files(
2063
+system_ss.add(files(
2064
'block-dirty-bitmap.c',
2065
'channel.c',
2066
'channel-block.c',
2067
@@ -XXX,XX +XXX,XX @@ softmmu_ss.add(files(
2068
), gnutls)
2069
2070
if get_option('replication').allowed()
2071
- softmmu_ss.add(files('colo-failover.c', 'colo.c'))
2072
+ system_ss.add(files('colo-failover.c', 'colo.c'))
2073
endif
2074
2075
-softmmu_ss.add(when: rdma, if_true: files('rdma.c'))
2076
+system_ss.add(when: rdma, if_true: files('rdma.c'))
2077
if get_option('live_block_migration').allowed()
2078
- softmmu_ss.add(files('block.c'))
2079
+ system_ss.add(files('block.c'))
2080
endif
2081
-softmmu_ss.add(when: zstd, if_true: files('multifd-zstd.c'))
2082
+system_ss.add(when: zstd, if_true: files('multifd-zstd.c'))
2083
2084
specific_ss.add(when: 'CONFIG_SYSTEM_ONLY',
2085
if_true: files('ram.c',
2086
diff --git a/monitor/meson.build b/monitor/meson.build
2087
index XXXXXXX..XXXXXXX 100644
2088
--- a/monitor/meson.build
2089
+++ b/monitor/meson.build
2090
@@ -XXX,XX +XXX,XX @@
2091
qmp_ss.add(files('monitor.c', 'qmp.c', 'qmp-cmds-control.c'))
2092
2093
-softmmu_ss.add(files(
2094
+system_ss.add(files(
2095
'fds.c',
2096
'hmp-cmds.c',
2097
'hmp.c',
2098
))
2099
-softmmu_ss.add([spice_headers, files('qmp-cmds.c')])
2100
+system_ss.add([spice_headers, files('qmp-cmds.c')])
2101
2102
specific_ss.add(when: 'CONFIG_SYSTEM_ONLY',
2103
        if_true: [files( 'hmp-cmds-target.c', 'hmp-target.c'), spice])
2104
diff --git a/net/can/meson.build b/net/can/meson.build
2105
index XXXXXXX..XXXXXXX 100644
2106
--- a/net/can/meson.build
2107
+++ b/net/can/meson.build
2108
@@ -XXX,XX +XXX,XX @@ can_ss = ss.source_set()
2109
can_ss.add(files('can_core.c', 'can_host.c'))
2110
can_ss.add(when: 'CONFIG_LINUX', if_true: files('can_socketcan.c'))
2111
2112
-softmmu_ss.add_all(when: 'CONFIG_CAN_BUS', if_true: can_ss)
2113
+system_ss.add_all(when: 'CONFIG_CAN_BUS', if_true: can_ss)
2114
diff --git a/net/meson.build b/net/meson.build
2115
index XXXXXXX..XXXXXXX 100644
2116
--- a/net/meson.build
2117
+++ b/net/meson.build
2118
@@ -XXX,XX +XXX,XX @@
2119
-softmmu_ss.add(files(
2120
+system_ss.add(files(
2121
'announce.c',
2122
'checksum.c',
2123
'dump.c',
2124
@@ -XXX,XX +XXX,XX @@ softmmu_ss.add(files(
2125
2126
if get_option('replication').allowed() or \
2127
get_option('colo_proxy').allowed()
2128
- softmmu_ss.add(files('colo-compare.c'))
2129
- softmmu_ss.add(files('colo.c'))
2130
+ system_ss.add(files('colo-compare.c'))
2131
+ system_ss.add(files('colo.c'))
2132
endif
2133
2134
if get_option('colo_proxy').allowed()
2135
- softmmu_ss.add(files('filter-rewriter.c'))
2136
+ system_ss.add(files('filter-rewriter.c'))
2137
endif
2138
2139
-softmmu_ss.add(when: 'CONFIG_TCG', if_true: files('filter-replay.c'))
2140
+system_ss.add(when: 'CONFIG_TCG', if_true: files('filter-replay.c'))
2141
2142
if have_l2tpv3
2143
- softmmu_ss.add(files('l2tpv3.c'))
2144
+ system_ss.add(files('l2tpv3.c'))
2145
endif
2146
-softmmu_ss.add(when: slirp, if_true: files('slirp.c'))
2147
-softmmu_ss.add(when: vde, if_true: files('vde.c'))
2148
+system_ss.add(when: slirp, if_true: files('slirp.c'))
2149
+system_ss.add(when: vde, if_true: files('vde.c'))
2150
if have_netmap
2151
- softmmu_ss.add(files('netmap.c'))
2152
+ system_ss.add(files('netmap.c'))
2153
endif
2154
if have_vhost_net_user
2155
- softmmu_ss.add(when: 'CONFIG_VIRTIO_NET', if_true: files('vhost-user.c'), if_false: files('vhost-user-stub.c'))
2156
- softmmu_ss.add(when: 'CONFIG_ALL', if_true: files('vhost-user-stub.c'))
2157
+ system_ss.add(when: 'CONFIG_VIRTIO_NET', if_true: files('vhost-user.c'), if_false: files('vhost-user-stub.c'))
2158
+ system_ss.add(when: 'CONFIG_ALL', if_true: files('vhost-user-stub.c'))
2159
endif
2160
2161
-softmmu_ss.add(when: 'CONFIG_LINUX', if_true: files('tap-linux.c'))
2162
-softmmu_ss.add(when: 'CONFIG_BSD', if_true: files('tap-bsd.c'))
2163
-softmmu_ss.add(when: 'CONFIG_SOLARIS', if_true: files('tap-solaris.c'))
2164
+system_ss.add(when: 'CONFIG_LINUX', if_true: files('tap-linux.c'))
2165
+system_ss.add(when: 'CONFIG_BSD', if_true: files('tap-bsd.c'))
2166
+system_ss.add(when: 'CONFIG_SOLARIS', if_true: files('tap-solaris.c'))
2167
tap_posix = ['tap.c']
2168
if not config_host.has_key('CONFIG_LINUX') and not config_host.has_key('CONFIG_BSD') and not config_host.has_key('CONFIG_SOLARIS')
2169
tap_posix += 'tap-stub.c'
2170
endif
2171
-softmmu_ss.add(when: 'CONFIG_POSIX', if_true: files(tap_posix))
2172
-softmmu_ss.add(when: 'CONFIG_WIN32', if_true: files('tap-win32.c'))
2173
+system_ss.add(when: 'CONFIG_POSIX', if_true: files(tap_posix))
2174
+system_ss.add(when: 'CONFIG_WIN32', if_true: files('tap-win32.c'))
2175
if have_vhost_net_vdpa
2176
- softmmu_ss.add(when: 'CONFIG_VIRTIO_NET', if_true: files('vhost-vdpa.c'), if_false: files('vhost-vdpa-stub.c'))
2177
- softmmu_ss.add(when: 'CONFIG_ALL', if_true: files('vhost-vdpa-stub.c'))
2178
+ system_ss.add(when: 'CONFIG_VIRTIO_NET', if_true: files('vhost-vdpa.c'), if_false: files('vhost-vdpa-stub.c'))
2179
+ system_ss.add(when: 'CONFIG_ALL', if_true: files('vhost-vdpa-stub.c'))
2180
endif
2181
2182
vmnet_files = files(
2183
@@ -XXX,XX +XXX,XX @@ vmnet_files = files(
2184
'vmnet-host.c',
2185
'vmnet-shared.c'
2186
)
2187
-softmmu_ss.add(when: vmnet, if_true: vmnet_files)
2188
+system_ss.add(when: vmnet, if_true: vmnet_files)
2189
subdir('can')
2190
diff --git a/qom/meson.build b/qom/meson.build
2191
index XXXXXXX..XXXXXXX 100644
2192
--- a/qom/meson.build
2193
+++ b/qom/meson.build
2194
@@ -XXX,XX +XXX,XX @@ qom_ss.add(files(
2195
))
2196
2197
qmp_ss.add(files('qom-qmp-cmds.c'))
2198
-softmmu_ss.add(files('qom-hmp-cmds.c'))
2199
+system_ss.add(files('qom-hmp-cmds.c'))
2200
diff --git a/replay/meson.build b/replay/meson.build
2201
index XXXXXXX..XXXXXXX 100644
2202
--- a/replay/meson.build
2203
+++ b/replay/meson.build
2204
@@ -XXX,XX +XXX,XX @@
2205
-softmmu_ss.add(when: 'CONFIG_TCG', if_true: files(
2206
+system_ss.add(when: 'CONFIG_TCG', if_true: files(
2207
'replay.c',
2208
'replay-internal.c',
2209
'replay-events.c',
2210
diff --git a/softmmu/meson.build b/softmmu/meson.build
2211
index XXXXXXX..XXXXXXX 100644
2212
--- a/softmmu/meson.build
2213
+++ b/softmmu/meson.build
2214
@@ -XXX,XX +XXX,XX @@ specific_ss.add(when: ['CONFIG_SYSTEM_ONLY', 'CONFIG_TCG'], if_true: [files(
2215
'icount.c',
2216
)])
2217
2218
-softmmu_ss.add(files(
2219
+system_ss.add(files(
2220
'balloon.c',
2221
'bootdevice.c',
2222
'cpus.c',
2223
@@ -XXX,XX +XXX,XX @@ softmmu_ss.add(files(
2224
), sdl, libpmem, libdaxctl)
2225
2226
if have_tpm
2227
- softmmu_ss.add(files('tpm.c'))
2228
+ system_ss.add(files('tpm.c'))
2229
endif
2230
2231
-softmmu_ss.add(when: seccomp, if_true: files('qemu-seccomp.c'))
2232
-softmmu_ss.add(when: fdt, if_true: files('device_tree.c'))
2233
+system_ss.add(when: seccomp, if_true: files('qemu-seccomp.c'))
2234
+system_ss.add(when: fdt, if_true: files('device_tree.c'))
2235
diff --git a/stats/meson.build b/stats/meson.build
2236
index XXXXXXX..XXXXXXX 100644
2237
--- a/stats/meson.build
2238
+++ b/stats/meson.build
2239
@@ -1 +1 @@
2240
-softmmu_ss.add(files('stats-hmp-cmds.c', 'stats-qmp-cmds.c'))
2241
+system_ss.add(files('stats-hmp-cmds.c', 'stats-qmp-cmds.c'))
2242
diff --git a/target/alpha/meson.build b/target/alpha/meson.build
2243
index XXXXXXX..XXXXXXX 100644
2244
--- a/target/alpha/meson.build
2245
+++ b/target/alpha/meson.build
2246
@@ -XXX,XX +XXX,XX @@ alpha_ss.add(files(
2247
'vax_helper.c',
2248
))
2249
2250
-alpha_softmmu_ss = ss.source_set()
2251
-alpha_softmmu_ss.add(files('machine.c'))
2252
+alpha_system_ss = ss.source_set()
2253
+alpha_system_ss.add(files('machine.c'))
2254
2255
target_arch += {'alpha': alpha_ss}
2256
-target_softmmu_arch += {'alpha': alpha_softmmu_ss}
2257
+target_softmmu_arch += {'alpha': alpha_system_ss}
2258
diff --git a/target/arm/hvf/meson.build b/target/arm/hvf/meson.build
2259
index XXXXXXX..XXXXXXX 100644
2260
--- a/target/arm/hvf/meson.build
2261
+++ b/target/arm/hvf/meson.build
2262
@@ -XXX,XX +XXX,XX @@
2263
-arm_softmmu_ss.add(when: [hvf, 'CONFIG_HVF'], if_true: files(
2264
+arm_system_ss.add(when: [hvf, 'CONFIG_HVF'], if_true: files(
2265
'hvf.c',
2266
))
2267
diff --git a/target/arm/meson.build b/target/arm/meson.build
2268
index XXXXXXX..XXXXXXX 100644
2269
--- a/target/arm/meson.build
2270
+++ b/target/arm/meson.build
2271
@@ -XXX,XX +XXX,XX @@ arm_ss.add(when: 'TARGET_AARCH64', if_true: files(
2272
'gdbstub64.c',
2273
))
2274
2275
-arm_softmmu_ss = ss.source_set()
2276
-arm_softmmu_ss.add(files(
2277
+arm_system_ss = ss.source_set()
2278
+arm_system_ss.add(files(
2279
'arch_dump.c',
2280
'arm-powerctl.c',
2281
'arm-qmp-cmds.c',
2282
@@ -XXX,XX +XXX,XX @@ else
2283
endif
2284
2285
target_arch += {'arm': arm_ss}
2286
-target_softmmu_arch += {'arm': arm_softmmu_ss}
2287
+target_softmmu_arch += {'arm': arm_system_ss}
2288
diff --git a/target/arm/tcg/meson.build b/target/arm/tcg/meson.build
2289
index XXXXXXX..XXXXXXX 100644
2290
--- a/target/arm/tcg/meson.build
2291
+++ b/target/arm/tcg/meson.build
2292
@@ -XXX,XX +XXX,XX @@ arm_ss.add(when: 'TARGET_AARCH64', if_true: files(
2293
'sve_helper.c',
2294
))
2295
2296
-arm_softmmu_ss.add(files(
2297
+arm_system_ss.add(files(
2298
'psci.c',
2299
))
2300
diff --git a/target/avr/meson.build b/target/avr/meson.build
2301
index XXXXXXX..XXXXXXX 100644
2302
--- a/target/avr/meson.build
2303
+++ b/target/avr/meson.build
2304
@@ -XXX,XX +XXX,XX @@ gen = [
2305
]
2306
2307
avr_ss = ss.source_set()
2308
-avr_softmmu_ss = ss.source_set()
2309
+avr_system_ss = ss.source_set()
2310
2311
avr_ss.add(gen)
2312
avr_ss.add(files(
2313
@@ -XXX,XX +XXX,XX @@ avr_ss.add(files(
2314
'gdbstub.c',
2315
'disas.c'))
2316
2317
-avr_softmmu_ss.add(files('machine.c'))
2318
+avr_system_ss.add(files('machine.c'))
2319
2320
target_arch += {'avr': avr_ss}
2321
-target_softmmu_arch += {'avr': avr_softmmu_ss}
2322
+target_softmmu_arch += {'avr': avr_system_ss}
2323
diff --git a/target/cris/meson.build b/target/cris/meson.build
2324
index XXXXXXX..XXXXXXX 100644
2325
--- a/target/cris/meson.build
2326
+++ b/target/cris/meson.build
2327
@@ -XXX,XX +XXX,XX @@ cris_ss.add(files(
2328
'translate.c',
2329
))
2330
2331
-cris_softmmu_ss = ss.source_set()
2332
-cris_softmmu_ss.add(files(
2333
+cris_system_ss = ss.source_set()
2334
+cris_system_ss.add(files(
2335
'helper.c',
2336
'machine.c',
2337
'mmu.c',
2338
))
2339
2340
target_arch += {'cris': cris_ss}
2341
-target_softmmu_arch += {'cris': cris_softmmu_ss}
2342
+target_softmmu_arch += {'cris': cris_system_ss}
2343
diff --git a/target/hppa/meson.build b/target/hppa/meson.build
2344
index XXXXXXX..XXXXXXX 100644
2345
--- a/target/hppa/meson.build
2346
+++ b/target/hppa/meson.build
2347
@@ -XXX,XX +XXX,XX @@ hppa_ss.add(files(
2348
'translate.c',
2349
))
2350
2351
-hppa_softmmu_ss = ss.source_set()
2352
-hppa_softmmu_ss.add(files(
2353
+hppa_system_ss = ss.source_set()
2354
+hppa_system_ss.add(files(
2355
'int_helper.c',
2356
'machine.c',
2357
'mem_helper.c',
2358
@@ -XXX,XX +XXX,XX @@ hppa_softmmu_ss.add(files(
2359
))
2360
2361
target_arch += {'hppa': hppa_ss}
2362
-target_softmmu_arch += {'hppa': hppa_softmmu_ss}
2363
+target_softmmu_arch += {'hppa': hppa_system_ss}
2364
diff --git a/target/i386/hax/meson.build b/target/i386/hax/meson.build
2365
index XXXXXXX..XXXXXXX 100644
2366
--- a/target/i386/hax/meson.build
2367
+++ b/target/i386/hax/meson.build
2368
@@ -XXX,XX +XXX,XX @@
2369
-i386_softmmu_ss.add(when: 'CONFIG_HAX', if_true: files(
2370
+i386_system_ss.add(when: 'CONFIG_HAX', if_true: files(
2371
'hax-all.c',
2372
'hax-mem.c',
2373
'hax-accel-ops.c',
2374
))
2375
-i386_softmmu_ss.add(when: ['CONFIG_HAX', 'CONFIG_POSIX'], if_true: files('hax-posix.c'))
2376
-i386_softmmu_ss.add(when: ['CONFIG_HAX', 'CONFIG_WIN32'], if_true: files('hax-windows.c'))
2377
+i386_system_ss.add(when: ['CONFIG_HAX', 'CONFIG_POSIX'], if_true: files('hax-posix.c'))
2378
+i386_system_ss.add(when: ['CONFIG_HAX', 'CONFIG_WIN32'], if_true: files('hax-windows.c'))
2379
diff --git a/target/i386/hvf/meson.build b/target/i386/hvf/meson.build
2380
index XXXXXXX..XXXXXXX 100644
2381
--- a/target/i386/hvf/meson.build
2382
+++ b/target/i386/hvf/meson.build
2383
@@ -XXX,XX +XXX,XX @@
2384
-i386_softmmu_ss.add(when: [hvf, 'CONFIG_HVF'], if_true: files(
2385
+i386_system_ss.add(when: [hvf, 'CONFIG_HVF'], if_true: files(
2386
'hvf.c',
2387
'x86.c',
2388
'x86_cpuid.c',
2389
diff --git a/target/i386/kvm/meson.build b/target/i386/kvm/meson.build
2390
index XXXXXXX..XXXXXXX 100644
2391
--- a/target/i386/kvm/meson.build
2392
+++ b/target/i386/kvm/meson.build
2393
@@ -XXX,XX +XXX,XX @@ i386_softmmu_kvm_ss.add(when: 'CONFIG_XEN_EMU', if_true: files('xen-emu.c'))
2394
2395
i386_softmmu_kvm_ss.add(when: 'CONFIG_SEV', if_false: files('sev-stub.c'))
2396
2397
-i386_softmmu_ss.add(when: 'CONFIG_HYPERV', if_true: files('hyperv.c'), if_false: files('hyperv-stub.c'))
2398
+i386_system_ss.add(when: 'CONFIG_HYPERV', if_true: files('hyperv.c'), if_false: files('hyperv-stub.c'))
2399
2400
-i386_softmmu_ss.add_all(when: 'CONFIG_KVM', if_true: i386_softmmu_kvm_ss)
2401
+i386_system_ss.add_all(when: 'CONFIG_KVM', if_true: i386_softmmu_kvm_ss)
2402
diff --git a/target/i386/meson.build b/target/i386/meson.build
2403
index XXXXXXX..XXXXXXX 100644
2404
--- a/target/i386/meson.build
2405
+++ b/target/i386/meson.build
2406
@@ -XXX,XX +XXX,XX @@ i386_ss.add(when: 'CONFIG_SEV', if_true: files('host-cpu.c'))
2407
i386_ss.add(when: 'CONFIG_KVM', if_true: files('host-cpu.c'))
2408
i386_ss.add(when: 'CONFIG_HVF', if_true: files('host-cpu.c'))
2409
2410
-i386_softmmu_ss = ss.source_set()
2411
-i386_softmmu_ss.add(files(
2412
+i386_system_ss = ss.source_set()
2413
+i386_system_ss.add(files(
2414
'arch_dump.c',
2415
'arch_memory_mapping.c',
2416
'machine.c',
2417
'monitor.c',
2418
'cpu-sysemu.c',
2419
))
2420
-i386_softmmu_ss.add(when: 'CONFIG_SEV', if_true: files('sev.c'), if_false: files('sev-sysemu-stub.c'))
2421
+i386_system_ss.add(when: 'CONFIG_SEV', if_true: files('sev.c'), if_false: files('sev-sysemu-stub.c'))
2422
2423
i386_user_ss = ss.source_set()
2424
2425
@@ -XXX,XX +XXX,XX @@ subdir('hvf')
2426
subdir('tcg')
2427
2428
target_arch += {'i386': i386_ss}
2429
-target_softmmu_arch += {'i386': i386_softmmu_ss}
2430
+target_softmmu_arch += {'i386': i386_system_ss}
2431
target_user_arch += {'i386': i386_user_ss}
2432
diff --git a/target/i386/nvmm/meson.build b/target/i386/nvmm/meson.build
2433
index XXXXXXX..XXXXXXX 100644
2434
--- a/target/i386/nvmm/meson.build
2435
+++ b/target/i386/nvmm/meson.build
2436
@@ -XXX,XX +XXX,XX @@
2437
-i386_softmmu_ss.add(when: 'CONFIG_NVMM', if_true:
2438
+i386_system_ss.add(when: 'CONFIG_NVMM', if_true:
2439
files(
2440
'nvmm-all.c',
2441
'nvmm-accel-ops.c',
2442
)
2443
)
2444
2445
-i386_softmmu_ss.add(when: 'CONFIG_NVMM', if_true: nvmm)
2446
+i386_system_ss.add(when: 'CONFIG_NVMM', if_true: nvmm)
2447
diff --git a/target/i386/tcg/sysemu/meson.build b/target/i386/tcg/sysemu/meson.build
2448
index XXXXXXX..XXXXXXX 100644
2449
--- a/target/i386/tcg/sysemu/meson.build
2450
+++ b/target/i386/tcg/sysemu/meson.build
2451
@@ -XXX,XX +XXX,XX @@
2452
-i386_softmmu_ss.add(when: ['CONFIG_TCG', 'CONFIG_SYSTEM_ONLY'], if_true: files(
2453
+i386_system_ss.add(when: ['CONFIG_TCG', 'CONFIG_SYSTEM_ONLY'], if_true: files(
2454
'tcg-cpu.c',
2455
'smm_helper.c',
2456
'excp_helper.c',
2457
diff --git a/target/i386/whpx/meson.build b/target/i386/whpx/meson.build
2458
index XXXXXXX..XXXXXXX 100644
2459
--- a/target/i386/whpx/meson.build
2460
+++ b/target/i386/whpx/meson.build
2461
@@ -XXX,XX +XXX,XX @@
2462
-i386_softmmu_ss.add(when: 'CONFIG_WHPX', if_true: files(
2463
+i386_system_ss.add(when: 'CONFIG_WHPX', if_true: files(
2464
'whpx-all.c',
2465
'whpx-apic.c',
2466
'whpx-accel-ops.c',
2467
diff --git a/target/loongarch/meson.build b/target/loongarch/meson.build
2468
index XXXXXXX..XXXXXXX 100644
2469
--- a/target/loongarch/meson.build
2470
+++ b/target/loongarch/meson.build
2471
@@ -XXX,XX +XXX,XX @@ loongarch_tcg_ss.add(files(
2472
))
2473
loongarch_tcg_ss.add(zlib)
2474
2475
-loongarch_softmmu_ss = ss.source_set()
2476
-loongarch_softmmu_ss.add(files(
2477
+loongarch_system_ss = ss.source_set()
2478
+loongarch_system_ss.add(files(
2479
'loongarch-qmp-cmds.c',
2480
'machine.c',
2481
'tlb_helper.c',
2482
@@ -XXX,XX +XXX,XX @@ common_ss.add(when: 'CONFIG_LOONGARCH_DIS', if_true: [files('disas.c'), gen])
2483
loongarch_ss.add_all(when: 'CONFIG_TCG', if_true: [loongarch_tcg_ss])
2484
2485
target_arch += {'loongarch': loongarch_ss}
2486
-target_softmmu_arch += {'loongarch': loongarch_softmmu_ss}
2487
+target_softmmu_arch += {'loongarch': loongarch_system_ss}
2488
diff --git a/target/m68k/meson.build b/target/m68k/meson.build
2489
index XXXXXXX..XXXXXXX 100644
2490
--- a/target/m68k/meson.build
2491
+++ b/target/m68k/meson.build
2492
@@ -XXX,XX +XXX,XX @@ m68k_ss.add(files(
2493
'translate.c',
2494
))
2495
2496
-m68k_softmmu_ss = ss.source_set()
2497
-m68k_softmmu_ss.add(files(
2498
+m68k_system_ss = ss.source_set()
2499
+m68k_system_ss.add(files(
2500
'm68k-semi.c',
2501
'monitor.c'
2502
))
2503
2504
target_arch += {'m68k': m68k_ss}
2505
-target_softmmu_arch += {'m68k': m68k_softmmu_ss}
2506
+target_softmmu_arch += {'m68k': m68k_system_ss}
2507
diff --git a/target/microblaze/meson.build b/target/microblaze/meson.build
2508
index XXXXXXX..XXXXXXX 100644
2509
--- a/target/microblaze/meson.build
2510
+++ b/target/microblaze/meson.build
2511
@@ -XXX,XX +XXX,XX @@ microblaze_ss.add(files(
2512
'translate.c',
2513
))
2514
2515
-microblaze_softmmu_ss = ss.source_set()
2516
-microblaze_softmmu_ss.add(files(
2517
+microblaze_system_ss = ss.source_set()
2518
+microblaze_system_ss.add(files(
2519
'mmu.c',
2520
'machine.c',
2521
))
2522
2523
target_arch += {'microblaze': microblaze_ss}
2524
-target_softmmu_arch += {'microblaze': microblaze_softmmu_ss}
2525
+target_softmmu_arch += {'microblaze': microblaze_system_ss}
2526
diff --git a/target/mips/meson.build b/target/mips/meson.build
2527
index XXXXXXX..XXXXXXX 100644
2528
--- a/target/mips/meson.build
2529
+++ b/target/mips/meson.build
2530
@@ -XXX,XX +XXX,XX @@
2531
mips_user_ss = ss.source_set()
2532
-mips_softmmu_ss = ss.source_set()
2533
+mips_system_ss = ss.source_set()
2534
mips_ss = ss.source_set()
2535
mips_ss.add(files(
2536
'cpu.c',
2537
@@ -XXX,XX +XXX,XX @@ endif
2538
mips_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c'))
2539
2540
target_arch += {'mips': mips_ss}
2541
-target_softmmu_arch += {'mips': mips_softmmu_ss}
2542
+target_softmmu_arch += {'mips': mips_system_ss}
2543
target_user_arch += {'mips': mips_user_ss}
2544
diff --git a/target/mips/sysemu/meson.build b/target/mips/sysemu/meson.build
2545
index XXXXXXX..XXXXXXX 100644
2546
--- a/target/mips/sysemu/meson.build
2547
+++ b/target/mips/sysemu/meson.build
2548
@@ -XXX,XX +XXX,XX @@
2549
-mips_softmmu_ss.add(files(
2550
+mips_system_ss.add(files(
2551
'addr.c',
2552
'cp0.c',
2553
'cp0_timer.c',
2554
diff --git a/target/mips/tcg/sysemu/meson.build b/target/mips/tcg/sysemu/meson.build
2555
index XXXXXXX..XXXXXXX 100644
2556
--- a/target/mips/tcg/sysemu/meson.build
2557
+++ b/target/mips/tcg/sysemu/meson.build
2558
@@ -XXX,XX +XXX,XX @@
2559
-mips_softmmu_ss.add(files(
2560
+mips_system_ss.add(files(
2561
'cp0_helper.c',
2562
'mips-semi.c',
2563
'special_helper.c',
2564
diff --git a/target/nios2/meson.build b/target/nios2/meson.build
2565
index XXXXXXX..XXXXXXX 100644
2566
--- a/target/nios2/meson.build
2567
+++ b/target/nios2/meson.build
2568
@@ -XXX,XX +XXX,XX @@ nios2_ss.add(files(
2569
'translate.c',
2570
))
2571
2572
-nios2_softmmu_ss = ss.source_set()
2573
-nios2_softmmu_ss.add(files(
2574
+nios2_system_ss = ss.source_set()
2575
+nios2_system_ss.add(files(
2576
'helper.c',
2577
'monitor.c',
2578
'mmu.c',
2579
@@ -XXX,XX +XXX,XX @@ nios2_softmmu_ss.add(files(
2580
))
2581
2582
target_arch += {'nios2': nios2_ss}
2583
-target_softmmu_arch += {'nios2': nios2_softmmu_ss}
2584
+target_softmmu_arch += {'nios2': nios2_system_ss}
2585
diff --git a/target/openrisc/meson.build b/target/openrisc/meson.build
2586
index XXXXXXX..XXXXXXX 100644
2587
--- a/target/openrisc/meson.build
2588
+++ b/target/openrisc/meson.build
2589
@@ -XXX,XX +XXX,XX @@ openrisc_ss.add(files(
2590
'translate.c',
2591
))
2592
2593
-openrisc_softmmu_ss = ss.source_set()
2594
-openrisc_softmmu_ss.add(files(
2595
+openrisc_system_ss = ss.source_set()
2596
+openrisc_system_ss.add(files(
2597
'interrupt.c',
2598
'machine.c',
2599
'mmu.c',
2600
))
2601
2602
target_arch += {'openrisc': openrisc_ss}
2603
-target_softmmu_arch += {'openrisc': openrisc_softmmu_ss}
2604
+target_softmmu_arch += {'openrisc': openrisc_system_ss}
2605
diff --git a/target/ppc/meson.build b/target/ppc/meson.build
2606
index XXXXXXX..XXXXXXX 100644
2607
--- a/target/ppc/meson.build
2608
+++ b/target/ppc/meson.build
2609
@@ -XXX,XX +XXX,XX @@ ppc_ss.add(gen)
2610
ppc_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c'), if_false: files('kvm-stub.c'))
2611
ppc_ss.add(when: 'CONFIG_USER_ONLY', if_true: files('user_only_helper.c'))
2612
2613
-ppc_softmmu_ss = ss.source_set()
2614
-ppc_softmmu_ss.add(files(
2615
+ppc_system_ss = ss.source_set()
2616
+ppc_system_ss.add(files(
2617
'arch_dump.c',
2618
'machine.c',
2619
'mmu-hash32.c',
2620
'mmu_common.c',
2621
'ppc-qmp-cmds.c',
2622
))
2623
-ppc_softmmu_ss.add(when: 'CONFIG_TCG', if_true: files(
2624
+ppc_system_ss.add(when: 'CONFIG_TCG', if_true: files(
2625
'mmu_helper.c',
2626
), if_false: files(
2627
'tcg-stub.c',
2628
))
2629
2630
-ppc_softmmu_ss.add(when: 'TARGET_PPC64', if_true: files(
2631
+ppc_system_ss.add(when: 'TARGET_PPC64', if_true: files(
2632
'compat.c',
2633
'mmu-book3s-v3.c',
2634
'mmu-hash64.c',
2635
@@ -XXX,XX +XXX,XX @@ ppc_softmmu_ss.add(when: 'TARGET_PPC64', if_true: files(
2636
))
2637
2638
target_arch += {'ppc': ppc_ss}
2639
-target_softmmu_arch += {'ppc': ppc_softmmu_ss}
2640
+target_softmmu_arch += {'ppc': ppc_system_ss}
2641
diff --git a/target/riscv/meson.build b/target/riscv/meson.build
2642
index XXXXXXX..XXXXXXX 100644
2643
--- a/target/riscv/meson.build
2644
+++ b/target/riscv/meson.build
2645
@@ -XXX,XX +XXX,XX @@ riscv_ss.add(files(
2646
))
2647
riscv_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c'), if_false: files('kvm-stub.c'))
2648
2649
-riscv_softmmu_ss = ss.source_set()
2650
-riscv_softmmu_ss.add(files(
2651
+riscv_system_ss = ss.source_set()
2652
+riscv_system_ss.add(files(
2653
'arch_dump.c',
2654
'pmp.c',
2655
'debug.c',
2656
@@ -XXX,XX +XXX,XX @@ riscv_softmmu_ss.add(files(
2657
))
2658
2659
target_arch += {'riscv': riscv_ss}
2660
-target_softmmu_arch += {'riscv': riscv_softmmu_ss}
2661
+target_softmmu_arch += {'riscv': riscv_system_ss}
2662
diff --git a/target/s390x/kvm/meson.build b/target/s390x/kvm/meson.build
2663
index XXXXXXX..XXXXXXX 100644
2664
--- a/target/s390x/kvm/meson.build
2665
+++ b/target/s390x/kvm/meson.build
2666
@@ -XXX,XX +XXX,XX @@ s390x_ss.add(when: 'CONFIG_KVM', if_true: files(
2667
# - KVM is enabled
2668
# - the linker supports --s390-pgste
2669
if host_machine.cpu_family() == 's390x' and cc.has_link_argument('-Wl,--s390-pgste')
2670
- s390x_softmmu_ss.add(when: 'CONFIG_KVM',
2671
+ s390x_system_ss.add(when: 'CONFIG_KVM',
2672
if_true: declare_dependency(link_args: ['-Wl,--s390-pgste']))
2673
endif
2674
diff --git a/target/s390x/meson.build b/target/s390x/meson.build
2675
index XXXXXXX..XXXXXXX 100644
2676
--- a/target/s390x/meson.build
2677
+++ b/target/s390x/meson.build
2678
@@ -XXX,XX +XXX,XX @@ gen_features_h = custom_target('gen-features.h',
2679
2680
s390x_ss.add(gen_features_h)
2681
2682
-s390x_softmmu_ss = ss.source_set()
2683
-s390x_softmmu_ss.add(files(
2684
+s390x_system_ss = ss.source_set()
2685
+s390x_system_ss.add(files(
2686
'helper.c',
2687
'arch_dump.c',
2688
'diag.c',
2689
@@ -XXX,XX +XXX,XX @@ subdir('tcg')
2690
subdir('kvm')
2691
2692
target_arch += {'s390x': s390x_ss}
2693
-target_softmmu_arch += {'s390x': s390x_softmmu_ss}
2694
+target_softmmu_arch += {'s390x': s390x_system_ss}
2695
target_user_arch += {'s390x': s390x_user_ss}
2696
diff --git a/target/sh4/meson.build b/target/sh4/meson.build
2697
index XXXXXXX..XXXXXXX 100644
2698
--- a/target/sh4/meson.build
2699
+++ b/target/sh4/meson.build
2700
@@ -XXX,XX +XXX,XX @@ sh4_ss.add(files(
2701
'translate.c',
2702
))
2703
2704
-sh4_softmmu_ss = ss.source_set()
2705
-sh4_softmmu_ss.add(files('monitor.c'))
2706
+sh4_system_ss = ss.source_set()
2707
+sh4_system_ss.add(files('monitor.c'))
2708
2709
target_arch += {'sh4': sh4_ss}
2710
-target_softmmu_arch += {'sh4': sh4_softmmu_ss}
2711
+target_softmmu_arch += {'sh4': sh4_system_ss}
2712
diff --git a/target/sparc/meson.build b/target/sparc/meson.build
2713
index XXXXXXX..XXXXXXX 100644
2714
--- a/target/sparc/meson.build
2715
+++ b/target/sparc/meson.build
2716
@@ -XXX,XX +XXX,XX @@ sparc_ss.add(files(
2717
sparc_ss.add(when: 'TARGET_SPARC', if_true: files('int32_helper.c'))
2718
sparc_ss.add(when: 'TARGET_SPARC64', if_true: files('int64_helper.c', 'vis_helper.c'))
2719
2720
-sparc_softmmu_ss = ss.source_set()
2721
-sparc_softmmu_ss.add(files(
2722
+sparc_system_ss = ss.source_set()
2723
+sparc_system_ss.add(files(
2724
'machine.c',
2725
'mmu_helper.c',
2726
'monitor.c',
2727
))
2728
2729
target_arch += {'sparc': sparc_ss}
2730
-target_softmmu_arch += {'sparc': sparc_softmmu_ss}
2731
+target_softmmu_arch += {'sparc': sparc_system_ss}
2732
diff --git a/target/tricore/meson.build b/target/tricore/meson.build
2733
index XXXXXXX..XXXXXXX 100644
2734
--- a/target/tricore/meson.build
2735
+++ b/target/tricore/meson.build
2736
@@ -XXX,XX +XXX,XX @@ tricore_ss.add(files(
2737
))
2738
tricore_ss.add(zlib)
2739
2740
-tricore_softmmu_ss = ss.source_set()
2741
+tricore_system_ss = ss.source_set()
2742
2743
target_arch += {'tricore': tricore_ss}
2744
-target_softmmu_arch += {'tricore': tricore_softmmu_ss}
2745
+target_softmmu_arch += {'tricore': tricore_system_ss}
2746
diff --git a/target/xtensa/meson.build b/target/xtensa/meson.build
2747
index XXXXXXX..XXXXXXX 100644
2748
--- a/target/xtensa/meson.build
2749
+++ b/target/xtensa/meson.build
2750
@@ -XXX,XX +XXX,XX @@ xtensa_ss.add(files(
2751
'xtensa-isa.c',
2752
))
2753
2754
-xtensa_softmmu_ss = ss.source_set()
2755
-xtensa_softmmu_ss.add(files(
2756
+xtensa_system_ss = ss.source_set()
2757
+xtensa_system_ss.add(files(
2758
'dbg_helper.c',
2759
'mmu_helper.c',
2760
'monitor.c',
2761
@@ -XXX,XX +XXX,XX @@ xtensa_softmmu_ss.add(files(
2762
))
2763
2764
target_arch += {'xtensa': xtensa_ss}
2765
-target_softmmu_arch += {'xtensa': xtensa_softmmu_ss}
2766
+target_softmmu_arch += {'xtensa': xtensa_system_ss}
2767
diff --git a/tcg/meson.build b/tcg/meson.build
2768
index XXXXXXX..XXXXXXX 100644
2769
--- a/tcg/meson.build
2770
+++ b/tcg/meson.build
2771
@@ -XXX,XX +XXX,XX @@ libtcg_softmmu = static_library('tcg_softmmu',
2772
2773
tcg_softmmu = declare_dependency(link_with: libtcg_softmmu,
2774
dependencies: tcg_ss.dependencies())
2775
-softmmu_ss.add(tcg_softmmu)
2776
+system_ss.add(tcg_softmmu)
2777
diff --git a/trace/meson.build b/trace/meson.build
2778
index XXXXXXX..XXXXXXX 100644
2779
--- a/trace/meson.build
2780
+++ b/trace/meson.build
2781
@@ -XXX,XX +XXX,XX @@
2782
-softmmu_ss.add(files('trace-hmp-cmds.c'))
2783
+system_ss.add(files('trace-hmp-cmds.c'))
2784
2785
specific_ss.add(files('control-target.c'))
2786
2787
diff --git a/ui/meson.build b/ui/meson.build
2788
index XXXXXXX..XXXXXXX 100644
2789
--- a/ui/meson.build
2790
+++ b/ui/meson.build
2791
@@ -XXX,XX +XXX,XX @@
2792
-softmmu_ss.add(pixman)
2793
+system_ss.add(pixman)
2794
specific_ss.add(when: ['CONFIG_SYSTEM_ONLY'], if_true: pixman) # for the include path
2795
specific_ss.add(when: ['CONFIG_SYSTEM_ONLY'], if_true: opengl) # for the include path
2796
2797
-softmmu_ss.add(png)
2798
-softmmu_ss.add(files(
2799
+system_ss.add(png)
2800
+system_ss.add(files(
2801
'clipboard.c',
2802
'console.c',
2803
'cursor.c',
2804
@@ -XXX,XX +XXX,XX @@ softmmu_ss.add(files(
2805
'util.c',
2806
))
2807
if dbus_display
2808
- softmmu_ss.add(files('dbus-module.c'))
2809
+ system_ss.add(files('dbus-module.c'))
2810
endif
2811
-softmmu_ss.add([spice_headers, files('spice-module.c')])
2812
-softmmu_ss.add(when: spice_protocol, if_true: files('vdagent.c'))
2813
+system_ss.add([spice_headers, files('spice-module.c')])
2814
+system_ss.add(when: spice_protocol, if_true: files('vdagent.c'))
2815
2816
-softmmu_ss.add(when: 'CONFIG_LINUX', if_true: files(
2817
+system_ss.add(when: 'CONFIG_LINUX', if_true: files(
2818
'input-linux.c',
2819
'udmabuf.c',
2820
))
2821
-softmmu_ss.add(when: cocoa, if_true: files('cocoa.m'))
2822
+system_ss.add(when: cocoa, if_true: files('cocoa.m'))
2823
2824
vnc_ss = ss.source_set()
2825
vnc_ss.add(files(
2826
@@ -XXX,XX +XXX,XX @@ vnc_ss.add(files(
2827
))
2828
vnc_ss.add(zlib, jpeg, gnutls)
2829
vnc_ss.add(when: sasl, if_true: files('vnc-auth-sasl.c'))
2830
-softmmu_ss.add_all(when: vnc, if_true: vnc_ss)
2831
-softmmu_ss.add(when: vnc, if_false: files('vnc-stubs.c'))
2832
+system_ss.add_all(when: vnc, if_true: vnc_ss)
2833
+system_ss.add(when: vnc, if_false: files('vnc-stubs.c'))
2834
2835
ui_modules = {}
2836
2837
@@ -XXX,XX +XXX,XX @@ if curses.found()
2838
ui_modules += {'curses' : curses_ss}
2839
endif
2840
2841
-softmmu_ss.add(opengl)
2842
+system_ss.add(opengl)
2843
if opengl.found()
2844
opengl_ss = ss.source_set()
2845
opengl_ss.add(gbm)
2846
@@ -XXX,XX +XXX,XX @@ if dbus_display
2847
endif
2848
2849
if gtk.found()
2850
- softmmu_ss.add(when: 'CONFIG_WIN32', if_true: files('win32-kbd-hook.c'))
2851
+ system_ss.add(when: 'CONFIG_WIN32', if_true: files('win32-kbd-hook.c'))
2852
2853
gtk_ss = ss.source_set()
2854
gtk_ss.add(gtk, vte, pixman, files('gtk.c'))
2855
@@ -XXX,XX +XXX,XX @@ if gtk.found()
2856
endif
2857
2858
if sdl.found()
2859
- softmmu_ss.add(when: 'CONFIG_WIN32', if_true: files('win32-kbd-hook.c'))
2860
+ system_ss.add(when: 'CONFIG_WIN32', if_true: files('win32-kbd-hook.c'))
2861
2862
sdl_ss = ss.source_set()
2863
sdl_ss.add(sdl, sdl_image, pixman, glib, files(
73
--
2864
--
74
2.17.2
2865
2.34.1
75
2866
76
2867
diff view generated by jsdifflib
[Qemu-devel] [PULL 25/32] tcg/optimize: Optimize bswap
[PULL 13/16] plugins: Remove unused 'exec/helper-proto.h' header
1
Somehow we forgot these operations, once upon a time.
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
2
This will allow immediate stores to have their bswap
3
optimized away.
4
2
3
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
4
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
5
Message-Id: <20230611085846.21415-2-philmd@linaro.org>
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
---
7
---
7
tcg/optimize.c | 12 ++++++++++++
8
plugins/core.c | 1 -
8
1 file changed, 12 insertions(+)
9
1 file changed, 1 deletion(-)
9
10
10
diff --git a/tcg/optimize.c b/tcg/optimize.c
11
diff --git a/plugins/core.c b/plugins/core.c
11
index XXXXXXX..XXXXXXX 100644
12
index XXXXXXX..XXXXXXX 100644
12
--- a/tcg/optimize.c
13
--- a/plugins/core.c
13
+++ b/tcg/optimize.c
14
+++ b/plugins/core.c
14
@@ -XXX,XX +XXX,XX @@ static TCGArg do_constant_folding_2(TCGOpcode op, TCGArg x, TCGArg y)
15
@@ -XXX,XX +XXX,XX @@
15
CASE_OP_32_64(ext16u):
16
16
return (uint16_t)x;
17
#include "exec/exec-all.h"
17
18
#include "exec/tb-flush.h"
18
+ CASE_OP_32_64(bswap16):
19
-#include "exec/helper-proto.h"
19
+ return bswap16(x);
20
#include "tcg/tcg.h"
20
+
21
#include "tcg/tcg-op.h"
21
+ CASE_OP_32_64(bswap32):
22
#include "plugin.h"
22
+ return bswap32(x);
23
+
24
+ case INDEX_op_bswap64_i64:
25
+ return bswap64(x);
26
+
27
case INDEX_op_ext_i32_i64:
28
case INDEX_op_ext32s_i64:
29
return (int32_t)x;
30
@@ -XXX,XX +XXX,XX @@ void tcg_optimize(TCGContext *s)
31
CASE_OP_32_64(ext16s):
32
CASE_OP_32_64(ext16u):
33
CASE_OP_32_64(ctpop):
34
+ CASE_OP_32_64(bswap16):
35
+ CASE_OP_32_64(bswap32):
36
+ case INDEX_op_bswap64_i64:
37
case INDEX_op_ext32s_i64:
38
case INDEX_op_ext32u_i64:
39
case INDEX_op_ext_i32_i64:
40
--
23
--
41
2.17.2
24
2.34.1
42
25
43
26
diff view generated by jsdifflib
[Qemu-devel] [PULL 02/32] tcg/i386: Move TCG_REG_CALL_STACK from define to enum
[PULL 14/16] accel/tcg/cpu-exec: Use generic 'helper-proto-common.h' header
1
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
2
Reviewed-by: Emilio G. Cota <cota@braap.org>
2
3
We only need lookup_tb_ptr() prototype.
4
5
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
6
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
7
Message-Id: <20230611085846.21415-3-philmd@linaro.org>
3
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
8
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
4
---
9
---
5
tcg/i386/tcg-target.h | 2 +-
10
accel/tcg/cpu-exec.c | 2 +-
6
1 file changed, 1 insertion(+), 1 deletion(-)
11
1 file changed, 1 insertion(+), 1 deletion(-)
7
12
8
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
13
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
9
index XXXXXXX..XXXXXXX 100644
14
index XXXXXXX..XXXXXXX 100644
10
--- a/tcg/i386/tcg-target.h
15
--- a/accel/tcg/cpu-exec.c
11
+++ b/tcg/i386/tcg-target.h
16
+++ b/accel/tcg/cpu-exec.c
12
@@ -XXX,XX +XXX,XX @@ typedef enum {
17
@@ -XXX,XX +XXX,XX @@
13
TCG_REG_RDI = TCG_REG_EDI,
18
#include "sysemu/cpu-timers.h"
14
19
#include "exec/replay-core.h"
15
TCG_AREG0 = TCG_REG_EBP,
20
#include "sysemu/tcg.h"
16
+ TCG_REG_CALL_STACK = TCG_REG_ESP
21
-#include "exec/helper-proto.h"
17
} TCGReg;
22
+#include "exec/helper-proto-common.h"
18
23
#include "tb-jmp-cache.h"
19
/* used for function call generation */
24
#include "tb-hash.h"
20
-#define TCG_REG_CALL_STACK TCG_REG_ESP
25
#include "tb-context.h"
21
#define TCG_TARGET_STACK_ALIGN 16
22
#if defined(_WIN64)
23
#define TCG_TARGET_CALL_STACK_OFFSET 32
24
--
26
--
25
2.17.2
27
2.34.1
26
28
27
29
diff view generated by jsdifflib
[Qemu-devel] [PULL 03/32] tcg/aarch64: Remove reloc_pc26_atomic
Deleted patch
1
It is unused since b68686bd4bfeb70040b4099df993dfa0b4f37b03.
2
1
3
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
4
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5
---
6
tcg/aarch64/tcg-target.inc.c | 12 ------------
7
1 file changed, 12 deletions(-)
8
9
diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c
10
index XXXXXXX..XXXXXXX 100644
11
--- a/tcg/aarch64/tcg-target.inc.c
12
+++ b/tcg/aarch64/tcg-target.inc.c
13
@@ -XXX,XX +XXX,XX @@ static inline void reloc_pc26(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
14
*code_ptr = deposit32(*code_ptr, 0, 26, offset);
15
}
16
17
-static inline void reloc_pc26_atomic(tcg_insn_unit *code_ptr,
18
- tcg_insn_unit *target)
19
-{
20
- ptrdiff_t offset = target - code_ptr;
21
- tcg_insn_unit insn;
22
- tcg_debug_assert(offset == sextract64(offset, 0, 26));
23
- /* read instruction, mask away previous PC_REL26 parameter contents,
24
- set the proper offset, then write back the instruction. */
25
- insn = atomic_read(code_ptr);
26
- atomic_set(code_ptr, deposit32(insn, 0, 26, offset));
27
-}
28
-
29
static inline void reloc_pc19(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
30
{
31
ptrdiff_t offset = target - code_ptr;
32
--
33
2.17.2
34
35
diff view generated by jsdifflib
[Qemu-devel] [PULL 04/32] tcg/aarch64: Fold away "noaddr" branch routines
Deleted patch
1
There are one use apiece for these. There is no longer a need for
2
preserving branch offset operands, as we no longer re-translate.
3
1
4
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
---
7
tcg/aarch64/tcg-target.inc.c | 21 ++-------------------
8
1 file changed, 2 insertions(+), 19 deletions(-)
9
10
diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c
11
index XXXXXXX..XXXXXXX 100644
12
--- a/tcg/aarch64/tcg-target.inc.c
13
+++ b/tcg/aarch64/tcg-target.inc.c
14
@@ -XXX,XX +XXX,XX @@ static inline void tcg_out_goto_long(TCGContext *s, tcg_insn_unit *target)
15
}
16
}
17
18
-static inline void tcg_out_goto_noaddr(TCGContext *s)
19
-{
20
- /* We pay attention here to not modify the branch target by reading from
21
- the buffer. This ensure that caches and memory are kept coherent during
22
- retranslation. Mask away possible garbage in the high bits for the
23
- first translation, while keeping the offset bits for retranslation. */
24
- uint32_t old = tcg_in32(s);
25
- tcg_out_insn(s, 3206, B, old);
26
-}
27
-
28
-static inline void tcg_out_goto_cond_noaddr(TCGContext *s, TCGCond c)
29
-{
30
- /* See comments in tcg_out_goto_noaddr. */
31
- uint32_t old = tcg_in32(s) >> 5;
32
- tcg_out_insn(s, 3202, B_C, c, old);
33
-}
34
-
35
static inline void tcg_out_callr(TCGContext *s, TCGReg reg)
36
{
37
tcg_out_insn(s, 3207, BLR, reg);
38
@@ -XXX,XX +XXX,XX @@ static inline void tcg_out_goto_label(TCGContext *s, TCGLabel *l)
39
{
40
if (!l->has_value) {
41
tcg_out_reloc(s, s->code_ptr, R_AARCH64_JUMP26, l, 0);
42
- tcg_out_goto_noaddr(s);
43
+ tcg_out_insn(s, 3206, B, 0);
44
} else {
45
tcg_out_goto(s, l->u.value_ptr);
46
}
47
@@ -XXX,XX +XXX,XX @@ static void tcg_out_tlb_read(TCGContext *s, TCGReg addr_reg, TCGMemOp opc,
48
49
/* If not equal, we jump to the slow path. */
50
*label_ptr = s->code_ptr;
51
- tcg_out_goto_cond_noaddr(s, TCG_COND_NE);
52
+ tcg_out_insn(s, 3202, B_C, TCG_COND_NE, 0);
53
}
54
55
#endif /* CONFIG_SOFTMMU */
56
--
57
2.17.2
58
59
diff view generated by jsdifflib
[Qemu-devel] [PULL 05/32] tcg/arm: Remove reloc_pc24_atomic
Deleted patch
1
It is unused since 3fb53fb4d12f2e7833bd1659e6013237b130ef20.
2
1
3
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
4
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5
---
6
tcg/arm/tcg-target.inc.c | 8 --------
7
1 file changed, 8 deletions(-)
8
9
diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c
10
index XXXXXXX..XXXXXXX 100644
11
--- a/tcg/arm/tcg-target.inc.c
12
+++ b/tcg/arm/tcg-target.inc.c
13
@@ -XXX,XX +XXX,XX @@ static inline void reloc_pc24(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
14
*code_ptr = (*code_ptr & ~0xffffff) | (offset & 0xffffff);
15
}
16
17
-static inline void reloc_pc24_atomic(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
18
-{
19
- ptrdiff_t offset = (tcg_ptr_byte_diff(target, code_ptr) - 8) >> 2;
20
- tcg_insn_unit insn = atomic_read(code_ptr);
21
- tcg_debug_assert(offset == sextract32(offset, 0, 24));
22
- atomic_set(code_ptr, deposit32(insn, 0, 24, offset));
23
-}
24
-
25
static void patch_reloc(tcg_insn_unit *code_ptr, int type,
26
intptr_t value, intptr_t addend)
27
{
28
--
29
2.17.2
30
31
diff view generated by jsdifflib
[Qemu-devel] [PULL 06/32] tcg/arm: Fold away "noaddr" branch routines
Deleted patch
1
There are one use apiece for these. There is no longer a need for
2
preserving branch offset operands, as we no longer re-translate.
3
1
4
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
---
7
tcg/arm/tcg-target.inc.c | 22 +++-------------------
8
1 file changed, 3 insertions(+), 19 deletions(-)
9
10
diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c
11
index XXXXXXX..XXXXXXX 100644
12
--- a/tcg/arm/tcg-target.inc.c
13
+++ b/tcg/arm/tcg-target.inc.c
14
@@ -XXX,XX +XXX,XX @@ static inline void tcg_out_b(TCGContext *s, int cond, int32_t offset)
15
(((offset - 8) >> 2) & 0x00ffffff));
16
}
17
18
-static inline void tcg_out_b_noaddr(TCGContext *s, int cond)
19
-{
20
- /* We pay attention here to not modify the branch target by masking
21
- the corresponding bytes. This ensure that caches and memory are
22
- kept coherent during retranslation. */
23
- tcg_out32(s, deposit32(*s->code_ptr, 24, 8, (cond << 4) | 0x0a));
24
-}
25
-
26
-static inline void tcg_out_bl_noaddr(TCGContext *s, int cond)
27
-{
28
- /* We pay attention here to not modify the branch target by masking
29
- the corresponding bytes. This ensure that caches and memory are
30
- kept coherent during retranslation. */
31
- tcg_out32(s, deposit32(*s->code_ptr, 24, 8, (cond << 4) | 0x0b));
32
-}
33
-
34
static inline void tcg_out_bl(TCGContext *s, int cond, int32_t offset)
35
{
36
tcg_out32(s, (cond << 28) | 0x0b000000 |
37
@@ -XXX,XX +XXX,XX @@ static inline void tcg_out_goto_label(TCGContext *s, int cond, TCGLabel *l)
38
tcg_out_goto(s, cond, l->u.value_ptr);
39
} else {
40
tcg_out_reloc(s, s->code_ptr, R_ARM_PC24, l, 0);
41
- tcg_out_b_noaddr(s, cond);
42
+ tcg_out_b(s, cond, 0);
43
}
44
}
45
46
@@ -XXX,XX +XXX,XX @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64)
47
/* This a conditional BL only to load a pointer within this opcode into LR
48
for the slow path. We will not be using the value for a tail call. */
49
label_ptr = s->code_ptr;
50
- tcg_out_bl_noaddr(s, COND_NE);
51
+ tcg_out_bl(s, COND_NE, 0);
52
53
tcg_out_qemu_ld_index(s, opc, datalo, datahi, addrlo, addend);
54
55
@@ -XXX,XX +XXX,XX @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64)
56
57
/* The conditional call must come last, as we're going to return here. */
58
label_ptr = s->code_ptr;
59
- tcg_out_bl_noaddr(s, COND_NE);
60
+ tcg_out_bl(s, COND_NE, 0);
61
62
add_qemu_ldst_label(s, false, oi, datalo, datahi, addrlo, addrhi,
63
s->code_ptr, label_ptr);
64
--
65
2.17.2
66
67
diff view generated by jsdifflib
[Qemu-devel] [PULL 07/32] tcg/ppc: Fold away "noaddr" branch routines
Deleted patch
1
There is no longer a need for preserving branch offset operands,
2
as we no longer re-translate.
3
1
4
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
---
7
tcg/ppc/tcg-target.inc.c | 25 +++++++------------------
8
1 file changed, 7 insertions(+), 18 deletions(-)
9
10
diff --git a/tcg/ppc/tcg-target.inc.c b/tcg/ppc/tcg-target.inc.c
11
index XXXXXXX..XXXXXXX 100644
12
--- a/tcg/ppc/tcg-target.inc.c
13
+++ b/tcg/ppc/tcg-target.inc.c
14
@@ -XXX,XX +XXX,XX @@ static void reloc_pc14(tcg_insn_unit *pc, tcg_insn_unit *target)
15
*pc = (*pc & ~0xfffc) | reloc_pc14_val(pc, target);
16
}
17
18
-static inline void tcg_out_b_noaddr(TCGContext *s, int insn)
19
-{
20
- unsigned retrans = *s->code_ptr & 0x3fffffc;
21
- tcg_out32(s, insn | retrans);
22
-}
23
-
24
-static inline void tcg_out_bc_noaddr(TCGContext *s, int insn)
25
-{
26
- unsigned retrans = *s->code_ptr & 0xfffc;
27
- tcg_out32(s, insn | retrans);
28
-}
29
-
30
/* parse target specific constraints */
31
static const char *target_parse_constraint(TCGArgConstraint *ct,
32
const char *ct_str, TCGType type)
33
@@ -XXX,XX +XXX,XX @@ static void tcg_out_setcond(TCGContext *s, TCGType type, TCGCond cond,
34
static void tcg_out_bc(TCGContext *s, int bc, TCGLabel *l)
35
{
36
if (l->has_value) {
37
- tcg_out32(s, bc | reloc_pc14_val(s->code_ptr, l->u.value_ptr));
38
+ bc |= reloc_pc14_val(s->code_ptr, l->u.value_ptr);
39
} else {
40
tcg_out_reloc(s, s->code_ptr, R_PPC_REL14, l, 0);
41
- tcg_out_bc_noaddr(s, bc);
42
}
43
+ tcg_out32(s, bc);
44
}
45
46
static void tcg_out_brcond(TCGContext *s, TCGCond cond,
47
@@ -XXX,XX +XXX,XX @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is_64)
48
49
/* Load a pointer into the current opcode w/conditional branch-link. */
50
label_ptr = s->code_ptr;
51
- tcg_out_bc_noaddr(s, BC | BI(7, CR_EQ) | BO_COND_FALSE | LK);
52
+ tcg_out32(s, BC | BI(7, CR_EQ) | BO_COND_FALSE | LK);
53
54
rbase = TCG_REG_R3;
55
#else /* !CONFIG_SOFTMMU */
56
@@ -XXX,XX +XXX,XX @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is_64)
57
58
/* Load a pointer into the current opcode w/conditional branch-link. */
59
label_ptr = s->code_ptr;
60
- tcg_out_bc_noaddr(s, BC | BI(7, CR_EQ) | BO_COND_FALSE | LK);
61
+ tcg_out32(s, BC | BI(7, CR_EQ) | BO_COND_FALSE | LK);
62
63
rbase = TCG_REG_R3;
64
#else /* !CONFIG_SOFTMMU */
65
@@ -XXX,XX +XXX,XX @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
66
case INDEX_op_br:
67
{
68
TCGLabel *l = arg_label(args[0]);
69
+ uint32_t insn = B;
70
71
if (l->has_value) {
72
- tcg_out_b(s, 0, l->u.value_ptr);
73
+ insn |= reloc_pc24_val(s->code_ptr, l->u.value_ptr);
74
} else {
75
tcg_out_reloc(s, s->code_ptr, R_PPC_REL24, l, 0);
76
- tcg_out_b_noaddr(s, B);
77
}
78
+ tcg_out32(s, insn);
79
}
80
break;
81
case INDEX_op_ld8u_i32:
82
--
83
2.17.2
84
85
diff view generated by jsdifflib
[Qemu-devel] [PULL 08/32] tcg/s390: Remove retranslation code
Deleted patch
1
There is no longer a need for preserving branch offset operands,
2
as we no longer re-translate.
3
1
4
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
---
7
tcg/s390/tcg-target.inc.c | 10 ++--------
8
1 file changed, 2 insertions(+), 8 deletions(-)
9
10
diff --git a/tcg/s390/tcg-target.inc.c b/tcg/s390/tcg-target.inc.c
11
index XXXXXXX..XXXXXXX 100644
12
--- a/tcg/s390/tcg-target.inc.c
13
+++ b/tcg/s390/tcg-target.inc.c
14
@@ -XXX,XX +XXX,XX @@ static void tgen_branch(TCGContext *s, int cc, TCGLabel *l)
15
static void tgen_compare_branch(TCGContext *s, S390Opcode opc, int cc,
16
TCGReg r1, TCGReg r2, TCGLabel *l)
17
{
18
- intptr_t off;
19
+ intptr_t off = 0;
20
21
if (l->has_value) {
22
off = l->u.value_ptr - s->code_ptr;
23
} else {
24
- /* We need to keep the offset unchanged for retranslation. */
25
- off = s->code_ptr[1];
26
tcg_out_reloc(s, s->code_ptr + 1, R_390_PC16DBL, l, 2);
27
}
28
29
@@ -XXX,XX +XXX,XX @@ static void tgen_compare_branch(TCGContext *s, S390Opcode opc, int cc,
30
static void tgen_compare_imm_branch(TCGContext *s, S390Opcode opc, int cc,
31
TCGReg r1, int i2, TCGLabel *l)
32
{
33
- tcg_target_long off;
34
+ tcg_target_long off = 0;
35
36
if (l->has_value) {
37
off = l->u.value_ptr - s->code_ptr;
38
} else {
39
- /* We need to keep the offset unchanged for retranslation. */
40
- off = s->code_ptr[1];
41
tcg_out_reloc(s, s->code_ptr + 1, R_390_PC16DBL, l, 2);
42
}
43
44
@@ -XXX,XX +XXX,XX @@ static void tcg_out_qemu_ld(TCGContext* s, TCGReg data_reg, TCGReg addr_reg,
45
46
base_reg = tcg_out_tlb_read(s, addr_reg, opc, mem_index, 1);
47
48
- /* We need to keep the offset unchanged for retranslation. */
49
tcg_out16(s, RI_BRC | (S390_CC_NE << 4));
50
label_ptr = s->code_ptr;
51
s->code_ptr += 1;
52
@@ -XXX,XX +XXX,XX @@ static void tcg_out_qemu_st(TCGContext* s, TCGReg data_reg, TCGReg addr_reg,
53
54
base_reg = tcg_out_tlb_read(s, addr_reg, opc, mem_index, 0);
55
56
- /* We need to keep the offset unchanged for retranslation. */
57
tcg_out16(s, RI_BRC | (S390_CC_NE << 4));
58
label_ptr = s->code_ptr;
59
s->code_ptr += 1;
60
--
61
2.17.2
62
63
diff view generated by jsdifflib
[Qemu-devel] [PULL 09/32] tcg/sparc: Remove retranslation code
Deleted patch
1
There is no longer a need for preserving branch offset operands,
2
as we no longer re-translate.
3
1
4
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
---
7
tcg/sparc/tcg-target.inc.c | 8 ++------
8
1 file changed, 2 insertions(+), 6 deletions(-)
9
10
diff --git a/tcg/sparc/tcg-target.inc.c b/tcg/sparc/tcg-target.inc.c
11
index XXXXXXX..XXXXXXX 100644
12
--- a/tcg/sparc/tcg-target.inc.c
13
+++ b/tcg/sparc/tcg-target.inc.c
14
@@ -XXX,XX +XXX,XX @@ static void tcg_out_bpcc0(TCGContext *s, int scond, int flags, int off19)
15
16
static void tcg_out_bpcc(TCGContext *s, int scond, int flags, TCGLabel *l)
17
{
18
- int off19;
19
+ int off19 = 0;
20
21
if (l->has_value) {
22
off19 = INSN_OFF19(tcg_pcrel_diff(s, l->u.value_ptr));
23
} else {
24
- /* Make sure to preserve destinations during retranslation. */
25
- off19 = *s->code_ptr & INSN_OFF19(-1);
26
tcg_out_reloc(s, s->code_ptr, R_SPARC_WDISP19, l, 0);
27
}
28
tcg_out_bpcc0(s, scond, flags, off19);
29
@@ -XXX,XX +XXX,XX @@ static void tcg_out_brcond_i64(TCGContext *s, TCGCond cond, TCGReg arg1,
30
{
31
/* For 64-bit signed comparisons vs zero, we can avoid the compare. */
32
if (arg2 == 0 && !is_unsigned_cond(cond)) {
33
- int off16;
34
+ int off16 = 0;
35
36
if (l->has_value) {
37
off16 = INSN_OFF16(tcg_pcrel_diff(s, l->u.value_ptr));
38
} else {
39
- /* Make sure to preserve destinations during retranslation. */
40
- off16 = *s->code_ptr & INSN_OFF16(-1);
41
tcg_out_reloc(s, s->code_ptr, R_SPARC_WDISP16, l, 0);
42
}
43
tcg_out32(s, INSN_OP(0) | INSN_OP2(3) | BPR_PT | INSN_RS1(arg1)
44
--
45
2.17.2
46
47
diff view generated by jsdifflib
[Qemu-devel] [PULL 10/32] tcg/mips: Remove retranslation code
Deleted patch
1
There is no longer a need for preserving branch offset operands,
2
as we no longer re-translate.
3
1
4
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
---
7
tcg/mips/tcg-target.inc.c | 7 +------
8
1 file changed, 1 insertion(+), 6 deletions(-)
9
10
diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c
11
index XXXXXXX..XXXXXXX 100644
12
--- a/tcg/mips/tcg-target.inc.c
13
+++ b/tcg/mips/tcg-target.inc.c
14
@@ -XXX,XX +XXX,XX @@ static inline void tcg_out_opc_bf64(TCGContext *s, MIPSInsn opc, MIPSInsn opm,
15
static inline void tcg_out_opc_br(TCGContext *s, MIPSInsn opc,
16
TCGReg rt, TCGReg rs)
17
{
18
- /* We pay attention here to not modify the branch target by reading
19
- the existing value and using it again. This ensure that caches and
20
- memory are kept coherent during retranslation. */
21
- uint16_t offset = (uint16_t)*s->code_ptr;
22
-
23
- tcg_out_opc_imm(s, opc, rt, rs, offset);
24
+ tcg_out_opc_imm(s, opc, rt, rs, 0);
25
}
26
27
/*
28
--
29
2.17.2
30
31
diff view generated by jsdifflib
[Qemu-devel] [PULL 24/32] tcg: Clean up generic bswap64
[PULL 15/16] exec/cpu-defs: Check for SOFTMMU instead of !USER_ONLY
1
Based on the only current user, Sparc:
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
2
2
3
New code uses 2 constants that take 2 insns to load from constant pool,
3
We want to check the softmmu tlb availability, not
4
plus 13. Old code used 6 constants that took 1 or 2 insns to create,
4
if we are targetting system emulation. Besides, this
5
plus 21. The result is a new total of 17 vs an old total of 29.
5
code could be used by user emulation in the future.
6
6
7
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
8
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
9
Message-Id: <20230605230216.17202-1-philmd@linaro.org>
7
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
10
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
8
---
11
---
9
tcg/tcg-op.c | 43 ++++++++++++++++++-------------------------
12
include/exec/cpu-defs.h | 12 ++++++------
10
1 file changed, 18 insertions(+), 25 deletions(-)
13
1 file changed, 6 insertions(+), 6 deletions(-)
11
14
12
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c
15
diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h
13
index XXXXXXX..XXXXXXX 100644
16
index XXXXXXX..XXXXXXX 100644
14
--- a/tcg/tcg-op.c
17
--- a/include/exec/cpu-defs.h
15
+++ b/tcg/tcg-op.c
18
+++ b/include/exec/cpu-defs.h
16
@@ -XXX,XX +XXX,XX @@ void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg)
19
@@ -XXX,XX +XXX,XX @@
17
} else {
20
*/
18
TCGv_i64 t0 = tcg_temp_new_i64();
21
#define NB_MMU_MODES 16
19
TCGv_i64 t1 = tcg_temp_new_i64();
22
20
+ TCGv_i64 t2 = tcg_temp_new_i64();
23
-#if !defined(CONFIG_USER_ONLY) && defined(CONFIG_TCG)
21
24
+#if defined(CONFIG_SOFTMMU) && defined(CONFIG_TCG)
22
- tcg_gen_shli_i64(t0, arg, 56);
25
#include "exec/tlb-common.h"
23
+ /* arg = abcdefgh */
26
24
+ tcg_gen_movi_i64(t2, 0x00ff00ff00ff00ffull);
27
/* use a fully associative victim tlb of 8 entries */
25
+ tcg_gen_shri_i64(t0, arg, 8); /* t0 = .abcdefg */
28
@@ -XXX,XX +XXX,XX @@
26
+ tcg_gen_and_i64(t1, arg, t2); /* t1 = .b.d.f.h */
29
# endif
27
+ tcg_gen_and_i64(t0, t0, t2); /* t0 = .a.c.e.g */
30
# endif
28
+ tcg_gen_shli_i64(t1, t1, 8); /* t1 = b.d.f.h. */
31
29
+ tcg_gen_or_i64(ret, t0, t1); /* ret = badcfehg */
32
-#endif /* !CONFIG_USER_ONLY && CONFIG_TCG */
30
33
+#endif /* CONFIG_SOFTMMU && CONFIG_TCG */
31
- tcg_gen_andi_i64(t1, arg, 0x0000ff00);
34
32
- tcg_gen_shli_i64(t1, t1, 40);
35
-#if !defined(CONFIG_USER_ONLY)
33
- tcg_gen_or_i64(t0, t0, t1);
36
+#if defined(CONFIG_SOFTMMU)
34
+ tcg_gen_movi_i64(t2, 0x0000ffff0000ffffull);
37
/*
35
+ tcg_gen_shri_i64(t0, ret, 16); /* t0 = ..badcfe */
38
* The full TLB entry, which is not accessed by generated TCG code,
36
+ tcg_gen_and_i64(t1, ret, t2); /* t1 = ..dc..hg */
39
* so the layout is not as critical as that of CPUTLBEntry. This is
37
+ tcg_gen_and_i64(t0, t0, t2); /* t0 = ..ba..fe */
40
@@ -XXX,XX +XXX,XX @@ typedef struct CPUTLBEntryFull {
38
+ tcg_gen_shli_i64(t1, t1, 16); /* t1 = dc..hg.. */
41
TARGET_PAGE_ENTRY_EXTRA
39
+ tcg_gen_or_i64(ret, t0, t1); /* ret = dcbahgfe */
42
#endif
40
43
} CPUTLBEntryFull;
41
- tcg_gen_andi_i64(t1, arg, 0x00ff0000);
44
-#endif /* !CONFIG_USER_ONLY */
42
- tcg_gen_shli_i64(t1, t1, 24);
45
+#endif /* CONFIG_SOFTMMU */
43
- tcg_gen_or_i64(t0, t0, t1);
46
44
+ tcg_gen_shri_i64(t0, ret, 32); /* t0 = ....dcba */
47
-#if !defined(CONFIG_USER_ONLY) && defined(CONFIG_TCG)
45
+ tcg_gen_shli_i64(t1, ret, 32); /* t1 = hgfe.... */
48
+#if defined(CONFIG_SOFTMMU) && defined(CONFIG_TCG)
46
+ tcg_gen_or_i64(ret, t0, t1); /* ret = hgfedcba */
49
/*
47
50
* Data elements that are per MMU mode, minus the bits accessed by
48
- tcg_gen_andi_i64(t1, arg, 0xff000000);
51
* the TCG fast path.
49
- tcg_gen_shli_i64(t1, t1, 8);
52
@@ -XXX,XX +XXX,XX @@ typedef struct CPUTLB {
50
- tcg_gen_or_i64(t0, t0, t1);
53
51
-
54
typedef struct CPUTLB { } CPUTLB;
52
- tcg_gen_shri_i64(t1, arg, 8);
55
53
- tcg_gen_andi_i64(t1, t1, 0xff000000);
56
-#endif /* !CONFIG_USER_ONLY && CONFIG_TCG */
54
- tcg_gen_or_i64(t0, t0, t1);
57
+#endif /* CONFIG_SOFTMMU && CONFIG_TCG */
55
-
58
56
- tcg_gen_shri_i64(t1, arg, 24);
59
/*
57
- tcg_gen_andi_i64(t1, t1, 0x00ff0000);
60
* This structure must be placed in ArchCPU immediately
58
- tcg_gen_or_i64(t0, t0, t1);
59
-
60
- tcg_gen_shri_i64(t1, arg, 40);
61
- tcg_gen_andi_i64(t1, t1, 0x0000ff00);
62
- tcg_gen_or_i64(t0, t0, t1);
63
-
64
- tcg_gen_shri_i64(t1, arg, 56);
65
- tcg_gen_or_i64(ret, t0, t1);
66
tcg_temp_free_i64(t0);
67
tcg_temp_free_i64(t1);
68
+ tcg_temp_free_i64(t2);
69
}
70
}
71
72
--
61
--
73
2.17.2
62
2.34.1
74
63
75
64
diff view generated by jsdifflib
[Qemu-devel] [PULL 11/32] tcg: Return success from patch_reloc
[PULL 16/16] cputlb: Restrict SavedIOTLB to system emulation
1
This will move the assert for success from within (subroutines of)
1
From: Philippe Mathieu-Daudé <philmd@linaro.org>
2
patch_reloc into the callers. It will also let new code do something
3
different when a relocation is out of range.
4
2
5
For the moment, all backends are trivially converted to return true.
3
Commit 2f3a57ee47 ("cputlb: ensure we save the IOTLB data in
4
case of reset") added the SavedIOTLB structure -- which is
5
system emulation specific -- in the generic CPUState structure.
6
6
7
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
7
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
8
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
9
Message-Id: <20221216215519.5522-3-philmd@linaro.org>
8
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
10
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
9
---
11
---
10
tcg/aarch64/tcg-target.inc.c | 3 ++-
12
include/hw/core/cpu.h | 6 ++++--
11
tcg/arm/tcg-target.inc.c | 3 ++-
13
1 file changed, 4 insertions(+), 2 deletions(-)
12
tcg/i386/tcg-target.inc.c | 3 ++-
13
tcg/mips/tcg-target.inc.c | 3 ++-
14
tcg/ppc/tcg-target.inc.c | 3 ++-
15
tcg/s390/tcg-target.inc.c | 3 ++-
16
tcg/sparc/tcg-target.inc.c | 5 +++--
17
tcg/tcg.c | 8 +++++---
18
tcg/tci/tcg-target.inc.c | 3 ++-
19
9 files changed, 22 insertions(+), 12 deletions(-)
20
14
21
diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c
15
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
22
index XXXXXXX..XXXXXXX 100644
16
index XXXXXXX..XXXXXXX 100644
23
--- a/tcg/aarch64/tcg-target.inc.c
17
--- a/include/hw/core/cpu.h
24
+++ b/tcg/aarch64/tcg-target.inc.c
18
+++ b/include/hw/core/cpu.h
25
@@ -XXX,XX +XXX,XX @@ static inline void reloc_pc19(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
19
@@ -XXX,XX +XXX,XX @@ struct CPUWatchpoint {
26
*code_ptr = deposit32(*code_ptr, 5, 19, offset);
20
QTAILQ_ENTRY(CPUWatchpoint) entry;
27
}
28
29
-static inline void patch_reloc(tcg_insn_unit *code_ptr, int type,
30
+static inline bool patch_reloc(tcg_insn_unit *code_ptr, int type,
31
intptr_t value, intptr_t addend)
32
{
33
tcg_debug_assert(addend == 0);
34
@@ -XXX,XX +XXX,XX @@ static inline void patch_reloc(tcg_insn_unit *code_ptr, int type,
35
default:
36
tcg_abort();
37
}
38
+ return true;
39
}
40
41
#define TCG_CT_CONST_AIMM 0x100
42
diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c
43
index XXXXXXX..XXXXXXX 100644
44
--- a/tcg/arm/tcg-target.inc.c
45
+++ b/tcg/arm/tcg-target.inc.c
46
@@ -XXX,XX +XXX,XX @@ static inline void reloc_pc24(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
47
*code_ptr = (*code_ptr & ~0xffffff) | (offset & 0xffffff);
48
}
49
50
-static void patch_reloc(tcg_insn_unit *code_ptr, int type,
51
+static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
52
intptr_t value, intptr_t addend)
53
{
54
tcg_debug_assert(addend == 0);
55
@@ -XXX,XX +XXX,XX @@ static void patch_reloc(tcg_insn_unit *code_ptr, int type,
56
} else {
57
g_assert_not_reached();
58
}
59
+ return true;
60
}
61
62
#define TCG_CT_CONST_ARM 0x100
63
diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c
64
index XXXXXXX..XXXXXXX 100644
65
--- a/tcg/i386/tcg-target.inc.c
66
+++ b/tcg/i386/tcg-target.inc.c
67
@@ -XXX,XX +XXX,XX @@ static bool have_lzcnt;
68
69
static tcg_insn_unit *tb_ret_addr;
70
71
-static void patch_reloc(tcg_insn_unit *code_ptr, int type,
72
+static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
73
intptr_t value, intptr_t addend)
74
{
75
value += addend;
76
@@ -XXX,XX +XXX,XX @@ static void patch_reloc(tcg_insn_unit *code_ptr, int type,
77
default:
78
tcg_abort();
79
}
80
+ return true;
81
}
82
83
#if TCG_TARGET_REG_BITS == 64
84
diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c
85
index XXXXXXX..XXXXXXX 100644
86
--- a/tcg/mips/tcg-target.inc.c
87
+++ b/tcg/mips/tcg-target.inc.c
88
@@ -XXX,XX +XXX,XX @@ static inline void reloc_26(tcg_insn_unit *pc, tcg_insn_unit *target)
89
*pc = deposit32(*pc, 0, 26, reloc_26_val(pc, target));
90
}
91
92
-static void patch_reloc(tcg_insn_unit *code_ptr, int type,
93
+static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
94
intptr_t value, intptr_t addend)
95
{
96
tcg_debug_assert(type == R_MIPS_PC16);
97
tcg_debug_assert(addend == 0);
98
reloc_pc16(code_ptr, (tcg_insn_unit *)value);
99
+ return true;
100
}
101
102
#define TCG_CT_CONST_ZERO 0x100
103
diff --git a/tcg/ppc/tcg-target.inc.c b/tcg/ppc/tcg-target.inc.c
104
index XXXXXXX..XXXXXXX 100644
105
--- a/tcg/ppc/tcg-target.inc.c
106
+++ b/tcg/ppc/tcg-target.inc.c
107
@@ -XXX,XX +XXX,XX @@ static const uint32_t tcg_to_isel[] = {
108
[TCG_COND_GTU] = ISEL | BC_(7, CR_GT),
109
};
21
};
110
22
111
-static void patch_reloc(tcg_insn_unit *code_ptr, int type,
23
-#ifdef CONFIG_PLUGIN
112
+static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
24
+#if defined(CONFIG_PLUGIN) && !defined(CONFIG_USER_ONLY)
113
intptr_t value, intptr_t addend)
25
/*
114
{
26
* For plugins we sometime need to save the resolved iotlb data before
115
tcg_insn_unit *target;
27
* the memory regions get moved around by io_writex.
116
@@ -XXX,XX +XXX,XX @@ static void patch_reloc(tcg_insn_unit *code_ptr, int type,
28
@@ -XXX,XX +XXX,XX @@ struct CPUState {
117
default:
29
118
g_assert_not_reached();
30
#ifdef CONFIG_PLUGIN
119
}
31
GArray *plugin_mem_cbs;
120
+ return true;
32
+#if !defined(CONFIG_USER_ONLY)
121
}
33
/* saved iotlb data from io_writex */
122
34
SavedIOTLB saved_iotlb;
123
static void tcg_out_mem_long(TCGContext *s, int opi, int opx, TCGReg rt,
35
-#endif
124
diff --git a/tcg/s390/tcg-target.inc.c b/tcg/s390/tcg-target.inc.c
36
+#endif /* !CONFIG_USER_ONLY */
125
index XXXXXXX..XXXXXXX 100644
37
+#endif /* CONFIG_PLUGIN */
126
--- a/tcg/s390/tcg-target.inc.c
38
127
+++ b/tcg/s390/tcg-target.inc.c
39
/* TODO Move common fields from CPUArchState here. */
128
@@ -XXX,XX +XXX,XX @@ static void * const qemu_st_helpers[16] = {
40
int cpu_index;
129
static tcg_insn_unit *tb_ret_addr;
130
uint64_t s390_facilities;
131
132
-static void patch_reloc(tcg_insn_unit *code_ptr, int type,
133
+static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
134
intptr_t value, intptr_t addend)
135
{
136
intptr_t pcrel2;
137
@@ -XXX,XX +XXX,XX @@ static void patch_reloc(tcg_insn_unit *code_ptr, int type,
138
default:
139
g_assert_not_reached();
140
}
141
+ return true;
142
}
143
144
/* parse target specific constraints */
145
diff --git a/tcg/sparc/tcg-target.inc.c b/tcg/sparc/tcg-target.inc.c
146
index XXXXXXX..XXXXXXX 100644
147
--- a/tcg/sparc/tcg-target.inc.c
148
+++ b/tcg/sparc/tcg-target.inc.c
149
@@ -XXX,XX +XXX,XX @@ static inline int check_fit_i32(int32_t val, unsigned int bits)
150
# define check_fit_ptr check_fit_i32
151
#endif
152
153
-static void patch_reloc(tcg_insn_unit *code_ptr, int type,
154
+static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
155
intptr_t value, intptr_t addend)
156
{
157
uint32_t insn = *code_ptr;
158
@@ -XXX,XX +XXX,XX @@ static void patch_reloc(tcg_insn_unit *code_ptr, int type,
159
/* Note that we're abusing this reloc type for our own needs. */
160
code_ptr[0] = deposit32(code_ptr[0], 0, 22, value >> 10);
161
code_ptr[1] = deposit32(code_ptr[1], 0, 10, value);
162
- return;
163
+ return true;
164
default:
165
g_assert_not_reached();
166
}
167
168
*code_ptr = insn;
169
+ return true;
170
}
171
172
/* parse target specific constraints */
173
diff --git a/tcg/tcg.c b/tcg/tcg.c
174
index XXXXXXX..XXXXXXX 100644
175
--- a/tcg/tcg.c
176
+++ b/tcg/tcg.c
177
@@ -XXX,XX +XXX,XX @@
178
static void tcg_target_init(TCGContext *s);
179
static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode);
180
static void tcg_target_qemu_prologue(TCGContext *s);
181
-static void patch_reloc(tcg_insn_unit *code_ptr, int type,
182
+static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
183
intptr_t value, intptr_t addend);
184
185
/* The CIE and FDE header definitions will be common to all hosts. */
186
@@ -XXX,XX +XXX,XX @@ static void tcg_out_reloc(TCGContext *s, tcg_insn_unit *code_ptr, int type,
187
/* FIXME: This may break relocations on RISC targets that
188
modify instruction fields in place. The caller may not have
189
written the initial value. */
190
- patch_reloc(code_ptr, type, l->u.value, addend);
191
+ bool ok = patch_reloc(code_ptr, type, l->u.value, addend);
192
+ tcg_debug_assert(ok);
193
} else {
194
/* add a new relocation entry */
195
r = tcg_malloc(sizeof(TCGRelocation));
196
@@ -XXX,XX +XXX,XX @@ static void tcg_out_label(TCGContext *s, TCGLabel *l, tcg_insn_unit *ptr)
197
tcg_debug_assert(!l->has_value);
198
199
for (r = l->u.first_reloc; r != NULL; r = r->next) {
200
- patch_reloc(r->ptr, r->type, value, r->addend);
201
+ bool ok = patch_reloc(r->ptr, r->type, value, r->addend);
202
+ tcg_debug_assert(ok);
203
}
204
205
l->has_value = 1;
206
diff --git a/tcg/tci/tcg-target.inc.c b/tcg/tci/tcg-target.inc.c
207
index XXXXXXX..XXXXXXX 100644
208
--- a/tcg/tci/tcg-target.inc.c
209
+++ b/tcg/tci/tcg-target.inc.c
210
@@ -XXX,XX +XXX,XX @@ static const char *const tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
211
};
212
#endif
213
214
-static void patch_reloc(tcg_insn_unit *code_ptr, int type,
215
+static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
216
intptr_t value, intptr_t addend)
217
{
218
/* tcg_out_reloc always uses the same type, addend. */
219
@@ -XXX,XX +XXX,XX @@ static void patch_reloc(tcg_insn_unit *code_ptr, int type,
220
} else {
221
tcg_patch64(code_ptr, value);
222
}
223
+ return true;
224
}
225
226
/* Parse target specific constraints. */
227
--
41
--
228
2.17.2
42
2.34.1
229
43
230
44
diff view generated by jsdifflib
[Qemu-devel] [PULL 12/32] tcg/i386: Return false on failure from patch_reloc
Deleted patch
1
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
2
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3
---
4
tcg/i386/tcg-target.inc.c | 4 ++--
5
1 file changed, 2 insertions(+), 2 deletions(-)
6
1
7
diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c
8
index XXXXXXX..XXXXXXX 100644
9
--- a/tcg/i386/tcg-target.inc.c
10
+++ b/tcg/i386/tcg-target.inc.c
11
@@ -XXX,XX +XXX,XX @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
12
case R_386_PC32:
13
value -= (uintptr_t)code_ptr;
14
if (value != (int32_t)value) {
15
- tcg_abort();
16
+ return false;
17
}
18
/* FALLTHRU */
19
case R_386_32:
20
@@ -XXX,XX +XXX,XX @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
21
case R_386_PC8:
22
value -= (uintptr_t)code_ptr;
23
if (value != (int8_t)value) {
24
- tcg_abort();
25
+ return false;
26
}
27
tcg_patch8(code_ptr, value);
28
break;
29
--
30
2.17.2
31
32
diff view generated by jsdifflib
[Qemu-devel] [PULL 16/32] tcg/s390x: Return false on failure from patch_reloc
Deleted patch
1
This does require an extra two checks within the slow paths
2
to replace the assert that we're moving. Also add two checks
3
within existing functions that lacked any kind of assert for
4
out of range branch.
5
1
6
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
7
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
8
---
9
tcg/s390/tcg-target.inc.c | 34 +++++++++++++++++++++++-----------
10
1 file changed, 23 insertions(+), 11 deletions(-)
11
12
diff --git a/tcg/s390/tcg-target.inc.c b/tcg/s390/tcg-target.inc.c
13
index XXXXXXX..XXXXXXX 100644
14
--- a/tcg/s390/tcg-target.inc.c
15
+++ b/tcg/s390/tcg-target.inc.c
16
@@ -XXX,XX +XXX,XX @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
17
18
switch (type) {
19
case R_390_PC16DBL:
20
- assert(pcrel2 == (int16_t)pcrel2);
21
- tcg_patch16(code_ptr, pcrel2);
22
+ if (pcrel2 == (int16_t)pcrel2) {
23
+ tcg_patch16(code_ptr, pcrel2);
24
+ return true;
25
+ }
26
break;
27
case R_390_PC32DBL:
28
- assert(pcrel2 == (int32_t)pcrel2);
29
- tcg_patch32(code_ptr, pcrel2);
30
+ if (pcrel2 == (int32_t)pcrel2) {
31
+ tcg_patch32(code_ptr, pcrel2);
32
+ return true;
33
+ }
34
break;
35
case R_390_20:
36
- assert(value == sextract64(value, 0, 20));
37
- old = *(uint32_t *)code_ptr & 0xf00000ff;
38
- old |= ((value & 0xfff) << 16) | ((value & 0xff000) >> 4);
39
- tcg_patch32(code_ptr, old);
40
+ if (value == sextract64(value, 0, 20)) {
41
+ old = *(uint32_t *)code_ptr & 0xf00000ff;
42
+ old |= ((value & 0xfff) << 16) | ((value & 0xff000) >> 4);
43
+ tcg_patch32(code_ptr, old);
44
+ return true;
45
+ }
46
break;
47
default:
48
g_assert_not_reached();
49
}
50
- return true;
51
+ return false;
52
}
53
54
/* parse target specific constraints */
55
@@ -XXX,XX +XXX,XX @@ static void tgen_compare_branch(TCGContext *s, S390Opcode opc, int cc,
56
57
if (l->has_value) {
58
off = l->u.value_ptr - s->code_ptr;
59
+ tcg_debug_assert(off == (int16_t)off);
60
} else {
61
tcg_out_reloc(s, s->code_ptr + 1, R_390_PC16DBL, l, 2);
62
}
63
@@ -XXX,XX +XXX,XX @@ static void tgen_compare_imm_branch(TCGContext *s, S390Opcode opc, int cc,
64
65
if (l->has_value) {
66
off = l->u.value_ptr - s->code_ptr;
67
+ tcg_debug_assert(off == (int16_t)off);
68
} else {
69
tcg_out_reloc(s, s->code_ptr + 1, R_390_PC16DBL, l, 2);
70
}
71
@@ -XXX,XX +XXX,XX @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
72
TCGMemOpIdx oi = lb->oi;
73
TCGMemOp opc = get_memop(oi);
74
75
- patch_reloc(lb->label_ptr[0], R_390_PC16DBL, (intptr_t)s->code_ptr, 2);
76
+ bool ok = patch_reloc(lb->label_ptr[0], R_390_PC16DBL,
77
+ (intptr_t)s->code_ptr, 2);
78
+ tcg_debug_assert(ok);
79
80
tcg_out_mov(s, TCG_TYPE_PTR, TCG_REG_R2, TCG_AREG0);
81
if (TARGET_LONG_BITS == 64) {
82
@@ -XXX,XX +XXX,XX @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
83
TCGMemOpIdx oi = lb->oi;
84
TCGMemOp opc = get_memop(oi);
85
86
- patch_reloc(lb->label_ptr[0], R_390_PC16DBL, (intptr_t)s->code_ptr, 2);
87
+ bool ok = patch_reloc(lb->label_ptr[0], R_390_PC16DBL,
88
+ (intptr_t)s->code_ptr, 2);
89
+ tcg_debug_assert(ok);
90
91
tcg_out_mov(s, TCG_TYPE_PTR, TCG_REG_R2, TCG_AREG0);
92
if (TARGET_LONG_BITS == 64) {
93
--
94
2.17.2
95
96
diff view generated by jsdifflib
[Qemu-devel] [PULL 17/32] tcg/i386: Propagate is64 to tcg_out_qemu_ld_direct
Deleted patch
1
This helps preserve the invariant that all TCG_TYPE_I32 values
2
are stored zero-extended in the 64-bit host registers.
3
1
4
Reviewed-by: Emilio G. Cota <cota@braap.org>
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
---
7
tcg/i386/tcg-target.inc.c | 13 +++++++------
8
1 file changed, 7 insertions(+), 6 deletions(-)
9
10
diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c
11
index XXXXXXX..XXXXXXX 100644
12
--- a/tcg/i386/tcg-target.inc.c
13
+++ b/tcg/i386/tcg-target.inc.c
14
@@ -XXX,XX +XXX,XX @@ static inline void setup_guest_base_seg(void) { }
15
16
static void tcg_out_qemu_ld_direct(TCGContext *s, TCGReg datalo, TCGReg datahi,
17
TCGReg base, int index, intptr_t ofs,
18
- int seg, TCGMemOp memop)
19
+ int seg, bool is64, TCGMemOp memop)
20
{
21
const TCGMemOp real_bswap = memop & MO_BSWAP;
22
TCGMemOp bswap = real_bswap;
23
+ int rexw = is64 * P_REXW;
24
int movop = OPC_MOVL_GvEv;
25
26
if (have_movbe && real_bswap) {
27
@@ -XXX,XX +XXX,XX @@ static void tcg_out_qemu_ld_direct(TCGContext *s, TCGReg datalo, TCGReg datahi,
28
base, index, 0, ofs);
29
break;
30
case MO_SB:
31
- tcg_out_modrm_sib_offset(s, OPC_MOVSBL + P_REXW + seg, datalo,
32
+ tcg_out_modrm_sib_offset(s, OPC_MOVSBL + rexw + seg, datalo,
33
base, index, 0, ofs);
34
break;
35
case MO_UW:
36
@@ -XXX,XX +XXX,XX @@ static void tcg_out_qemu_ld_direct(TCGContext *s, TCGReg datalo, TCGReg datahi,
37
base, index, 0, ofs);
38
tcg_out_rolw_8(s, datalo);
39
}
40
- tcg_out_modrm(s, OPC_MOVSWL + P_REXW, datalo, datalo);
41
+ tcg_out_modrm(s, OPC_MOVSWL + rexw, datalo, datalo);
42
} else {
43
- tcg_out_modrm_sib_offset(s, OPC_MOVSWL + P_REXW + seg,
44
+ tcg_out_modrm_sib_offset(s, OPC_MOVSWL + rexw + seg,
45
datalo, base, index, 0, ofs);
46
}
47
break;
48
@@ -XXX,XX +XXX,XX @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64)
49
label_ptr, offsetof(CPUTLBEntry, addr_read));
50
51
/* TLB Hit. */
52
- tcg_out_qemu_ld_direct(s, datalo, datahi, TCG_REG_L1, -1, 0, 0, opc);
53
+ tcg_out_qemu_ld_direct(s, datalo, datahi, TCG_REG_L1, -1, 0, 0, is64, opc);
54
55
/* Record the current context of a load into ldst label */
56
add_qemu_ldst_label(s, true, oi, datalo, datahi, addrlo, addrhi,
57
@@ -XXX,XX +XXX,XX @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64)
58
}
59
60
tcg_out_qemu_ld_direct(s, datalo, datahi,
61
- base, index, offset, seg, opc);
62
+ base, index, offset, seg, is64, opc);
63
}
64
#endif
65
}
66
--
67
2.17.2
68
69
diff view generated by jsdifflib
[Qemu-devel] [PULL 18/32] tcg/i386: Propagate is64 to tcg_out_qemu_ld_slow_path
Deleted patch
1
This helps preserve the invariant that all TCG_TYPE_I32 values
2
are stored zero-extended in the 64-bit host registers.
3
1
4
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5
---
6
tcg/i386/tcg-target.inc.c | 13 ++++++++-----
7
1 file changed, 8 insertions(+), 5 deletions(-)
8
9
diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c
10
index XXXXXXX..XXXXXXX 100644
11
--- a/tcg/i386/tcg-target.inc.c
12
+++ b/tcg/i386/tcg-target.inc.c
13
@@ -XXX,XX +XXX,XX @@ static inline void tcg_out_tlb_load(TCGContext *s, TCGReg addrlo, TCGReg addrhi,
14
* Record the context of a call to the out of line helper code for the slow path
15
* for a load or store, so that we can later generate the correct helper code
16
*/
17
-static void add_qemu_ldst_label(TCGContext *s, bool is_ld, TCGMemOpIdx oi,
18
+static void add_qemu_ldst_label(TCGContext *s, bool is_ld, bool is_64,
19
+ TCGMemOpIdx oi,
20
TCGReg datalo, TCGReg datahi,
21
TCGReg addrlo, TCGReg addrhi,
22
tcg_insn_unit *raddr,
23
@@ -XXX,XX +XXX,XX @@ static void add_qemu_ldst_label(TCGContext *s, bool is_ld, TCGMemOpIdx oi,
24
25
label->is_ld = is_ld;
26
label->oi = oi;
27
+ label->type = is_64 ? TCG_TYPE_I64 : TCG_TYPE_I32;
28
label->datalo_reg = datalo;
29
label->datahi_reg = datahi;
30
label->addrlo_reg = addrlo;
31
@@ -XXX,XX +XXX,XX @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l)
32
TCGMemOp opc = get_memop(oi);
33
TCGReg data_reg;
34
tcg_insn_unit **label_ptr = &l->label_ptr[0];
35
+ int rexw = (l->type == TCG_TYPE_I64 ? P_REXW : 0);
36
37
/* resolve label address */
38
tcg_patch32(label_ptr[0], s->code_ptr - label_ptr[0] - 4);
39
@@ -XXX,XX +XXX,XX @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *l)
40
data_reg = l->datalo_reg;
41
switch (opc & MO_SSIZE) {
42
case MO_SB:
43
- tcg_out_ext8s(s, data_reg, TCG_REG_EAX, P_REXW);
44
+ tcg_out_ext8s(s, data_reg, TCG_REG_EAX, rexw);
45
break;
46
case MO_SW:
47
- tcg_out_ext16s(s, data_reg, TCG_REG_EAX, P_REXW);
48
+ tcg_out_ext16s(s, data_reg, TCG_REG_EAX, rexw);
49
break;
50
#if TCG_TARGET_REG_BITS == 64
51
case MO_SL:
52
@@ -XXX,XX +XXX,XX @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64)
53
tcg_out_qemu_ld_direct(s, datalo, datahi, TCG_REG_L1, -1, 0, 0, is64, opc);
54
55
/* Record the current context of a load into ldst label */
56
- add_qemu_ldst_label(s, true, oi, datalo, datahi, addrlo, addrhi,
57
+ add_qemu_ldst_label(s, true, is64, oi, datalo, datahi, addrlo, addrhi,
58
s->code_ptr, label_ptr);
59
#else
60
{
61
@@ -XXX,XX +XXX,XX @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64)
62
tcg_out_qemu_st_direct(s, datalo, datahi, TCG_REG_L1, 0, 0, opc);
63
64
/* Record the current context of a store into ldst label */
65
- add_qemu_ldst_label(s, false, oi, datalo, datahi, addrlo, addrhi,
66
+ add_qemu_ldst_label(s, false, is64, oi, datalo, datahi, addrlo, addrhi,
67
s->code_ptr, label_ptr);
68
#else
69
{
70
--
71
2.17.2
72
73
diff view generated by jsdifflib
[Qemu-devel] [PULL 19/32] tcg/i386: Implement INDEX_op_extr{lh}_i64_i32 for 32-bit guests
Deleted patch
1
This preserves the invariant that all TCG_TYPE_I32 values are
2
zero-extended in the 64-bit host register.
3
1
4
Reviewed-by: Emilio G. Cota <cota@braap.org>
5
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6
---
7
tcg/i386/tcg-target.h | 5 +++--
8
tcg/i386/tcg-target.inc.c | 6 ++++++
9
2 files changed, 9 insertions(+), 2 deletions(-)
10
11
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
12
index XXXXXXX..XXXXXXX 100644
13
--- a/tcg/i386/tcg-target.h
14
+++ b/tcg/i386/tcg-target.h
15
@@ -XXX,XX +XXX,XX @@ extern bool have_avx2;
16
#define TCG_TARGET_HAS_direct_jump 1
17
18
#if TCG_TARGET_REG_BITS == 64
19
-#define TCG_TARGET_HAS_extrl_i64_i32 0
20
-#define TCG_TARGET_HAS_extrh_i64_i32 0
21
+/* Keep target addresses zero-extended in a register. */
22
+#define TCG_TARGET_HAS_extrl_i64_i32 (TARGET_LONG_BITS == 32)
23
+#define TCG_TARGET_HAS_extrh_i64_i32 (TARGET_LONG_BITS == 32)
24
#define TCG_TARGET_HAS_div2_i64 1
25
#define TCG_TARGET_HAS_rot_i64 1
26
#define TCG_TARGET_HAS_ext8s_i64 1
27
diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c
28
index XXXXXXX..XXXXXXX 100644
29
--- a/tcg/i386/tcg-target.inc.c
30
+++ b/tcg/i386/tcg-target.inc.c
31
@@ -XXX,XX +XXX,XX @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
32
break;
33
case INDEX_op_extu_i32_i64:
34
case INDEX_op_ext32u_i64:
35
+ case INDEX_op_extrl_i64_i32:
36
tcg_out_ext32u(s, a0, a1);
37
break;
38
case INDEX_op_ext_i32_i64:
39
case INDEX_op_ext32s_i64:
40
tcg_out_ext32s(s, a0, a1);
41
break;
42
+ case INDEX_op_extrh_i64_i32:
43
+ tcg_out_shifti(s, SHIFT_SHR + P_REXW, a0, 32);
44
+ break;
45
#endif
46
47
OP_32_64(deposit):
48
@@ -XXX,XX +XXX,XX @@ static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op)
49
case INDEX_op_neg_i64:
50
case INDEX_op_not_i32:
51
case INDEX_op_not_i64:
52
+ case INDEX_op_extrh_i64_i32:
53
return &r_0;
54
55
case INDEX_op_ext8s_i32:
56
@@ -XXX,XX +XXX,XX @@ static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op)
57
case INDEX_op_ext32u_i64:
58
case INDEX_op_ext_i32_i64:
59
case INDEX_op_extu_i32_i64:
60
+ case INDEX_op_extrl_i64_i32:
61
case INDEX_op_extract_i32:
62
case INDEX_op_extract_i64:
63
case INDEX_op_sextract_i32:
64
--
65
2.17.2
66
67
diff view generated by jsdifflib
[Qemu-devel] [PULL 21/32] tcg/i386: Precompute all guest_base parameters
Deleted patch
1
These values are constant between all qemu_ld/st invocations;
2
there is no need to figure this out each time. If we cannot
3
use a segment or an offset directly for guest_base, load the
4
value into a register in the prologue.
5
1
6
Reviewed-by: Emilio G. Cota <cota@braap.org>
7
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
8
---
9
tcg/i386/tcg-target.inc.c | 101 +++++++++++++++-----------------------
10
1 file changed, 40 insertions(+), 61 deletions(-)
11
12
diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c
13
index XXXXXXX..XXXXXXX 100644
14
--- a/tcg/i386/tcg-target.inc.c
15
+++ b/tcg/i386/tcg-target.inc.c
16
@@ -XXX,XX +XXX,XX @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l)
17
tcg_out_push(s, retaddr);
18
tcg_out_jmp(s, qemu_st_helpers[opc & (MO_BSWAP | MO_SIZE)]);
19
}
20
-#elif defined(__x86_64__) && defined(__linux__)
21
-# include <asm/prctl.h>
22
-# include <sys/prctl.h>
23
-
24
+#elif TCG_TARGET_REG_BITS == 32
25
+# define x86_guest_base_seg 0
26
+# define x86_guest_base_index -1
27
+# define x86_guest_base_offset guest_base
28
+#else
29
+static int x86_guest_base_seg;
30
+static int x86_guest_base_index = -1;
31
+static int32_t x86_guest_base_offset;
32
+# if defined(__x86_64__) && defined(__linux__)
33
+# include <asm/prctl.h>
34
+# include <sys/prctl.h>
35
int arch_prctl(int code, unsigned long addr);
36
-
37
-static int guest_base_flags;
38
-static inline void setup_guest_base_seg(void)
39
+static inline int setup_guest_base_seg(void)
40
{
41
if (arch_prctl(ARCH_SET_GS, guest_base) == 0) {
42
- guest_base_flags = P_GS;
43
+ return P_GS;
44
}
45
+ return 0;
46
}
47
-#else
48
-# define guest_base_flags 0
49
-static inline void setup_guest_base_seg(void) { }
50
+# else
51
+static inline int setup_guest_base_seg(void)
52
+{
53
+ return 0;
54
+}
55
+# endif
56
#endif /* SOFTMMU */
57
58
static void tcg_out_qemu_ld_direct(TCGContext *s, TCGReg datalo, TCGReg datahi,
59
@@ -XXX,XX +XXX,XX @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64)
60
add_qemu_ldst_label(s, true, is64, oi, datalo, datahi, addrlo, addrhi,
61
s->code_ptr, label_ptr);
62
#else
63
- {
64
- int32_t offset = guest_base;
65
- int index = -1;
66
- int seg = 0;
67
-
68
- /*
69
- * Recall we store 32-bit values zero-extended. No need for
70
- * further manual extension or an addr32 (0x67) prefix.
71
- */
72
- if (guest_base == 0 || guest_base_flags) {
73
- seg = guest_base_flags;
74
- offset = 0;
75
- } else if (TCG_TARGET_REG_BITS == 64 && offset != guest_base) {
76
- tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_L1, guest_base);
77
- index = TCG_REG_L1;
78
- offset = 0;
79
- }
80
-
81
- tcg_out_qemu_ld_direct(s, datalo, datahi,
82
- addrlo, index, offset, seg, is64, opc);
83
- }
84
+ tcg_out_qemu_ld_direct(s, datalo, datahi, addrlo, x86_guest_base_index,
85
+ x86_guest_base_offset, x86_guest_base_seg,
86
+ is64, opc);
87
#endif
88
}
89
90
@@ -XXX,XX +XXX,XX @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64)
91
add_qemu_ldst_label(s, false, is64, oi, datalo, datahi, addrlo, addrhi,
92
s->code_ptr, label_ptr);
93
#else
94
- {
95
- int32_t offset = guest_base;
96
- int index = -1;
97
- int seg = 0;
98
-
99
- /*
100
- * Recall we store 32-bit values zero-extended. No need for
101
- * further manual extension or an addr32 (0x67) prefix.
102
- */
103
- if (guest_base == 0 || guest_base_flags) {
104
- seg = guest_base_flags;
105
- offset = 0;
106
- } else if (TCG_TARGET_REG_BITS == 64 && offset != guest_base) {
107
- /* ??? Note that we require L0 free for bswap. */
108
- tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_L1, guest_base);
109
- index = TCG_REG_L1;
110
- offset = 0;
111
- }
112
-
113
- tcg_out_qemu_st_direct(s, datalo, datahi,
114
- addrlo, index, offset, seg, opc);
115
- }
116
+ tcg_out_qemu_st_direct(s, datalo, datahi, addrlo, x86_guest_base_index,
117
+ x86_guest_base_offset, x86_guest_base_seg, opc);
118
#endif
119
}
120
121
@@ -XXX,XX +XXX,XX @@ static void tcg_target_qemu_prologue(TCGContext *s)
122
         (ARRAY_SIZE(tcg_target_callee_save_regs) + 2) * 4
123
             + stack_addend);
124
#else
125
+# if !defined(CONFIG_SOFTMMU) && TCG_TARGET_REG_BITS == 64
126
+ if (guest_base) {
127
+ int seg = setup_guest_base_seg();
128
+ if (seg != 0) {
129
+ x86_guest_base_seg = seg;
130
+ } else if (guest_base == (int32_t)guest_base) {
131
+ x86_guest_base_offset = guest_base;
132
+ } else {
133
+ /* Choose R12 because, as a base, it requires a SIB byte. */
134
+ x86_guest_base_index = TCG_REG_R12;
135
+ tcg_out_mov(s, TCG_TYPE_PTR, x86_guest_base_index, guest_base);
136
+ tcg_regset_set_reg(s->reserved_regs, x86_guest_base_index);
137
+ }
138
+ }
139
+# endif
140
tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, tcg_target_call_iarg_regs[0]);
141
tcg_out_addi(s, TCG_REG_ESP, -stack_addend);
142
/* jmp *tb. */
143
@@ -XXX,XX +XXX,XX @@ static void tcg_target_qemu_prologue(TCGContext *s)
144
tcg_out_pop(s, tcg_target_callee_save_regs[i]);
145
}
146
tcg_out_opc(s, OPC_RET, 0, 0, 0);
147
-
148
-#if !defined(CONFIG_SOFTMMU)
149
- /* Try to set up a segment register to point to guest_base. */
150
- if (guest_base) {
151
- setup_guest_base_seg();
152
- }
153
-#endif
154
}
155
156
static void tcg_out_nop_fill(tcg_insn_unit *p, int count)
157
--
158
2.17.2
159
160
diff view generated by jsdifflib
[Qemu-devel] [PULL 22/32] tcg/i386: Add setup_guest_base_seg for FreeBSD
Deleted patch
1
Reviewed-by: Emilio G. Cota <cota@braap.org>
2
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
3
---
4
tcg/i386/tcg-target.inc.c | 9 +++++++++
5
1 file changed, 9 insertions(+)
6
1
7
diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c
8
index XXXXXXX..XXXXXXX 100644
9
--- a/tcg/i386/tcg-target.inc.c
10
+++ b/tcg/i386/tcg-target.inc.c
11
@@ -XXX,XX +XXX,XX @@ static inline int setup_guest_base_seg(void)
12
}
13
return 0;
14
}
15
+# elif defined (__FreeBSD__) || defined (__FreeBSD_kernel__)
16
+# include <machine/sysarch.h>
17
+static inline int setup_guest_base_seg(void)
18
+{
19
+ if (sysarch(AMD64_SET_GSBASE, &guest_base) == 0) {
20
+ return P_GS;
21
+ }
22
+ return 0;
23
+}
24
# else
25
static inline int setup_guest_base_seg(void)
26
{
27
--
28
2.17.2
29
30
diff view generated by jsdifflib
[Qemu-devel] [PATCH] fixup! target/arm: Move id_aa64mmfr* to ARMISARegisters
Deleted patch
1
I didn't get this fix pushed back into the patch set that I actually
2
sent last week. The patch is in target-arm.next, and I'm sure you
3
would have eventually seen the error in testing.
4
1
5
6
r~
7
---
8
target/arm/kvm64.c | 4 ++--
9
1 file changed, 2 insertions(+), 2 deletions(-)
10
11
diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c
12
index XXXXXXX..XXXXXXX 100644
13
--- a/target/arm/kvm64.c
14
+++ b/target/arm/kvm64.c
15
@@ -XXX,XX +XXX,XX @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
16
ARM64_SYS_REG(3, 0, 0, 6, 0));
17
err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64isar1,
18
ARM64_SYS_REG(3, 0, 0, 6, 1));
19
- err |= read_sys_reg64(fdarray[2], &achf->isar.id_aa64mmfr0,
20
+ err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64mmfr0,
21
ARM64_SYS_REG(3, 0, 0, 7, 0));
22
- err |= read_sys_reg64(fdarray[2], &achf->isar.id_aa64mmfr1,
23
+ err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64mmfr1,
24
ARM64_SYS_REG(3, 0, 0, 7, 1));
25
26
/*
27
--
28
2.17.2
29
30
diff view generated by jsdifflib

Patchew 2.1-devel-b67e4c2

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