1 | Some Arm bugfixes for rc2... | 1 | Not very much here, but several people have fallen over |
---|---|---|---|
2 | the vector operation segfault bug, so let's get the fix | ||
3 | into master. | ||
2 | 4 | ||
3 | thanks | 5 | thanks |
4 | -- PMM | 6 | -- PMM |
5 | 7 | ||
6 | The following changes since commit e6ebbd46b6e539f3613136111977721d212c2812: | 8 | The following changes since commit d418238dca7b4e0b124135827ead3076233052b1: |
7 | 9 | ||
8 | Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging (2018-11-19 14:31:48 +0000) | 10 | Merge remote-tracking branch 'remotes/rth/tags/pull-rng-20190522' into staging (2019-05-23 12:57:17 +0100) |
9 | 11 | ||
10 | are available in the Git repository at: | 12 | are available in the Git repository at: |
11 | 13 | ||
12 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20181119 | 14 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20190523 |
13 | 15 | ||
14 | for you to fetch changes up to a00d7f2048c2a1a6a4487ac195c804c78adcf60e: | 16 | for you to fetch changes up to 98e4f4fdb8ea05d840f51f47125924c2bb9df2df: |
15 | 17 | ||
16 | MAINTAINERS: list myself as maintainer for various Arm boards (2018-11-19 15:55:11 +0000) | 18 | hw/arm/exynos4210: QOM'ify the Exynos4210 SoC (2019-05-23 14:47:44 +0100) |
17 | 19 | ||
18 | ---------------------------------------------------------------- | 20 | ---------------------------------------------------------------- |
19 | target-arm queue: | 21 | target-arm queue: |
20 | * various MAINTAINERS file updates | 22 | * exynos4210: QOM'ify the Exynos4210 SoC |
21 | * hw/block/onenand: use qemu_log_mask() for reporting | 23 | * exynos4210: Add DMA support for the Exynos4210 |
22 | * hw/block/onenand: Fix off-by-one error allowing out-of-bounds read | 24 | * arm_gicv3: Fix writes to ICC_CTLR_EL3 |
23 | on the n800 and n810 machine models | 25 | * arm_gicv3: Fix write of ICH_VMCR_EL2.{VBPR0, VBPR1} |
24 | * target/arm: fix smc incorrectly trapping to EL3 when secure is off | 26 | * target/arm: Fix vector operation segfault |
25 | * hw/arm/stm32f205: Fix the UART and Timer region size | 27 | * target/arm: Minor improvements to BFXIL, EXTR |
26 | * target/arm: read ID registers for KVM guests so they can be | ||
27 | used to gate "is feature X present" checks | ||
28 | 28 | ||
29 | ---------------------------------------------------------------- | 29 | ---------------------------------------------------------------- |
30 | Luc Michel (1): | 30 | Alistair Francis (1): |
31 | target/arm: fix smc incorrectly trapping to EL3 when secure is off | 31 | target/arm: Fix vector operation segfault |
32 | 32 | ||
33 | Peter Maydell (3): | 33 | Guenter Roeck (1): |
34 | hw/block/onenand: Fix off-by-one error allowing out-of-bounds read | 34 | hw/arm/exynos4210: Add DMA support for the Exynos4210 |
35 | hw/block/onenand: use qemu_log_mask() for reporting | ||
36 | MAINTAINERS: list myself as maintainer for various Arm boards | ||
37 | 35 | ||
38 | Richard Henderson (4): | 36 | Peter Maydell (5): |
39 | target/arm: Install ARMISARegisters from kvm host | 37 | arm: Move system_clock_scale to armv7m_systick.h |
40 | target/arm: Fill in ARMISARegisters for kvm64 | 38 | arm: Remove unnecessary includes of hw/arm/arm.h |
41 | target/arm: Introduce read_sys_reg32 for kvm32 | 39 | arm: Rename hw/arm/arm.h to hw/arm/boot.h |
42 | target/arm: Fill in ARMISARegisters for kvm32 | 40 | hw/intc/arm_gicv3: Fix write of ICH_VMCR_EL2.{VBPR0, VBPR1} |
41 | hw/intc/arm_gicv3: Fix writes to ICC_CTLR_EL3 | ||
43 | 42 | ||
44 | Seth Kintigh (1): | 43 | Philippe Mathieu-Daudé (3): |
45 | hw/arm/stm32f205: Fix the UART and Timer region size | 44 | hw/arm/exynos4: Remove unuseful debug code |
45 | hw/arm/exynos4: Use the IEC binary prefix definitions | ||
46 | hw/arm/exynos4210: QOM'ify the Exynos4210 SoC | ||
46 | 47 | ||
47 | Thomas Huth (1): | 48 | Richard Henderson (2): |
48 | MAINTAINERS: Add entries for missing ARM boards | 49 | target/arm: Use extract2 for EXTR |
50 | target/arm: Simplify BFXIL expansion | ||
49 | 51 | ||
50 | target/arm/kvm_arm.h | 1 + | 52 | include/hw/arm/allwinner-a10.h | 2 +- |
51 | hw/block/onenand.c | 24 +++++----- | 53 | include/hw/arm/aspeed_soc.h | 1 - |
52 | hw/char/stm32f2xx_usart.c | 2 +- | 54 | include/hw/arm/bcm2836.h | 1 - |
53 | hw/timer/stm32f2xx_timer.c | 2 +- | 55 | include/hw/arm/{arm.h => boot.h} | 12 +++------ |
54 | target/arm/kvm.c | 1 + | 56 | include/hw/arm/exynos4210.h | 9 +++++-- |
55 | target/arm/kvm32.c | 77 ++++++++++++++++++++------------ | 57 | include/hw/arm/fsl-imx25.h | 2 +- |
56 | target/arm/kvm64.c | 90 +++++++++++++++++++++++++++++++++++++- | 58 | include/hw/arm/fsl-imx31.h | 2 +- |
57 | target/arm/op_helper.c | 54 +++++++++++++++++++---- | 59 | include/hw/arm/fsl-imx6.h | 2 +- |
58 | MAINTAINERS | 106 +++++++++++++++++++++++++++++++++++++++------ | 60 | include/hw/arm/fsl-imx6ul.h | 2 +- |
59 | 9 files changed, 293 insertions(+), 64 deletions(-) | 61 | include/hw/arm/fsl-imx7.h | 2 +- |
62 | include/hw/arm/virt.h | 2 +- | ||
63 | include/hw/arm/xlnx-versal.h | 2 +- | ||
64 | include/hw/arm/xlnx-zynqmp.h | 2 +- | ||
65 | include/hw/timer/armv7m_systick.h | 22 ++++++++++++++++ | ||
66 | hw/arm/armsse.c | 2 +- | ||
67 | hw/arm/armv7m.c | 2 +- | ||
68 | hw/arm/aspeed.c | 2 +- | ||
69 | hw/arm/boot.c | 2 +- | ||
70 | hw/arm/collie.c | 2 +- | ||
71 | hw/arm/exynos4210.c | 54 ++++++++++++++++++++++++++++++++++++--- | ||
72 | hw/arm/exynos4_boards.c | 40 ++++++++--------------------- | ||
73 | hw/arm/highbank.c | 2 +- | ||
74 | hw/arm/integratorcp.c | 2 +- | ||
75 | hw/arm/mainstone.c | 2 +- | ||
76 | hw/arm/microbit.c | 2 +- | ||
77 | hw/arm/mps2-tz.c | 2 +- | ||
78 | hw/arm/mps2.c | 2 +- | ||
79 | hw/arm/msf2-soc.c | 1 - | ||
80 | hw/arm/msf2-som.c | 2 +- | ||
81 | hw/arm/musca.c | 2 +- | ||
82 | hw/arm/musicpal.c | 2 +- | ||
83 | hw/arm/netduino2.c | 2 +- | ||
84 | hw/arm/nrf51_soc.c | 2 +- | ||
85 | hw/arm/nseries.c | 2 +- | ||
86 | hw/arm/omap1.c | 2 +- | ||
87 | hw/arm/omap2.c | 2 +- | ||
88 | hw/arm/omap_sx1.c | 2 +- | ||
89 | hw/arm/palm.c | 2 +- | ||
90 | hw/arm/raspi.c | 2 +- | ||
91 | hw/arm/realview.c | 2 +- | ||
92 | hw/arm/spitz.c | 2 +- | ||
93 | hw/arm/stellaris.c | 2 +- | ||
94 | hw/arm/stm32f205_soc.c | 2 +- | ||
95 | hw/arm/strongarm.c | 2 +- | ||
96 | hw/arm/tosa.c | 2 +- | ||
97 | hw/arm/versatilepb.c | 2 +- | ||
98 | hw/arm/vexpress.c | 2 +- | ||
99 | hw/arm/virt.c | 2 +- | ||
100 | hw/arm/xilinx_zynq.c | 2 +- | ||
101 | hw/arm/xlnx-versal.c | 2 +- | ||
102 | hw/arm/z2.c | 2 +- | ||
103 | hw/intc/arm_gicv3_cpuif.c | 6 ++--- | ||
104 | hw/intc/armv7m_nvic.c | 1 - | ||
105 | target/arm/arm-semi.c | 1 - | ||
106 | target/arm/cpu.c | 1 - | ||
107 | target/arm/cpu64.c | 1 - | ||
108 | target/arm/kvm.c | 1 - | ||
109 | target/arm/kvm32.c | 1 - | ||
110 | target/arm/kvm64.c | 1 - | ||
111 | target/arm/translate-a64.c | 44 ++++++++++++++++--------------- | ||
112 | target/arm/translate.c | 4 +-- | ||
113 | 61 files changed, 164 insertions(+), 123 deletions(-) | ||
114 | rename include/hw/arm/{arm.h => boot.h} (96%) | ||
60 | 115 | diff view generated by jsdifflib |
1 | From: Richard Henderson <richard.henderson@linaro.org> | 1 | From: Richard Henderson <richard.henderson@linaro.org> |
---|---|---|---|
2 | 2 | ||
3 | This is, after all, how we implement extract2 in tcg/aarch64. | ||
4 | |||
5 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
3 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | 6 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
4 | Message-id: 20181113180154.17903-5-richard.henderson@linaro.org | 7 | Message-id: 20190514011129.11330-2-richard.henderson@linaro.org |
5 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
6 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 8 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
7 | --- | 9 | --- |
8 | target/arm/kvm32.c | 40 +++++++++++++++++++++++++++++++++++----- | 10 | target/arm/translate-a64.c | 38 ++++++++++++++++++++------------------ |
9 | 1 file changed, 35 insertions(+), 5 deletions(-) | 11 | 1 file changed, 20 insertions(+), 18 deletions(-) |
10 | 12 | ||
11 | diff --git a/target/arm/kvm32.c b/target/arm/kvm32.c | 13 | diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c |
12 | index XXXXXXX..XXXXXXX 100644 | 14 | index XXXXXXX..XXXXXXX 100644 |
13 | --- a/target/arm/kvm32.c | 15 | --- a/target/arm/translate-a64.c |
14 | +++ b/target/arm/kvm32.c | 16 | +++ b/target/arm/translate-a64.c |
15 | @@ -XXX,XX +XXX,XX @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf) | 17 | @@ -XXX,XX +XXX,XX @@ static void disas_extract(DisasContext *s, uint32_t insn) |
16 | * and then query that CPU for the relevant ID registers. | 18 | } else { |
17 | */ | 19 | tcg_gen_ext32u_i64(tcg_rd, cpu_reg(s, rm)); |
18 | int err = 0, fdarray[3]; | 20 | } |
19 | - uint32_t midr, id_pfr0, mvfr1; | 21 | - } else if (rm == rn) { /* ROR */ |
20 | + uint32_t midr, id_pfr0; | 22 | - tcg_rm = cpu_reg(s, rm); |
21 | uint64_t features = 0; | 23 | - if (sf) { |
22 | 24 | - tcg_gen_rotri_i64(tcg_rd, tcg_rm, imm); | |
23 | /* Old kernels may not know about the PREFERRED_TARGET ioctl: however | 25 | - } else { |
24 | @@ -XXX,XX +XXX,XX @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf) | 26 | - TCGv_i32 tmp = tcg_temp_new_i32(); |
25 | 27 | - tcg_gen_extrl_i64_i32(tmp, tcg_rm); | |
26 | err |= read_sys_reg32(fdarray[2], &midr, ARM_CP15_REG32(0, 0, 0, 0)); | 28 | - tcg_gen_rotri_i32(tmp, tmp, imm); |
27 | err |= read_sys_reg32(fdarray[2], &id_pfr0, ARM_CP15_REG32(0, 0, 1, 0)); | 29 | - tcg_gen_extu_i32_i64(tcg_rd, tmp); |
28 | - err |= read_sys_reg32(fdarray[2], &mvfr1, | 30 | - tcg_temp_free_i32(tmp); |
31 | - } | ||
32 | } else { | ||
33 | - tcg_rm = read_cpu_reg(s, rm, sf); | ||
34 | - tcg_rn = read_cpu_reg(s, rn, sf); | ||
35 | - tcg_gen_shri_i64(tcg_rm, tcg_rm, imm); | ||
36 | - tcg_gen_shli_i64(tcg_rn, tcg_rn, bitsize - imm); | ||
37 | - tcg_gen_or_i64(tcg_rd, tcg_rm, tcg_rn); | ||
38 | - if (!sf) { | ||
39 | - tcg_gen_ext32u_i64(tcg_rd, tcg_rd); | ||
40 | + tcg_rm = cpu_reg(s, rm); | ||
41 | + tcg_rn = cpu_reg(s, rn); | ||
29 | + | 42 | + |
30 | + err |= read_sys_reg32(fdarray[2], &ahcf->isar.id_isar0, | 43 | + if (sf) { |
31 | + ARM_CP15_REG32(0, 0, 2, 0)); | 44 | + /* Specialization to ROR happens in EXTRACT2. */ |
32 | + err |= read_sys_reg32(fdarray[2], &ahcf->isar.id_isar1, | 45 | + tcg_gen_extract2_i64(tcg_rd, tcg_rm, tcg_rn, imm); |
33 | + ARM_CP15_REG32(0, 0, 2, 1)); | 46 | + } else { |
34 | + err |= read_sys_reg32(fdarray[2], &ahcf->isar.id_isar2, | 47 | + TCGv_i32 t0 = tcg_temp_new_i32(); |
35 | + ARM_CP15_REG32(0, 0, 2, 2)); | ||
36 | + err |= read_sys_reg32(fdarray[2], &ahcf->isar.id_isar3, | ||
37 | + ARM_CP15_REG32(0, 0, 2, 3)); | ||
38 | + err |= read_sys_reg32(fdarray[2], &ahcf->isar.id_isar4, | ||
39 | + ARM_CP15_REG32(0, 0, 2, 4)); | ||
40 | + err |= read_sys_reg32(fdarray[2], &ahcf->isar.id_isar5, | ||
41 | + ARM_CP15_REG32(0, 0, 2, 5)); | ||
42 | + if (read_sys_reg32(fdarray[2], &ahcf->isar.id_isar6, | ||
43 | + ARM_CP15_REG32(0, 0, 2, 7))) { | ||
44 | + /* | ||
45 | + * Older kernels don't support reading ID_ISAR6. This register was | ||
46 | + * only introduced in ARMv8, so we can assume that it is zero on a | ||
47 | + * CPU that a kernel this old is running on. | ||
48 | + */ | ||
49 | + ahcf->isar.id_isar6 = 0; | ||
50 | + } | ||
51 | + | 48 | + |
52 | + err |= read_sys_reg32(fdarray[2], &ahcf->isar.mvfr0, | 49 | + tcg_gen_extrl_i64_i32(t0, tcg_rm); |
53 | + KVM_REG_ARM | KVM_REG_SIZE_U32 | | 50 | + if (rm == rn) { |
54 | + KVM_REG_ARM_VFP | KVM_REG_ARM_VFP_MVFR0); | 51 | + tcg_gen_rotri_i32(t0, t0, imm); |
55 | + err |= read_sys_reg32(fdarray[2], &ahcf->isar.mvfr1, | 52 | + } else { |
56 | KVM_REG_ARM | KVM_REG_SIZE_U32 | | 53 | + TCGv_i32 t1 = tcg_temp_new_i32(); |
57 | KVM_REG_ARM_VFP | KVM_REG_ARM_VFP_MVFR1); | 54 | + tcg_gen_extrl_i64_i32(t1, tcg_rn); |
58 | + /* | 55 | + tcg_gen_extract2_i32(t0, t0, t1, imm); |
59 | + * FIXME: There is not yet a way to read MVFR2. | 56 | + tcg_temp_free_i32(t1); |
60 | + * Fortunately there is not yet anything in there that affects migration. | 57 | + } |
61 | + */ | 58 | + tcg_gen_extu_i32_i64(tcg_rd, t0); |
62 | 59 | + tcg_temp_free_i32(t0); | |
63 | kvm_arm_destroy_scratch_host_vcpu(fdarray); | 60 | } |
64 | 61 | } | |
65 | @@ -XXX,XX +XXX,XX @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf) | ||
66 | if (extract32(id_pfr0, 12, 4) == 1) { | ||
67 | set_feature(&features, ARM_FEATURE_THUMB2EE); | ||
68 | } | ||
69 | - if (extract32(mvfr1, 20, 4) == 1) { | ||
70 | + if (extract32(ahcf->isar.mvfr1, 20, 4) == 1) { | ||
71 | set_feature(&features, ARM_FEATURE_VFP_FP16); | ||
72 | } | ||
73 | - if (extract32(mvfr1, 12, 4) == 1) { | ||
74 | + if (extract32(ahcf->isar.mvfr1, 12, 4) == 1) { | ||
75 | set_feature(&features, ARM_FEATURE_NEON); | ||
76 | } | ||
77 | - if (extract32(mvfr1, 28, 4) == 1) { | ||
78 | + if (extract32(ahcf->isar.mvfr1, 28, 4) == 1) { | ||
79 | /* FMAC support implies VFPv4 */ | ||
80 | set_feature(&features, ARM_FEATURE_VFP4); | ||
81 | } | 62 | } |
82 | -- | 63 | -- |
83 | 2.19.1 | 64 | 2.20.1 |
84 | 65 | ||
85 | 66 | diff view generated by jsdifflib |
1 | From: Luc Michel <luc.michel@greensocs.com> | 1 | From: Richard Henderson <richard.henderson@linaro.org> |
---|---|---|---|
2 | 2 | ||
3 | This commit fixes a case where the CPU would try to go to EL3 when | 3 | The mask implied by the extract is redundant with the one |
4 | executing an smc instruction, even though ARM_FEATURE_EL3 is false. This | 4 | implied by the deposit. Also, fix spelling of BFXIL. |
5 | case is raised when the PSCI conduit is set to smc, but the smc | ||
6 | instruction does not lead to a valid PSCI call. | ||
7 | 5 | ||
8 | QEMU crashes with an assertion failure latter on because of incoherent | 6 | Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
9 | mmu_idx. | 7 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
10 | 8 | Message-id: 20190514011129.11330-3-richard.henderson@linaro.org | |
11 | This commit refactors the pre_smc helper by enumerating all the possible | ||
12 | way of handling an scm instruction, and covering the previously missing | ||
13 | case leading to the crash. | ||
14 | |||
15 | The following minimal test would crash before this commit: | ||
16 | |||
17 | .global _start | ||
18 | .text | ||
19 | _start: | ||
20 | ldr x0, =0xdeadbeef ; invalid PSCI call | ||
21 | smc #0 | ||
22 | |||
23 | run with the following command line: | ||
24 | |||
25 | aarch64-linux-gnu-gcc -nostdinc -nostdlib -Wl,-Ttext=40000000 \ | ||
26 | -o test test.s | ||
27 | |||
28 | qemu-system-aarch64 -M virt,virtualization=on,secure=off \ | ||
29 | -cpu cortex-a57 -kernel test | ||
30 | |||
31 | Signed-off-by: Luc Michel <luc.michel@greensocs.com> | ||
32 | Message-id: 20181117160213.18995-1-luc.michel@greensocs.com | ||
33 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
34 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 9 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
35 | --- | 10 | --- |
36 | target/arm/op_helper.c | 54 +++++++++++++++++++++++++++++++++++------- | 11 | target/arm/translate-a64.c | 6 +++--- |
37 | 1 file changed, 46 insertions(+), 8 deletions(-) | 12 | 1 file changed, 3 insertions(+), 3 deletions(-) |
38 | 13 | ||
39 | diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c | 14 | diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c |
40 | index XXXXXXX..XXXXXXX 100644 | 15 | index XXXXXXX..XXXXXXX 100644 |
41 | --- a/target/arm/op_helper.c | 16 | --- a/target/arm/translate-a64.c |
42 | +++ b/target/arm/op_helper.c | 17 | +++ b/target/arm/translate-a64.c |
43 | @@ -XXX,XX +XXX,XX @@ void HELPER(pre_smc)(CPUARMState *env, uint32_t syndrome) | 18 | @@ -XXX,XX +XXX,XX @@ static void disas_bitfield(DisasContext *s, uint32_t insn) |
44 | ARMCPU *cpu = arm_env_get_cpu(env); | 19 | tcg_gen_extract_i64(tcg_rd, tcg_tmp, ri, len); |
45 | int cur_el = arm_current_el(env); | 20 | return; |
46 | bool secure = arm_is_secure(env); | 21 | } |
47 | - bool smd = env->cp15.scr_el3 & SCR_SMD; | 22 | - /* opc == 1, BXFIL fall through to deposit */ |
48 | + bool smd_flag = env->cp15.scr_el3 & SCR_SMD; | 23 | - tcg_gen_extract_i64(tcg_tmp, tcg_tmp, ri, len); |
49 | + | 24 | + /* opc == 1, BFXIL fall through to deposit */ |
50 | + /* | 25 | + tcg_gen_shri_i64(tcg_tmp, tcg_tmp, ri); |
51 | + * SMC behaviour is summarized in the following table. | 26 | pos = 0; |
52 | + * This helper handles the "Trap to EL2" and "Undef insn" cases. | 27 | } else { |
53 | + * The "Trap to EL3" and "PSCI call" cases are handled in the exception | 28 | /* Handle the ri > si case with a deposit |
54 | + * helper. | 29 | @@ -XXX,XX +XXX,XX @@ static void disas_bitfield(DisasContext *s, uint32_t insn) |
55 | + * | 30 | len = ri; |
56 | + * -> ARM_FEATURE_EL3 and !SMD | ||
57 | + * HCR_TSC && NS EL1 !HCR_TSC || !NS EL1 | ||
58 | + * | ||
59 | + * Conduit SMC, valid call Trap to EL2 PSCI Call | ||
60 | + * Conduit SMC, inval call Trap to EL2 Trap to EL3 | ||
61 | + * Conduit not SMC Trap to EL2 Trap to EL3 | ||
62 | + * | ||
63 | + * | ||
64 | + * -> ARM_FEATURE_EL3 and SMD | ||
65 | + * HCR_TSC && NS EL1 !HCR_TSC || !NS EL1 | ||
66 | + * | ||
67 | + * Conduit SMC, valid call Trap to EL2 PSCI Call | ||
68 | + * Conduit SMC, inval call Trap to EL2 Undef insn | ||
69 | + * Conduit not SMC Trap to EL2 Undef insn | ||
70 | + * | ||
71 | + * | ||
72 | + * -> !ARM_FEATURE_EL3 | ||
73 | + * HCR_TSC && NS EL1 !HCR_TSC || !NS EL1 | ||
74 | + * | ||
75 | + * Conduit SMC, valid call Trap to EL2 PSCI Call | ||
76 | + * Conduit SMC, inval call Trap to EL2 Undef insn | ||
77 | + * Conduit not SMC Undef insn Undef insn | ||
78 | + */ | ||
79 | + | ||
80 | /* On ARMv8 with EL3 AArch64, SMD applies to both S and NS state. | ||
81 | * On ARMv8 with EL3 AArch32, or ARMv7 with the Virtualization | ||
82 | * extensions, SMD only applies to NS state. | ||
83 | @@ -XXX,XX +XXX,XX @@ void HELPER(pre_smc)(CPUARMState *env, uint32_t syndrome) | ||
84 | * doesn't exist, but we forbid the guest to set it to 1 in scr_write(), | ||
85 | * so we need not special case this here. | ||
86 | */ | ||
87 | - bool undef = arm_feature(env, ARM_FEATURE_AARCH64) ? smd : smd && !secure; | ||
88 | + bool smd = arm_feature(env, ARM_FEATURE_AARCH64) ? smd_flag | ||
89 | + : smd_flag && !secure; | ||
90 | |||
91 | if (!arm_feature(env, ARM_FEATURE_EL3) && | ||
92 | cpu->psci_conduit != QEMU_PSCI_CONDUIT_SMC) { | ||
93 | @@ -XXX,XX +XXX,XX @@ void HELPER(pre_smc)(CPUARMState *env, uint32_t syndrome) | ||
94 | * to forbid its EL1 from making PSCI calls into QEMU's | ||
95 | * "firmware" via HCR.TSC, so for these purposes treat | ||
96 | * PSCI-via-SMC as implying an EL3. | ||
97 | + * This handles the very last line of the previous table. | ||
98 | */ | ||
99 | - undef = true; | ||
100 | - } else if (!secure && cur_el == 1 && (env->cp15.hcr_el2 & HCR_TSC)) { | ||
101 | + raise_exception(env, EXCP_UDEF, syn_uncategorized(), | ||
102 | + exception_target_el(env)); | ||
103 | + } | ||
104 | + | ||
105 | + if (!secure && cur_el == 1 && (env->cp15.hcr_el2 & HCR_TSC)) { | ||
106 | /* In NS EL1, HCR controlled routing to EL2 has priority over SMD. | ||
107 | * We also want an EL2 guest to be able to forbid its EL1 from | ||
108 | * making PSCI calls into QEMU's "firmware" via HCR.TSC. | ||
109 | + * This handles all the "Trap to EL2" cases of the previous table. | ||
110 | */ | ||
111 | raise_exception(env, EXCP_HYP_TRAP, syndrome, 2); | ||
112 | } | 31 | } |
113 | 32 | ||
114 | - /* If PSCI is enabled and this looks like a valid PSCI call then | 33 | - if (opc == 1) { /* BFM, BXFIL */ |
115 | - * suppress the UNDEF -- we'll catch the SMC exception and | 34 | + if (opc == 1) { /* BFM, BFXIL */ |
116 | - * implement the PSCI call behaviour there. | 35 | tcg_gen_deposit_i64(tcg_rd, tcg_rd, tcg_tmp, pos, len); |
117 | + /* Catch the two remaining "Undef insn" cases of the previous table: | 36 | } else { |
118 | + * - PSCI conduit is SMC but we don't have a valid PCSI call, | 37 | /* SBFM or UBFM: We start with zero, and we haven't modified |
119 | + * - We don't have EL3 or SMD is set. | ||
120 | */ | ||
121 | - if (undef && !arm_is_psci_call(cpu, EXCP_SMC)) { | ||
122 | + if (!arm_is_psci_call(cpu, EXCP_SMC) && | ||
123 | + (smd || !arm_feature(env, ARM_FEATURE_EL3))) { | ||
124 | raise_exception(env, EXCP_UDEF, syn_uncategorized(), | ||
125 | exception_target_el(env)); | ||
126 | } | ||
127 | -- | 38 | -- |
128 | 2.19.1 | 39 | 2.20.1 |
129 | 40 | ||
130 | 41 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | From: Alistair Francis <alistair.francis@wdc.com> | ||
1 | 2 | ||
3 | Commit 89e68b575 "target/arm: Use vector operations for saturation" | ||
4 | causes this abort() when booting QEMU ARM with a Cortex-A15: | ||
5 | |||
6 | 0 0x00007ffff4c2382f in raise () at /usr/lib/libc.so.6 | ||
7 | 1 0x00007ffff4c0e672 in abort () at /usr/lib/libc.so.6 | ||
8 | 2 0x00005555559c1839 in disas_neon_data_insn (insn=<optimized out>, s=<optimized out>) at ./target/arm/translate.c:6673 | ||
9 | 3 0x00005555559c1839 in disas_neon_data_insn (s=<optimized out>, insn=<optimized out>) at ./target/arm/translate.c:6386 | ||
10 | 4 0x00005555559cd8a4 in disas_arm_insn (insn=4081107068, s=0x7fffe59a9510) at ./target/arm/translate.c:9289 | ||
11 | 5 0x00005555559cd8a4 in arm_tr_translate_insn (dcbase=0x7fffe59a9510, cpu=<optimized out>) at ./target/arm/translate.c:13612 | ||
12 | 6 0x00005555558d1d39 in translator_loop (ops=0x5555561cc580 <arm_translator_ops>, db=0x7fffe59a9510, cpu=0x55555686a2f0, tb=<optimized out>, max_insns=<optimized out>) at ./accel/tcg/translator.c:96 | ||
13 | 7 0x00005555559d10d4 in gen_intermediate_code (cpu=cpu@entry=0x55555686a2f0, tb=tb@entry=0x7fffd7840080 <code_gen_buffer+126091347>, max_insns=max_insns@entry=512) at ./target/arm/translate.c:13901 | ||
14 | 8 0x00005555558d06b9 in tb_gen_code (cpu=cpu@entry=0x55555686a2f0, pc=3067096216, cs_base=0, flags=192, cflags=-16252928, cflags@entry=524288) at ./accel/tcg/translate-all.c:1736 | ||
15 | 9 0x00005555558ce467 in tb_find (cf_mask=524288, tb_exit=1, last_tb=0x7fffd783e640 <code_gen_buffer+126084627>, cpu=0x1) at ./accel/tcg/cpu-exec.c:407 | ||
16 | 10 0x00005555558ce467 in cpu_exec (cpu=cpu@entry=0x55555686a2f0) at ./accel/tcg/cpu-exec.c:728 | ||
17 | 11 0x000055555588b0cf in tcg_cpu_exec (cpu=0x55555686a2f0) at ./cpus.c:1431 | ||
18 | 12 0x000055555588d223 in qemu_tcg_cpu_thread_fn (arg=0x55555686a2f0) at ./cpus.c:1735 | ||
19 | 13 0x000055555588d223 in qemu_tcg_cpu_thread_fn (arg=arg@entry=0x55555686a2f0) at ./cpus.c:1709 | ||
20 | 14 0x0000555555d2629a in qemu_thread_start (args=<optimized out>) at ./util/qemu-thread-posix.c:502 | ||
21 | 15 0x00007ffff4db8a92 in start_thread () at /usr/lib/libpthread. | ||
22 | |||
23 | This patch ensures that we don't hit the abort() in the second switch | ||
24 | case in disas_neon_data_insn() as we will return from the first case. | ||
25 | |||
26 | Signed-off-by: Alistair Francis <alistair.francis@wdc.com> | ||
27 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | ||
28 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
29 | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> | ||
30 | Tested-by: Alex Bennée <alex.bennee@linaro.org> | ||
31 | Message-id: ad91b397f360b2fc7f4087e476f7df5b04d42ddb.1558021877.git.alistair.francis@wdc.com | ||
32 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
33 | --- | ||
34 | target/arm/translate.c | 4 ++-- | ||
35 | 1 file changed, 2 insertions(+), 2 deletions(-) | ||
36 | |||
37 | diff --git a/target/arm/translate.c b/target/arm/translate.c | ||
38 | index XXXXXXX..XXXXXXX 100644 | ||
39 | --- a/target/arm/translate.c | ||
40 | +++ b/target/arm/translate.c | ||
41 | @@ -XXX,XX +XXX,XX @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) | ||
42 | tcg_gen_gvec_4(rd_ofs, offsetof(CPUARMState, vfp.qc), | ||
43 | rn_ofs, rm_ofs, vec_size, vec_size, | ||
44 | (u ? uqadd_op : sqadd_op) + size); | ||
45 | - break; | ||
46 | + return 0; | ||
47 | |||
48 | case NEON_3R_VQSUB: | ||
49 | tcg_gen_gvec_4(rd_ofs, offsetof(CPUARMState, vfp.qc), | ||
50 | rn_ofs, rm_ofs, vec_size, vec_size, | ||
51 | (u ? uqsub_op : sqsub_op) + size); | ||
52 | - break; | ||
53 | + return 0; | ||
54 | |||
55 | case NEON_3R_VMUL: /* VMUL */ | ||
56 | if (u) { | ||
57 | -- | ||
58 | 2.20.1 | ||
59 | |||
60 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | The system_clock_scale global is used only by the armv7m systick | ||
2 | device; move the extern declaration to the armv7m_systick.h header, | ||
3 | and expand the comment to explain what it is and that it should | ||
4 | ideally be replaced with a different approach. | ||
1 | 5 | ||
6 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
7 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
8 | Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
9 | Message-id: 20190516163857.6430-2-peter.maydell@linaro.org | ||
10 | --- | ||
11 | include/hw/arm/arm.h | 4 ---- | ||
12 | include/hw/timer/armv7m_systick.h | 22 ++++++++++++++++++++++ | ||
13 | 2 files changed, 22 insertions(+), 4 deletions(-) | ||
14 | |||
15 | diff --git a/include/hw/arm/arm.h b/include/hw/arm/arm.h | ||
16 | index XXXXXXX..XXXXXXX 100644 | ||
17 | --- a/include/hw/arm/arm.h | ||
18 | +++ b/include/hw/arm/arm.h | ||
19 | @@ -XXX,XX +XXX,XX @@ void arm_write_secure_board_setup_dummy_smc(ARMCPU *cpu, | ||
20 | const struct arm_boot_info *info, | ||
21 | hwaddr mvbar_addr); | ||
22 | |||
23 | -/* Multiplication factor to convert from system clock ticks to qemu timer | ||
24 | - ticks. */ | ||
25 | -extern int system_clock_scale; | ||
26 | - | ||
27 | #endif /* HW_ARM_H */ | ||
28 | diff --git a/include/hw/timer/armv7m_systick.h b/include/hw/timer/armv7m_systick.h | ||
29 | index XXXXXXX..XXXXXXX 100644 | ||
30 | --- a/include/hw/timer/armv7m_systick.h | ||
31 | +++ b/include/hw/timer/armv7m_systick.h | ||
32 | @@ -XXX,XX +XXX,XX @@ typedef struct SysTickState { | ||
33 | qemu_irq irq; | ||
34 | } SysTickState; | ||
35 | |||
36 | +/* | ||
37 | + * Multiplication factor to convert from system clock ticks to qemu timer | ||
38 | + * ticks. This should be set (by board code, usually) to a value | ||
39 | + * equal to NANOSECONDS_PER_SECOND / frq, where frq is the clock frequency | ||
40 | + * in Hz of the CPU. | ||
41 | + * | ||
42 | + * This value is used by the systick device when it is running in | ||
43 | + * its "use the CPU clock" mode (ie when SYST_CSR.CLKSOURCE == 1) to | ||
44 | + * set how fast the timer should tick. | ||
45 | + * | ||
46 | + * TODO: we should refactor this so that rather than using a global | ||
47 | + * we use a device property or something similar. This is complicated | ||
48 | + * because (a) the property would need to be plumbed through from the | ||
49 | + * board code down through various layers to the systick device | ||
50 | + * and (b) the property needs to be modifiable after realize, because | ||
51 | + * the stellaris board uses this to implement the behaviour where the | ||
52 | + * guest can reprogram the PLL registers to downclock the CPU, and the | ||
53 | + * systick device needs to react accordingly. Possibly this should | ||
54 | + * be deferred until we have a good API for modelling clock trees. | ||
55 | + */ | ||
56 | +extern int system_clock_scale; | ||
57 | + | ||
58 | #endif | ||
59 | -- | ||
60 | 2.20.1 | ||
61 | |||
62 | diff view generated by jsdifflib |
1 | From: Richard Henderson <richard.henderson@linaro.org> | 1 | The hw/arm/arm.h header now only includes declarations relating |
---|---|---|---|
2 | to boot.c code, so it is only needed by Arm board or SoC code. | ||
3 | Remove some unnecessary inclusions of it from target/arm files | ||
4 | and from hw/intc/armv7m_nvic.c. | ||
2 | 5 | ||
3 | The ID registers are replacing (some of) the feature bits. | 6 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
4 | We need (some of) these values to determine the set of data | 7 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> |
5 | to be handled during migration. | 8 | Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> |
9 | Message-id: 20190516163857.6430-3-peter.maydell@linaro.org | ||
10 | --- | ||
11 | hw/intc/armv7m_nvic.c | 1 - | ||
12 | target/arm/arm-semi.c | 1 - | ||
13 | target/arm/cpu.c | 1 - | ||
14 | target/arm/cpu64.c | 1 - | ||
15 | target/arm/kvm.c | 1 - | ||
16 | target/arm/kvm32.c | 1 - | ||
17 | target/arm/kvm64.c | 1 - | ||
18 | 7 files changed, 7 deletions(-) | ||
6 | 19 | ||
7 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | 20 | diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c |
8 | Message-id: 20181113180154.17903-2-richard.henderson@linaro.org | ||
9 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
10 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
11 | --- | ||
12 | target/arm/kvm_arm.h | 1 + | ||
13 | target/arm/kvm.c | 1 + | ||
14 | 2 files changed, 2 insertions(+) | ||
15 | |||
16 | diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h | ||
17 | index XXXXXXX..XXXXXXX 100644 | 21 | index XXXXXXX..XXXXXXX 100644 |
18 | --- a/target/arm/kvm_arm.h | 22 | --- a/hw/intc/armv7m_nvic.c |
19 | +++ b/target/arm/kvm_arm.h | 23 | +++ b/hw/intc/armv7m_nvic.c |
20 | @@ -XXX,XX +XXX,XX @@ void kvm_arm_destroy_scratch_host_vcpu(int *fdarray); | 24 | @@ -XXX,XX +XXX,XX @@ |
21 | * by asking the host kernel) | 25 | #include "cpu.h" |
22 | */ | 26 | #include "hw/sysbus.h" |
23 | typedef struct ARMHostCPUFeatures { | 27 | #include "qemu/timer.h" |
24 | + ARMISARegisters isar; | 28 | -#include "hw/arm/arm.h" |
25 | uint64_t features; | 29 | #include "hw/intc/armv7m_nvic.h" |
26 | uint32_t target; | 30 | #include "target/arm/cpu.h" |
27 | const char *dtb_compatible; | 31 | #include "exec/exec-all.h" |
32 | diff --git a/target/arm/arm-semi.c b/target/arm/arm-semi.c | ||
33 | index XXXXXXX..XXXXXXX 100644 | ||
34 | --- a/target/arm/arm-semi.c | ||
35 | +++ b/target/arm/arm-semi.c | ||
36 | @@ -XXX,XX +XXX,XX @@ | ||
37 | #else | ||
38 | #include "qemu-common.h" | ||
39 | #include "exec/gdbstub.h" | ||
40 | -#include "hw/arm/arm.h" | ||
41 | #include "qemu/cutils.h" | ||
42 | #endif | ||
43 | |||
44 | diff --git a/target/arm/cpu.c b/target/arm/cpu.c | ||
45 | index XXXXXXX..XXXXXXX 100644 | ||
46 | --- a/target/arm/cpu.c | ||
47 | +++ b/target/arm/cpu.c | ||
48 | @@ -XXX,XX +XXX,XX @@ | ||
49 | #if !defined(CONFIG_USER_ONLY) | ||
50 | #include "hw/loader.h" | ||
51 | #endif | ||
52 | -#include "hw/arm/arm.h" | ||
53 | #include "sysemu/sysemu.h" | ||
54 | #include "sysemu/hw_accel.h" | ||
55 | #include "kvm_arm.h" | ||
56 | diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c | ||
57 | index XXXXXXX..XXXXXXX 100644 | ||
58 | --- a/target/arm/cpu64.c | ||
59 | +++ b/target/arm/cpu64.c | ||
60 | @@ -XXX,XX +XXX,XX @@ | ||
61 | #if !defined(CONFIG_USER_ONLY) | ||
62 | #include "hw/loader.h" | ||
63 | #endif | ||
64 | -#include "hw/arm/arm.h" | ||
65 | #include "sysemu/sysemu.h" | ||
66 | #include "sysemu/kvm.h" | ||
67 | #include "kvm_arm.h" | ||
28 | diff --git a/target/arm/kvm.c b/target/arm/kvm.c | 68 | diff --git a/target/arm/kvm.c b/target/arm/kvm.c |
29 | index XXXXXXX..XXXXXXX 100644 | 69 | index XXXXXXX..XXXXXXX 100644 |
30 | --- a/target/arm/kvm.c | 70 | --- a/target/arm/kvm.c |
31 | +++ b/target/arm/kvm.c | 71 | +++ b/target/arm/kvm.c |
32 | @@ -XXX,XX +XXX,XX @@ void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu) | 72 | @@ -XXX,XX +XXX,XX @@ |
33 | 73 | #include "cpu.h" | |
34 | cpu->kvm_target = arm_host_cpu_features.target; | 74 | #include "trace.h" |
35 | cpu->dtb_compatible = arm_host_cpu_features.dtb_compatible; | 75 | #include "internals.h" |
36 | + cpu->isar = arm_host_cpu_features.isar; | 76 | -#include "hw/arm/arm.h" |
37 | env->features = arm_host_cpu_features.features; | 77 | #include "hw/pci/pci.h" |
38 | } | 78 | #include "exec/memattrs.h" |
79 | #include "exec/address-spaces.h" | ||
80 | diff --git a/target/arm/kvm32.c b/target/arm/kvm32.c | ||
81 | index XXXXXXX..XXXXXXX 100644 | ||
82 | --- a/target/arm/kvm32.c | ||
83 | +++ b/target/arm/kvm32.c | ||
84 | @@ -XXX,XX +XXX,XX @@ | ||
85 | #include "sysemu/kvm.h" | ||
86 | #include "kvm_arm.h" | ||
87 | #include "internals.h" | ||
88 | -#include "hw/arm/arm.h" | ||
89 | #include "qemu/log.h" | ||
90 | |||
91 | static inline void set_feature(uint64_t *features, int feature) | ||
92 | diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c | ||
93 | index XXXXXXX..XXXXXXX 100644 | ||
94 | --- a/target/arm/kvm64.c | ||
95 | +++ b/target/arm/kvm64.c | ||
96 | @@ -XXX,XX +XXX,XX @@ | ||
97 | #include "sysemu/kvm.h" | ||
98 | #include "kvm_arm.h" | ||
99 | #include "internals.h" | ||
100 | -#include "hw/arm/arm.h" | ||
101 | |||
102 | static bool have_guest_debug; | ||
39 | 103 | ||
40 | -- | 104 | -- |
41 | 2.19.1 | 105 | 2.20.1 |
42 | 106 | ||
43 | 107 | diff view generated by jsdifflib |
1 | In practice for most of the more-or-less orphan Arm board models, | 1 | The header file hw/arm/arm.h now includes only declarations |
---|---|---|---|
2 | I will review patches and put them in via the target-arm tree. | 2 | relating to hw/arm/boot.c functionality. Rename it accordingly, |
3 | So list myself as an "Odd Fixes" status maintainer for them. | 3 | and adjust its header comment. |
4 | 4 | ||
5 | This commit downgrades these boards to "Odd Fixes": | 5 | The bulk of this commit was created via |
6 | * Allwinner-A10 | 6 | perl -pi -e 's|hw/arm/arm.h|hw/arm/boot.h|' hw/arm/*.c include/hw/arm/*.h |
7 | * Exynos | ||
8 | * Calxeda Highbank | ||
9 | * Canon DIGIC | ||
10 | * Musicpal | ||
11 | * nSeries | ||
12 | * Palm | ||
13 | * PXA2xx | ||
14 | 7 | ||
15 | These boards were already "Odd Fixes": | 8 | In a few cases we can just delete the #include: |
16 | * Gumstix | 9 | hw/arm/msf2-soc.c, include/hw/arm/aspeed_soc.h and |
17 | * i.MX31 (kzm) | 10 | include/hw/arm/bcm2836.h did not require it. |
18 | |||
19 | Philippe Mathieu-Daudé has requested to be moved to R: | ||
20 | status for Gumstix now that I am listed as the M: contact. | ||
21 | |||
22 | Some boards are maintained, but their patches still go | ||
23 | via the target-arm tree, so add myself as a secondary | ||
24 | maintainer contact for those: | ||
25 | * Xilinx Zynq | ||
26 | * Xilinx ZynqMP | ||
27 | * STM32F205 | ||
28 | * Netduino 2 | ||
29 | * SmartFusion2 | ||
30 | * Mecraft M2S-FG484 | ||
31 | * ASPEED BMCs | ||
32 | * NRF51 | ||
33 | 11 | ||
34 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 12 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
35 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | 13 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> |
36 | Reviewed-by: Thomas Huth <thuth@redhat.com> | 14 | Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> |
37 | Message-id: 20181108134139.31666-1-peter.maydell@linaro.org | 15 | Message-id: 20190516163857.6430-4-peter.maydell@linaro.org |
38 | --- | 16 | --- |
39 | MAINTAINERS | 36 +++++++++++++++++++++++++++--------- | 17 | include/hw/arm/allwinner-a10.h | 2 +- |
40 | 1 file changed, 27 insertions(+), 9 deletions(-) | 18 | include/hw/arm/aspeed_soc.h | 1 - |
19 | include/hw/arm/bcm2836.h | 1 - | ||
20 | include/hw/arm/{arm.h => boot.h} | 8 ++++---- | ||
21 | include/hw/arm/fsl-imx25.h | 2 +- | ||
22 | include/hw/arm/fsl-imx31.h | 2 +- | ||
23 | include/hw/arm/fsl-imx6.h | 2 +- | ||
24 | include/hw/arm/fsl-imx6ul.h | 2 +- | ||
25 | include/hw/arm/fsl-imx7.h | 2 +- | ||
26 | include/hw/arm/virt.h | 2 +- | ||
27 | include/hw/arm/xlnx-versal.h | 2 +- | ||
28 | include/hw/arm/xlnx-zynqmp.h | 2 +- | ||
29 | hw/arm/armsse.c | 2 +- | ||
30 | hw/arm/armv7m.c | 2 +- | ||
31 | hw/arm/aspeed.c | 2 +- | ||
32 | hw/arm/boot.c | 2 +- | ||
33 | hw/arm/collie.c | 2 +- | ||
34 | hw/arm/exynos4210.c | 2 +- | ||
35 | hw/arm/exynos4_boards.c | 2 +- | ||
36 | hw/arm/highbank.c | 2 +- | ||
37 | hw/arm/integratorcp.c | 2 +- | ||
38 | hw/arm/mainstone.c | 2 +- | ||
39 | hw/arm/microbit.c | 2 +- | ||
40 | hw/arm/mps2-tz.c | 2 +- | ||
41 | hw/arm/mps2.c | 2 +- | ||
42 | hw/arm/msf2-soc.c | 1 - | ||
43 | hw/arm/msf2-som.c | 2 +- | ||
44 | hw/arm/musca.c | 2 +- | ||
45 | hw/arm/musicpal.c | 2 +- | ||
46 | hw/arm/netduino2.c | 2 +- | ||
47 | hw/arm/nrf51_soc.c | 2 +- | ||
48 | hw/arm/nseries.c | 2 +- | ||
49 | hw/arm/omap1.c | 2 +- | ||
50 | hw/arm/omap2.c | 2 +- | ||
51 | hw/arm/omap_sx1.c | 2 +- | ||
52 | hw/arm/palm.c | 2 +- | ||
53 | hw/arm/raspi.c | 2 +- | ||
54 | hw/arm/realview.c | 2 +- | ||
55 | hw/arm/spitz.c | 2 +- | ||
56 | hw/arm/stellaris.c | 2 +- | ||
57 | hw/arm/stm32f205_soc.c | 2 +- | ||
58 | hw/arm/strongarm.c | 2 +- | ||
59 | hw/arm/tosa.c | 2 +- | ||
60 | hw/arm/versatilepb.c | 2 +- | ||
61 | hw/arm/vexpress.c | 2 +- | ||
62 | hw/arm/virt.c | 2 +- | ||
63 | hw/arm/xilinx_zynq.c | 2 +- | ||
64 | hw/arm/xlnx-versal.c | 2 +- | ||
65 | hw/arm/z2.c | 2 +- | ||
66 | 49 files changed, 49 insertions(+), 52 deletions(-) | ||
67 | rename include/hw/arm/{arm.h => boot.h} (98%) | ||
41 | 68 | ||
42 | diff --git a/MAINTAINERS b/MAINTAINERS | 69 | diff --git a/include/hw/arm/allwinner-a10.h b/include/hw/arm/allwinner-a10.h |
43 | index XXXXXXX..XXXXXXX 100644 | 70 | index XXXXXXX..XXXXXXX 100644 |
44 | --- a/MAINTAINERS | 71 | --- a/include/hw/arm/allwinner-a10.h |
45 | +++ b/MAINTAINERS | 72 | +++ b/include/hw/arm/allwinner-a10.h |
46 | @@ -XXX,XX +XXX,XX @@ ARM Machines | 73 | @@ -XXX,XX +XXX,XX @@ |
47 | ------------ | 74 | #include "qemu-common.h" |
48 | Allwinner-a10 | 75 | #include "qemu/error-report.h" |
49 | M: Beniamino Galvani <b.galvani@gmail.com> | 76 | #include "hw/char/serial.h" |
50 | +M: Peter Maydell <peter.maydell@linaro.org> | 77 | -#include "hw/arm/arm.h" |
51 | L: qemu-arm@nongnu.org | 78 | +#include "hw/arm/boot.h" |
52 | -S: Maintained | 79 | #include "hw/timer/allwinner-a10-pit.h" |
53 | +S: Odd Fixes | 80 | #include "hw/intc/allwinner-a10-pic.h" |
54 | F: hw/*/allwinner* | 81 | #include "hw/net/allwinner_emac.h" |
55 | F: include/hw/*/allwinner* | 82 | diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h |
56 | F: hw/arm/cubieboard.c | 83 | index XXXXXXX..XXXXXXX 100644 |
57 | @@ -XXX,XX +XXX,XX @@ F: tests/test-arm-mptimer.c | 84 | --- a/include/hw/arm/aspeed_soc.h |
58 | 85 | +++ b/include/hw/arm/aspeed_soc.h | |
59 | Exynos | 86 | @@ -XXX,XX +XXX,XX @@ |
60 | M: Igor Mitsyanko <i.mitsyanko@gmail.com> | 87 | #ifndef ASPEED_SOC_H |
61 | +M: Peter Maydell <peter.maydell@linaro.org> | 88 | #define ASPEED_SOC_H |
62 | L: qemu-arm@nongnu.org | 89 | |
63 | -S: Maintained | 90 | -#include "hw/arm/arm.h" |
64 | +S: Odd Fixes | 91 | #include "hw/intc/aspeed_vic.h" |
65 | F: hw/*/exynos* | 92 | #include "hw/misc/aspeed_scu.h" |
66 | F: include/hw/arm/exynos4210.h | 93 | #include "hw/misc/aspeed_sdmc.h" |
67 | 94 | diff --git a/include/hw/arm/bcm2836.h b/include/hw/arm/bcm2836.h | |
68 | Calxeda Highbank | 95 | index XXXXXXX..XXXXXXX 100644 |
69 | M: Rob Herring <robh@kernel.org> | 96 | --- a/include/hw/arm/bcm2836.h |
70 | +M: Peter Maydell <peter.maydell@linaro.org> | 97 | +++ b/include/hw/arm/bcm2836.h |
71 | L: qemu-arm@nongnu.org | 98 | @@ -XXX,XX +XXX,XX @@ |
72 | -S: Maintained | 99 | #ifndef BCM2836_H |
73 | +S: Odd Fixes | 100 | #define BCM2836_H |
74 | F: hw/arm/highbank.c | 101 | |
75 | F: hw/net/xgmac.c | 102 | -#include "hw/arm/arm.h" |
76 | 103 | #include "hw/arm/bcm2835_peripherals.h" | |
77 | Canon DIGIC | 104 | #include "hw/intc/bcm2836_control.h" |
78 | M: Antony Pavlov <antonynpavlov@gmail.com> | 105 | |
79 | +M: Peter Maydell <peter.maydell@linaro.org> | 106 | diff --git a/include/hw/arm/arm.h b/include/hw/arm/boot.h |
80 | L: qemu-arm@nongnu.org | 107 | similarity index 98% |
81 | -S: Maintained | 108 | rename from include/hw/arm/arm.h |
82 | +S: Odd Fixes | 109 | rename to include/hw/arm/boot.h |
83 | F: include/hw/arm/digic.h | 110 | index XXXXXXX..XXXXXXX 100644 |
84 | F: hw/*/digic* | 111 | --- a/include/hw/arm/arm.h |
85 | 112 | +++ b/include/hw/arm/boot.h | |
86 | Gumstix | 113 | @@ -XXX,XX +XXX,XX @@ |
87 | -M: Philippe Mathieu-Daudé <f4bug@amsat.org> | 114 | /* |
88 | +M: Peter Maydell <peter.maydell@linaro.org> | 115 | - * Misc ARM declarations |
89 | +R: Philippe Mathieu-Daudé <f4bug@amsat.org> | 116 | + * ARM kernel loader. |
90 | L: qemu-devel@nongnu.org | 117 | * |
91 | L: qemu-arm@nongnu.org | 118 | * Copyright (c) 2006 CodeSourcery. |
92 | S: Odd Fixes | 119 | * Written by Paul Brook |
93 | @@ -XXX,XX +XXX,XX @@ F: hw/arm/gumstix.c | 120 | @@ -XXX,XX +XXX,XX @@ |
94 | 121 | * | |
95 | i.MX31 (kzm) | 122 | */ |
96 | M: Peter Chubb <peter.chubb@nicta.com.au> | 123 | |
97 | +M: Peter Maydell <peter.maydell@linaro.org> | 124 | -#ifndef HW_ARM_H |
98 | L: qemu-arm@nongnu.org | 125 | -#define HW_ARM_H |
99 | S: Odd Fixes | 126 | +#ifndef HW_ARM_BOOT_H |
100 | F: hw/arm/kzm.c | 127 | +#define HW_ARM_BOOT_H |
101 | @@ -XXX,XX +XXX,XX @@ F: include/hw/misc/iotkit-sysinfo.h | 128 | |
102 | 129 | #include "exec/memory.h" | |
103 | Musicpal | 130 | #include "target/arm/cpu-qom.h" |
104 | M: Jan Kiszka <jan.kiszka@web.de> | 131 | @@ -XXX,XX +XXX,XX @@ void arm_write_secure_board_setup_dummy_smc(ARMCPU *cpu, |
105 | +M: Peter Maydell <peter.maydell@linaro.org> | 132 | const struct arm_boot_info *info, |
106 | L: qemu-arm@nongnu.org | 133 | hwaddr mvbar_addr); |
107 | -S: Maintained | 134 | |
108 | +S: Odd Fixes | 135 | -#endif /* HW_ARM_H */ |
109 | F: hw/arm/musicpal.c | 136 | +#endif /* HW_ARM_BOOT_H */ |
110 | 137 | diff --git a/include/hw/arm/fsl-imx25.h b/include/hw/arm/fsl-imx25.h | |
111 | nSeries | 138 | index XXXXXXX..XXXXXXX 100644 |
112 | M: Andrzej Zaborowski <balrogg@gmail.com> | 139 | --- a/include/hw/arm/fsl-imx25.h |
113 | +M: Peter Maydell <peter.maydell@linaro.org> | 140 | +++ b/include/hw/arm/fsl-imx25.h |
114 | L: qemu-arm@nongnu.org | 141 | @@ -XXX,XX +XXX,XX @@ |
115 | -S: Maintained | 142 | #ifndef FSL_IMX25_H |
116 | +S: Odd Fixes | 143 | #define FSL_IMX25_H |
117 | F: hw/arm/nseries.c | 144 | |
118 | 145 | -#include "hw/arm/arm.h" | |
119 | Palm | 146 | +#include "hw/arm/boot.h" |
120 | M: Andrzej Zaborowski <balrogg@gmail.com> | 147 | #include "hw/intc/imx_avic.h" |
121 | +M: Peter Maydell <peter.maydell@linaro.org> | 148 | #include "hw/misc/imx25_ccm.h" |
122 | L: qemu-arm@nongnu.org | 149 | #include "hw/char/imx_serial.h" |
123 | -S: Maintained | 150 | diff --git a/include/hw/arm/fsl-imx31.h b/include/hw/arm/fsl-imx31.h |
124 | +S: Odd Fixes | 151 | index XXXXXXX..XXXXXXX 100644 |
125 | F: hw/arm/palm.c | 152 | --- a/include/hw/arm/fsl-imx31.h |
126 | 153 | +++ b/include/hw/arm/fsl-imx31.h | |
127 | Raspberry Pi | 154 | @@ -XXX,XX +XXX,XX @@ |
128 | @@ -XXX,XX +XXX,XX @@ F: include/hw/intc/realview_gic.h | 155 | #ifndef FSL_IMX31_H |
129 | 156 | #define FSL_IMX31_H | |
130 | PXA2XX | 157 | |
131 | M: Andrzej Zaborowski <balrogg@gmail.com> | 158 | -#include "hw/arm/arm.h" |
132 | +M: Peter Maydell <peter.maydell@linaro.org> | 159 | +#include "hw/arm/boot.h" |
133 | L: qemu-arm@nongnu.org | 160 | #include "hw/intc/imx_avic.h" |
134 | -S: Maintained | 161 | #include "hw/misc/imx31_ccm.h" |
135 | +S: Odd Fixes | 162 | #include "hw/char/imx_serial.h" |
136 | F: hw/arm/mainstone.c | 163 | diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h |
137 | F: hw/arm/spitz.c | 164 | index XXXXXXX..XXXXXXX 100644 |
138 | F: hw/arm/tosa.c | 165 | --- a/include/hw/arm/fsl-imx6.h |
139 | @@ -XXX,XX +XXX,XX @@ F: include/hw/arm/virt.h | 166 | +++ b/include/hw/arm/fsl-imx6.h |
140 | Xilinx Zynq | 167 | @@ -XXX,XX +XXX,XX @@ |
141 | M: Edgar E. Iglesias <edgar.iglesias@gmail.com> | 168 | #ifndef FSL_IMX6_H |
142 | M: Alistair Francis <alistair@alistair23.me> | 169 | #define FSL_IMX6_H |
143 | +M: Peter Maydell <peter.maydell@linaro.org> | 170 | |
144 | L: qemu-arm@nongnu.org | 171 | -#include "hw/arm/arm.h" |
145 | S: Maintained | 172 | +#include "hw/arm/boot.h" |
146 | F: hw/*/xilinx_* | 173 | #include "hw/cpu/a9mpcore.h" |
147 | @@ -XXX,XX +XXX,XX @@ X: hw/ssi/xilinx_* | 174 | #include "hw/misc/imx6_ccm.h" |
148 | Xilinx ZynqMP | 175 | #include "hw/misc/imx6_src.h" |
149 | M: Alistair Francis <alistair@alistair23.me> | 176 | diff --git a/include/hw/arm/fsl-imx6ul.h b/include/hw/arm/fsl-imx6ul.h |
150 | M: Edgar E. Iglesias <edgar.iglesias@gmail.com> | 177 | index XXXXXXX..XXXXXXX 100644 |
151 | +M: Peter Maydell <peter.maydell@linaro.org> | 178 | --- a/include/hw/arm/fsl-imx6ul.h |
152 | L: qemu-arm@nongnu.org | 179 | +++ b/include/hw/arm/fsl-imx6ul.h |
153 | S: Maintained | 180 | @@ -XXX,XX +XXX,XX @@ |
154 | F: hw/*/xlnx*.c | 181 | #ifndef FSL_IMX6UL_H |
155 | @@ -XXX,XX +XXX,XX @@ F: hw/arm/virt-acpi-build.c | 182 | #define FSL_IMX6UL_H |
156 | 183 | ||
157 | STM32F205 | 184 | -#include "hw/arm/arm.h" |
158 | M: Alistair Francis <alistair@alistair23.me> | 185 | +#include "hw/arm/boot.h" |
159 | +M: Peter Maydell <peter.maydell@linaro.org> | 186 | #include "hw/cpu/a15mpcore.h" |
160 | S: Maintained | 187 | #include "hw/misc/imx6ul_ccm.h" |
161 | F: hw/arm/stm32f205_soc.c | 188 | #include "hw/misc/imx6_src.h" |
162 | F: hw/misc/stm32f2xx_syscfg.c | 189 | diff --git a/include/hw/arm/fsl-imx7.h b/include/hw/arm/fsl-imx7.h |
163 | @@ -XXX,XX +XXX,XX @@ F: include/hw/*/stm32*.h | 190 | index XXXXXXX..XXXXXXX 100644 |
164 | 191 | --- a/include/hw/arm/fsl-imx7.h | |
165 | Netduino 2 | 192 | +++ b/include/hw/arm/fsl-imx7.h |
166 | M: Alistair Francis <alistair@alistair23.me> | 193 | @@ -XXX,XX +XXX,XX @@ |
167 | +M: Peter Maydell <peter.maydell@linaro.org> | 194 | #ifndef FSL_IMX7_H |
168 | S: Maintained | 195 | #define FSL_IMX7_H |
169 | F: hw/arm/netduino2.c | 196 | |
170 | 197 | -#include "hw/arm/arm.h" | |
171 | SmartFusion2 | 198 | +#include "hw/arm/boot.h" |
172 | M: Subbaraya Sundeep <sundeep.lkml@gmail.com> | 199 | #include "hw/cpu/a15mpcore.h" |
173 | +M: Peter Maydell <peter.maydell@linaro.org> | 200 | #include "hw/intc/imx_gpcv2.h" |
174 | S: Maintained | 201 | #include "hw/misc/imx7_ccm.h" |
175 | F: hw/arm/msf2-soc.c | 202 | diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h |
176 | F: hw/misc/msf2-sysreg.c | 203 | index XXXXXXX..XXXXXXX 100644 |
177 | @@ -XXX,XX +XXX,XX @@ F: include/hw/ssi/mss-spi.h | 204 | --- a/include/hw/arm/virt.h |
178 | 205 | +++ b/include/hw/arm/virt.h | |
179 | Emcraft M2S-FG484 | 206 | @@ -XXX,XX +XXX,XX @@ |
180 | M: Subbaraya Sundeep <sundeep.lkml@gmail.com> | 207 | #include "exec/hwaddr.h" |
181 | +M: Peter Maydell <peter.maydell@linaro.org> | 208 | #include "qemu/notify.h" |
182 | S: Maintained | 209 | #include "hw/boards.h" |
183 | F: hw/arm/msf2-som.c | 210 | -#include "hw/arm/arm.h" |
184 | 211 | +#include "hw/arm/boot.h" | |
185 | ASPEED BMCs | 212 | #include "hw/block/flash.h" |
186 | M: Cédric Le Goater <clg@kaod.org> | 213 | #include "sysemu/kvm.h" |
187 | +M: Peter Maydell <peter.maydell@linaro.org> | 214 | #include "hw/intc/arm_gicv3_common.h" |
188 | R: Andrew Jeffery <andrew@aj.id.au> | 215 | diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h |
189 | R: Joel Stanley <joel@jms.id.au> | 216 | index XXXXXXX..XXXXXXX 100644 |
190 | L: qemu-arm@nongnu.org | 217 | --- a/include/hw/arm/xlnx-versal.h |
191 | @@ -XXX,XX +XXX,XX @@ F: include/hw/net/ftgmac100.h | 218 | +++ b/include/hw/arm/xlnx-versal.h |
192 | 219 | @@ -XXX,XX +XXX,XX @@ | |
193 | NRF51 | 220 | #define XLNX_VERSAL_H |
194 | M: Joel Stanley <joel@jms.id.au> | 221 | |
195 | +M: Peter Maydell <peter.maydell@linaro.org> | 222 | #include "hw/sysbus.h" |
196 | L: qemu-arm@nongnu.org | 223 | -#include "hw/arm/arm.h" |
197 | S: Maintained | 224 | +#include "hw/arm/boot.h" |
198 | F: hw/arm/nrf51_soc.c | 225 | #include "hw/intc/arm_gicv3.h" |
226 | |||
227 | #define TYPE_XLNX_VERSAL "xlnx-versal" | ||
228 | diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h | ||
229 | index XXXXXXX..XXXXXXX 100644 | ||
230 | --- a/include/hw/arm/xlnx-zynqmp.h | ||
231 | +++ b/include/hw/arm/xlnx-zynqmp.h | ||
232 | @@ -XXX,XX +XXX,XX @@ | ||
233 | #ifndef XLNX_ZYNQMP_H | ||
234 | |||
235 | #include "qemu-common.h" | ||
236 | -#include "hw/arm/arm.h" | ||
237 | +#include "hw/arm/boot.h" | ||
238 | #include "hw/intc/arm_gic.h" | ||
239 | #include "hw/net/cadence_gem.h" | ||
240 | #include "hw/char/cadence_uart.h" | ||
241 | diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c | ||
242 | index XXXXXXX..XXXXXXX 100644 | ||
243 | --- a/hw/arm/armsse.c | ||
244 | +++ b/hw/arm/armsse.c | ||
245 | @@ -XXX,XX +XXX,XX @@ | ||
246 | #include "hw/sysbus.h" | ||
247 | #include "hw/registerfields.h" | ||
248 | #include "hw/arm/armsse.h" | ||
249 | -#include "hw/arm/arm.h" | ||
250 | +#include "hw/arm/boot.h" | ||
251 | |||
252 | /* Format of the System Information block SYS_CONFIG register */ | ||
253 | typedef enum SysConfigFormat { | ||
254 | diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c | ||
255 | index XXXXXXX..XXXXXXX 100644 | ||
256 | --- a/hw/arm/armv7m.c | ||
257 | +++ b/hw/arm/armv7m.c | ||
258 | @@ -XXX,XX +XXX,XX @@ | ||
259 | #include "qemu-common.h" | ||
260 | #include "cpu.h" | ||
261 | #include "hw/sysbus.h" | ||
262 | -#include "hw/arm/arm.h" | ||
263 | +#include "hw/arm/boot.h" | ||
264 | #include "hw/loader.h" | ||
265 | #include "elf.h" | ||
266 | #include "sysemu/qtest.h" | ||
267 | diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c | ||
268 | index XXXXXXX..XXXXXXX 100644 | ||
269 | --- a/hw/arm/aspeed.c | ||
270 | +++ b/hw/arm/aspeed.c | ||
271 | @@ -XXX,XX +XXX,XX @@ | ||
272 | #include "qemu-common.h" | ||
273 | #include "cpu.h" | ||
274 | #include "exec/address-spaces.h" | ||
275 | -#include "hw/arm/arm.h" | ||
276 | +#include "hw/arm/boot.h" | ||
277 | #include "hw/arm/aspeed.h" | ||
278 | #include "hw/arm/aspeed_soc.h" | ||
279 | #include "hw/boards.h" | ||
280 | diff --git a/hw/arm/boot.c b/hw/arm/boot.c | ||
281 | index XXXXXXX..XXXXXXX 100644 | ||
282 | --- a/hw/arm/boot.c | ||
283 | +++ b/hw/arm/boot.c | ||
284 | @@ -XXX,XX +XXX,XX @@ | ||
285 | #include "qapi/error.h" | ||
286 | #include <libfdt.h> | ||
287 | #include "hw/hw.h" | ||
288 | -#include "hw/arm/arm.h" | ||
289 | +#include "hw/arm/boot.h" | ||
290 | #include "hw/arm/linux-boot-if.h" | ||
291 | #include "sysemu/kvm.h" | ||
292 | #include "sysemu/sysemu.h" | ||
293 | diff --git a/hw/arm/collie.c b/hw/arm/collie.c | ||
294 | index XXXXXXX..XXXXXXX 100644 | ||
295 | --- a/hw/arm/collie.c | ||
296 | +++ b/hw/arm/collie.c | ||
297 | @@ -XXX,XX +XXX,XX @@ | ||
298 | #include "hw/sysbus.h" | ||
299 | #include "hw/boards.h" | ||
300 | #include "strongarm.h" | ||
301 | -#include "hw/arm/arm.h" | ||
302 | +#include "hw/arm/boot.h" | ||
303 | #include "hw/block/flash.h" | ||
304 | #include "exec/address-spaces.h" | ||
305 | #include "cpu.h" | ||
306 | diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c | ||
307 | index XXXXXXX..XXXXXXX 100644 | ||
308 | --- a/hw/arm/exynos4210.c | ||
309 | +++ b/hw/arm/exynos4210.c | ||
310 | @@ -XXX,XX +XXX,XX @@ | ||
311 | #include "hw/boards.h" | ||
312 | #include "sysemu/sysemu.h" | ||
313 | #include "hw/sysbus.h" | ||
314 | -#include "hw/arm/arm.h" | ||
315 | +#include "hw/arm/boot.h" | ||
316 | #include "hw/loader.h" | ||
317 | #include "hw/arm/exynos4210.h" | ||
318 | #include "hw/sd/sdhci.h" | ||
319 | diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c | ||
320 | index XXXXXXX..XXXXXXX 100644 | ||
321 | --- a/hw/arm/exynos4_boards.c | ||
322 | +++ b/hw/arm/exynos4_boards.c | ||
323 | @@ -XXX,XX +XXX,XX @@ | ||
324 | #include "sysemu/sysemu.h" | ||
325 | #include "hw/sysbus.h" | ||
326 | #include "net/net.h" | ||
327 | -#include "hw/arm/arm.h" | ||
328 | +#include "hw/arm/boot.h" | ||
329 | #include "exec/address-spaces.h" | ||
330 | #include "hw/arm/exynos4210.h" | ||
331 | #include "hw/net/lan9118.h" | ||
332 | diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c | ||
333 | index XXXXXXX..XXXXXXX 100644 | ||
334 | --- a/hw/arm/highbank.c | ||
335 | +++ b/hw/arm/highbank.c | ||
336 | @@ -XXX,XX +XXX,XX @@ | ||
337 | #include "qemu/osdep.h" | ||
338 | #include "qapi/error.h" | ||
339 | #include "hw/sysbus.h" | ||
340 | -#include "hw/arm/arm.h" | ||
341 | +#include "hw/arm/boot.h" | ||
342 | #include "hw/loader.h" | ||
343 | #include "net/net.h" | ||
344 | #include "sysemu/kvm.h" | ||
345 | diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c | ||
346 | index XXXXXXX..XXXXXXX 100644 | ||
347 | --- a/hw/arm/integratorcp.c | ||
348 | +++ b/hw/arm/integratorcp.c | ||
349 | @@ -XXX,XX +XXX,XX @@ | ||
350 | #include "cpu.h" | ||
351 | #include "hw/sysbus.h" | ||
352 | #include "hw/boards.h" | ||
353 | -#include "hw/arm/arm.h" | ||
354 | +#include "hw/arm/boot.h" | ||
355 | #include "hw/misc/arm_integrator_debug.h" | ||
356 | #include "hw/net/smc91c111.h" | ||
357 | #include "net/net.h" | ||
358 | diff --git a/hw/arm/mainstone.c b/hw/arm/mainstone.c | ||
359 | index XXXXXXX..XXXXXXX 100644 | ||
360 | --- a/hw/arm/mainstone.c | ||
361 | +++ b/hw/arm/mainstone.c | ||
362 | @@ -XXX,XX +XXX,XX @@ | ||
363 | #include "qapi/error.h" | ||
364 | #include "hw/hw.h" | ||
365 | #include "hw/arm/pxa.h" | ||
366 | -#include "hw/arm/arm.h" | ||
367 | +#include "hw/arm/boot.h" | ||
368 | #include "net/net.h" | ||
369 | #include "hw/net/smc91c111.h" | ||
370 | #include "hw/boards.h" | ||
371 | diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c | ||
372 | index XXXXXXX..XXXXXXX 100644 | ||
373 | --- a/hw/arm/microbit.c | ||
374 | +++ b/hw/arm/microbit.c | ||
375 | @@ -XXX,XX +XXX,XX @@ | ||
376 | #include "qemu/osdep.h" | ||
377 | #include "qapi/error.h" | ||
378 | #include "hw/boards.h" | ||
379 | -#include "hw/arm/arm.h" | ||
380 | +#include "hw/arm/boot.h" | ||
381 | #include "sysemu/sysemu.h" | ||
382 | #include "exec/address-spaces.h" | ||
383 | |||
384 | diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c | ||
385 | index XXXXXXX..XXXXXXX 100644 | ||
386 | --- a/hw/arm/mps2-tz.c | ||
387 | +++ b/hw/arm/mps2-tz.c | ||
388 | @@ -XXX,XX +XXX,XX @@ | ||
389 | #include "qemu/osdep.h" | ||
390 | #include "qapi/error.h" | ||
391 | #include "qemu/error-report.h" | ||
392 | -#include "hw/arm/arm.h" | ||
393 | +#include "hw/arm/boot.h" | ||
394 | #include "hw/arm/armv7m.h" | ||
395 | #include "hw/or-irq.h" | ||
396 | #include "hw/boards.h" | ||
397 | diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c | ||
398 | index XXXXXXX..XXXXXXX 100644 | ||
399 | --- a/hw/arm/mps2.c | ||
400 | +++ b/hw/arm/mps2.c | ||
401 | @@ -XXX,XX +XXX,XX @@ | ||
402 | #include "qemu/osdep.h" | ||
403 | #include "qapi/error.h" | ||
404 | #include "qemu/error-report.h" | ||
405 | -#include "hw/arm/arm.h" | ||
406 | +#include "hw/arm/boot.h" | ||
407 | #include "hw/arm/armv7m.h" | ||
408 | #include "hw/or-irq.h" | ||
409 | #include "hw/boards.h" | ||
410 | diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c | ||
411 | index XXXXXXX..XXXXXXX 100644 | ||
412 | --- a/hw/arm/msf2-soc.c | ||
413 | +++ b/hw/arm/msf2-soc.c | ||
414 | @@ -XXX,XX +XXX,XX @@ | ||
415 | #include "qemu/units.h" | ||
416 | #include "qapi/error.h" | ||
417 | #include "qemu-common.h" | ||
418 | -#include "hw/arm/arm.h" | ||
419 | #include "exec/address-spaces.h" | ||
420 | #include "hw/char/serial.h" | ||
421 | #include "hw/boards.h" | ||
422 | diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c | ||
423 | index XXXXXXX..XXXXXXX 100644 | ||
424 | --- a/hw/arm/msf2-som.c | ||
425 | +++ b/hw/arm/msf2-som.c | ||
426 | @@ -XXX,XX +XXX,XX @@ | ||
427 | #include "qapi/error.h" | ||
428 | #include "qemu/error-report.h" | ||
429 | #include "hw/boards.h" | ||
430 | -#include "hw/arm/arm.h" | ||
431 | +#include "hw/arm/boot.h" | ||
432 | #include "exec/address-spaces.h" | ||
433 | #include "hw/arm/msf2-soc.h" | ||
434 | #include "cpu.h" | ||
435 | diff --git a/hw/arm/musca.c b/hw/arm/musca.c | ||
436 | index XXXXXXX..XXXXXXX 100644 | ||
437 | --- a/hw/arm/musca.c | ||
438 | +++ b/hw/arm/musca.c | ||
439 | @@ -XXX,XX +XXX,XX @@ | ||
440 | #include "qapi/error.h" | ||
441 | #include "exec/address-spaces.h" | ||
442 | #include "sysemu/sysemu.h" | ||
443 | -#include "hw/arm/arm.h" | ||
444 | +#include "hw/arm/boot.h" | ||
445 | #include "hw/arm/armsse.h" | ||
446 | #include "hw/boards.h" | ||
447 | #include "hw/char/pl011.h" | ||
448 | diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c | ||
449 | index XXXXXXX..XXXXXXX 100644 | ||
450 | --- a/hw/arm/musicpal.c | ||
451 | +++ b/hw/arm/musicpal.c | ||
452 | @@ -XXX,XX +XXX,XX @@ | ||
453 | #include "qemu-common.h" | ||
454 | #include "cpu.h" | ||
455 | #include "hw/sysbus.h" | ||
456 | -#include "hw/arm/arm.h" | ||
457 | +#include "hw/arm/boot.h" | ||
458 | #include "net/net.h" | ||
459 | #include "sysemu/sysemu.h" | ||
460 | #include "hw/boards.h" | ||
461 | diff --git a/hw/arm/netduino2.c b/hw/arm/netduino2.c | ||
462 | index XXXXXXX..XXXXXXX 100644 | ||
463 | --- a/hw/arm/netduino2.c | ||
464 | +++ b/hw/arm/netduino2.c | ||
465 | @@ -XXX,XX +XXX,XX @@ | ||
466 | #include "hw/boards.h" | ||
467 | #include "qemu/error-report.h" | ||
468 | #include "hw/arm/stm32f205_soc.h" | ||
469 | -#include "hw/arm/arm.h" | ||
470 | +#include "hw/arm/boot.h" | ||
471 | |||
472 | static void netduino2_init(MachineState *machine) | ||
473 | { | ||
474 | diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c | ||
475 | index XXXXXXX..XXXXXXX 100644 | ||
476 | --- a/hw/arm/nrf51_soc.c | ||
477 | +++ b/hw/arm/nrf51_soc.c | ||
478 | @@ -XXX,XX +XXX,XX @@ | ||
479 | #include "qemu/osdep.h" | ||
480 | #include "qapi/error.h" | ||
481 | #include "qemu-common.h" | ||
482 | -#include "hw/arm/arm.h" | ||
483 | +#include "hw/arm/boot.h" | ||
484 | #include "hw/sysbus.h" | ||
485 | #include "hw/boards.h" | ||
486 | #include "hw/misc/unimp.h" | ||
487 | diff --git a/hw/arm/nseries.c b/hw/arm/nseries.c | ||
488 | index XXXXXXX..XXXXXXX 100644 | ||
489 | --- a/hw/arm/nseries.c | ||
490 | +++ b/hw/arm/nseries.c | ||
491 | @@ -XXX,XX +XXX,XX @@ | ||
492 | #include "qemu/bswap.h" | ||
493 | #include "sysemu/sysemu.h" | ||
494 | #include "hw/arm/omap.h" | ||
495 | -#include "hw/arm/arm.h" | ||
496 | +#include "hw/arm/boot.h" | ||
497 | #include "hw/irq.h" | ||
498 | #include "ui/console.h" | ||
499 | #include "hw/boards.h" | ||
500 | diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c | ||
501 | index XXXXXXX..XXXXXXX 100644 | ||
502 | --- a/hw/arm/omap1.c | ||
503 | +++ b/hw/arm/omap1.c | ||
504 | @@ -XXX,XX +XXX,XX @@ | ||
505 | #include "cpu.h" | ||
506 | #include "hw/boards.h" | ||
507 | #include "hw/hw.h" | ||
508 | -#include "hw/arm/arm.h" | ||
509 | +#include "hw/arm/boot.h" | ||
510 | #include "hw/arm/omap.h" | ||
511 | #include "sysemu/sysemu.h" | ||
512 | #include "hw/arm/soc_dma.h" | ||
513 | diff --git a/hw/arm/omap2.c b/hw/arm/omap2.c | ||
514 | index XXXXXXX..XXXXXXX 100644 | ||
515 | --- a/hw/arm/omap2.c | ||
516 | +++ b/hw/arm/omap2.c | ||
517 | @@ -XXX,XX +XXX,XX @@ | ||
518 | #include "sysemu/qtest.h" | ||
519 | #include "hw/boards.h" | ||
520 | #include "hw/hw.h" | ||
521 | -#include "hw/arm/arm.h" | ||
522 | +#include "hw/arm/boot.h" | ||
523 | #include "hw/arm/omap.h" | ||
524 | #include "sysemu/sysemu.h" | ||
525 | #include "qemu/timer.h" | ||
526 | diff --git a/hw/arm/omap_sx1.c b/hw/arm/omap_sx1.c | ||
527 | index XXXXXXX..XXXXXXX 100644 | ||
528 | --- a/hw/arm/omap_sx1.c | ||
529 | +++ b/hw/arm/omap_sx1.c | ||
530 | @@ -XXX,XX +XXX,XX @@ | ||
531 | #include "ui/console.h" | ||
532 | #include "hw/arm/omap.h" | ||
533 | #include "hw/boards.h" | ||
534 | -#include "hw/arm/arm.h" | ||
535 | +#include "hw/arm/boot.h" | ||
536 | #include "hw/block/flash.h" | ||
537 | #include "sysemu/qtest.h" | ||
538 | #include "exec/address-spaces.h" | ||
539 | diff --git a/hw/arm/palm.c b/hw/arm/palm.c | ||
540 | index XXXXXXX..XXXXXXX 100644 | ||
541 | --- a/hw/arm/palm.c | ||
542 | +++ b/hw/arm/palm.c | ||
543 | @@ -XXX,XX +XXX,XX @@ | ||
544 | #include "ui/console.h" | ||
545 | #include "hw/arm/omap.h" | ||
546 | #include "hw/boards.h" | ||
547 | -#include "hw/arm/arm.h" | ||
548 | +#include "hw/arm/boot.h" | ||
549 | #include "hw/input/tsc2xxx.h" | ||
550 | #include "hw/loader.h" | ||
551 | #include "exec/address-spaces.h" | ||
552 | diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c | ||
553 | index XXXXXXX..XXXXXXX 100644 | ||
554 | --- a/hw/arm/raspi.c | ||
555 | +++ b/hw/arm/raspi.c | ||
556 | @@ -XXX,XX +XXX,XX @@ | ||
557 | #include "qemu/error-report.h" | ||
558 | #include "hw/boards.h" | ||
559 | #include "hw/loader.h" | ||
560 | -#include "hw/arm/arm.h" | ||
561 | +#include "hw/arm/boot.h" | ||
562 | #include "sysemu/sysemu.h" | ||
563 | |||
564 | #define SMPBOOT_ADDR 0x300 /* this should leave enough space for ATAGS */ | ||
565 | diff --git a/hw/arm/realview.c b/hw/arm/realview.c | ||
566 | index XXXXXXX..XXXXXXX 100644 | ||
567 | --- a/hw/arm/realview.c | ||
568 | +++ b/hw/arm/realview.c | ||
569 | @@ -XXX,XX +XXX,XX @@ | ||
570 | #include "qemu-common.h" | ||
571 | #include "cpu.h" | ||
572 | #include "hw/sysbus.h" | ||
573 | -#include "hw/arm/arm.h" | ||
574 | +#include "hw/arm/boot.h" | ||
575 | #include "hw/arm/primecell.h" | ||
576 | #include "hw/net/lan9118.h" | ||
577 | #include "hw/net/smc91c111.h" | ||
578 | diff --git a/hw/arm/spitz.c b/hw/arm/spitz.c | ||
579 | index XXXXXXX..XXXXXXX 100644 | ||
580 | --- a/hw/arm/spitz.c | ||
581 | +++ b/hw/arm/spitz.c | ||
582 | @@ -XXX,XX +XXX,XX @@ | ||
583 | #include "qapi/error.h" | ||
584 | #include "hw/hw.h" | ||
585 | #include "hw/arm/pxa.h" | ||
586 | -#include "hw/arm/arm.h" | ||
587 | +#include "hw/arm/boot.h" | ||
588 | #include "sysemu/sysemu.h" | ||
589 | #include "hw/pcmcia.h" | ||
590 | #include "hw/i2c/i2c.h" | ||
591 | diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c | ||
592 | index XXXXXXX..XXXXXXX 100644 | ||
593 | --- a/hw/arm/stellaris.c | ||
594 | +++ b/hw/arm/stellaris.c | ||
595 | @@ -XXX,XX +XXX,XX @@ | ||
596 | #include "qapi/error.h" | ||
597 | #include "hw/sysbus.h" | ||
598 | #include "hw/ssi/ssi.h" | ||
599 | -#include "hw/arm/arm.h" | ||
600 | +#include "hw/arm/boot.h" | ||
601 | #include "qemu/timer.h" | ||
602 | #include "hw/i2c/i2c.h" | ||
603 | #include "net/net.h" | ||
604 | diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c | ||
605 | index XXXXXXX..XXXXXXX 100644 | ||
606 | --- a/hw/arm/stm32f205_soc.c | ||
607 | +++ b/hw/arm/stm32f205_soc.c | ||
608 | @@ -XXX,XX +XXX,XX @@ | ||
609 | #include "qemu/osdep.h" | ||
610 | #include "qapi/error.h" | ||
611 | #include "qemu-common.h" | ||
612 | -#include "hw/arm/arm.h" | ||
613 | +#include "hw/arm/boot.h" | ||
614 | #include "exec/address-spaces.h" | ||
615 | #include "hw/arm/stm32f205_soc.h" | ||
616 | |||
617 | diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c | ||
618 | index XXXXXXX..XXXXXXX 100644 | ||
619 | --- a/hw/arm/strongarm.c | ||
620 | +++ b/hw/arm/strongarm.c | ||
621 | @@ -XXX,XX +XXX,XX @@ | ||
622 | #include "hw/sysbus.h" | ||
623 | #include "strongarm.h" | ||
624 | #include "qemu/error-report.h" | ||
625 | -#include "hw/arm/arm.h" | ||
626 | +#include "hw/arm/boot.h" | ||
627 | #include "chardev/char-fe.h" | ||
628 | #include "chardev/char-serial.h" | ||
629 | #include "sysemu/sysemu.h" | ||
630 | diff --git a/hw/arm/tosa.c b/hw/arm/tosa.c | ||
631 | index XXXXXXX..XXXXXXX 100644 | ||
632 | --- a/hw/arm/tosa.c | ||
633 | +++ b/hw/arm/tosa.c | ||
634 | @@ -XXX,XX +XXX,XX @@ | ||
635 | #include "qapi/error.h" | ||
636 | #include "hw/hw.h" | ||
637 | #include "hw/arm/pxa.h" | ||
638 | -#include "hw/arm/arm.h" | ||
639 | +#include "hw/arm/boot.h" | ||
640 | #include "hw/arm/sharpsl.h" | ||
641 | #include "hw/pcmcia.h" | ||
642 | #include "hw/boards.h" | ||
643 | diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c | ||
644 | index XXXXXXX..XXXXXXX 100644 | ||
645 | --- a/hw/arm/versatilepb.c | ||
646 | +++ b/hw/arm/versatilepb.c | ||
647 | @@ -XXX,XX +XXX,XX @@ | ||
648 | #include "qemu-common.h" | ||
649 | #include "cpu.h" | ||
650 | #include "hw/sysbus.h" | ||
651 | -#include "hw/arm/arm.h" | ||
652 | +#include "hw/arm/boot.h" | ||
653 | #include "hw/net/smc91c111.h" | ||
654 | #include "net/net.h" | ||
655 | #include "sysemu/sysemu.h" | ||
656 | diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c | ||
657 | index XXXXXXX..XXXXXXX 100644 | ||
658 | --- a/hw/arm/vexpress.c | ||
659 | +++ b/hw/arm/vexpress.c | ||
660 | @@ -XXX,XX +XXX,XX @@ | ||
661 | #include "qemu-common.h" | ||
662 | #include "cpu.h" | ||
663 | #include "hw/sysbus.h" | ||
664 | -#include "hw/arm/arm.h" | ||
665 | +#include "hw/arm/boot.h" | ||
666 | #include "hw/arm/primecell.h" | ||
667 | #include "hw/net/lan9118.h" | ||
668 | #include "hw/i2c/i2c.h" | ||
669 | diff --git a/hw/arm/virt.c b/hw/arm/virt.c | ||
670 | index XXXXXXX..XXXXXXX 100644 | ||
671 | --- a/hw/arm/virt.c | ||
672 | +++ b/hw/arm/virt.c | ||
673 | @@ -XXX,XX +XXX,XX @@ | ||
674 | #include "qemu/option.h" | ||
675 | #include "qapi/error.h" | ||
676 | #include "hw/sysbus.h" | ||
677 | -#include "hw/arm/arm.h" | ||
678 | +#include "hw/arm/boot.h" | ||
679 | #include "hw/arm/primecell.h" | ||
680 | #include "hw/arm/virt.h" | ||
681 | #include "hw/block/flash.h" | ||
682 | diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c | ||
683 | index XXXXXXX..XXXXXXX 100644 | ||
684 | --- a/hw/arm/xilinx_zynq.c | ||
685 | +++ b/hw/arm/xilinx_zynq.c | ||
686 | @@ -XXX,XX +XXX,XX @@ | ||
687 | #include "qemu-common.h" | ||
688 | #include "cpu.h" | ||
689 | #include "hw/sysbus.h" | ||
690 | -#include "hw/arm/arm.h" | ||
691 | +#include "hw/arm/boot.h" | ||
692 | #include "net/net.h" | ||
693 | #include "exec/address-spaces.h" | ||
694 | #include "sysemu/sysemu.h" | ||
695 | diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c | ||
696 | index XXXXXXX..XXXXXXX 100644 | ||
697 | --- a/hw/arm/xlnx-versal.c | ||
698 | +++ b/hw/arm/xlnx-versal.c | ||
699 | @@ -XXX,XX +XXX,XX @@ | ||
700 | #include "net/net.h" | ||
701 | #include "sysemu/sysemu.h" | ||
702 | #include "sysemu/kvm.h" | ||
703 | -#include "hw/arm/arm.h" | ||
704 | +#include "hw/arm/boot.h" | ||
705 | #include "kvm_arm.h" | ||
706 | #include "hw/misc/unimp.h" | ||
707 | #include "hw/intc/arm_gicv3_common.h" | ||
708 | diff --git a/hw/arm/z2.c b/hw/arm/z2.c | ||
709 | index XXXXXXX..XXXXXXX 100644 | ||
710 | --- a/hw/arm/z2.c | ||
711 | +++ b/hw/arm/z2.c | ||
712 | @@ -XXX,XX +XXX,XX @@ | ||
713 | #include "qemu/osdep.h" | ||
714 | #include "hw/hw.h" | ||
715 | #include "hw/arm/pxa.h" | ||
716 | -#include "hw/arm/arm.h" | ||
717 | +#include "hw/arm/boot.h" | ||
718 | #include "hw/i2c/i2c.h" | ||
719 | #include "hw/ssi/ssi.h" | ||
720 | #include "hw/boards.h" | ||
199 | -- | 721 | -- |
200 | 2.19.1 | 722 | 2.20.1 |
201 | 723 | ||
202 | 724 | diff view generated by jsdifflib |
1 | An off-by-one error in a switch case in onenand_read() allowed | 1 | In ich_vmcr_write() we enforce "writes of BPR fields to less than |
---|---|---|---|
2 | a misbehaving guest to read off the end of a block of memory. | 2 | their minimum sets them to the minimum" by doing a "read vbpr and |
3 | write it back" operation. A typo here meant that we weren't handling | ||
4 | writes to these fields correctly, because we were reading from VBPR0 | ||
5 | but writing to VBPR1. | ||
3 | 6 | ||
4 | NB: the onenand device is used only by the "n800" and "n810" | 7 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
5 | machines, which are usable only with TCG, not KVM, so this is | ||
6 | not a security issue. | ||
7 | |||
8 | Reported-by: Thomas Huth <thuth@redhat.com> | ||
9 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | 8 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> |
10 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | 9 | Message-id: 20190520162809.2677-4-peter.maydell@linaro.org |
11 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
12 | Message-id: 20181115143535.5885-2-peter.maydell@linaro.org | ||
13 | Suggested-by: Richard Henderson <richard.henderson@linaro.org> | ||
14 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
15 | --- | 10 | --- |
16 | hw/block/onenand.c | 2 +- | 11 | hw/intc/arm_gicv3_cpuif.c | 2 +- |
17 | 1 file changed, 1 insertion(+), 1 deletion(-) | 12 | 1 file changed, 1 insertion(+), 1 deletion(-) |
18 | 13 | ||
19 | diff --git a/hw/block/onenand.c b/hw/block/onenand.c | 14 | diff --git a/hw/intc/arm_gicv3_cpuif.c b/hw/intc/arm_gicv3_cpuif.c |
20 | index XXXXXXX..XXXXXXX 100644 | 15 | index XXXXXXX..XXXXXXX 100644 |
21 | --- a/hw/block/onenand.c | 16 | --- a/hw/intc/arm_gicv3_cpuif.c |
22 | +++ b/hw/block/onenand.c | 17 | +++ b/hw/intc/arm_gicv3_cpuif.c |
23 | @@ -XXX,XX +XXX,XX @@ static uint64_t onenand_read(void *opaque, hwaddr addr, | 18 | @@ -XXX,XX +XXX,XX @@ static void ich_vmcr_write(CPUARMState *env, const ARMCPRegInfo *ri, |
24 | int offset = addr >> s->shift; | 19 | /* Enforce "writing BPRs to less than minimum sets them to the minimum" |
25 | 20 | * by reading and writing back the fields. | |
26 | switch (offset) { | 21 | */ |
27 | - case 0x0000 ... 0xc000: | 22 | - write_vbpr(cs, GICV3_G1, read_vbpr(cs, GICV3_G0)); |
28 | + case 0x0000 ... 0xbffe: | 23 | + write_vbpr(cs, GICV3_G0, read_vbpr(cs, GICV3_G0)); |
29 | return lduw_le_p(s->boot[0] + addr); | 24 | write_vbpr(cs, GICV3_G1, read_vbpr(cs, GICV3_G1)); |
30 | 25 | ||
31 | case 0xf000: /* Manufacturer ID */ | 26 | gicv3_cpuif_virt_update(cs); |
32 | -- | 27 | -- |
33 | 2.19.1 | 28 | 2.20.1 |
34 | 29 | ||
35 | 30 | diff view generated by jsdifflib |
1 | Update the onenand device to use qemu_log_mask() for reporting | 1 | The ICC_CTLR_EL3 register includes some bits which are aliases |
---|---|---|---|
2 | guest errors and unimplemented features, rather than plain | 2 | of bits in the ICC_CTLR_EL1(S) and (NS) registers. QEMU chooses |
3 | fprintf() and hw_error(). | 3 | to keep those bits in the cs->icc_ctlr_el1[] struct fields. |
4 | 4 | Unfortunately a missing '~' in the code to update the bits | |
5 | (We leave the hw_error() in onenand_reset(), as that is | 5 | in those fields meant that writing to ICC_CTLR_EL3 would corrupt |
6 | triggered by a failure to read the underlying block device | 6 | the ICC_CLTR_EL1 register values. |
7 | for the bootRAM, not by guest action.) | ||
8 | 7 | ||
9 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 8 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
10 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | 9 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> |
11 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | 10 | Message-id: 20190520162809.2677-5-peter.maydell@linaro.org |
12 | Reviewed-by: Thomas Huth <thuth@redhat.com> | ||
13 | Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
14 | Message-id: 20181115143535.5885-3-peter.maydell@linaro.org | ||
15 | --- | 11 | --- |
16 | hw/block/onenand.c | 22 +++++++++++++--------- | 12 | hw/intc/arm_gicv3_cpuif.c | 4 ++-- |
17 | 1 file changed, 13 insertions(+), 9 deletions(-) | 13 | 1 file changed, 2 insertions(+), 2 deletions(-) |
18 | 14 | ||
19 | diff --git a/hw/block/onenand.c b/hw/block/onenand.c | 15 | diff --git a/hw/intc/arm_gicv3_cpuif.c b/hw/intc/arm_gicv3_cpuif.c |
20 | index XXXXXXX..XXXXXXX 100644 | 16 | index XXXXXXX..XXXXXXX 100644 |
21 | --- a/hw/block/onenand.c | 17 | --- a/hw/intc/arm_gicv3_cpuif.c |
22 | +++ b/hw/block/onenand.c | 18 | +++ b/hw/intc/arm_gicv3_cpuif.c |
23 | @@ -XXX,XX +XXX,XX @@ | 19 | @@ -XXX,XX +XXX,XX @@ static void icc_ctlr_el3_write(CPUARMState *env, const ARMCPRegInfo *ri, |
24 | #include "exec/memory.h" | 20 | trace_gicv3_icc_ctlr_el3_write(gicv3_redist_affid(cs), value); |
25 | #include "hw/sysbus.h" | 21 | |
26 | #include "qemu/error-report.h" | 22 | /* *_EL1NS and *_EL1S bits are aliases into the ICC_CTLR_EL1 bits. */ |
27 | +#include "qemu/log.h" | 23 | - cs->icc_ctlr_el1[GICV3_NS] &= (ICC_CTLR_EL1_CBPR | ICC_CTLR_EL1_EOIMODE); |
28 | 24 | + cs->icc_ctlr_el1[GICV3_NS] &= ~(ICC_CTLR_EL1_CBPR | ICC_CTLR_EL1_EOIMODE); | |
29 | /* 11 for 2kB-page OneNAND ("2nd generation") and 10 for 1kB-page chips */ | 25 | if (value & ICC_CTLR_EL3_EOIMODE_EL1NS) { |
30 | #define PAGE_SHIFT 11 | 26 | cs->icc_ctlr_el1[GICV3_NS] |= ICC_CTLR_EL1_EOIMODE; |
31 | @@ -XXX,XX +XXX,XX @@ static void onenand_command(OneNANDState *s) | ||
32 | default: | ||
33 | s->status |= ONEN_ERR_CMD; | ||
34 | s->intstatus |= ONEN_INT; | ||
35 | - fprintf(stderr, "%s: unknown OneNAND command %x\n", | ||
36 | - __func__, s->command); | ||
37 | + qemu_log_mask(LOG_GUEST_ERROR, "unknown OneNAND command %x\n", | ||
38 | + s->command); | ||
39 | } | 27 | } |
40 | 28 | @@ -XXX,XX +XXX,XX @@ static void icc_ctlr_el3_write(CPUARMState *env, const ARMCPRegInfo *ri, | |
41 | onenand_intr_update(s); | 29 | cs->icc_ctlr_el1[GICV3_NS] |= ICC_CTLR_EL1_CBPR; |
42 | @@ -XXX,XX +XXX,XX @@ static uint64_t onenand_read(void *opaque, hwaddr addr, | ||
43 | case 0xff02: /* ECC Result of spare area data */ | ||
44 | case 0xff03: /* ECC Result of main area data */ | ||
45 | case 0xff04: /* ECC Result of spare area data */ | ||
46 | - hw_error("%s: implement ECC\n", __func__); | ||
47 | + qemu_log_mask(LOG_UNIMP, | ||
48 | + "onenand: ECC result registers unimplemented\n"); | ||
49 | return 0x0000; | ||
50 | } | 30 | } |
51 | 31 | ||
52 | - fprintf(stderr, "%s: unknown OneNAND register %x\n", | 32 | - cs->icc_ctlr_el1[GICV3_S] &= (ICC_CTLR_EL1_CBPR | ICC_CTLR_EL1_EOIMODE); |
53 | - __func__, offset); | 33 | + cs->icc_ctlr_el1[GICV3_S] &= ~(ICC_CTLR_EL1_CBPR | ICC_CTLR_EL1_EOIMODE); |
54 | + qemu_log_mask(LOG_GUEST_ERROR, "read of unknown OneNAND register 0x%x\n", | 34 | if (value & ICC_CTLR_EL3_EOIMODE_EL1S) { |
55 | + offset); | 35 | cs->icc_ctlr_el1[GICV3_S] |= ICC_CTLR_EL1_EOIMODE; |
56 | return 0; | ||
57 | } | ||
58 | |||
59 | @@ -XXX,XX +XXX,XX @@ static void onenand_write(void *opaque, hwaddr addr, | ||
60 | break; | ||
61 | |||
62 | default: | ||
63 | - fprintf(stderr, "%s: unknown OneNAND boot command %"PRIx64"\n", | ||
64 | - __func__, value); | ||
65 | + qemu_log_mask(LOG_GUEST_ERROR, | ||
66 | + "unknown OneNAND boot command %" PRIx64 "\n", | ||
67 | + value); | ||
68 | } | ||
69 | break; | ||
70 | |||
71 | @@ -XXX,XX +XXX,XX @@ static void onenand_write(void *opaque, hwaddr addr, | ||
72 | break; | ||
73 | |||
74 | default: | ||
75 | - fprintf(stderr, "%s: unknown OneNAND register %x\n", | ||
76 | - __func__, offset); | ||
77 | + qemu_log_mask(LOG_GUEST_ERROR, | ||
78 | + "write to unknown OneNAND register 0x%x\n", | ||
79 | + offset); | ||
80 | } | 36 | } |
81 | } | ||
82 | |||
83 | -- | 37 | -- |
84 | 2.19.1 | 38 | 2.20.1 |
85 | 39 | ||
86 | 40 | diff view generated by jsdifflib |
1 | From: Seth Kintigh <skintigh@gmail.com> | 1 | From: Philippe Mathieu-Daudé <philmd@redhat.com> |
---|---|---|---|
2 | 2 | ||
3 | The UART and timer devices for the stm32f205 were being created | 3 | Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> |
4 | with memory regions that were too large. Use the size specified | 4 | Reviewed-by: Alistair Francis <alistair.francis@wdc.com> |
5 | in the chip datasheet. | 5 | Message-id: 20190520214342.13709-2-philmd@redhat.com |
6 | |||
7 | The old sizes were so large that the devices would overlap with | ||
8 | each other in the SoC memory map, so this fixes a bug that | ||
9 | caused odd behavior and/or crashes when trying to set up multiple | ||
10 | UARTs. | ||
11 | |||
12 | Signed-off-by: Seth Kintigh <skintigh@gmail.com> | ||
13 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
14 | [PMM: rephrased commit message to follow our usual standard] | ||
15 | Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> | ||
16 | Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> | ||
17 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 6 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
18 | --- | 7 | --- |
19 | hw/char/stm32f2xx_usart.c | 2 +- | 8 | hw/arm/exynos4_boards.c | 24 ------------------------ |
20 | hw/timer/stm32f2xx_timer.c | 2 +- | 9 | 1 file changed, 24 deletions(-) |
21 | 2 files changed, 2 insertions(+), 2 deletions(-) | ||
22 | 10 | ||
23 | diff --git a/hw/char/stm32f2xx_usart.c b/hw/char/stm32f2xx_usart.c | 11 | diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c |
24 | index XXXXXXX..XXXXXXX 100644 | 12 | index XXXXXXX..XXXXXXX 100644 |
25 | --- a/hw/char/stm32f2xx_usart.c | 13 | --- a/hw/arm/exynos4_boards.c |
26 | +++ b/hw/char/stm32f2xx_usart.c | 14 | +++ b/hw/arm/exynos4_boards.c |
27 | @@ -XXX,XX +XXX,XX @@ static void stm32f2xx_usart_init(Object *obj) | 15 | @@ -XXX,XX +XXX,XX @@ |
28 | sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq); | 16 | #include "hw/net/lan9118.h" |
29 | 17 | #include "hw/boards.h" | |
30 | memory_region_init_io(&s->mmio, obj, &stm32f2xx_usart_ops, s, | 18 | |
31 | - TYPE_STM32F2XX_USART, 0x2000); | 19 | -#undef DEBUG |
32 | + TYPE_STM32F2XX_USART, 0x400); | 20 | - |
33 | sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio); | 21 | -//#define DEBUG |
34 | } | 22 | - |
35 | 23 | -#ifdef DEBUG | |
36 | diff --git a/hw/timer/stm32f2xx_timer.c b/hw/timer/stm32f2xx_timer.c | 24 | - #undef PRINT_DEBUG |
37 | index XXXXXXX..XXXXXXX 100644 | 25 | - #define PRINT_DEBUG(fmt, args...) \ |
38 | --- a/hw/timer/stm32f2xx_timer.c | 26 | - do { \ |
39 | +++ b/hw/timer/stm32f2xx_timer.c | 27 | - fprintf(stderr, " [%s:%d] "fmt, __func__, __LINE__, ##args); \ |
40 | @@ -XXX,XX +XXX,XX @@ static void stm32f2xx_timer_init(Object *obj) | 28 | - } while (0) |
41 | sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq); | 29 | -#else |
42 | 30 | - #define PRINT_DEBUG(fmt, args...) do {} while (0) | |
43 | memory_region_init_io(&s->iomem, obj, &stm32f2xx_timer_ops, s, | 31 | -#endif |
44 | - "stm32f2xx_timer", 0x4000); | 32 | - |
45 | + "stm32f2xx_timer", 0x400); | 33 | #define SMDK_LAN9118_BASE_ADDR 0x05000000 |
46 | sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->iomem); | 34 | |
47 | 35 | typedef enum Exynos4BoardType { | |
48 | s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, stm32f2xx_timer_interrupt, s); | 36 | @@ -XXX,XX +XXX,XX @@ exynos4_boards_init_common(MachineState *machine, |
37 | exynos4_board_binfo.gic_cpu_if_addr = | ||
38 | EXYNOS4210_SMP_PRIVATE_BASE_ADDR + 0x100; | ||
39 | |||
40 | - PRINT_DEBUG("\n ram_size: %luMiB [0x%08lx]\n" | ||
41 | - " kernel_filename: %s\n" | ||
42 | - " kernel_cmdline: %s\n" | ||
43 | - " initrd_filename: %s\n", | ||
44 | - exynos4_board_ram_size[board_type] / 1048576, | ||
45 | - exynos4_board_ram_size[board_type], | ||
46 | - machine->kernel_filename, | ||
47 | - machine->kernel_cmdline, | ||
48 | - machine->initrd_filename); | ||
49 | - | ||
50 | exynos4_boards_init_ram(s, get_system_memory(), | ||
51 | exynos4_board_ram_size[board_type]); | ||
52 | |||
49 | -- | 53 | -- |
50 | 2.19.1 | 54 | 2.20.1 |
51 | 55 | ||
52 | 56 | diff view generated by jsdifflib |
1 | From: Thomas Huth <thuth@redhat.com> | 1 | From: Philippe Mathieu-Daudé <philmd@redhat.com> |
---|---|---|---|
2 | 2 | ||
3 | Add entries for the boards "mcimx6ul-evk", "mcimx7d-sabre", "raspi2", | 3 | It eases code review, unit is explicit. |
4 | "raspi3", "sabrelite", "vexpress-a15", "vexpress-a9" and "virt". | ||
5 | While we're at it, also adjust the "i.MX31" section a little bit, | ||
6 | so that the wildcards there do not match anymore for unrelated files | ||
7 | (e.g. the new hw/misc/imx6ul_ccm.c file). | ||
8 | 4 | ||
9 | Signed-off-by: Thomas Huth <thuth@redhat.com> | 5 | Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> |
10 | Message-id: 1542184999-11145-1-git-send-email-thuth@redhat.com | 6 | Reviewed-by: Alistair Francis <alistair.francis@wdc.com> |
7 | Message-id: 20190520214342.13709-3-philmd@redhat.com | ||
11 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 8 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
12 | --- | 9 | --- |
13 | MAINTAINERS | 70 +++++++++++++++++++++++++++++++++++++++++++++++++---- | 10 | hw/arm/exynos4_boards.c | 5 +++-- |
14 | 1 file changed, 65 insertions(+), 5 deletions(-) | 11 | 1 file changed, 3 insertions(+), 2 deletions(-) |
15 | 12 | ||
16 | diff --git a/MAINTAINERS b/MAINTAINERS | 13 | diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c |
17 | index XXXXXXX..XXXXXXX 100644 | 14 | index XXXXXXX..XXXXXXX 100644 |
18 | --- a/MAINTAINERS | 15 | --- a/hw/arm/exynos4_boards.c |
19 | +++ b/MAINTAINERS | 16 | +++ b/hw/arm/exynos4_boards.c |
20 | @@ -XXX,XX +XXX,XX @@ L: qemu-arm@nongnu.org | 17 | @@ -XXX,XX +XXX,XX @@ |
21 | S: Odd Fixes | 18 | */ |
22 | F: hw/arm/gumstix.c | 19 | |
23 | 20 | #include "qemu/osdep.h" | |
24 | -i.MX31 | 21 | +#include "qemu/units.h" |
25 | +i.MX31 (kzm) | 22 | #include "qapi/error.h" |
26 | M: Peter Chubb <peter.chubb@nicta.com.au> | 23 | #include "qemu/error-report.h" |
27 | L: qemu-arm@nongnu.org | 24 | #include "qemu-common.h" |
28 | -S: Odd fixes | 25 | @@ -XXX,XX +XXX,XX @@ static int exynos4_board_smp_bootreg_addr[EXYNOS4_NUM_OF_BOARDS] = { |
29 | -F: hw/*/imx* | 26 | }; |
30 | -F: include/hw/*/imx* | 27 | |
31 | +S: Odd Fixes | 28 | static unsigned long exynos4_board_ram_size[EXYNOS4_NUM_OF_BOARDS] = { |
32 | F: hw/arm/kzm.c | 29 | - [EXYNOS4_BOARD_NURI] = 0x40000000, |
33 | -F: include/hw/arm/fsl-imx31.h | 30 | - [EXYNOS4_BOARD_SMDKC210] = 0x40000000, |
34 | +F: hw/*/imx_* | 31 | + [EXYNOS4_BOARD_NURI] = 1 * GiB, |
35 | +F: hw/*/*imx31* | 32 | + [EXYNOS4_BOARD_SMDKC210] = 1 * GiB, |
36 | +F: include/hw/*/imx_* | 33 | }; |
37 | +F: include/hw/*/*imx31* | 34 | |
38 | 35 | static struct arm_boot_info exynos4_board_binfo = { | |
39 | Integrator CP | ||
40 | M: Peter Maydell <peter.maydell@linaro.org> | ||
41 | @@ -XXX,XX +XXX,XX @@ S: Maintained | ||
42 | F: hw/arm/integratorcp.c | ||
43 | F: hw/misc/arm_integrator_debug.c | ||
44 | |||
45 | +MCIMX6UL EVK / i.MX6ul | ||
46 | +M: Peter Maydell <peter.maydell@linaro.org> | ||
47 | +R: Jean-Christophe Dubois <jcd@tribudubois.net> | ||
48 | +L: qemu-arm@nongnu.org | ||
49 | +S: Odd Fixes | ||
50 | +F: hw/arm/mcimx6ul-evk.c | ||
51 | +F: hw/arm/fsl-imx6ul.c | ||
52 | +F: hw/misc/imx6ul_ccm.c | ||
53 | +F: include/hw/arm/fsl-imx6ul.h | ||
54 | +F: include/hw/misc/imx6ul_ccm.h | ||
55 | + | ||
56 | +MCIMX7D SABRE / i.MX7 | ||
57 | +M: Peter Maydell <peter.maydell@linaro.org> | ||
58 | +R: Andrey Smirnov <andrew.smirnov@gmail.com> | ||
59 | +L: qemu-arm@nongnu.org | ||
60 | +S: Odd Fixes | ||
61 | +F: hw/arm/mcimx7d-sabre.c | ||
62 | +F: hw/arm/fsl-imx7.c | ||
63 | +F: include/hw/arm/fsl-imx7.h | ||
64 | +F: hw/pci-host/designware.c | ||
65 | +F: include/hw/pci-host/designware.h | ||
66 | + | ||
67 | MPS2 | ||
68 | M: Peter Maydell <peter.maydell@linaro.org> | ||
69 | L: qemu-arm@nongnu.org | ||
70 | @@ -XXX,XX +XXX,XX @@ L: qemu-arm@nongnu.org | ||
71 | S: Maintained | ||
72 | F: hw/arm/palm.c | ||
73 | |||
74 | +Raspberry Pi | ||
75 | +M: Peter Maydell <peter.maydell@linaro.org> | ||
76 | +R: Andrew Baumann <Andrew.Baumann@microsoft.com> | ||
77 | +R: Philippe Mathieu-Daudé <f4bug@amsat.org> | ||
78 | +L: qemu-arm@nongnu.org | ||
79 | +S: Odd Fixes | ||
80 | +F: hw/arm/raspi_platform.h | ||
81 | +F: hw/*/bcm283* | ||
82 | +F: include/hw/arm/raspi* | ||
83 | +F: include/hw/*/bcm283* | ||
84 | + | ||
85 | Real View | ||
86 | M: Peter Maydell <peter.maydell@linaro.org> | ||
87 | L: qemu-arm@nongnu.org | ||
88 | @@ -XXX,XX +XXX,XX @@ F: hw/*/pxa2xx* | ||
89 | F: hw/misc/mst_fpga.c | ||
90 | F: include/hw/arm/pxa.h | ||
91 | |||
92 | +SABRELITE / i.MX6 | ||
93 | +M: Peter Maydell <peter.maydell@linaro.org> | ||
94 | +R: Jean-Christophe Dubois <jcd@tribudubois.net> | ||
95 | +L: qemu-arm@nongnu.org | ||
96 | +S: Odd Fixes | ||
97 | +F: hw/arm/sabrelite.c | ||
98 | +F: hw/arm/fsl-imx6.c | ||
99 | +F: hw/misc/imx6_src.c | ||
100 | +F: hw/ssi/imx_spi.c | ||
101 | +F: include/hw/arm/fsl-imx6.h | ||
102 | +F: include/hw/misc/imx6_src.h | ||
103 | +F: include/hw/ssi/imx_spi.h | ||
104 | + | ||
105 | Sharp SL-5500 (Collie) PDA | ||
106 | M: Peter Maydell <peter.maydell@linaro.org> | ||
107 | L: qemu-arm@nongnu.org | ||
108 | @@ -XXX,XX +XXX,XX @@ L: qemu-arm@nongnu.org | ||
109 | S: Maintained | ||
110 | F: hw/*/stellaris* | ||
111 | |||
112 | +Versatile Express | ||
113 | +M: Peter Maydell <peter.maydell@linaro.org> | ||
114 | +L: qemu-arm@nongnu.org | ||
115 | +S: Maintained | ||
116 | +F: hw/arm/vexpress.c | ||
117 | + | ||
118 | Versatile PB | ||
119 | M: Peter Maydell <peter.maydell@linaro.org> | ||
120 | L: qemu-arm@nongnu.org | ||
121 | @@ -XXX,XX +XXX,XX @@ S: Maintained | ||
122 | F: hw/*/versatile* | ||
123 | F: hw/misc/arm_sysctl.c | ||
124 | |||
125 | +Virt | ||
126 | +M: Peter Maydell <peter.maydell@linaro.org> | ||
127 | +L: qemu-arm@nongnu.org | ||
128 | +S: Maintained | ||
129 | +F: hw/arm/virt* | ||
130 | +F: include/hw/arm/virt.h | ||
131 | + | ||
132 | Xilinx Zynq | ||
133 | M: Edgar E. Iglesias <edgar.iglesias@gmail.com> | ||
134 | M: Alistair Francis <alistair@alistair23.me> | ||
135 | -- | 36 | -- |
136 | 2.19.1 | 37 | 2.20.1 |
137 | 38 | ||
138 | 39 | diff view generated by jsdifflib |
1 | From: Richard Henderson <richard.henderson@linaro.org> | 1 | From: Guenter Roeck <linux@roeck-us.net> |
---|---|---|---|
2 | 2 | ||
3 | Assert that the value to be written is the correct size. | 3 | QEMU already supports pl330. Instantiate it for Exynos4210. |
4 | No change in functionality here, just mirroring the same | ||
5 | function from kvm64. | ||
6 | 4 | ||
7 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | 5 | Relevant part of Linux arch/arm/boot/dts/exynos4.dtsi: |
8 | Message-id: 20181113180154.17903-4-richard.henderson@linaro.org | 6 | |
7 | / { | ||
8 | soc: soc { | ||
9 | amba { | ||
10 | pdma0: pdma@12680000 { | ||
11 | compatible = "arm,pl330", "arm,primecell"; | ||
12 | reg = <0x12680000 0x1000>; | ||
13 | interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; | ||
14 | clocks = <&clock CLK_PDMA0>; | ||
15 | clock-names = "apb_pclk"; | ||
16 | #dma-cells = <1>; | ||
17 | #dma-channels = <8>; | ||
18 | #dma-requests = <32>; | ||
19 | }; | ||
20 | pdma1: pdma@12690000 { | ||
21 | compatible = "arm,pl330", "arm,primecell"; | ||
22 | reg = <0x12690000 0x1000>; | ||
23 | interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; | ||
24 | clocks = <&clock CLK_PDMA1>; | ||
25 | clock-names = "apb_pclk"; | ||
26 | #dma-cells = <1>; | ||
27 | #dma-channels = <8>; | ||
28 | #dma-requests = <32>; | ||
29 | }; | ||
30 | mdma1: mdma@12850000 { | ||
31 | compatible = "arm,pl330", "arm,primecell"; | ||
32 | reg = <0x12850000 0x1000>; | ||
33 | interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; | ||
34 | clocks = <&clock CLK_MDMA>; | ||
35 | clock-names = "apb_pclk"; | ||
36 | #dma-cells = <1>; | ||
37 | #dma-channels = <8>; | ||
38 | #dma-requests = <1>; | ||
39 | }; | ||
40 | }; | ||
41 | }; | ||
42 | }; | ||
43 | |||
44 | Signed-off-by: Guenter Roeck <linux@roeck-us.net> | ||
45 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
46 | Reviewed-by: Alistair Francis <alistair.francis@wdc.com> | ||
47 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
48 | Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
49 | Message-id: 20190520214342.13709-4-philmd@redhat.com | ||
50 | [PMD: Do not set default qdev properties, create the controllers in the SoC | ||
51 | rather than the board (Peter Maydell), add dtsi in commit message] | ||
52 | Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
9 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | 53 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> |
10 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 54 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
11 | --- | 55 | --- |
12 | target/arm/kvm32.c | 41 ++++++++++++++++------------------------- | 56 | hw/arm/exynos4210.c | 26 ++++++++++++++++++++++++++ |
13 | 1 file changed, 16 insertions(+), 25 deletions(-) | 57 | 1 file changed, 26 insertions(+) |
14 | 58 | ||
15 | diff --git a/target/arm/kvm32.c b/target/arm/kvm32.c | 59 | diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c |
16 | index XXXXXXX..XXXXXXX 100644 | 60 | index XXXXXXX..XXXXXXX 100644 |
17 | --- a/target/arm/kvm32.c | 61 | --- a/hw/arm/exynos4210.c |
18 | +++ b/target/arm/kvm32.c | 62 | +++ b/hw/arm/exynos4210.c |
19 | @@ -XXX,XX +XXX,XX @@ static inline void set_feature(uint64_t *features, int feature) | 63 | @@ -XXX,XX +XXX,XX @@ |
20 | *features |= 1ULL << feature; | 64 | /* EHCI */ |
65 | #define EXYNOS4210_EHCI_BASE_ADDR 0x12580000 | ||
66 | |||
67 | +/* DMA */ | ||
68 | +#define EXYNOS4210_PL330_BASE0_ADDR 0x12680000 | ||
69 | +#define EXYNOS4210_PL330_BASE1_ADDR 0x12690000 | ||
70 | +#define EXYNOS4210_PL330_BASE2_ADDR 0x12850000 | ||
71 | + | ||
72 | static uint8_t chipid_and_omr[] = { 0x11, 0x02, 0x21, 0x43, | ||
73 | 0x09, 0x00, 0x00, 0x00 }; | ||
74 | |||
75 | @@ -XXX,XX +XXX,XX @@ static uint64_t exynos4210_calc_affinity(int cpu) | ||
76 | return (0x9 << ARM_AFF1_SHIFT) | cpu; | ||
21 | } | 77 | } |
22 | 78 | ||
23 | +static int read_sys_reg32(int fd, uint32_t *pret, uint64_t id) | 79 | +static void pl330_create(uint32_t base, qemu_irq irq, int nreq) |
24 | +{ | 80 | +{ |
25 | + struct kvm_one_reg idreg = { .id = id, .addr = (uintptr_t)pret }; | 81 | + SysBusDevice *busdev; |
82 | + DeviceState *dev; | ||
26 | + | 83 | + |
27 | + assert((id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U32); | 84 | + dev = qdev_create(NULL, "pl330"); |
28 | + return ioctl(fd, KVM_GET_ONE_REG, &idreg); | 85 | + qdev_prop_set_uint8(dev, "num_periph_req", nreq); |
86 | + qdev_init_nofail(dev); | ||
87 | + busdev = SYS_BUS_DEVICE(dev); | ||
88 | + sysbus_mmio_map(busdev, 0, base); | ||
89 | + sysbus_connect_irq(busdev, 0, irq); | ||
29 | +} | 90 | +} |
30 | + | 91 | + |
31 | bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf) | 92 | Exynos4210State *exynos4210_init(MemoryRegion *system_mem) |
32 | { | 93 | { |
33 | /* Identify the feature bits corresponding to the host CPU, and | 94 | Exynos4210State *s = g_new0(Exynos4210State, 1); |
34 | @@ -XXX,XX +XXX,XX @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf) | 95 | @@ -XXX,XX +XXX,XX @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem) |
35 | * we have to create a scratch VM, create a single CPU inside it, | 96 | sysbus_create_simple(TYPE_EXYNOS4210_EHCI, EXYNOS4210_EHCI_BASE_ADDR, |
36 | * and then query that CPU for the relevant ID registers. | 97 | s->irq_table[exynos4210_get_irq(28, 3)]); |
37 | */ | 98 | |
38 | - int i, ret, fdarray[3]; | 99 | + /*** DMA controllers ***/ |
39 | + int err = 0, fdarray[3]; | 100 | + pl330_create(EXYNOS4210_PL330_BASE0_ADDR, |
40 | uint32_t midr, id_pfr0, mvfr1; | 101 | + qemu_irq_invert(s->irq_table[exynos4210_get_irq(35, 1)]), 32); |
41 | uint64_t features = 0; | 102 | + pl330_create(EXYNOS4210_PL330_BASE1_ADDR, |
103 | + qemu_irq_invert(s->irq_table[exynos4210_get_irq(36, 1)]), 32); | ||
104 | + pl330_create(EXYNOS4210_PL330_BASE2_ADDR, | ||
105 | + qemu_irq_invert(s->irq_table[exynos4210_get_irq(34, 1)]), 1); | ||
42 | + | 106 | + |
43 | /* Old kernels may not know about the PREFERRED_TARGET ioctl: however | 107 | return s; |
44 | * we know these will only support creating one kind of guest CPU, | 108 | } |
45 | * which is its preferred CPU type. | ||
46 | @@ -XXX,XX +XXX,XX @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf) | ||
47 | QEMU_KVM_ARM_TARGET_NONE | ||
48 | }; | ||
49 | struct kvm_vcpu_init init; | ||
50 | - struct kvm_one_reg idregs[] = { | ||
51 | - { | ||
52 | - .id = KVM_REG_ARM | KVM_REG_SIZE_U32 | ||
53 | - | ENCODE_CP_REG(15, 0, 0, 0, 0, 0, 0), | ||
54 | - .addr = (uintptr_t)&midr, | ||
55 | - }, | ||
56 | - { | ||
57 | - .id = KVM_REG_ARM | KVM_REG_SIZE_U32 | ||
58 | - | ENCODE_CP_REG(15, 0, 0, 0, 1, 0, 0), | ||
59 | - .addr = (uintptr_t)&id_pfr0, | ||
60 | - }, | ||
61 | - { | ||
62 | - .id = KVM_REG_ARM | KVM_REG_SIZE_U32 | ||
63 | - | KVM_REG_ARM_VFP | KVM_REG_ARM_VFP_MVFR1, | ||
64 | - .addr = (uintptr_t)&mvfr1, | ||
65 | - }, | ||
66 | - }; | ||
67 | |||
68 | if (!kvm_arm_create_scratch_host_vcpu(cpus_to_try, fdarray, &init)) { | ||
69 | return false; | ||
70 | @@ -XXX,XX +XXX,XX @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf) | ||
71 | */ | ||
72 | ahcf->dtb_compatible = "arm,arm-v7"; | ||
73 | |||
74 | - for (i = 0; i < ARRAY_SIZE(idregs); i++) { | ||
75 | - ret = ioctl(fdarray[2], KVM_GET_ONE_REG, &idregs[i]); | ||
76 | - if (ret) { | ||
77 | - break; | ||
78 | - } | ||
79 | - } | ||
80 | + err |= read_sys_reg32(fdarray[2], &midr, ARM_CP15_REG32(0, 0, 0, 0)); | ||
81 | + err |= read_sys_reg32(fdarray[2], &id_pfr0, ARM_CP15_REG32(0, 0, 1, 0)); | ||
82 | + err |= read_sys_reg32(fdarray[2], &mvfr1, | ||
83 | + KVM_REG_ARM | KVM_REG_SIZE_U32 | | ||
84 | + KVM_REG_ARM_VFP | KVM_REG_ARM_VFP_MVFR1); | ||
85 | |||
86 | kvm_arm_destroy_scratch_host_vcpu(fdarray); | ||
87 | |||
88 | - if (ret) { | ||
89 | + if (err < 0) { | ||
90 | return false; | ||
91 | } | ||
92 | |||
93 | -- | 109 | -- |
94 | 2.19.1 | 110 | 2.20.1 |
95 | 111 | ||
96 | 112 | diff view generated by jsdifflib |
1 | From: Richard Henderson <richard.henderson@linaro.org> | 1 | From: Philippe Mathieu-Daudé <philmd@redhat.com> |
---|---|---|---|
2 | 2 | ||
3 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | 3 | Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> |
4 | Message-id: 20181113180154.17903-3-richard.henderson@linaro.org | 4 | Reviewed-by: Alistair Francis <alistair.francis@wdc.com> |
5 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | 5 | Message-id: 20190520214342.13709-5-philmd@redhat.com |
6 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 6 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
7 | --- | 7 | --- |
8 | target/arm/kvm64.c | 90 ++++++++++++++++++++++++++++++++++++++++++++-- | 8 | include/hw/arm/exynos4210.h | 9 +++++++-- |
9 | 1 file changed, 88 insertions(+), 2 deletions(-) | 9 | hw/arm/exynos4210.c | 28 ++++++++++++++++++++++++---- |
10 | hw/arm/exynos4_boards.c | 9 ++++++--- | ||
11 | 3 files changed, 37 insertions(+), 9 deletions(-) | ||
10 | 12 | ||
11 | diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c | 13 | diff --git a/include/hw/arm/exynos4210.h b/include/hw/arm/exynos4210.h |
12 | index XXXXXXX..XXXXXXX 100644 | 14 | index XXXXXXX..XXXXXXX 100644 |
13 | --- a/target/arm/kvm64.c | 15 | --- a/include/hw/arm/exynos4210.h |
14 | +++ b/target/arm/kvm64.c | 16 | +++ b/include/hw/arm/exynos4210.h |
15 | @@ -XXX,XX +XXX,XX @@ static inline void unset_feature(uint64_t *features, int feature) | 17 | @@ -XXX,XX +XXX,XX @@ typedef struct Exynos4210Irq { |
16 | *features &= ~(1ULL << feature); | 18 | } Exynos4210Irq; |
19 | |||
20 | typedef struct Exynos4210State { | ||
21 | + /*< private >*/ | ||
22 | + SysBusDevice parent_obj; | ||
23 | + /*< public >*/ | ||
24 | ARMCPU *cpu[EXYNOS4210_NCPUS]; | ||
25 | Exynos4210Irq irqs; | ||
26 | qemu_irq *irq_table; | ||
27 | @@ -XXX,XX +XXX,XX @@ typedef struct Exynos4210State { | ||
28 | I2CBus *i2c_if[EXYNOS4210_I2C_NUMBER]; | ||
29 | } Exynos4210State; | ||
30 | |||
31 | +#define TYPE_EXYNOS4210_SOC "exynos4210" | ||
32 | +#define EXYNOS4210_SOC(obj) \ | ||
33 | + OBJECT_CHECK(Exynos4210State, obj, TYPE_EXYNOS4210_SOC) | ||
34 | + | ||
35 | void exynos4210_write_secondary(ARMCPU *cpu, | ||
36 | const struct arm_boot_info *info); | ||
37 | |||
38 | -Exynos4210State *exynos4210_init(MemoryRegion *system_mem); | ||
39 | - | ||
40 | /* Initialize exynos4210 IRQ subsystem stub */ | ||
41 | qemu_irq *exynos4210_init_irq(Exynos4210Irq *env); | ||
42 | |||
43 | diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c | ||
44 | index XXXXXXX..XXXXXXX 100644 | ||
45 | --- a/hw/arm/exynos4210.c | ||
46 | +++ b/hw/arm/exynos4210.c | ||
47 | @@ -XXX,XX +XXX,XX @@ static void pl330_create(uint32_t base, qemu_irq irq, int nreq) | ||
48 | sysbus_connect_irq(busdev, 0, irq); | ||
17 | } | 49 | } |
18 | 50 | ||
19 | +static int read_sys_reg32(int fd, uint32_t *pret, uint64_t id) | 51 | -Exynos4210State *exynos4210_init(MemoryRegion *system_mem) |
52 | +static void exynos4210_realize(DeviceState *socdev, Error **errp) | ||
53 | { | ||
54 | - Exynos4210State *s = g_new0(Exynos4210State, 1); | ||
55 | + Exynos4210State *s = EXYNOS4210_SOC(socdev); | ||
56 | + MemoryRegion *system_mem = get_system_memory(); | ||
57 | qemu_irq gate_irq[EXYNOS4210_NCPUS][EXYNOS4210_IRQ_GATE_NINPUTS]; | ||
58 | SysBusDevice *busdev; | ||
59 | DeviceState *dev; | ||
60 | @@ -XXX,XX +XXX,XX @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem) | ||
61 | qemu_irq_invert(s->irq_table[exynos4210_get_irq(36, 1)]), 32); | ||
62 | pl330_create(EXYNOS4210_PL330_BASE2_ADDR, | ||
63 | qemu_irq_invert(s->irq_table[exynos4210_get_irq(34, 1)]), 1); | ||
64 | - | ||
65 | - return s; | ||
66 | } | ||
67 | + | ||
68 | +static void exynos4210_class_init(ObjectClass *klass, void *data) | ||
20 | +{ | 69 | +{ |
21 | + uint64_t ret; | 70 | + DeviceClass *dc = DEVICE_CLASS(klass); |
22 | + struct kvm_one_reg idreg = { .id = id, .addr = (uintptr_t)&ret }; | ||
23 | + int err; | ||
24 | + | 71 | + |
25 | + assert((id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64); | 72 | + dc->realize = exynos4210_realize; |
26 | + err = ioctl(fd, KVM_GET_ONE_REG, &idreg); | ||
27 | + if (err < 0) { | ||
28 | + return -1; | ||
29 | + } | ||
30 | + *pret = ret; | ||
31 | + return 0; | ||
32 | +} | 73 | +} |
33 | + | 74 | + |
34 | +static int read_sys_reg64(int fd, uint64_t *pret, uint64_t id) | 75 | +static const TypeInfo exynos4210_info = { |
76 | + .name = TYPE_EXYNOS4210_SOC, | ||
77 | + .parent = TYPE_SYS_BUS_DEVICE, | ||
78 | + .instance_size = sizeof(Exynos4210State), | ||
79 | + .class_init = exynos4210_class_init, | ||
80 | +}; | ||
81 | + | ||
82 | +static void exynos4210_register_types(void) | ||
35 | +{ | 83 | +{ |
36 | + struct kvm_one_reg idreg = { .id = id, .addr = (uintptr_t)pret }; | 84 | + type_register_static(&exynos4210_info); |
37 | + | ||
38 | + assert((id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U64); | ||
39 | + return ioctl(fd, KVM_GET_ONE_REG, &idreg); | ||
40 | +} | 85 | +} |
41 | + | 86 | + |
42 | bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf) | 87 | +type_init(exynos4210_register_types) |
43 | { | 88 | diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c |
44 | /* Identify the feature bits corresponding to the host CPU, and | 89 | index XXXXXXX..XXXXXXX 100644 |
45 | * fill out the ARMHostCPUClass fields accordingly. To do this | 90 | --- a/hw/arm/exynos4_boards.c |
46 | * we have to create a scratch VM, create a single CPU inside it, | 91 | +++ b/hw/arm/exynos4_boards.c |
47 | * and then query that CPU for the relevant ID registers. | 92 | @@ -XXX,XX +XXX,XX @@ typedef enum Exynos4BoardType { |
48 | - * For AArch64 we currently don't care about ID registers at | 93 | } Exynos4BoardType; |
49 | - * all; we just want to know the CPU type. | 94 | |
50 | */ | 95 | typedef struct Exynos4BoardState { |
51 | int fdarray[3]; | 96 | - Exynos4210State *soc; |
52 | uint64_t features = 0; | 97 | + Exynos4210State soc; |
53 | + int err; | 98 | MemoryRegion dram0_mem; |
54 | + | 99 | MemoryRegion dram1_mem; |
55 | /* Old kernels may not know about the PREFERRED_TARGET ioctl: however | 100 | } Exynos4BoardState; |
56 | * we know these will only support creating one kind of guest CPU, | 101 | @@ -XXX,XX +XXX,XX @@ exynos4_boards_init_common(MachineState *machine, |
57 | * which is its preferred CPU type. Fortunately these old kernels | 102 | exynos4_boards_init_ram(s, get_system_memory(), |
58 | @@ -XXX,XX +XXX,XX @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf) | 103 | exynos4_board_ram_size[board_type]); |
59 | ahcf->target = init.target; | 104 | |
60 | ahcf->dtb_compatible = "arm,arm-v8"; | 105 | - s->soc = exynos4210_init(get_system_memory()); |
61 | 106 | + object_initialize(&s->soc, sizeof(s->soc), TYPE_EXYNOS4210_SOC); | |
62 | + err = read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64pfr0, | 107 | + qdev_set_parent_bus(DEVICE(&s->soc), sysbus_get_default()); |
63 | + ARM64_SYS_REG(3, 0, 0, 4, 0)); | 108 | + object_property_set_bool(OBJECT(&s->soc), true, "realized", |
64 | + if (unlikely(err < 0)) { | 109 | + &error_fatal); |
65 | + /* | 110 | |
66 | + * Before v4.15, the kernel only exposed a limited number of system | 111 | return s; |
67 | + * registers, not including any of the interesting AArch64 ID regs. | 112 | } |
68 | + * For the most part we could leave these fields as zero with minimal | 113 | @@ -XXX,XX +XXX,XX @@ static void smdkc210_init(MachineState *machine) |
69 | + * effect, since this does not affect the values seen by the guest. | 114 | EXYNOS4_BOARD_SMDKC210); |
70 | + * | 115 | |
71 | + * However, it could cause problems down the line for QEMU, | 116 | lan9215_init(SMDK_LAN9118_BASE_ADDR, |
72 | + * so provide a minimal v8.0 default. | 117 | - qemu_irq_invert(s->soc->irq_table[exynos4210_get_irq(37, 1)])); |
73 | + * | 118 | + qemu_irq_invert(s->soc.irq_table[exynos4210_get_irq(37, 1)])); |
74 | + * ??? Could read MIDR and use knowledge from cpu64.c. | 119 | arm_load_kernel(ARM_CPU(first_cpu), &exynos4_board_binfo); |
75 | + * ??? Could map a page of memory into our temp guest and | 120 | } |
76 | + * run the tiniest of hand-crafted kernels to extract | 121 | |
77 | + * the values seen by the guest. | ||
78 | + * ??? Either of these sounds like too much effort just | ||
79 | + * to work around running a modern host kernel. | ||
80 | + */ | ||
81 | + ahcf->isar.id_aa64pfr0 = 0x00000011; /* EL1&0, AArch64 only */ | ||
82 | + err = 0; | ||
83 | + } else { | ||
84 | + err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64pfr1, | ||
85 | + ARM64_SYS_REG(3, 0, 0, 4, 1)); | ||
86 | + err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64isar0, | ||
87 | + ARM64_SYS_REG(3, 0, 0, 6, 0)); | ||
88 | + err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64isar1, | ||
89 | + ARM64_SYS_REG(3, 0, 0, 6, 1)); | ||
90 | + | ||
91 | + /* | ||
92 | + * Note that if AArch32 support is not present in the host, | ||
93 | + * the AArch32 sysregs are present to be read, but will | ||
94 | + * return UNKNOWN values. This is neither better nor worse | ||
95 | + * than skipping the reads and leaving 0, as we must avoid | ||
96 | + * considering the values in every case. | ||
97 | + */ | ||
98 | + err |= read_sys_reg32(fdarray[2], &ahcf->isar.id_isar0, | ||
99 | + ARM64_SYS_REG(3, 0, 0, 2, 0)); | ||
100 | + err |= read_sys_reg32(fdarray[2], &ahcf->isar.id_isar1, | ||
101 | + ARM64_SYS_REG(3, 0, 0, 2, 1)); | ||
102 | + err |= read_sys_reg32(fdarray[2], &ahcf->isar.id_isar2, | ||
103 | + ARM64_SYS_REG(3, 0, 0, 2, 2)); | ||
104 | + err |= read_sys_reg32(fdarray[2], &ahcf->isar.id_isar3, | ||
105 | + ARM64_SYS_REG(3, 0, 0, 2, 3)); | ||
106 | + err |= read_sys_reg32(fdarray[2], &ahcf->isar.id_isar4, | ||
107 | + ARM64_SYS_REG(3, 0, 0, 2, 4)); | ||
108 | + err |= read_sys_reg32(fdarray[2], &ahcf->isar.id_isar5, | ||
109 | + ARM64_SYS_REG(3, 0, 0, 2, 5)); | ||
110 | + err |= read_sys_reg32(fdarray[2], &ahcf->isar.id_isar6, | ||
111 | + ARM64_SYS_REG(3, 0, 0, 2, 7)); | ||
112 | + | ||
113 | + err |= read_sys_reg32(fdarray[2], &ahcf->isar.mvfr0, | ||
114 | + ARM64_SYS_REG(3, 0, 0, 3, 0)); | ||
115 | + err |= read_sys_reg32(fdarray[2], &ahcf->isar.mvfr1, | ||
116 | + ARM64_SYS_REG(3, 0, 0, 3, 1)); | ||
117 | + err |= read_sys_reg32(fdarray[2], &ahcf->isar.mvfr2, | ||
118 | + ARM64_SYS_REG(3, 0, 0, 3, 2)); | ||
119 | + } | ||
120 | + | ||
121 | kvm_arm_destroy_scratch_host_vcpu(fdarray); | ||
122 | |||
123 | + if (err < 0) { | ||
124 | + return false; | ||
125 | + } | ||
126 | + | ||
127 | /* We can assume any KVM supporting CPU is at least a v8 | ||
128 | * with VFPv4+Neon; this in turn implies most of the other | ||
129 | * feature bits. | ||
130 | -- | 122 | -- |
131 | 2.19.1 | 123 | 2.20.1 |
132 | 124 | ||
133 | 125 | diff view generated by jsdifflib |