1 | v2: fix compile failure on arm hosts... | 1 | The following changes since commit e3debd5e7d0ce031356024878a0a18b9d109354a: |
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2 | 2 | ||
3 | thanks | 3 | Merge tag 'pull-request-2023-03-24' of https://gitlab.com/thuth/qemu into staging (2023-03-24 16:08:46 +0000) |
4 | -- PMM | ||
5 | |||
6 | The following changes since commit 6db87aae61bc6ac0a8cd9bc2e05d7ebfbcfd3657: | ||
7 | |||
8 | Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging (2018-11-12 17:11:22 +0000) | ||
9 | 4 | ||
10 | are available in the Git repository at: | 5 | are available in the Git repository at: |
11 | 6 | ||
12 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20181113 | 7 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20230328 |
13 | 8 | ||
14 | for you to fetch changes up to 436c0cbbeb38dd97c02fe921a7cb253a18afdd86: | 9 | for you to fetch changes up to 46e3b237c52e0c48bfd81bce020b51fbe300b23a: |
15 | 10 | ||
16 | target/arm/cpu: Give Cortex-A15 and -A7 the EL2 feature (2018-11-13 10:47:59 +0000) | 11 | target/arm/gdbstub: Only advertise M-profile features if TCG available (2023-03-28 10:53:40 +0100) |
17 | 12 | ||
18 | ---------------------------------------------------------------- | 13 | ---------------------------------------------------------------- |
19 | target/arm queue: | 14 | target-arm queue: |
20 | * Remove no-longer-needed workaround for small SAU regions for v8M | 15 | * fix part of the "TCG-disabled builds are broken" issue |
21 | * Remove antique TODO comment | ||
22 | * MAINTAINERS: Add an entry for the 'collie' machine | ||
23 | * hw/arm/sysbus-fdt: Only call match_fn callback if the type matches | ||
24 | * Fix infinite recursion in tlbi_aa64_vmalle1_write() | ||
25 | * ARM KVM: fix various bugs in handling of guest debugging | ||
26 | * Correctly implement handling of HCR_EL2.{VI, VF} | ||
27 | * Hyp mode R14 is shared with User and System | ||
28 | * Give Cortex-A15 and -A7 the EL2 feature | ||
29 | 16 | ||
30 | ---------------------------------------------------------------- | 17 | ---------------------------------------------------------------- |
31 | Alex Bennée (6): | 18 | Philippe Mathieu-Daudé (1): |
32 | target/arm64: properly handle DBGVR RESS bits | 19 | target/arm/gdbstub: Only advertise M-profile features if TCG available |
33 | target/arm64: hold BQL when calling do_interrupt() | ||
34 | target/arm64: kvm debug set target_el when passing exception to guest | ||
35 | tests/guest-debug: fix scoping of failcount | ||
36 | arm: use symbolic MDCR_TDE in arm_debug_target_el | ||
37 | arm: fix aa64_generate_debug_exceptions to work with EL2 | ||
38 | 20 | ||
39 | Eric Auger (1): | 21 | target/arm/gdbstub.c | 5 +++-- |
40 | hw/arm/sysbus-fdt: Only call match_fn callback if the type matches | 22 | 1 file changed, 3 insertions(+), 2 deletions(-) |
41 | 23 | ||
42 | Peter Maydell (7): | ||
43 | target/arm: Remove workaround for small SAU regions | ||
44 | target/arm: Remove antique TODO comment | ||
45 | Revert "target/arm: Implement HCR.VI and VF" | ||
46 | target/arm: Track the state of our irq lines from the GIC explicitly | ||
47 | target/arm: Correctly implement handling of HCR_EL2.{VI, VF} | ||
48 | target/arm: Hyp mode R14 is shared with User and System | ||
49 | target/arm/cpu: Give Cortex-A15 and -A7 the EL2 feature | ||
50 | |||
51 | Richard Henderson (1): | ||
52 | target/arm: Fix typo in tlbi_aa64_vmalle1_write | ||
53 | |||
54 | Thomas Huth (1): | ||
55 | MAINTAINERS: Add an entry for the 'collie' machine | ||
56 | |||
57 | target/arm/cpu.h | 44 +++++++++++------ | ||
58 | target/arm/internals.h | 34 +++++++++++++ | ||
59 | hw/arm/sysbus-fdt.c | 12 +++-- | ||
60 | target/arm/cpu.c | 67 ++++++++++++++++++++++++- | ||
61 | target/arm/helper.c | 101 +++++++++++++------------------------- | ||
62 | target/arm/kvm32.c | 4 +- | ||
63 | target/arm/kvm64.c | 20 +++++++- | ||
64 | target/arm/machine.c | 51 +++++++++++++++++++ | ||
65 | target/arm/op_helper.c | 4 +- | ||
66 | MAINTAINERS | 7 +++ | ||
67 | tests/guest-debug/test-gdbstub.py | 1 + | ||
68 | 11 files changed, 249 insertions(+), 96 deletions(-) | ||
69 | diff view generated by jsdifflib |
New patch | |||
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1 | From: Philippe Mathieu-Daudé <philmd@linaro.org> | ||
1 | 2 | ||
3 | Cortex-M profile is only emulable from TCG accelerator. Restrict | ||
4 | the GDBstub features to its availability in order to avoid a link | ||
5 | error when TCG is not enabled: | ||
6 | |||
7 | Undefined symbols for architecture arm64: | ||
8 | "_arm_v7m_get_sp_ptr", referenced from: | ||
9 | _m_sysreg_get in target_arm_gdbstub.c.o | ||
10 | "_arm_v7m_mrs_control", referenced from: | ||
11 | _arm_gdb_get_m_systemreg in target_arm_gdbstub.c.o | ||
12 | ld: symbol(s) not found for architecture arm64 | ||
13 | clang: error: linker command failed with exit code 1 (use -v to see invocation) | ||
14 | |||
15 | Fixes: 7d8b28b8b5 ("target/arm: Implement gdbstub m-profile systemreg and secext") | ||
16 | Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> | ||
17 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | ||
18 | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> | ||
19 | Message-id: 20230322142902.69511-3-philmd@linaro.org | ||
20 | [PMM: add #include since I cherry-picked this patch from the series] | ||
21 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
22 | --- | ||
23 | target/arm/gdbstub.c | 5 +++-- | ||
24 | 1 file changed, 3 insertions(+), 2 deletions(-) | ||
25 | |||
26 | diff --git a/target/arm/gdbstub.c b/target/arm/gdbstub.c | ||
27 | index XXXXXXX..XXXXXXX 100644 | ||
28 | --- a/target/arm/gdbstub.c | ||
29 | +++ b/target/arm/gdbstub.c | ||
30 | @@ -XXX,XX +XXX,XX @@ | ||
31 | #include "cpu.h" | ||
32 | #include "exec/gdbstub.h" | ||
33 | #include "gdbstub/helpers.h" | ||
34 | +#include "sysemu/tcg.h" | ||
35 | #include "internals.h" | ||
36 | #include "cpregs.h" | ||
37 | |||
38 | @@ -XXX,XX +XXX,XX @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu) | ||
39 | 2, "arm-vfp-sysregs.xml", 0); | ||
40 | } | ||
41 | } | ||
42 | - if (cpu_isar_feature(aa32_mve, cpu)) { | ||
43 | + if (cpu_isar_feature(aa32_mve, cpu) && tcg_enabled()) { | ||
44 | gdb_register_coprocessor(cs, mve_gdb_get_reg, mve_gdb_set_reg, | ||
45 | 1, "arm-m-profile-mve.xml", 0); | ||
46 | } | ||
47 | @@ -XXX,XX +XXX,XX @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu) | ||
48 | arm_gen_dynamic_sysreg_xml(cs, cs->gdb_num_regs), | ||
49 | "system-registers.xml", 0); | ||
50 | |||
51 | - if (arm_feature(env, ARM_FEATURE_M)) { | ||
52 | + if (arm_feature(env, ARM_FEATURE_M) && tcg_enabled()) { | ||
53 | gdb_register_coprocessor(cs, | ||
54 | arm_gdb_get_m_systemreg, arm_gdb_set_m_systemreg, | ||
55 | arm_gen_dynamic_m_systemreg_xml(cs, cs->gdb_num_regs), | ||
56 | -- | ||
57 | 2.34.1 | ||
58 | |||
59 | diff view generated by jsdifflib |