This patchset reverts commit 8a0fc3a29fc2315325400, which tried
to implement HCR.VI and VF, and then reimplements it correctly.

The implementation of HCR.VI and VF in that commit is not
correct -- they do not track the overall "is there a pending
VIRQ or VFIQ" status, but whether there is a pending interrupt
due to "this mechanism", ie the hypervisor having set the VI/VF
bits. The overall pending state for VIRQ and VFIQ is effectively
the logical OR of the inbound lines from the GIC with the
VI and VF bits. Commit 8a0fc3a29fc231 would result in pending
VIRQ/VFIQ possibly being lost when the hypervisor wrote to HCR.

Patch 1 reverts the broken implementation.
Patch 2 adds tracking of the state of the input lines from the
GIC (most of the complexity here is from having to handle
inbound migration from older QEMU versions).
Patch 3 implements HCR.{VI,VF} correctly.

I plan to put the revert into rc1 at least, because it
fixes a regression.

thanks
-- PMM

Peter Maydell (3):
  Revert "target/arm: Implement HCR.VI and VF"
  target/arm: Track the state of our irq lines from the GIC explicitly
  target/arm: Correctly implement handling of HCR_EL2.{VI,VF}

 target/arm/cpu.h       |  3 ++
 target/arm/internals.h | 18 ++++++++++++
 target/arm/cpu.c       | 64 +++++++++++++++++++++++++++++++++++++++++-
 target/arm/helper.c    | 57 +++++++++++--------------------------
 target/arm/machine.c   | 51 +++++++++++++++++++++++++++++++++
 5 files changed, 152 insertions(+), 41 deletions(-)

-- 
2.19.1