We now have a RISC-V specific QEMU development list.

Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
---
 MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index d550fd8b809c..10983bd52d64 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -244,6 +244,7 @@ M: Palmer Dabbelt <palmer@sifive.com>
 M: Alistair Francis <Alistair.Francis@wdc.com>
 M: Sagar Karandikar <sagark@eecs.berkeley.edu>
 M: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
+L: qemu-riscv@nongnu.org
 S: Maintained
 F: target/riscv/
 F: hw/riscv/
-- 
2.18.1

On Tue, Oct 30, 2018 at 10:45 AM Palmer Dabbelt <palmer@sifive.com> wrote:
>
> We now have a RISC-V specific QEMU development list.
>
> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  MAINTAINERS | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index d550fd8b809c..10983bd52d64 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -244,6 +244,7 @@ M: Palmer Dabbelt <palmer@sifive.com>
>  M: Alistair Francis <Alistair.Francis@wdc.com>
>  M: Sagar Karandikar <sagark@eecs.berkeley.edu>
>  M: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
> +L: qemu-riscv@nongnu.org
>  S: Maintained
>  F: target/riscv/
>  F: hw/riscv/
> --
> 2.18.1
>
>

On 30/10/18 18:43, Palmer Dabbelt wrote:
> We now have a RISC-V specific QEMU development list.
> 
> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>

Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>

> ---
>   MAINTAINERS | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index d550fd8b809c..10983bd52d64 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -244,6 +244,7 @@ M: Palmer Dabbelt <palmer@sifive.com>
>   M: Alistair Francis <Alistair.Francis@wdc.com>
>   M: Sagar Karandikar <sagark@eecs.berkeley.edu>
>   M: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
> +L: qemu-riscv@nongnu.org
>   S: Maintained
>   F: target/riscv/
>   F: hw/riscv/
> 

On Tue, Oct 30, 2018 at 10:53 AM Philippe Mathieu-Daudé
<philmd@redhat.com> wrote:
>
> On 30/10/18 18:43, Palmer Dabbelt wrote:
> > We now have a RISC-V specific QEMU development list.
> >
> > Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
>
> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>

That's for testing, I was worried this would break the Linux boot :P

Alistair

>
> > ---
> >   MAINTAINERS | 1 +
> >   1 file changed, 1 insertion(+)
> >
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index d550fd8b809c..10983bd52d64 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -244,6 +244,7 @@ M: Palmer Dabbelt <palmer@sifive.com>
> >   M: Alistair Francis <Alistair.Francis@wdc.com>
> >   M: Sagar Karandikar <sagark@eecs.berkeley.edu>
> >   M: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
> > +L: qemu-riscv@nongnu.org
> >   S: Maintained
> >   F: target/riscv/
> >   F: hw/riscv/
> >
>