On 30 October 2018 at 13:23, Peter Maydell <peter.maydell@linaro.org> wrote:
> Respin to fix some accidental wrong Author lines, no content
> changes.
>
> -- PMM
>
> The following changes since commit 0bbba1665ca2e7f1c80d4797077fe57bad58898e:
>
> Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-october-2018-part-4' into staging (2018-10-30 10:45:49 +0000)
>
> are available in the Git repository at:
>
> https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20181030
>
> for you to fetch changes up to 1f5a65a188210509bfb0c025fc91635c8436b98a:
>
> tests/boot-serial-test: Add microbit board testcase (2018-10-30 13:20:18 +0000)
>
> ----------------------------------------------------------------
> target-arm queue:
> * microbit: Add the UART to our nRF51 SoC model
> * Add a virtual Xilinx Versal board "xlnx-versal-virt"
> * hw/arm/virt: Set VIRT_COMPAT_3_0 compat
>
> ----------------------------------------------------------------
> Edgar E. Iglesias (2):
> hw/arm: versal: Add a model of Xilinx Versal SoC
> hw/arm: versal: Add a virtual Xilinx Versal board
>
> Eric Auger (1):
> hw/arm/virt: Set VIRT_COMPAT_3_0 compat
>
> Julia Suvorova (3):
> hw/char: Implement nRF51 SoC UART
> hw/arm/nrf51_soc: Connect UART to nRF51 SoC
> tests/boot-serial-test: Add microbit board testcase
Bah, and now I find a compile failure in the versal board patches.
v3 coming up at some point.
thanks
-- PMM