[Qemu-devel] [PULL 00/17] target-arm queue
[PULL v2 00/34] target-arm queue
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v2: dropped a couple of cadence_gem changes to ID regs that
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v2 changes: dropped the patch that enables the new 'notcg' CI test:
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caused new clang sanitizer warnings.
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it doesn't pass on our aarch64 runner because the CI runner doesn't
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have access to /dev/kvm.
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thanks
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-- PMM
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-- PMM
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The following changes since commit dddb37495b844270088e68e3bf30b764d48d863f:
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The following changes since commit 7c18f2d663521f1b31b821a13358ce38075eaf7d:
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Merge remote-tracking branch 'remotes/awilliam/tags/vfio-updates-20181015.0' into staging (2018-10-15 18:44:04 +0100)
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Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging (2023-04-29 23:07:17 +0100)
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are available in the Git repository at:
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are available in the Git repository at:
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20181016-1
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20230502-2
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for you to fetch changes up to 2ef297af07196c29446556537861f8e7dfeeae7b:
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for you to fetch changes up to a4ae17e5ec512862bf73e40dfbb1e7db71f2c1e7:
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coccinelle: new inplace-byteswaps.cocci to remove inplace-byteswapping calls (2018-10-16 17:14:55 +0100)
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hw/net/allwinner-sun8i-emac: Correctly byteswap descriptor fields (2023-05-02 15:47:41 +0100)
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----------------------------------------------------------------
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----------------------------------------------------------------
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target-arm queue:
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target-arm queue:
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* hw/arm/virt: add DT property /secure-chosen/stdout-path indicating secure UART
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* Support building Arm targets with CONFIG_TCG=no (ie KVM only)
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* target/arm: Fix aarch64_sve_change_el wrt EL0
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* hw/net: npcm7xx_emc: set MAC in register space
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* target/arm: Define fields of ISAR registers
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* hw/arm/bcm2835_property: Implement "get command line" message
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* target/arm: Align cortex-r5 id_isar0
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* Deprecate the '-singlestep' command line option in favour of
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* target/arm: Fix cortex-a7 id_isar0
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'-one-insn-per-tb' and '-accel one-insn-per-tb=on'
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* net/cadence_gem: Fix various bugs, add support for new
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* Deprecate 'singlestep' member of QMP StatusInfo struct
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features that will be used by the Xilinx Versal board
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* docs/about/deprecated.rst: Add "since 7.1" tag to dtb-kaslr-seed deprecation
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* target-arm: powerctl: Enable HVC when starting CPUs to EL2
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* hw/net/msf2-emac: Don't modify descriptor in-place in emac_store_desc()
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* target/arm: Add the Cortex-A72
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* raspi, aspeed: Write bootloader code correctly on big-endian hosts
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* target/arm: Mark PMINTENCLR and PMINTENCLR_EL1 accesses as possibly doing IO
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* hw/intc/allwinner-a10-pic: Fix bug on big-endian hosts
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* target/arm: Mask PMOVSR writes based on supported counters
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* Fix bug in A32 ERET on big-endian hosts that caused guest crash
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* target/arm: Initialize ARMMMUFaultInfo in v7m_stack_read/write
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* hw/sd/allwinner-sdhost: Correctly byteswap descriptor fields
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* coccinelle: new inplace-byteswaps.cocci to remove inplace-byteswapping calls
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* hw/net/allwinner-sun8i-emac: Correctly byteswap descriptor fields
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----------------------------------------------------------------
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----------------------------------------------------------------
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Aaron Lindsay (2):
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Claudio Fontana (1):
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target/arm: Mark PMINTENCLR and PMINTENCLR_EL1 accesses as possibly doing IO
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target/arm: move cpu_tcg to tcg/cpu32.c
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target/arm: Mask PMOVSR writes based on supported counters
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Edgar E. Iglesias (8):
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Cédric Le Goater (2):
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net: cadence_gem: Disable TSU feature bit
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hw/arm/boot: Make write_bootloader() public as arm_write_bootloader()
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net: cadence_gem: Use uint32_t for 32bit descriptor words
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hw/arm/aspeed: Use arm_write_bootloader() to write the bootloader
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net: cadence_gem: Add macro with max number of descriptor words
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net: cadence_gem: Add support for extended descriptors
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net: cadence_gem: Add support for selecting the DMA MemoryRegion
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net: cadence_gem: Implement support for 64bit descriptor addresses
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target-arm: powerctl: Enable HVC when starting CPUs to EL2
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target/arm: Add the Cortex-A72
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Jerome Forissier (1):
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Daniel Bertalan (1):
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hw/arm/virt: add DT property /secure-chosen/stdout-path indicating secure UART
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hw/arm/bcm2835_property: Implement "get command line" message
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Peter Maydell (2):
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Fabiano Rosas (11):
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target/arm: Initialize ARMMMUFaultInfo in v7m_stack_read/write
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target/arm: Move cortex sysregs into a separate file
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coccinelle: new inplace-byteswaps.cocci to remove inplace-byteswapping calls
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target/arm: Remove dead code from cpu_max_set_sve_max_vq
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target/arm: Extract TCG -cpu max code into a function
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target/arm: Do not expose all -cpu max features to qtests
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target/arm: Move 64-bit TCG CPUs into tcg/
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tests/qtest: Adjust and document query-cpu-model-expansion test for arm
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tests/qtest: Fix tests when no KVM or TCG are present
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tests/avocado: Pass parameters to migration test
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arm/Kconfig: Always select SEMIHOSTING when TCG is present
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arm/Kconfig: Do not build TCG-only boards on a KVM-only build
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tests/qtest: Restrict tpm-tis-i2c-test to CONFIG_TCG
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Richard Henderson (4):
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Patrick Venture (1):
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target/arm: Fix aarch64_sve_change_el wrt EL0
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hw/net: npcm7xx_emc: set MAC in register space
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target/arm: Define fields of ISAR registers
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target/arm: Align cortex-r5 id_isar0
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target/arm: Fix cortex-a7 id_isar0
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include/hw/net/cadence_gem.h | 7 +-
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Peter Maydell (18):
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target/arm/cpu.h | 95 ++++++++++++++-
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make one-insn-per-tb an accel option
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hw/arm/virt.c | 4 +
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softmmu: Don't use 'singlestep' global in QMP and HMP commands
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hw/net/cadence_gem.c | 185 ++++++++++++++++++++---------
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accel/tcg: Use one_insn_per_tb global instead of old singlestep global
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target/arm/arm-powerctl.c | 10 ++
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linux-user: Add '-one-insn-per-tb' option equivalent to '-singlestep'
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target/arm/cpu.c | 7 +-
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bsd-user: Add '-one-insn-per-tb' option equivalent to '-singlestep'
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target/arm/cpu64.c | 66 +++++++++-
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Document that -singlestep command line option is deprecated
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target/arm/helper.c | 27 +++--
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accel/tcg: Report one-insn-per-tb in 'info jit', not 'info status'
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target/arm/op_helper.c | 6 +-
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hmp: Add 'one-insn-per-tb' command equivalent to 'singlestep'
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scripts/coccinelle/inplace-byteswaps.cocci | 65 ++++++++++
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qapi/run-state.json: Fix missing newline at end of file
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10 files changed, 402 insertions(+), 70 deletions(-)
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qmp: Deprecate 'singlestep' member of StatusInfo
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create mode 100644 scripts/coccinelle/inplace-byteswaps.cocci
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docs/about/deprecated.rst: Add "since 7.1" tag to dtb-kaslr-seed deprecation
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hw/net/msf2-emac: Don't modify descriptor in-place in emac_store_desc()
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hw/arm/raspi: Use arm_write_bootloader() to write boot code
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hw/intc/allwinner-a10-pic: Don't use set_bit()/clear_bit()
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target/arm: Define and use new load_cpu_field_low32()
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target/arm: Add compile time asserts to load/store_cpu_field macros
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hw/sd/allwinner-sdhost: Correctly byteswap descriptor fields
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hw/net/allwinner-sun8i-emac: Correctly byteswap descriptor fields
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docs/about/deprecated.rst | 43 +-
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docs/user/main.rst | 14 +-
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configs/devices/aarch64-softmmu/default.mak | 4 -
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configs/devices/arm-softmmu/default.mak | 39 --
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qapi/run-state.json | 16 +-
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accel/tcg/internal.h | 2 +
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include/exec/cpu-common.h | 2 -
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include/hw/arm/boot.h | 49 ++
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include/hw/misc/bcm2835_property.h | 1 +
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include/monitor/hmp.h | 2 +-
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target/arm/cpregs.h | 6 +
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target/arm/internals.h | 10 +-
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target/arm/translate-a32.h | 24 +-
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accel/tcg/cpu-exec.c | 2 +-
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accel/tcg/monitor.c | 14 +
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accel/tcg/tcg-all.c | 23 +
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bsd-user/main.c | 14 +-
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hw/arm/aspeed.c | 38 +-
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hw/arm/bcm2835_peripherals.c | 2 +
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hw/arm/bcm2836.c | 2 +
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hw/arm/boot.c | 35 +-
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hw/arm/raspi.c | 66 +--
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hw/arm/virt.c | 6 +-
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hw/intc/allwinner-a10-pic.c | 7 +-
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hw/misc/bcm2835_property.c | 13 +-
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hw/net/allwinner-sun8i-emac.c | 22 +-
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hw/net/msf2-emac.c | 16 +-
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hw/net/npcm7xx_emc.c | 32 +-
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hw/sd/allwinner-sdhost.c | 31 +-
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linux-user/main.c | 18 +-
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softmmu/globals.c | 1 -
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softmmu/runstate-hmp-cmds.c | 25 +-
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softmmu/runstate.c | 10 +-
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softmmu/vl.c | 17 +-
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target/arm/cortex-regs.c | 69 +++
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target/arm/cpu64.c | 702 +--------------------------
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target/arm/{cpu_tcg.c => tcg/cpu32.c} | 72 +--
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target/arm/tcg/cpu64.c | 723 ++++++++++++++++++++++++++++
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target/arm/tcg/translate.c | 4 +-
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tests/qtest/arm-cpu-features.c | 20 +-
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tests/qtest/bios-tables-test.c | 11 +-
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tests/qtest/boot-serial-test.c | 5 +
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tests/qtest/migration-test.c | 9 +-
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tests/qtest/pxe-test.c | 8 +-
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tests/qtest/test-hmp.c | 1 +
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tests/qtest/vmgenid-test.c | 9 +-
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hmp-commands.hx | 25 +-
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hw/arm/Kconfig | 43 +-
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qemu-options.hx | 12 +-
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target/arm/Kconfig | 7 +
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target/arm/meson.build | 2 +-
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target/arm/tcg/meson.build | 2 +
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tcg/tci/README | 2 +-
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tests/avocado/migration.py | 83 +++-
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tests/qtest/meson.build | 3 +-
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55 files changed, 1438 insertions(+), 980 deletions(-)
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create mode 100644 target/arm/cortex-regs.c
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rename target/arm/{cpu_tcg.c => tcg/cpu32.c} (93%)
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create mode 100644 target/arm/tcg/cpu64.c
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diff view generated by jsdifflib

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