1
v2: dropped a couple of cadence_gem changes to ID regs that
1
v2: dropped the npcm7xx ethernet device, whose test case
2
caused new clang sanitizer warnings.
2
fails weirdly on the 'build-disabled' gitlab CI job:
3
https://gitlab.com/qemu-project/qemu/-/jobs/1034174731#L12
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4
4
-- PMM
5
The following changes since commit 8ba4bca570ace1e60614a0808631a517cf5df67a:
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6
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The following changes since commit dddb37495b844270088e68e3bf30b764d48d863f:
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Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging (2021-02-15 17:13:57 +0000)
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Merge remote-tracking branch 'remotes/awilliam/tags/vfio-updates-20181015.0' into staging (2018-10-15 18:44:04 +0100)
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are available in the Git repository at:
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are available in the Git repository at:
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10
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20181016-1
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210217
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for you to fetch changes up to 2ef297af07196c29446556537861f8e7dfeeae7b:
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for you to fetch changes up to 59c7a187dd8bd8ef675768dd8af9de11528ea7e2:
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14
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coccinelle: new inplace-byteswaps.cocci to remove inplace-byteswapping calls (2018-10-16 17:14:55 +0100)
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MAINTAINERS: add myself maintainer for the clock framework (2021-02-16 14:16:17 +0000)
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----------------------------------------------------------------
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----------------------------------------------------------------
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target-arm queue:
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target-arm queue:
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* hw/arm/virt: add DT property /secure-chosen/stdout-path indicating secure UART
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* Support ARMv8.5-MemTag for linux-user
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* target/arm: Fix aarch64_sve_change_el wrt EL0
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* ncpm7xx: Support SMBus
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* target/arm: Define fields of ISAR registers
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* MAINTAINERS: add section for Clock framework
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* target/arm: Align cortex-r5 id_isar0
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* target/arm: Fix cortex-a7 id_isar0
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* net/cadence_gem: Fix various bugs, add support for new
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features that will be used by the Xilinx Versal board
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* target-arm: powerctl: Enable HVC when starting CPUs to EL2
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* target/arm: Add the Cortex-A72
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* target/arm: Mark PMINTENCLR and PMINTENCLR_EL1 accesses as possibly doing IO
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* target/arm: Mask PMOVSR writes based on supported counters
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* target/arm: Initialize ARMMMUFaultInfo in v7m_stack_read/write
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* coccinelle: new inplace-byteswaps.cocci to remove inplace-byteswapping calls
33
22
34
----------------------------------------------------------------
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----------------------------------------------------------------
35
Aaron Lindsay (2):
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Hao Wu (5):
36
target/arm: Mark PMINTENCLR and PMINTENCLR_EL1 accesses as possibly doing IO
25
hw/i2c: Implement NPCM7XX SMBus Module Single Mode
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target/arm: Mask PMOVSR writes based on supported counters
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hw/arm: Add I2C sensors for NPCM750 eval board
27
hw/arm: Add I2C sensors and EEPROM for GSJ machine
28
hw/i2c: Add a QTest for NPCM7XX SMBus Device
29
hw/i2c: Implement NPCM7XX SMBus Module FIFO Mode
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30
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Edgar E. Iglesias (8):
31
Luc Michel (1):
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net: cadence_gem: Disable TSU feature bit
32
MAINTAINERS: add myself maintainer for the clock framework
41
net: cadence_gem: Use uint32_t for 32bit descriptor words
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net: cadence_gem: Add macro with max number of descriptor words
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net: cadence_gem: Add support for extended descriptors
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net: cadence_gem: Add support for selecting the DMA MemoryRegion
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net: cadence_gem: Implement support for 64bit descriptor addresses
46
target-arm: powerctl: Enable HVC when starting CPUs to EL2
47
target/arm: Add the Cortex-A72
48
33
49
Jerome Forissier (1):
34
Richard Henderson (31):
50
hw/arm/virt: add DT property /secure-chosen/stdout-path indicating secure UART
35
tcg: Introduce target-specific page data for user-only
36
linux-user: Introduce PAGE_ANON
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exec: Use uintptr_t for guest_base
38
exec: Use uintptr_t in cpu_ldst.h
39
exec: Improve types for guest_addr_valid
40
linux-user: Check for overflow in access_ok
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linux-user: Tidy VERIFY_READ/VERIFY_WRITE
42
bsd-user: Tidy VERIFY_READ/VERIFY_WRITE
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linux-user: Do not use guest_addr_valid for h2g_valid
44
linux-user: Fix guest_addr_valid vs reserved_va
45
exec: Introduce cpu_untagged_addr
46
exec: Use cpu_untagged_addr in g2h; split out g2h_untagged
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linux-user: Explicitly untag memory management syscalls
48
linux-user: Use guest_range_valid in access_ok
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exec: Rename guest_{addr,range}_valid to *_untagged
50
linux-user: Use cpu_untagged_addr in access_ok; split out *_untagged
51
linux-user: Move lock_user et al out of line
52
linux-user: Fix types in uaccess.c
53
linux-user: Handle tags in lock_user/unlock_user
54
linux-user/aarch64: Implement PR_TAGGED_ADDR_ENABLE
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target/arm: Improve gen_top_byte_ignore
56
target/arm: Use the proper TBI settings for linux-user
57
linux-user/aarch64: Implement PR_MTE_TCF and PR_MTE_TAG
58
linux-user/aarch64: Implement PROT_MTE
59
target/arm: Split out syndrome.h from internals.h
60
linux-user/aarch64: Pass syndrome to EXC_*_ABORT
61
linux-user/aarch64: Signal SEGV_MTESERR for sync tag check fault
62
linux-user/aarch64: Signal SEGV_MTEAERR for async tag check error
63
target/arm: Add allocation tag storage for user mode
64
target/arm: Enable MTE for user-only
65
tests/tcg/aarch64: Add mte smoke tests
51
66
52
Peter Maydell (2):
67
docs/system/arm/nuvoton.rst | 2 +-
53
target/arm: Initialize ARMMMUFaultInfo in v7m_stack_read/write
68
bsd-user/qemu.h | 17 +-
54
coccinelle: new inplace-byteswaps.cocci to remove inplace-byteswapping calls
69
include/exec/cpu-all.h | 47 +-
70
include/exec/cpu_ldst.h | 39 +-
71
include/exec/exec-all.h | 2 +-
72
include/hw/arm/npcm7xx.h | 2 +
73
include/hw/i2c/npcm7xx_smbus.h | 113 ++++
74
linux-user/aarch64/target_signal.h | 3 +
75
linux-user/aarch64/target_syscall.h | 13 +
76
linux-user/qemu.h | 76 +--
77
linux-user/syscall_defs.h | 1 +
78
target/arm/cpu-param.h | 3 +
79
target/arm/cpu.h | 32 +
80
target/arm/internals.h | 249 +-------
81
target/arm/syndrome.h | 273 +++++++++
82
tests/tcg/aarch64/mte.h | 60 ++
83
accel/tcg/translate-all.c | 32 +-
84
accel/tcg/user-exec.c | 51 +-
85
bsd-user/elfload.c | 2 +-
86
bsd-user/main.c | 8 +-
87
bsd-user/mmap.c | 23 +-
88
hw/arm/npcm7xx.c | 68 ++-
89
hw/arm/npcm7xx_boards.c | 46 ++
90
hw/i2c/npcm7xx_smbus.c | 1099 +++++++++++++++++++++++++++++++++++
91
linux-user/aarch64/cpu_loop.c | 38 +-
92
linux-user/elfload.c | 18 +-
93
linux-user/flatload.c | 2 +-
94
linux-user/hppa/cpu_loop.c | 39 +-
95
linux-user/i386/cpu_loop.c | 6 +-
96
linux-user/i386/signal.c | 5 +-
97
linux-user/main.c | 4 +-
98
linux-user/mmap.c | 88 +--
99
linux-user/ppc/signal.c | 4 +-
100
linux-user/syscall.c | 165 ++++--
101
linux-user/uaccess.c | 82 ++-
102
target/arm/cpu.c | 25 +-
103
target/arm/helper-a64.c | 4 +-
104
target/arm/mte_helper.c | 39 +-
105
target/arm/tlb_helper.c | 15 +-
106
target/arm/translate-a64.c | 25 +-
107
target/hppa/op_helper.c | 2 +-
108
target/i386/tcg/mem_helper.c | 2 +-
109
target/s390x/mem_helper.c | 4 +-
110
tests/qtest/npcm7xx_smbus-test.c | 495 ++++++++++++++++
111
tests/tcg/aarch64/mte-1.c | 28 +
112
tests/tcg/aarch64/mte-2.c | 45 ++
113
tests/tcg/aarch64/mte-3.c | 51 ++
114
tests/tcg/aarch64/mte-4.c | 45 ++
115
tests/tcg/aarch64/pauth-2.c | 1 -
116
MAINTAINERS | 11 +
117
hw/arm/Kconfig | 1 +
118
hw/i2c/meson.build | 1 +
119
hw/i2c/trace-events | 12 +
120
tests/qtest/meson.build | 1 +
121
tests/tcg/aarch64/Makefile.target | 6 +
122
tests/tcg/configure.sh | 4 +
123
56 files changed, 2976 insertions(+), 553 deletions(-)
124
create mode 100644 include/hw/i2c/npcm7xx_smbus.h
125
create mode 100644 target/arm/syndrome.h
126
create mode 100644 tests/tcg/aarch64/mte.h
127
create mode 100644 hw/i2c/npcm7xx_smbus.c
128
create mode 100644 tests/qtest/npcm7xx_smbus-test.c
129
create mode 100644 tests/tcg/aarch64/mte-1.c
130
create mode 100644 tests/tcg/aarch64/mte-2.c
131
create mode 100644 tests/tcg/aarch64/mte-3.c
132
create mode 100644 tests/tcg/aarch64/mte-4.c
55
133
56
Richard Henderson (4):
57
target/arm: Fix aarch64_sve_change_el wrt EL0
58
target/arm: Define fields of ISAR registers
59
target/arm: Align cortex-r5 id_isar0
60
target/arm: Fix cortex-a7 id_isar0
61
62
include/hw/net/cadence_gem.h | 7 +-
63
target/arm/cpu.h | 95 ++++++++++++++-
64
hw/arm/virt.c | 4 +
65
hw/net/cadence_gem.c | 185 ++++++++++++++++++++---------
66
target/arm/arm-powerctl.c | 10 ++
67
target/arm/cpu.c | 7 +-
68
target/arm/cpu64.c | 66 +++++++++-
69
target/arm/helper.c | 27 +++--
70
target/arm/op_helper.c | 6 +-
71
scripts/coccinelle/inplace-byteswaps.cocci | 65 ++++++++++
72
10 files changed, 402 insertions(+), 70 deletions(-)
73
create mode 100644 scripts/coccinelle/inplace-byteswaps.cocci
74
diff view generated by jsdifflib