| 1 | v2: dropped a couple of cadence_gem changes to ID regs that | 1 | target-arm queue: this clears out a bunch of patches I'd sent over |
|---|---|---|---|
| 2 | caused new clang sanitizer warnings. | 2 | the last coupled of weeks that have now got reviewed. Mostly |
| 3 | this is MPS2 device support improvements, put there is also | ||
| 4 | more of the incremental work towards supporting AArch32 Hyp mode, | ||
| 5 | a floating point bugfix, and the raspi framebuffer viewport support. | ||
| 3 | 6 | ||
| 7 | v2 fixes a "variable used uninitialized" error in a15mpcore.c. | ||
| 8 | |||
| 9 | thanks | ||
| 4 | -- PMM | 10 | -- PMM |
| 5 | 11 | ||
| 6 | The following changes since commit dddb37495b844270088e68e3bf30b764d48d863f: | ||
| 7 | 12 | ||
| 8 | Merge remote-tracking branch 'remotes/awilliam/tags/vfio-updates-20181015.0' into staging (2018-10-15 18:44:04 +0100) | 13 | The following changes since commit 6b699ae1be9f257478d5eca7ef65dcea270a2796: |
| 14 | |||
| 15 | tests/vm: Increase timeout waiting for VM to boot to 5 minutes (2018-08-24 11:31:28 +0100) | ||
| 9 | 16 | ||
| 10 | are available in the Git repository at: | 17 | are available in the Git repository at: |
| 11 | 18 | ||
| 12 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20181016-1 | 19 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20180824-1 |
| 13 | 20 | ||
| 14 | for you to fetch changes up to 2ef297af07196c29446556537861f8e7dfeeae7b: | 21 | for you to fetch changes up to 239cb6feb298a31faa40b7e97ced107bf9c2f2bf: |
| 15 | 22 | ||
| 16 | coccinelle: new inplace-byteswaps.cocci to remove inplace-byteswapping calls (2018-10-16 17:14:55 +0100) | 23 | hw/arm/mps2: Fix ID register errors on AN511 and AN385 (2018-08-24 13:17:50 +0100) |
| 17 | 24 | ||
| 18 | ---------------------------------------------------------------- | 25 | ---------------------------------------------------------------- |
| 19 | target-arm queue: | 26 | target-arm queue: |
| 20 | * hw/arm/virt: add DT property /secure-chosen/stdout-path indicating secure UART | 27 | * Fix rounding errors in scaling float-to-int and int-to-float operations |
| 21 | * target/arm: Fix aarch64_sve_change_el wrt EL0 | 28 | * Connect virtualization-related IRQs and memory regions of GICv2 |
| 22 | * target/arm: Define fields of ISAR registers | 29 | in boards that use Cortex-A7 or Cortex-A15 |
| 23 | * target/arm: Align cortex-r5 id_isar0 | 30 | * Support taking exceptions to AArch32 Hyp mode |
| 24 | * target/arm: Fix cortex-a7 id_isar0 | 31 | * Clear CPSR.IL and CPSR.J on 32-bit exception entry |
| 25 | * net/cadence_gem: Fix various bugs, add support for new | 32 | (a minor bug fix that won't affect non-buggy guest code) |
| 26 | features that will be used by the Xilinx Versal board | 33 | * mps2-an505: Implement various missing devices: |
| 27 | * target-arm: powerctl: Enable HVC when starting CPUs to EL2 | 34 | dual timer, watchdogs, counters in the FPGAIO registers, |
| 28 | * target/arm: Add the Cortex-A72 | 35 | some missing ID/control registers, TrustZone Master Security |
| 29 | * target/arm: Mark PMINTENCLR and PMINTENCLR_EL1 accesses as possibly doing IO | 36 | Controllers, PL081 DMA controllers, PL022 SPI controllers |
| 30 | * target/arm: Mask PMOVSR writes based on supported counters | 37 | * correct ID register values for mps2-an385, -an511, -an505 |
| 31 | * target/arm: Initialize ARMMMUFaultInfo in v7m_stack_read/write | 38 | * fix some hardcoded tabs in untouched backwaters of the |
| 32 | * coccinelle: new inplace-byteswaps.cocci to remove inplace-byteswapping calls | 39 | target/arm codebase |
| 40 | * raspi: Refactor framebuffer property handling code and implement | ||
| 41 | support for the virtual framebuffer/viewport | ||
| 33 | 42 | ||
| 34 | ---------------------------------------------------------------- | 43 | ---------------------------------------------------------------- |
| 35 | Aaron Lindsay (2): | 44 | Peter Maydell (48): |
| 36 | target/arm: Mark PMINTENCLR and PMINTENCLR_EL1 accesses as possibly doing IO | 45 | hw/intc/arm_gic: Make per-cpu GICH memory regions 0x200 bytes large |
| 37 | target/arm: Mask PMOVSR writes based on supported counters | 46 | hw/arm/vexpress: Connect VIRQ and VFIQ |
| 38 | 47 | hw/arm/highbank: Connect VIRQ and VFIQ | |
| 39 | Edgar E. Iglesias (8): | 48 | hw/arm/fsl-imx6ul: Connect VIRQ and VFIQ |
| 40 | net: cadence_gem: Disable TSU feature bit | 49 | hw/arm/fsl-imx6ul: Connect VIRQ and VFIQ |
| 41 | net: cadence_gem: Use uint32_t for 32bit descriptor words | 50 | hw/cpu/a15mpcore: If CPU has EL2, enable it on the GIC and wire it up |
| 42 | net: cadence_gem: Add macro with max number of descriptor words | 51 | hw/arm/vexpress: Don't set info->secure_boot if CPU doesn't have EL3 |
| 43 | net: cadence_gem: Add support for extended descriptors | 52 | hw/arm/vexpress: Add "virtualization" property controlling presence of EL2 |
| 44 | net: cadence_gem: Add support for selecting the DMA MemoryRegion | 53 | target/arm: Implement RAZ/WI HACTLR2 |
| 45 | net: cadence_gem: Implement support for 64bit descriptor addresses | 54 | target/arm: Implement AArch32 HCR and HCR2 |
| 46 | target-arm: powerctl: Enable HVC when starting CPUs to EL2 | 55 | target/arm: Factor out code for taking an AArch32 exception |
| 47 | target/arm: Add the Cortex-A72 | 56 | target/arm: Implement support for taking exceptions to Hyp mode |
| 48 | 57 | target/arm: Clear CPSR.IL and CPSR.J on 32-bit exception entry | |
| 49 | Jerome Forissier (1): | 58 | hw/arm/boot: AArch32 kernels should be started in Hyp mode if available |
| 50 | hw/arm/virt: add DT property /secure-chosen/stdout-path indicating secure UART | 59 | hw/misc/mps2-fpgaio: Implement 1Hz and 100Hz counters |
| 51 | 60 | hw/misc/mps2-fpgaio: Implement PSCNTR and COUNTER | |
| 52 | Peter Maydell (2): | 61 | hw/timer/cmsdk-apb-dualtimer: Implement CMSDK dual timer module |
| 53 | target/arm: Initialize ARMMMUFaultInfo in v7m_stack_read/write | 62 | hw/arm/iotkit: Wire up the dualtimer |
| 54 | coccinelle: new inplace-byteswaps.cocci to remove inplace-byteswapping calls | 63 | hw/arm/mps2: Wire up dual-timer in mps2-an385 and mps2-an511 |
| 64 | hw/arm/iotkit: Wire up the watchdogs | ||
| 65 | hw/arm/iotkit: Wire up the S32KTIMER | ||
| 66 | hw/misc/iotkit-sysctl: Implement IoTKit system control element | ||
| 67 | hw/misc/iotkit-sysinfo: Implement IoTKit system information block | ||
| 68 | hw/misc/iotkit: Wire up the sysctl and sysinfo register blocks | ||
| 69 | hw/misc/tz-msc: Model TrustZone Master Security Controller | ||
| 70 | hw/misc/iotkit-secctl: Wire up registers for controlling MSCs | ||
| 71 | hw/arm/iotkit: Wire up the lines for MSCs | ||
| 72 | hw/arm/mps2-tz: Create PL081s and MSCs | ||
| 73 | hw/ssi/pl022: Allow use as embedded-struct device | ||
| 74 | hw/ssi/pl022: Set up reset function in class init | ||
| 75 | hw/ssi/pl022: Don't directly call vmstate_register() | ||
| 76 | hw/ssi/pl022: Use DeviceState::realize rather than SysBusDevice::init | ||
| 77 | hw/ssi/pl022: Correct wrong value for PL022_INT_RT | ||
| 78 | hw/ssi/pl022: Correct wrong DMACR and ICR handling | ||
| 79 | hw/arm/mps2-tz: Instantiate SPI controllers | ||
| 80 | hw/arm/mps2-tz: Fix MPS2 SCC config register values | ||
| 81 | target/arm: Untabify translate.c | ||
| 82 | target/arm: Untabify iwmmxt_helper.c | ||
| 83 | target/arm: Remove a handful of stray tabs | ||
| 84 | hw/misc/bcm2835_fb: Move config fields to their own struct | ||
| 85 | hw/misc/bcm2835_property: Track fb settings using BCM2835FBConfig | ||
| 86 | hw/display/bcm2835_fb: Drop unused size and pitch fields | ||
| 87 | hw/display/bcm2835_fb: Reset resolution, etc correctly | ||
| 88 | hw/display/bcm2835_fb: Abstract out calculation of pitch, size | ||
| 89 | hw/display/bcm2835_fb: Fix handling of virtual framebuffer | ||
| 90 | hw/display/bcm2835_fb: Validate config settings | ||
| 91 | hw/display/bcm2835_fb: Validate bcm2835_fb_mbox_push() config | ||
| 92 | hw/arm/mps2: Fix ID register errors on AN511 and AN385 | ||
| 55 | 93 | ||
| 56 | Richard Henderson (4): | 94 | Richard Henderson (4): |
| 57 | target/arm: Fix aarch64_sve_change_el wrt EL0 | 95 | softfloat: Add scaling int-to-float routines |
| 58 | target/arm: Define fields of ISAR registers | 96 | softfloat: Add scaling float-to-int routines |
| 59 | target/arm: Align cortex-r5 id_isar0 | 97 | target/arm: Use the int-to-float-scale softfloat routines |
| 60 | target/arm: Fix cortex-a7 id_isar0 | 98 | target/arm: Use the float-to-int-scale softfloat routines |
| 61 | 99 | ||
| 62 | include/hw/net/cadence_gem.h | 7 +- | 100 | hw/misc/Makefile.objs | 3 + |
| 63 | target/arm/cpu.h | 95 ++++++++++++++- | 101 | hw/timer/Makefile.objs | 1 + |
| 64 | hw/arm/virt.c | 4 + | 102 | include/fpu/softfloat.h | 169 +++++++--- |
| 65 | hw/net/cadence_gem.c | 185 ++++++++++++++++++++--------- | 103 | include/hw/arm/iotkit.h | 25 +- |
| 66 | target/arm/arm-powerctl.c | 10 ++ | 104 | include/hw/display/bcm2835_fb.h | 59 +++- |
| 67 | target/arm/cpu.c | 7 +- | 105 | include/hw/misc/iotkit-secctl.h | 14 + |
| 68 | target/arm/cpu64.c | 66 +++++++++- | 106 | include/hw/misc/iotkit-sysctl.h | 49 +++ |
| 69 | target/arm/helper.c | 27 +++-- | 107 | include/hw/misc/iotkit-sysinfo.h | 37 +++ |
| 70 | target/arm/op_helper.c | 6 +- | 108 | include/hw/misc/mps2-fpgaio.h | 10 + |
| 71 | scripts/coccinelle/inplace-byteswaps.cocci | 65 ++++++++++ | 109 | include/hw/misc/tz-msc.h | 79 +++++ |
| 72 | 10 files changed, 402 insertions(+), 70 deletions(-) | 110 | include/hw/ssi/pl022.h | 51 +++ |
| 73 | create mode 100644 scripts/coccinelle/inplace-byteswaps.cocci | 111 | include/hw/timer/cmsdk-apb-dualtimer.h | 72 ++++ |
| 112 | target/arm/cpu.h | 16 +- | ||
| 113 | fpu/softfloat.c | 579 ++++++++++++++++++++++++++------- | ||
| 114 | hw/arm/boot.c | 11 + | ||
| 115 | hw/arm/fsl-imx6ul.c | 4 + | ||
| 116 | hw/arm/fsl-imx7.c | 4 + | ||
| 117 | hw/arm/highbank.c | 6 + | ||
| 118 | hw/arm/iotkit.c | 114 ++++++- | ||
| 119 | hw/arm/mps2-tz.c | 142 +++++++- | ||
| 120 | hw/arm/mps2.c | 17 +- | ||
| 121 | hw/arm/vexpress.c | 64 +++- | ||
| 122 | hw/cpu/a15mpcore.c | 31 +- | ||
| 123 | hw/display/bcm2835_fb.c | 218 ++++++++----- | ||
| 124 | hw/intc/arm_gic.c | 2 +- | ||
| 125 | hw/misc/bcm2835_property.c | 123 ++++--- | ||
| 126 | hw/misc/iotkit-secctl.c | 73 ++++- | ||
| 127 | hw/misc/iotkit-sysctl.c | 261 +++++++++++++++ | ||
| 128 | hw/misc/iotkit-sysinfo.c | 128 ++++++++ | ||
| 129 | hw/misc/mps2-fpgaio.c | 146 ++++++++- | ||
| 130 | hw/misc/tz-msc.c | 308 ++++++++++++++++++ | ||
| 131 | hw/ssi/pl022.c | 57 ++-- | ||
| 132 | hw/timer/cmsdk-apb-dualtimer.c | 515 +++++++++++++++++++++++++++++ | ||
| 133 | target/arm/arm-semi.c | 2 +- | ||
| 134 | target/arm/helper.c | 342 +++++++++++++------ | ||
| 135 | target/arm/iwmmxt_helper.c | 234 ++++++------- | ||
| 136 | target/arm/translate.c | 122 +++---- | ||
| 137 | MAINTAINERS | 10 + | ||
| 138 | default-configs/arm-softmmu.mak | 4 + | ||
| 139 | hw/misc/trace-events | 16 + | ||
| 140 | hw/timer/trace-events | 5 + | ||
| 141 | 41 files changed, 3405 insertions(+), 718 deletions(-) | ||
| 142 | create mode 100644 include/hw/misc/iotkit-sysctl.h | ||
| 143 | create mode 100644 include/hw/misc/iotkit-sysinfo.h | ||
| 144 | create mode 100644 include/hw/misc/tz-msc.h | ||
| 145 | create mode 100644 include/hw/ssi/pl022.h | ||
| 146 | create mode 100644 include/hw/timer/cmsdk-apb-dualtimer.h | ||
| 147 | create mode 100644 hw/misc/iotkit-sysctl.c | ||
| 148 | create mode 100644 hw/misc/iotkit-sysinfo.c | ||
| 149 | create mode 100644 hw/misc/tz-msc.c | ||
| 150 | create mode 100644 hw/timer/cmsdk-apb-dualtimer.c | ||
| 74 | 151 | diff view generated by jsdifflib |