| 1 | v2: use "unsigned int" instead of "uint". | 1 | v2: drop pvpanic-pci patches. |
|---|---|---|---|
| 2 | 2 | ||
| 3 | thanks | 3 | The following changes since commit f1fcb6851aba6dd9838886dc179717a11e344a1c: |
| 4 | -- PMM | ||
| 5 | |||
| 6 | The following changes since commit 506e4a00de01e0b29fa83db5cbbc3d154253b4ea: | ||
| 7 | 4 | ||
| 8 | Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-3.1-20180925' into staging (2018-09-25 13:30:45 +0100) | 5 | Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2021-01-19' into staging (2021-01-19 11:57:07 +0000) |
| 9 | 6 | ||
| 10 | are available in the Git repository at: | 7 | are available in the Git repository at: |
| 11 | 8 | ||
| 12 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20180925-1 | 9 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210119-1 |
| 13 | 10 | ||
| 14 | for you to fetch changes up to 060a65df056a5d6ca3a6a91e7bf150ca1fbccddf: | 11 | for you to fetch changes up to b93f4fbdc48283a39089469c44a5529d79dc40a8: |
| 15 | 12 | ||
| 16 | target/arm: Start AArch32 CPUs with EL2 but not EL3 in Hyp mode (2018-09-25 15:13:24 +0100) | 13 | docs: Build and install all the docs in a single manual (2021-01-19 15:45:14 +0000) |
| 17 | 14 | ||
| 18 | ---------------------------------------------------------------- | 15 | ---------------------------------------------------------------- |
| 19 | target-arm queue: | 16 | target-arm queue: |
| 20 | * target/arm: Fix cpu_get_tb_cpu_state() for non-SVE CPUs | 17 | * Implement IMPDEF pauth algorithm |
| 21 | * hw/arm/exynos4210: fix Exynos4210 UART support | 18 | * Support ARMv8.4-SEL2 |
| 22 | * hw/arm/virt-acpi-build: Add a check for memory-less NUMA nodes | 19 | * Fix bug where we were truncating predicate vector lengths in SVE insns |
| 23 | * arm: Add BBC micro:bit machine | 20 | * npcm7xx_adc-test: Fix memleak in adc_qom_set |
| 24 | * aspeed/i2c: Fix interrupt handling bugs | 21 | * target/arm/m_helper: Silence GCC 10 maybe-uninitialized error |
| 25 | * hw/arm/smmu-common: Fix the name of the iommu memory regions | 22 | * docs: Build and install all the docs in a single manual |
| 26 | * hw/arm/smmuv3: fix eventq recording and IRQ triggerring | ||
| 27 | * hw/intc/arm_gic: Document QEMU interface | ||
| 28 | * hw/intc/arm_gic: Drop GIC_BASE_IRQ macro | ||
| 29 | * hw/net/pcnet-pci: Convert away from old_mmio accessors | ||
| 30 | * hw/timer/cmsdk-apb-dualtimer: Add missing 'break' statements | ||
| 31 | * aspeed/timer: fix compile breakage with clang 3.4.2 | ||
| 32 | * hw/arm/aspeed: change the FMC flash model of the AST2500 evb | ||
| 33 | * hw/arm/aspeed: Minor code cleanups | ||
| 34 | * target/arm: Start AArch32 CPUs with EL2 but not EL3 in Hyp mode | ||
| 35 | 23 | ||
| 36 | ---------------------------------------------------------------- | 24 | ---------------------------------------------------------------- |
| 37 | Bartlomiej Zolnierkiewicz (1): | 25 | Gan Qixin (1): |
| 38 | hw/arm/exynos4210: fix Exynos4210 UART support | 26 | npcm7xx_adc-test: Fix memleak in adc_qom_set |
| 39 | 27 | ||
| 40 | Cédric Le Goater (5): | 28 | Peter Maydell (1): |
| 41 | aspeed/i2c: interrupts should be cleared by software only | 29 | docs: Build and install all the docs in a single manual |
| 42 | aspeed/timer: fix compile breakage with clang 3.4.2 | ||
| 43 | hw/arm/aspeed: change the FMC flash model of the AST2500 evb | ||
| 44 | hw/arm/aspeed: Add an Aspeed machine class | ||
| 45 | aspeed/smc: fix some alignment issues | ||
| 46 | 30 | ||
| 47 | Eric Auger (2): | 31 | Philippe Mathieu-Daudé (1): |
| 48 | hw/arm/smmu-common: Fix the name of the iommu memory regions | 32 | target/arm/m_helper: Silence GCC 10 maybe-uninitialized error |
| 49 | hw/arm/smmuv3: fix eventq recording and IRQ triggerring | ||
| 50 | 33 | ||
| 51 | Guenter Roeck (2): | 34 | Richard Henderson (7): |
| 52 | aspeed/i2c: Handle receive command in separate function | 35 | target/arm: Implement an IMPDEF pauth algorithm |
| 53 | aspeed/i2c: Fix receive done interrupt handling | 36 | target/arm: Add cpu properties to control pauth |
| 37 | target/arm: Use object_property_add_bool for "sve" property | ||
| 38 | target/arm: Introduce PREDDESC field definitions | ||
| 39 | target/arm: Update PFIRST, PNEXT for pred_desc | ||
| 40 | target/arm: Update ZIP, UZP, TRN for pred_desc | ||
| 41 | target/arm: Update REV, PUNPK for pred_desc | ||
| 54 | 42 | ||
| 55 | Joel Stanley (3): | 43 | Rémi Denis-Courmont (19): |
| 56 | MAINTAINERS: Add NRF51 entry | 44 | target/arm: remove redundant tests |
| 57 | arm: Add Nordic Semiconductor nRF51 SoC | 45 | target/arm: add arm_is_el2_enabled() helper |
| 58 | arm: Add BBC micro:bit machine | 46 | target/arm: use arm_is_el2_enabled() where applicable |
| 47 | target/arm: use arm_hcr_el2_eff() where applicable | ||
| 48 | target/arm: factor MDCR_EL2 common handling | ||
| 49 | target/arm: Define isar_feature function to test for presence of SEL2 | ||
| 50 | target/arm: add 64-bit S-EL2 to EL exception table | ||
| 51 | target/arm: add MMU stage 1 for Secure EL2 | ||
| 52 | target/arm: add ARMv8.4-SEL2 system registers | ||
| 53 | target/arm: handle VMID change in secure state | ||
| 54 | target/arm: do S1_ptw_translate() before address space lookup | ||
| 55 | target/arm: translate NS bit in page-walks | ||
| 56 | target/arm: generalize 2-stage page-walk condition | ||
| 57 | target/arm: secure stage 2 translation regime | ||
| 58 | target/arm: set HPFAR_EL2.NS on secure stage 2 faults | ||
| 59 | target/arm: revector to run-time pick target EL | ||
| 60 | target/arm: Implement SCR_EL2.EEL2 | ||
| 61 | target/arm: enable Secure EL2 in max CPU | ||
| 62 | target/arm: refactor vae1_tlbmask() | ||
| 59 | 63 | ||
| 60 | Peter Maydell (6): | 64 | docs/conf.py | 46 ++++- |
| 61 | hw/intc/arm_gic: Document QEMU interface | 65 | docs/devel/conf.py | 15 -- |
| 62 | hw/intc/arm_gic: Drop GIC_BASE_IRQ macro | 66 | docs/index.html.in | 17 -- |
| 63 | hw/net/pcnet-pci: Convert away from old_mmio accessors | 67 | docs/interop/conf.py | 28 --- |
| 64 | hw/net/pcnet-pci: Unify pcnet_ioport_read/write and pcnet_mmio_read/write | 68 | docs/meson.build | 64 +++--- |
| 65 | hw/timer/cmsdk-apb-dualtimer: Add missing 'break' statements | 69 | docs/specs/conf.py | 16 -- |
| 66 | target/arm: Start AArch32 CPUs with EL2 but not EL3 in Hyp mode | 70 | docs/system/arm/cpu-features.rst | 21 ++ |
| 71 | docs/system/conf.py | 28 --- | ||
| 72 | docs/tools/conf.py | 37 ---- | ||
| 73 | docs/user/conf.py | 15 -- | ||
| 74 | include/qemu/xxhash.h | 98 +++++++++ | ||
| 75 | target/arm/cpu-param.h | 2 +- | ||
| 76 | target/arm/cpu.h | 107 ++++++++-- | ||
| 77 | target/arm/internals.h | 45 +++++ | ||
| 78 | target/arm/cpu.c | 23 ++- | ||
| 79 | target/arm/cpu64.c | 65 ++++-- | ||
| 80 | target/arm/helper-a64.c | 8 +- | ||
| 81 | target/arm/helper.c | 414 ++++++++++++++++++++++++++------------- | ||
| 82 | target/arm/m_helper.c | 2 +- | ||
| 83 | target/arm/monitor.c | 1 + | ||
| 84 | target/arm/op_helper.c | 4 +- | ||
| 85 | target/arm/pauth_helper.c | 27 ++- | ||
| 86 | target/arm/sve_helper.c | 33 ++-- | ||
| 87 | target/arm/tlb_helper.c | 3 + | ||
| 88 | target/arm/translate-a64.c | 4 + | ||
| 89 | target/arm/translate-sve.c | 31 ++- | ||
| 90 | target/arm/translate.c | 36 +++- | ||
| 91 | tests/qtest/arm-cpu-features.c | 13 ++ | ||
| 92 | tests/qtest/npcm7xx_adc-test.c | 1 + | ||
| 93 | .gitlab-ci.yml | 4 +- | ||
| 94 | 30 files changed, 770 insertions(+), 438 deletions(-) | ||
| 95 | delete mode 100644 docs/devel/conf.py | ||
| 96 | delete mode 100644 docs/index.html.in | ||
| 97 | delete mode 100644 docs/interop/conf.py | ||
| 98 | delete mode 100644 docs/specs/conf.py | ||
| 99 | delete mode 100644 docs/system/conf.py | ||
| 100 | delete mode 100644 docs/tools/conf.py | ||
| 101 | delete mode 100644 docs/user/conf.py | ||
| 67 | 102 | ||
| 68 | Richard Henderson (1): | ||
| 69 | target/arm: Fix cpu_get_tb_cpu_state() for non-SVE CPUs | ||
| 70 | |||
| 71 | Shannon Zhao (1): | ||
| 72 | hw/arm/virt-acpi-build: Add a check for memory-less NUMA nodes | ||
| 73 | |||
| 74 | hw/arm/Makefile.objs | 1 + | ||
| 75 | hw/arm/smmuv3-internal.h | 26 ++--- | ||
| 76 | hw/intc/gic_internal.h | 2 - | ||
| 77 | include/hw/arm/aspeed.h | 46 +++++++++ | ||
| 78 | include/hw/arm/nrf51_soc.h | 41 ++++++++ | ||
| 79 | include/hw/intc/arm_gic.h | 43 ++++++++ | ||
| 80 | include/hw/timer/aspeed_timer.h | 3 +- | ||
| 81 | hw/arm/aspeed.c | 212 +++++++++++++--------------------------- | ||
| 82 | hw/arm/exynos4210.c | 8 +- | ||
| 83 | hw/arm/microbit.c | 67 +++++++++++++ | ||
| 84 | hw/arm/nrf51_soc.c | 133 +++++++++++++++++++++++++ | ||
| 85 | hw/arm/smmu-common.c | 6 +- | ||
| 86 | hw/arm/smmuv3.c | 2 +- | ||
| 87 | hw/arm/virt-acpi-build.c | 10 +- | ||
| 88 | hw/i2c/aspeed_i2c.c | 63 ++++++++---- | ||
| 89 | hw/intc/arm_gic.c | 31 +++--- | ||
| 90 | hw/intc/arm_gic_common.c | 1 - | ||
| 91 | hw/net/pcnet-pci.c | 98 ++----------------- | ||
| 92 | hw/ssi/aspeed_smc.c | 8 +- | ||
| 93 | hw/timer/aspeed_timer.c | 1 - | ||
| 94 | hw/timer/cmsdk-apb-dualtimer.c | 2 + | ||
| 95 | target/arm/cpu.c | 14 ++- | ||
| 96 | target/arm/helper.c | 45 +++++---- | ||
| 97 | MAINTAINERS | 8 ++ | ||
| 98 | default-configs/arm-softmmu.mak | 1 + | ||
| 99 | hw/net/trace-events | 6 -- | ||
| 100 | 26 files changed, 542 insertions(+), 336 deletions(-) | ||
| 101 | create mode 100644 include/hw/arm/aspeed.h | ||
| 102 | create mode 100644 include/hw/arm/nrf51_soc.h | ||
| 103 | create mode 100644 hw/arm/microbit.c | ||
| 104 | create mode 100644 hw/arm/nrf51_soc.c | ||
| 105 | diff view generated by jsdifflib |