| 1 | v2: use "unsigned int" instead of "uint". | 1 | v2: dropped patches that add the microbit nRF51 non-volatile memories |
|---|---|---|---|
| 2 | and the test case for them. | ||
| 2 | 3 | ||
| 3 | thanks | 4 | thanks |
| 4 | -- PMM | 5 | -- PMM |
| 5 | |||
| 6 | The following changes since commit 506e4a00de01e0b29fa83db5cbbc3d154253b4ea: | ||
| 7 | 6 | ||
| 8 | Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-3.1-20180925' into staging (2018-09-25 13:30:45 +0100) | 7 | |
| 8 | The following changes since commit 3a183e330dbd7dbcac3841737ac874979552cca2: | ||
| 9 | |||
| 10 | Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190128' into staging (2019-01-28 16:26:47 +0000) | ||
| 9 | 11 | ||
| 10 | are available in the Git repository at: | 12 | are available in the Git repository at: |
| 11 | 13 | ||
| 12 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20180925-1 | 14 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20190129 |
| 13 | 15 | ||
| 14 | for you to fetch changes up to 060a65df056a5d6ca3a6a91e7bf150ca1fbccddf: | 16 | for you to fetch changes up to 46f5abc0a2566ac3dc954eeb62fd625f0eaca120: |
| 15 | 17 | ||
| 16 | target/arm: Start AArch32 CPUs with EL2 but not EL3 in Hyp mode (2018-09-25 15:13:24 +0100) | 18 | gdbstub: Simplify gdb_get_cpu_pid() to use cpu->cluster_index (2019-01-29 11:46:06 +0000) |
| 17 | 19 | ||
| 18 | ---------------------------------------------------------------- | 20 | ---------------------------------------------------------------- |
| 19 | target-arm queue: | 21 | target-arm queue: |
| 20 | * target/arm: Fix cpu_get_tb_cpu_state() for non-SVE CPUs | 22 | * Fix validation of 32-bit address spaces for aa32 (fixes an assert introduced in ba97be9f4a4) |
| 21 | * hw/arm/exynos4210: fix Exynos4210 UART support | 23 | * v8m: Ensure IDAU is respected if SAU is disabled |
| 22 | * hw/arm/virt-acpi-build: Add a check for memory-less NUMA nodes | 24 | * gdbstub: fix gdb_get_cpu(s, pid, tid) when pid and/or tid are 0 |
| 23 | * arm: Add BBC micro:bit machine | 25 | * exec.c: Use correct attrs in cpu_memory_rw_debug() |
| 24 | * aspeed/i2c: Fix interrupt handling bugs | 26 | * accel/tcg/user-exec: Don't parse aarch64 insns to test for read vs write |
| 25 | * hw/arm/smmu-common: Fix the name of the iommu memory regions | 27 | * target/arm: Don't clear supported PMU events when initializing PMCEID1 |
| 26 | * hw/arm/smmuv3: fix eventq recording and IRQ triggerring | 28 | * memory: add memory_region_flush_rom_device() |
| 27 | * hw/intc/arm_gic: Document QEMU interface | 29 | * microbit: Add stub NRF51 TWI magnetometer/accelerometer detection |
| 28 | * hw/intc/arm_gic: Drop GIC_BASE_IRQ macro | 30 | * tests/microbit-test: extend testing of microbit devices |
| 29 | * hw/net/pcnet-pci: Convert away from old_mmio accessors | 31 | * checkpatch: Don't emit spurious warnings about block comments |
| 30 | * hw/timer/cmsdk-apb-dualtimer: Add missing 'break' statements | 32 | * aspeed/smc: misc bug fixes |
| 31 | * aspeed/timer: fix compile breakage with clang 3.4.2 | 33 | * xlnx-zynqmp: Don't create rpu-cluster if there are no RPUs |
| 32 | * hw/arm/aspeed: change the FMC flash model of the AST2500 evb | 34 | * xlnx-zynqmp: Realize cluster after putting RPUs in it |
| 33 | * hw/arm/aspeed: Minor code cleanups | 35 | * accel/tcg: Add cluster number to TCG TB hash so differently configured |
| 34 | * target/arm: Start AArch32 CPUs with EL2 but not EL3 in Hyp mode | 36 | CPUs don't pick up cached TBs for the wrong kind of CPU |
| 35 | 37 | ||
| 36 | ---------------------------------------------------------------- | 38 | ---------------------------------------------------------------- |
| 37 | Bartlomiej Zolnierkiewicz (1): | 39 | Aaron Lindsay OS (1): |
| 38 | hw/arm/exynos4210: fix Exynos4210 UART support | 40 | target/arm: Don't clear supported PMU events when initializing PMCEID1 |
| 39 | 41 | ||
| 40 | Cédric Le Goater (5): | 42 | Cédric Le Goater (4): |
| 41 | aspeed/i2c: interrupts should be cleared by software only | 43 | aspeed/smc: fix default read value |
| 42 | aspeed/timer: fix compile breakage with clang 3.4.2 | 44 | aspeed/smc: define registers for all possible CS |
| 43 | hw/arm/aspeed: change the FMC flash model of the AST2500 evb | 45 | aspeed/smc: Add dummy data register |
| 44 | hw/arm/aspeed: Add an Aspeed machine class | 46 | aspeed/smc: snoop SPI transfers to fake dummy cycles |
| 45 | aspeed/smc: fix some alignment issues | ||
| 46 | 47 | ||
| 47 | Eric Auger (2): | 48 | Julia Suvorova (3): |
| 48 | hw/arm/smmu-common: Fix the name of the iommu memory regions | 49 | tests/libqtest: Introduce qtest_init_with_serial() |
| 49 | hw/arm/smmuv3: fix eventq recording and IRQ triggerring | 50 | tests/microbit-test: Make test independent of global_qtest |
| 51 | tests/microbit-test: Check nRF51 UART functionality | ||
| 50 | 52 | ||
| 51 | Guenter Roeck (2): | 53 | Luc Michel (1): |
| 52 | aspeed/i2c: Handle receive command in separate function | 54 | gdbstub: fix gdb_get_cpu(s, pid, tid) when pid and/or tid are 0 |
| 53 | aspeed/i2c: Fix receive done interrupt handling | ||
| 54 | 55 | ||
| 55 | Joel Stanley (3): | 56 | Peter Maydell (8): |
| 56 | MAINTAINERS: Add NRF51 entry | 57 | exec.c: Use correct attrs in cpu_memory_rw_debug() |
| 57 | arm: Add Nordic Semiconductor nRF51 SoC | 58 | accel/tcg/user-exec: Don't parse aarch64 insns to test for read vs write |
| 58 | arm: Add BBC micro:bit machine | 59 | checkpatch: Don't emit spurious warnings about block comments |
| 59 | 60 | xlnx-zynqmp: Don't create rpu-cluster if there are no RPUs | |
| 60 | Peter Maydell (6): | 61 | hw/arm/xlnx-zynqmp: Realize cluster after putting RPUs in it |
| 61 | hw/intc/arm_gic: Document QEMU interface | 62 | qom/cpu: Add cluster_index to CPUState |
| 62 | hw/intc/arm_gic: Drop GIC_BASE_IRQ macro | 63 | accel/tcg: Add cluster number to TCG TB hash |
| 63 | hw/net/pcnet-pci: Convert away from old_mmio accessors | 64 | gdbstub: Simplify gdb_get_cpu_pid() to use cpu->cluster_index |
| 64 | hw/net/pcnet-pci: Unify pcnet_ioport_read/write and pcnet_mmio_read/write | ||
| 65 | hw/timer/cmsdk-apb-dualtimer: Add missing 'break' statements | ||
| 66 | target/arm: Start AArch32 CPUs with EL2 but not EL3 in Hyp mode | ||
| 67 | 65 | ||
| 68 | Richard Henderson (1): | 66 | Richard Henderson (1): |
| 69 | target/arm: Fix cpu_get_tb_cpu_state() for non-SVE CPUs | 67 | target/arm: Fix validation of 32-bit address spaces for aa32 |
| 70 | 68 | ||
| 71 | Shannon Zhao (1): | 69 | Stefan Hajnoczi (3): |
| 72 | hw/arm/virt-acpi-build: Add a check for memory-less NUMA nodes | 70 | tests/microbit-test: add TWI stub device test |
| 71 | MAINTAINERS: update microbit ARM board files | ||
| 72 | memory: add memory_region_flush_rom_device() | ||
| 73 | 73 | ||
| 74 | hw/arm/Makefile.objs | 1 + | 74 | Steffen Görtz (1): |
| 75 | hw/arm/smmuv3-internal.h | 26 ++--- | 75 | arm: Stub out NRF51 TWI magnetometer/accelerometer detection |
| 76 | hw/intc/gic_internal.h | 2 - | ||
| 77 | include/hw/arm/aspeed.h | 46 +++++++++ | ||
| 78 | include/hw/arm/nrf51_soc.h | 41 ++++++++ | ||
| 79 | include/hw/intc/arm_gic.h | 43 ++++++++ | ||
| 80 | include/hw/timer/aspeed_timer.h | 3 +- | ||
| 81 | hw/arm/aspeed.c | 212 +++++++++++++--------------------------- | ||
| 82 | hw/arm/exynos4210.c | 8 +- | ||
| 83 | hw/arm/microbit.c | 67 +++++++++++++ | ||
| 84 | hw/arm/nrf51_soc.c | 133 +++++++++++++++++++++++++ | ||
| 85 | hw/arm/smmu-common.c | 6 +- | ||
| 86 | hw/arm/smmuv3.c | 2 +- | ||
| 87 | hw/arm/virt-acpi-build.c | 10 +- | ||
| 88 | hw/i2c/aspeed_i2c.c | 63 ++++++++---- | ||
| 89 | hw/intc/arm_gic.c | 31 +++--- | ||
| 90 | hw/intc/arm_gic_common.c | 1 - | ||
| 91 | hw/net/pcnet-pci.c | 98 ++----------------- | ||
| 92 | hw/ssi/aspeed_smc.c | 8 +- | ||
| 93 | hw/timer/aspeed_timer.c | 1 - | ||
| 94 | hw/timer/cmsdk-apb-dualtimer.c | 2 + | ||
| 95 | target/arm/cpu.c | 14 ++- | ||
| 96 | target/arm/helper.c | 45 +++++---- | ||
| 97 | MAINTAINERS | 8 ++ | ||
| 98 | default-configs/arm-softmmu.mak | 1 + | ||
| 99 | hw/net/trace-events | 6 -- | ||
| 100 | 26 files changed, 542 insertions(+), 336 deletions(-) | ||
| 101 | create mode 100644 include/hw/arm/aspeed.h | ||
| 102 | create mode 100644 include/hw/arm/nrf51_soc.h | ||
| 103 | create mode 100644 hw/arm/microbit.c | ||
| 104 | create mode 100644 hw/arm/nrf51_soc.c | ||
| 105 | 76 | ||
| 77 | Thomas Roth (1): | ||
| 78 | target/arm: v8m: Ensure IDAU is respected if SAU is disabled | ||
| 79 | |||
| 80 | hw/i2c/Makefile.objs | 1 + | ||
| 81 | include/exec/exec-all.h | 4 +- | ||
| 82 | include/exec/memory.h | 18 +++ | ||
| 83 | include/hw/arm/nrf51.h | 2 + | ||
| 84 | include/hw/arm/nrf51_soc.h | 1 + | ||
| 85 | include/hw/cpu/cluster.h | 24 +++ | ||
| 86 | include/hw/i2c/microbit_i2c.h | 42 +++++ | ||
| 87 | include/hw/ssi/aspeed_smc.h | 3 + | ||
| 88 | include/qom/cpu.h | 7 + | ||
| 89 | target/arm/cpu.h | 11 +- | ||
| 90 | tests/libqtest.h | 11 ++ | ||
| 91 | accel/tcg/cpu-exec.c | 3 + | ||
| 92 | accel/tcg/translate-all.c | 3 + | ||
| 93 | accel/tcg/user-exec.c | 66 ++++++-- | ||
| 94 | exec.c | 19 ++- | ||
| 95 | gdbstub.c | 120 ++++++--------- | ||
| 96 | hw/arm/microbit.c | 16 ++ | ||
| 97 | hw/arm/xlnx-zynqmp.c | 9 +- | ||
| 98 | hw/cpu/cluster.c | 46 ++++++ | ||
| 99 | hw/i2c/microbit_i2c.c | 127 +++++++++++++++ | ||
| 100 | hw/ssi/aspeed_smc.c | 128 ++++++++++++++- | ||
| 101 | qom/cpu.c | 1 + | ||
| 102 | target/arm/cpu.c | 3 +- | ||
| 103 | target/arm/helper.c | 67 ++++---- | ||
| 104 | tests/libqtest.c | 25 +++ | ||
| 105 | tests/microbit-test.c | 350 +++++++++++++++++++++++++++++------------- | ||
| 106 | MAINTAINERS | 8 +- | ||
| 107 | scripts/checkpatch.pl | 2 +- | ||
| 108 | 28 files changed, 874 insertions(+), 243 deletions(-) | ||
| 109 | create mode 100644 include/hw/i2c/microbit_i2c.h | ||
| 110 | create mode 100644 hw/i2c/microbit_i2c.c | ||
| 111 | diff view generated by jsdifflib |