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target-arm queue: this clears out a bunch of patches I'd sent over
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v2: drop pvpanic-pci patches.
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the last coupled of weeks that have now got reviewed. Mostly
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this is MPS2 device support improvements, put there is also
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more of the incremental work towards supporting AArch32 Hyp mode,
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a floating point bugfix, and the raspi framebuffer viewport support.
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2
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v2 fixes a "variable used uninitialized" error in a15mpcore.c.
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The following changes since commit f1fcb6851aba6dd9838886dc179717a11e344a1c:
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4
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thanks
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Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2021-01-19' into staging (2021-01-19 11:57:07 +0000)
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-- PMM
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The following changes since commit 6b699ae1be9f257478d5eca7ef65dcea270a2796:
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tests/vm: Increase timeout waiting for VM to boot to 5 minutes (2018-08-24 11:31:28 +0100)
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are available in the Git repository at:
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are available in the Git repository at:
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20180824-1
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210119-1
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for you to fetch changes up to 239cb6feb298a31faa40b7e97ced107bf9c2f2bf:
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for you to fetch changes up to b93f4fbdc48283a39089469c44a5529d79dc40a8:
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hw/arm/mps2: Fix ID register errors on AN511 and AN385 (2018-08-24 13:17:50 +0100)
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docs: Build and install all the docs in a single manual (2021-01-19 15:45:14 +0000)
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----------------------------------------------------------------
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----------------------------------------------------------------
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target-arm queue:
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target-arm queue:
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* Fix rounding errors in scaling float-to-int and int-to-float operations
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* Implement IMPDEF pauth algorithm
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* Connect virtualization-related IRQs and memory regions of GICv2
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* Support ARMv8.4-SEL2
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in boards that use Cortex-A7 or Cortex-A15
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* Fix bug where we were truncating predicate vector lengths in SVE insns
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* Support taking exceptions to AArch32 Hyp mode
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* npcm7xx_adc-test: Fix memleak in adc_qom_set
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* Clear CPSR.IL and CPSR.J on 32-bit exception entry
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* target/arm/m_helper: Silence GCC 10 maybe-uninitialized error
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(a minor bug fix that won't affect non-buggy guest code)
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* docs: Build and install all the docs in a single manual
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* mps2-an505: Implement various missing devices:
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dual timer, watchdogs, counters in the FPGAIO registers,
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some missing ID/control registers, TrustZone Master Security
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Controllers, PL081 DMA controllers, PL022 SPI controllers
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* correct ID register values for mps2-an385, -an511, -an505
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* fix some hardcoded tabs in untouched backwaters of the
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target/arm codebase
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* raspi: Refactor framebuffer property handling code and implement
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support for the virtual framebuffer/viewport
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----------------------------------------------------------------
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----------------------------------------------------------------
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Peter Maydell (48):
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Gan Qixin (1):
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hw/intc/arm_gic: Make per-cpu GICH memory regions 0x200 bytes large
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npcm7xx_adc-test: Fix memleak in adc_qom_set
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hw/arm/vexpress: Connect VIRQ and VFIQ
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hw/arm/highbank: Connect VIRQ and VFIQ
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hw/arm/fsl-imx6ul: Connect VIRQ and VFIQ
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hw/arm/fsl-imx6ul: Connect VIRQ and VFIQ
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hw/cpu/a15mpcore: If CPU has EL2, enable it on the GIC and wire it up
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hw/arm/vexpress: Don't set info->secure_boot if CPU doesn't have EL3
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hw/arm/vexpress: Add "virtualization" property controlling presence of EL2
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target/arm: Implement RAZ/WI HACTLR2
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target/arm: Implement AArch32 HCR and HCR2
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target/arm: Factor out code for taking an AArch32 exception
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target/arm: Implement support for taking exceptions to Hyp mode
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target/arm: Clear CPSR.IL and CPSR.J on 32-bit exception entry
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hw/arm/boot: AArch32 kernels should be started in Hyp mode if available
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hw/misc/mps2-fpgaio: Implement 1Hz and 100Hz counters
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hw/misc/mps2-fpgaio: Implement PSCNTR and COUNTER
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hw/timer/cmsdk-apb-dualtimer: Implement CMSDK dual timer module
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hw/arm/iotkit: Wire up the dualtimer
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hw/arm/mps2: Wire up dual-timer in mps2-an385 and mps2-an511
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hw/arm/iotkit: Wire up the watchdogs
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hw/arm/iotkit: Wire up the S32KTIMER
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hw/misc/iotkit-sysctl: Implement IoTKit system control element
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hw/misc/iotkit-sysinfo: Implement IoTKit system information block
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hw/misc/iotkit: Wire up the sysctl and sysinfo register blocks
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hw/misc/tz-msc: Model TrustZone Master Security Controller
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hw/misc/iotkit-secctl: Wire up registers for controlling MSCs
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hw/arm/iotkit: Wire up the lines for MSCs
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hw/arm/mps2-tz: Create PL081s and MSCs
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hw/ssi/pl022: Allow use as embedded-struct device
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hw/ssi/pl022: Set up reset function in class init
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hw/ssi/pl022: Don't directly call vmstate_register()
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hw/ssi/pl022: Use DeviceState::realize rather than SysBusDevice::init
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hw/ssi/pl022: Correct wrong value for PL022_INT_RT
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hw/ssi/pl022: Correct wrong DMACR and ICR handling
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hw/arm/mps2-tz: Instantiate SPI controllers
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hw/arm/mps2-tz: Fix MPS2 SCC config register values
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target/arm: Untabify translate.c
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target/arm: Untabify iwmmxt_helper.c
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target/arm: Remove a handful of stray tabs
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hw/misc/bcm2835_fb: Move config fields to their own struct
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hw/misc/bcm2835_property: Track fb settings using BCM2835FBConfig
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hw/display/bcm2835_fb: Drop unused size and pitch fields
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hw/display/bcm2835_fb: Reset resolution, etc correctly
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hw/display/bcm2835_fb: Abstract out calculation of pitch, size
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hw/display/bcm2835_fb: Fix handling of virtual framebuffer
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hw/display/bcm2835_fb: Validate config settings
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hw/display/bcm2835_fb: Validate bcm2835_fb_mbox_push() config
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hw/arm/mps2: Fix ID register errors on AN511 and AN385
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27
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Richard Henderson (4):
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Peter Maydell (1):
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softfloat: Add scaling int-to-float routines
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docs: Build and install all the docs in a single manual
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softfloat: Add scaling float-to-int routines
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target/arm: Use the int-to-float-scale softfloat routines
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target/arm: Use the float-to-int-scale softfloat routines
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hw/misc/Makefile.objs | 3 +
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Philippe Mathieu-Daudé (1):
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hw/timer/Makefile.objs | 1 +
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target/arm/m_helper: Silence GCC 10 maybe-uninitialized error
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include/fpu/softfloat.h | 169 +++++++---
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include/hw/arm/iotkit.h | 25 +-
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include/hw/display/bcm2835_fb.h | 59 +++-
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include/hw/misc/iotkit-secctl.h | 14 +
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include/hw/misc/iotkit-sysctl.h | 49 +++
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include/hw/misc/iotkit-sysinfo.h | 37 +++
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include/hw/misc/mps2-fpgaio.h | 10 +
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include/hw/misc/tz-msc.h | 79 +++++
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include/hw/ssi/pl022.h | 51 +++
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include/hw/timer/cmsdk-apb-dualtimer.h | 72 ++++
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target/arm/cpu.h | 16 +-
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fpu/softfloat.c | 579 ++++++++++++++++++++++++++-------
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hw/arm/boot.c | 11 +
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hw/arm/fsl-imx6ul.c | 4 +
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hw/arm/fsl-imx7.c | 4 +
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hw/arm/highbank.c | 6 +
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hw/arm/iotkit.c | 114 ++++++-
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hw/arm/mps2-tz.c | 142 +++++++-
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hw/arm/mps2.c | 17 +-
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hw/arm/vexpress.c | 64 +++-
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hw/cpu/a15mpcore.c | 31 +-
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hw/display/bcm2835_fb.c | 218 ++++++++-----
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hw/intc/arm_gic.c | 2 +-
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hw/misc/bcm2835_property.c | 123 ++++---
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hw/misc/iotkit-secctl.c | 73 ++++-
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hw/misc/iotkit-sysctl.c | 261 +++++++++++++++
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hw/misc/iotkit-sysinfo.c | 128 ++++++++
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hw/misc/mps2-fpgaio.c | 146 ++++++++-
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hw/misc/tz-msc.c | 308 ++++++++++++++++++
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hw/ssi/pl022.c | 57 ++--
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hw/timer/cmsdk-apb-dualtimer.c | 515 +++++++++++++++++++++++++++++
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target/arm/arm-semi.c | 2 +-
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target/arm/helper.c | 342 +++++++++++++------
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target/arm/iwmmxt_helper.c | 234 ++++++-------
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target/arm/translate.c | 122 +++----
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MAINTAINERS | 10 +
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default-configs/arm-softmmu.mak | 4 +
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hw/misc/trace-events | 16 +
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hw/timer/trace-events | 5 +
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41 files changed, 3405 insertions(+), 718 deletions(-)
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create mode 100644 include/hw/misc/iotkit-sysctl.h
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create mode 100644 include/hw/misc/iotkit-sysinfo.h
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create mode 100644 include/hw/misc/tz-msc.h
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create mode 100644 include/hw/ssi/pl022.h
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create mode 100644 include/hw/timer/cmsdk-apb-dualtimer.h
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create mode 100644 hw/misc/iotkit-sysctl.c
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create mode 100644 hw/misc/iotkit-sysinfo.c
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create mode 100644 hw/misc/tz-msc.c
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create mode 100644 hw/timer/cmsdk-apb-dualtimer.c
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Richard Henderson (7):
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target/arm: Implement an IMPDEF pauth algorithm
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target/arm: Add cpu properties to control pauth
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target/arm: Use object_property_add_bool for "sve" property
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target/arm: Introduce PREDDESC field definitions
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target/arm: Update PFIRST, PNEXT for pred_desc
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target/arm: Update ZIP, UZP, TRN for pred_desc
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target/arm: Update REV, PUNPK for pred_desc
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Rémi Denis-Courmont (19):
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target/arm: remove redundant tests
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target/arm: add arm_is_el2_enabled() helper
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target/arm: use arm_is_el2_enabled() where applicable
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target/arm: use arm_hcr_el2_eff() where applicable
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target/arm: factor MDCR_EL2 common handling
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target/arm: Define isar_feature function to test for presence of SEL2
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target/arm: add 64-bit S-EL2 to EL exception table
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target/arm: add MMU stage 1 for Secure EL2
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target/arm: add ARMv8.4-SEL2 system registers
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target/arm: handle VMID change in secure state
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target/arm: do S1_ptw_translate() before address space lookup
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target/arm: translate NS bit in page-walks
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target/arm: generalize 2-stage page-walk condition
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target/arm: secure stage 2 translation regime
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target/arm: set HPFAR_EL2.NS on secure stage 2 faults
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target/arm: revector to run-time pick target EL
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target/arm: Implement SCR_EL2.EEL2
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target/arm: enable Secure EL2 in max CPU
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target/arm: refactor vae1_tlbmask()
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docs/conf.py | 46 ++++-
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docs/devel/conf.py | 15 --
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docs/index.html.in | 17 --
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docs/interop/conf.py | 28 ---
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docs/meson.build | 64 +++---
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docs/specs/conf.py | 16 --
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docs/system/arm/cpu-features.rst | 21 ++
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docs/system/conf.py | 28 ---
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docs/tools/conf.py | 37 ----
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docs/user/conf.py | 15 --
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include/qemu/xxhash.h | 98 +++++++++
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target/arm/cpu-param.h | 2 +-
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target/arm/cpu.h | 107 ++++++++--
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target/arm/internals.h | 45 +++++
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target/arm/cpu.c | 23 ++-
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target/arm/cpu64.c | 65 ++++--
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target/arm/helper-a64.c | 8 +-
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target/arm/helper.c | 414 ++++++++++++++++++++++++++-------------
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target/arm/m_helper.c | 2 +-
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target/arm/monitor.c | 1 +
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target/arm/op_helper.c | 4 +-
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target/arm/pauth_helper.c | 27 ++-
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target/arm/sve_helper.c | 33 ++--
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target/arm/tlb_helper.c | 3 +
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target/arm/translate-a64.c | 4 +
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target/arm/translate-sve.c | 31 ++-
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target/arm/translate.c | 36 +++-
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tests/qtest/arm-cpu-features.c | 13 ++
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tests/qtest/npcm7xx_adc-test.c | 1 +
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.gitlab-ci.yml | 4 +-
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30 files changed, 770 insertions(+), 438 deletions(-)
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delete mode 100644 docs/devel/conf.py
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delete mode 100644 docs/index.html.in
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delete mode 100644 docs/interop/conf.py
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delete mode 100644 docs/specs/conf.py
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delete mode 100644 docs/system/conf.py
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delete mode 100644 docs/tools/conf.py
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delete mode 100644 docs/user/conf.py
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