x86 queue, 2018-08-16

[Qemu-devel] [PULL 0/8] x86 queue, 2018-08-16

Posted by Eduardo Habkost 7 years, 2 months ago

The following changes since commit bb16c0412a572c2c9cd44496deb3ad430bc49c1a:

  Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20180816' into staging (2018-08-16 14:35:50 +0100)

are available in the Git repository at:

  git://github.com/ehabkost/qemu.git tags/x86-next-pull-request

for you to fetch changes up to 7210a02c58572b2686a3a8d610c6628f87864aed:

  i386: Disable TOPOEXT by default on "-cpu host" (2018-08-16 13:43:01 -0300)

----------------------------------------------------------------
x86 queue, 2018-08-16

Bug fix:
* Some guests may crash when using "-cpu host" due to TOPOEXT,
  disable it by default

Features:
* PV_SEND_IPI feature bit
* Icelake-{Server,Client} CPU models
* New CPUID feature bits: PV_SEND_IPI, WBNOINVD, PCONFIG, ARCH_CAPABILITIES

Documentation:
* docs/qemu-cpu-models.texi

----------------------------------------------------------------

Daniel P. Berrangé (1):
  docs: add guidance on configuring CPU models for x86

Eduardo Habkost (1):
  i386: Disable TOPOEXT by default on "-cpu host"

Robert Hoo (5):
  i386: Add new MSR indices for IA32_PRED_CMD and IA32_ARCH_CAPABILITIES
  i386: Add CPUID bit and feature words for IA32_ARCH_CAPABILITIES MSR
  i386: Add CPUID bit for PCONFIG
  i386: Add CPUID bit for WBNOINVD
  i386: Add new CPU model Icelake-{Server,Client}

Wanpeng Li (1):
  target-i386: adds PV_SEND_IPI CPUID feature bit

 docs/qemu-cpu-models.texi | 484 ++++++++++++++++++++++++++++++++++++++
 Makefile                  |   7 +-
 target/i386/cpu.h         |   6 +
 target/i386/cpu.c         | 130 +++++++++-
 MAINTAINERS               |   1 +
 qemu-doc.texi             |   6 +
 6 files changed, 629 insertions(+), 5 deletions(-)
 create mode 100644 docs/qemu-cpu-models.texi

-- 
2.18.0.rc1.1.g3f1ff2140

Re: [Qemu-devel] [PULL 0/8] x86 queue, 2018-08-16

Posted by Peter Maydell 7 years, 2 months ago

On 17 August 2018 at 02:33, Eduardo Habkost <ehabkost@redhat.com> wrote:
> The following changes since commit bb16c0412a572c2c9cd44496deb3ad430bc49c1a:
>
>   Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20180816' into staging (2018-08-16 14:35:50 +0100)
>
> are available in the Git repository at:
>
>   git://github.com/ehabkost/qemu.git tags/x86-next-pull-request
>
> for you to fetch changes up to 7210a02c58572b2686a3a8d610c6628f87864aed:
>
>   i386: Disable TOPOEXT by default on "-cpu host" (2018-08-16 13:43:01 -0300)
>
> ----------------------------------------------------------------
> x86 queue, 2018-08-16
>
> Bug fix:
> * Some guests may crash when using "-cpu host" due to TOPOEXT,
>   disable it by default
>
> Features:
> * PV_SEND_IPI feature bit
> * Icelake-{Server,Client} CPU models
> * New CPUID feature bits: PV_SEND_IPI, WBNOINVD, PCONFIG, ARCH_CAPABILITIES
>
> Documentation:
> * docs/qemu-cpu-models.texi

Applied, thanks.

-- PMM

Re: [Qemu-devel] [PULL 0/8] x86 queue, 2018-08-16

Posted by no-reply@patchew.org 7 years, 2 months ago

Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Message-id: 20180817013400.13353-1-ehabkost@redhat.com
Subject: [Qemu-devel] [PULL 0/8] x86 queue, 2018-08-16

=== TEST SCRIPT BEGIN ===
#!/bin/bash

BASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0

git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram

commits="$(git log --format=%H --reverse $BASE..)"
for c in $commits; do
    echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..."
    if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then
        failed=1
        echo
    fi
    n=$((n+1))
done

exit $failed
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
Switched to a new branch 'test'
e2494d9f93 i386: Disable TOPOEXT by default on "-cpu host"
b3fa832cb0 target-i386: adds PV_SEND_IPI CPUID feature bit
9c4a861193 i386: Add new CPU model Icelake-{Server, Client}
5c0a3ee54c i386: Add CPUID bit for WBNOINVD
82a1edf25b i386: Add CPUID bit for PCONFIG
d78f2e0834 i386: Add CPUID bit and feature words for IA32_ARCH_CAPABILITIES MSR
eb4ae4c37a i386: Add new MSR indices for IA32_PRED_CMD and IA32_ARCH_CAPABILITIES
8acd5d773a docs: add guidance on configuring CPU models for x86

=== OUTPUT BEGIN ===
Checking PATCH 1/8: docs: add guidance on configuring CPU models for x86...
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#82: 
new file mode 100644

total: 0 errors, 1 warnings, 546 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 2/8: i386: Add new MSR indices for IA32_PRED_CMD and IA32_ARCH_CAPABILITIES...
Checking PATCH 3/8: i386: Add CPUID bit and feature words for IA32_ARCH_CAPABILITIES MSR...
Checking PATCH 4/8: i386: Add CPUID bit for PCONFIG...
Checking PATCH 5/8: i386: Add CPUID bit for WBNOINVD...
ERROR: line over 90 characters
#36: FILE: target/i386/cpu.h:698:
+                                                                             do not invalidate cache */

total: 1 errors, 0 warnings, 16 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

Checking PATCH 6/8: i386: Add new CPU model Icelake-{Server, Client}...
Checking PATCH 7/8: target-i386: adds PV_SEND_IPI CPUID feature bit...
Checking PATCH 8/8: i386: Disable TOPOEXT by default on "-cpu host"...
=== OUTPUT END ===

Test command exited with code: 1


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