The base address determines a peripherals id, which identifies its
interrupt line, see NRF51 reference manual section 10 peripheral
interface. This little gem calculates the peripheral id based
on its base address.

Signed-off-by: Steffen Görtz <contrib@steffen-goertz.de>
---
 hw/arm/nrf51_soc.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c
index 9f9649c780..441d05e1ef 100644
--- a/hw/arm/nrf51_soc.c
+++ b/hw/arm/nrf51_soc.c
@@ -38,6 +38,9 @@
 #define NRF51822_FLASH_SIZE     (256 * 1024)
 #define NRF51822_SRAM_SIZE      (16 * 1024)
 
+/* IRQ lines can be derived from peripheral base addresses */
+#define BASE_TO_IRQ(base) (((base) >> 12) & 0x1F)
+
 static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp)
 {
     NRF51State *s = NRF51_SOC(dev_soc);
-- 
2.18.0

On 11 August 2018 at 10:08, Steffen Görtz <contrib@steffen-goertz.de> wrote:
> The base address determines a peripherals id, which identifies its
> interrupt line, see NRF51 reference manual section 10 peripheral
> interface. This little gem calculates the peripheral id based
> on its base address.
>
> Signed-off-by: Steffen Görtz <contrib@steffen-goertz.de>
> ---
>  hw/arm/nrf51_soc.c | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c
> index 9f9649c780..441d05e1ef 100644
> --- a/hw/arm/nrf51_soc.c
> +++ b/hw/arm/nrf51_soc.c
> @@ -38,6 +38,9 @@
>  #define NRF51822_FLASH_SIZE     (256 * 1024)
>  #define NRF51822_SRAM_SIZE      (16 * 1024)
>
> +/* IRQ lines can be derived from peripheral base addresses */
> +#define BASE_TO_IRQ(base) (((base) >> 12) & 0x1F)
> +

You could also have macros for getting the base address
from the peripheral ID and the IRQ line from the
peripheral ID, but this is fine too.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

thanks
-- PMM