[Qemu-devel] [PULL 0/6] target-arm queue
[PULL v2 00/11] target-arm queue
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A set of small bugfixes for arm for 3.0; the "migration was
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Massively slimmed down v2: MemTag broke bsd-user, and the npcm7xx
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broken" fixes for SMMUv3 and v7M NVIC with security extensions
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ethernet device failed 'make check' on big-endian hosts.
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are the most significant.
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3
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thanks
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-- PMM
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-- PMM
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The following changes since commit 6d9dd5fb9d0e9f4a174f53a0e20a39fbe809c71e:
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The following changes since commit 83339e21d05c824ebc9131d644f25c23d0e41ecf:
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Merge remote-tracking branch 'remotes/armbru/tags/pull-qobject-2018-07-27-v2' into staging (2018-07-30 09:55:47 +0100)
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Merge remote-tracking branch 'remotes/stefanha-gitlab/tags/block-pull-request' into staging (2021-02-10 15:42:20 +0000)
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are available in the Git repository at:
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are available in the Git repository at:
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git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20180730
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https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210211-1
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for you to fetch changes up to 0261fb805c00a6f97d143235e7b06b0906bdf898:
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for you to fetch changes up to d3c1183ffeb71ca3a783eae3d7e1c51e71e8a621:
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target/arm: Remove duplicate 'host' entry in '-cpu ?' output (2018-07-30 15:07:08 +0100)
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target/arm: Correctly initialize MDCR_EL2.HPMN (2021-02-11 19:48:09 +0000)
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----------------------------------------------------------------
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----------------------------------------------------------------
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target-arm queue:
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target-arm queue:
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* arm/smmuv3: Fix broken VM state migration
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* Correctly initialize MDCR_EL2.HPMN
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* armv7m_nvic: Fix broken VM state migration
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* versal: Use nr_apu_cpus in favor of hard coding 2
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* hw/arm/sysbus-fdt: Fix assertion in copy_properties_from_host()
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* accel/tcg: Add URL of clang bug to comment about our workaround
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* hw/arm/iotkit: Fix IRQ number for timer1
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* Add support for FEAT_DIT, Data Independent Timing
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* hw/misc/tz-mpc: Zero the LUT on initialization, not just reset
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* Remove GPIO from unimplemented NPCM7XX
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* target/arm: Remove duplicate 'host' entry in '-cpu ?' output
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* Fix SCR RES1 handling
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* Don't migrate CPUARMState.features
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----------------------------------------------------------------
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----------------------------------------------------------------
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Dr. David Alan Gilbert (1):
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Aaron Lindsay (1):
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arm/smmuv3: Fix missing VMSD terminator
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target/arm: Don't migrate CPUARMState.features
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Geert Uytterhoeven (1):
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Daniel Müller (1):
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hw/arm/sysbus-fdt: Fix assertion in copy_properties_from_host()
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target/arm: Correctly initialize MDCR_EL2.HPMN
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Peter Maydell (3):
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Edgar E. Iglesias (1):
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armv7m_nvic: Fix m-security subsection name
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hw/arm: versal: Use nr_apu_cpus in favor of hard coding 2
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hw/arm/iotkit: Fix IRQ number for timer1
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hw/misc/tz-mpc: Zero the LUT on initialization, not just reset
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Philippe Mathieu-Daudé (1):
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Hao Wu (1):
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target/arm: Remove duplicate 'host' entry in '-cpu ?' output
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hw/arm: Remove GPIO from unimplemented NPCM7XX
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hw/arm/iotkit.c | 2 +-
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Mike Nawrocki (1):
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hw/arm/smmuv3.c | 1 +
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target/arm: Fix SCR RES1 handling
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hw/arm/sysbus-fdt.c | 1 +
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hw/intc/armv7m_nvic.c | 2 +-
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hw/misc/tz-mpc.c | 2 +-
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target/arm/helper.c | 6 ------
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6 files changed, 5 insertions(+), 9 deletions(-)
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Peter Maydell (2):
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arm: Update infocenter.arm.com URLs
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accel/tcg: Add URL of clang bug to comment about our workaround
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Rebecca Cran (4):
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target/arm: Add support for FEAT_DIT, Data Independent Timing
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target/arm: Support AA32 DIT by moving PSTATE_SS from cpsr into env->pstate
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target/arm: Set ID_AA64PFR0.DIT and ID_PFR0.DIT to 1 for "max" AA64 CPU
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target/arm: Set ID_PFR0.DIT to 1 for "max" 32-bit CPU
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include/hw/dma/pl080.h | 7 ++--
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include/hw/misc/arm_integrator_debug.h | 2 +-
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include/hw/ssi/pl022.h | 5 ++-
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target/arm/cpu.h | 17 ++++++++
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target/arm/internals.h | 6 +++
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accel/tcg/cpu-exec.c | 25 +++++++++---
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hw/arm/aspeed_ast2600.c | 2 +-
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hw/arm/musca.c | 4 +-
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hw/arm/npcm7xx.c | 8 ----
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hw/arm/xlnx-versal.c | 4 +-
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hw/misc/arm_integrator_debug.c | 2 +-
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hw/timer/arm_timer.c | 7 ++--
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target/arm/cpu.c | 4 ++
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target/arm/cpu64.c | 5 +++
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target/arm/helper-a64.c | 27 +++++++++++--
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target/arm/helper.c | 71 +++++++++++++++++++++++++++-------
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target/arm/machine.c | 2 +-
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target/arm/op_helper.c | 9 +----
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target/arm/translate-a64.c | 12 ++++++
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19 files changed, 164 insertions(+), 55 deletions(-)
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diff view generated by jsdifflib
[Qemu-devel] [PULL 1/6] arm/smmuv3: Fix missing VMSD terminator
Deleted patch
1
From: "Dr. David Alan Gilbert" <dgilbert@redhat.com>
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1
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The 'vmstate_smmuv3_queue' is missing the end-of-list marker.
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Fixes: 10a83cb9887
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Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
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Message-id: 20180727135406.15132-1-dgilbert@redhat.com
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Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
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[PMM: dropped stray blank line]
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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---
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hw/arm/smmuv3.c | 1 +
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1 file changed, 1 insertion(+)
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diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
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index XXXXXXX..XXXXXXX 100644
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--- a/hw/arm/smmuv3.c
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+++ b/hw/arm/smmuv3.c
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@@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_smmuv3_queue = {
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VMSTATE_UINT32(prod, SMMUQueue),
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VMSTATE_UINT32(cons, SMMUQueue),
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VMSTATE_UINT8(log2size, SMMUQueue),
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+ VMSTATE_END_OF_LIST(),
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},
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};
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--
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2.17.1
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diff view generated by jsdifflib
[Qemu-devel] [PULL 2/6] hw/arm/sysbus-fdt: Fix assertion in copy_properties_from_host()
Deleted patch
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From: Geert Uytterhoeven <geert+renesas@glider.be>
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1
3
When copy_properties_from_host() ignores the error for an optional
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property, it frees the error, but fails to reset it.
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Hence if two or more optional properties are missing, an assertion is
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triggered:
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util/error.c:57: error_setv: Assertion `*errp == NULL' failed.
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Fis this by resetting err to NULL after ignoring the error.
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Fixes: 9481cf2e5f2f2bb6 ("hw/arm/sysbus-fdt: helpers for clock node generation")
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Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Message-id: 20180725113000.11014-1-geert+renesas@glider.be
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Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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---
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hw/arm/sysbus-fdt.c | 1 +
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1 file changed, 1 insertion(+)
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diff --git a/hw/arm/sysbus-fdt.c b/hw/arm/sysbus-fdt.c
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index XXXXXXX..XXXXXXX 100644
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--- a/hw/arm/sysbus-fdt.c
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+++ b/hw/arm/sysbus-fdt.c
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@@ -XXX,XX +XXX,XX @@ static void copy_properties_from_host(HostProperty *props, int nb_props,
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/* mandatory property not found: bail out */
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exit(1);
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}
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+ err = NULL;
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}
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}
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}
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--
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2.17.1
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37
diff view generated by jsdifflib
[Qemu-devel] [PULL 3/6] armv7m_nvic: Fix m-security subsection name
Deleted patch
1
The vmstate save/load code insists that subsections of a VMState must
2
have names which include their parent VMState's name as a leading
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substring. Unfortunately it neither documents this nor checks it on
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device init or state save, but instead fails state load with a
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confusing error message ("Missing section footer for armv7m_nvic").
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1
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Fix the name of the m-security subsection of the NVIC, so that
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state save/load works correctly for the security-enabled NVIC.
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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Message-id: 20180727113854.20283-2-peter.maydell@linaro.org
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---
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hw/intc/armv7m_nvic.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c
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index XXXXXXX..XXXXXXX 100644
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--- a/hw/intc/armv7m_nvic.c
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+++ b/hw/intc/armv7m_nvic.c
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@@ -XXX,XX +XXX,XX @@ static int nvic_security_post_load(void *opaque, int version_id)
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}
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static const VMStateDescription vmstate_nvic_security = {
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- .name = "nvic/m-security",
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+ .name = "armv7m_nvic/m-security",
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.version_id = 1,
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.minimum_version_id = 1,
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.needed = nvic_security_needed,
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--
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2.17.1
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diff view generated by jsdifflib
[Qemu-devel] [PULL 4/6] hw/arm/iotkit: Fix IRQ number for timer1
Deleted patch
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A cut-and-paste error meant we were incorrectly wiring up the timer1
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IRQ to IRQ3. IRQ3 is the interrupt for timer0 -- move timer0 to
3
IRQ4 where it belongs.
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1
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
7
Message-id: 20180727113854.20283-3-peter.maydell@linaro.org
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---
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hw/arm/iotkit.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/hw/arm/iotkit.c b/hw/arm/iotkit.c
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index XXXXXXX..XXXXXXX 100644
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--- a/hw/arm/iotkit.c
15
+++ b/hw/arm/iotkit.c
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@@ -XXX,XX +XXX,XX @@ static void iotkit_realize(DeviceState *dev, Error **errp)
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return;
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}
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->timer1), 0,
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- qdev_get_gpio_in(DEVICE(&s->armv7m), 3));
21
+ qdev_get_gpio_in(DEVICE(&s->armv7m), 4));
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mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->timer1), 0);
23
object_property_set_link(OBJECT(&s->apb_ppc0), OBJECT(mr), "port[1]", &err);
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if (err) {
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--
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2.17.1
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diff view generated by jsdifflib
[Qemu-devel] [PULL 5/6] hw/misc/tz-mpc: Zero the LUT on initialization, not just reset
Deleted patch
1
In the tz-mpc device we allocate a data block for the LUT,
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which we then clear to zero in the device's reset method.
3
This is conceptually fine, but unfortunately results in a
4
valgrind complaint about use of uninitialized data on startup:
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1
6
==30906== Conditional jump or move depends on uninitialised value(s)
7
==30906== at 0x503609: tz_mpc_translate (tz-mpc.c:439)
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==30906== by 0x3F3D90: address_space_translate_iommu (exec.c:511)
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==30906== by 0x3F3FF8: flatview_do_translate (exec.c:584)
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==30906== by 0x3F4292: flatview_translate (exec.c:644)
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==30906== by 0x3F2120: address_space_translate (memory.h:1962)
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==30906== by 0x3FB753: address_space_ldl_internal (memory_ldst.inc.c:36)
13
==30906== by 0x3FB8A6: address_space_ldl (memory_ldst.inc.c:80)
14
==30906== by 0x619037: ldl_phys (memory_ldst_phys.inc.h:25)
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==30906== by 0x61985D: arm_cpu_reset (cpu.c:255)
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==30906== by 0x98791B: cpu_reset (cpu.c:249)
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==30906== by 0x57FFDB: armv7m_reset (armv7m.c:265)
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==30906== by 0x7B1775: qemu_devices_reset (reset.c:69)
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This is because of a reset ordering problem -- the TZ MPC
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resets after the CPU, but an M-profile CPU's reset function
22
includes memory loads to get the initial PC and SP, which
23
then go through an MPC that hasn't yet been reset.
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25
The simplest fix for this is to zero the LUT when we
26
initialize the data, which will result in the MPC's
27
translate function giving the right answers for these
28
early memory accesses.
29
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Reported-by: Thomas Huth <thuth@redhat.com>
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Tested-by: Thomas Huth <thuth@redhat.com>
33
Message-id: 20180724153616.32352-1-peter.maydell@linaro.org
34
---
35
hw/misc/tz-mpc.c | 2 +-
36
1 file changed, 1 insertion(+), 1 deletion(-)
37
38
diff --git a/hw/misc/tz-mpc.c b/hw/misc/tz-mpc.c
39
index XXXXXXX..XXXXXXX 100644
40
--- a/hw/misc/tz-mpc.c
41
+++ b/hw/misc/tz-mpc.c
42
@@ -XXX,XX +XXX,XX @@ static void tz_mpc_realize(DeviceState *dev, Error **errp)
43
address_space_init(&s->blocked_io_as, &s->blocked_io,
44
"tz-mpc-blocked-io");
45
46
- s->blk_lut = g_new(uint32_t, s->blk_max);
47
+ s->blk_lut = g_new0(uint32_t, s->blk_max);
48
}
49
50
static int tz_mpc_post_load(void *opaque, int version_id)
51
--
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2.17.1
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diff view generated by jsdifflib
[Qemu-devel] [PULL 6/6] target/arm: Remove duplicate 'host' entry in '-cpu ?' output
Deleted patch
1
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
2
1
3
Since 86f0a186d6f the TYPE_ARM_HOST_CPU is only compiled when CONFIG_KVM
4
is enabled.
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6
Remove the now redundant special-case introduced in a96c0514ab7, to avoid:
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8
$ qemu-system-aarch64 -machine virt -cpu \? | fgrep host
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host
10
host (only available in KVM mode)
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Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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Message-id: 20180727132311.2777-1-f4bug@amsat.org
14
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
16
---
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target/arm/helper.c | 6 ------
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1 file changed, 6 deletions(-)
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diff --git a/target/arm/helper.c b/target/arm/helper.c
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index XXXXXXX..XXXXXXX 100644
22
--- a/target/arm/helper.c
23
+++ b/target/arm/helper.c
24
@@ -XXX,XX +XXX,XX @@ void arm_cpu_list(FILE *f, fprintf_function cpu_fprintf)
25
(*cpu_fprintf)(f, "Available CPUs:\n");
26
g_slist_foreach(list, arm_cpu_list_entry, &s);
27
g_slist_free(list);
28
-#ifdef CONFIG_KVM
29
- /* The 'host' CPU type is dynamically registered only if KVM is
30
- * enabled, so we have to special-case it here:
31
- */
32
- (*cpu_fprintf)(f, " host (only available in KVM mode)\n");
33
-#endif
34
}
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36
static void arm_cpu_add_definition(gpointer data, gpointer user_data)
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--
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2.17.1
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diff view generated by jsdifflib

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