[Qemu-devel] [PATCH v3 0/5] refactor float-to-float and fix AHP

Alex Bennée posted 5 patches 7 years, 5 months ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20180510094206.15354-1-alex.bennee@linaro.org
Test checkpatch passed
Test docker-mingw@fedora passed
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fpu/softfloat-specialize.h |  40 ---
fpu/softfloat.c            | 546 +++++++++++--------------------------
include/fpu/softfloat.h    |   8 +-
target/arm/helper.c        |  66 ++---
target/arm/helper.h        |  12 +-
target/arm/translate-a64.c |  38 ++-
target/arm/translate.c     |  70 +++--
target/arm/translate.h     |  15 +
8 files changed, 306 insertions(+), 489 deletions(-)
[Qemu-devel] [PATCH v3 0/5] refactor float-to-float and fix AHP
Posted by Alex Bennée 7 years, 5 months ago
Hi,

Hi,

I've not included the test case in the series but you can find it in
my TCG fixup branch:

  https://github.com/stsquad/qemu/blob/testing/tcg-tests-revival-v4/tests/tcg/arm/fcvt.c

Some of the ARMv7 versions are commented out as they where not
supported until later revs. I do have a build that includes that but
unfortunately the Debian compiler it too old to build it.

: patch 0001/fpu softfloat int_to_float ensure r fully initial.patch needs review
: patch 0004/target arm convert conversion helpers to fpst ahp.patch needs review
: patch 0005/target arm squash FZ16 behaviour for conversions.patch needs review

Alex Bennée (5):
  fpu/softfloat: int_to_float ensure r fully initialised
  fpu/softfloat: re-factor float to float conversions
  fpu/softfloat: support ARM Alternative half-precision
  target/arm: convert conversion helpers to fpst/ahp_flag
  target/arm: squash FZ16 behaviour for conversions

 fpu/softfloat-specialize.h |  40 ---
 fpu/softfloat.c            | 546 +++++++++++--------------------------
 include/fpu/softfloat.h    |   8 +-
 target/arm/helper.c        |  66 ++---
 target/arm/helper.h        |  12 +-
 target/arm/translate-a64.c |  38 ++-
 target/arm/translate.c     |  70 +++--
 target/arm/translate.h     |  15 +
 8 files changed, 306 insertions(+), 489 deletions(-)

-- 
2.17.0


Re: [Qemu-devel] [PATCH v3 0/5] refactor float-to-float and fix AHP
Posted by Peter Maydell 7 years, 5 months ago
On 10 May 2018 at 10:42, Alex Bennée <alex.bennee@linaro.org> wrote:
> Hi,
>
> Hi,
>
> I've not included the test case in the series but you can find it in
> my TCG fixup branch:
>
>   https://github.com/stsquad/qemu/blob/testing/tcg-tests-revival-v4/tests/tcg/arm/fcvt.c
>
> Some of the ARMv7 versions are commented out as they where not
> supported until later revs. I do have a build that includes that but
> unfortunately the Debian compiler it too old to build it.
>
> : patch 0001/fpu softfloat int_to_float ensure r fully initial.patch needs review
> : patch 0004/target arm convert conversion helpers to fpst ahp.patch needs review
> : patch 0005/target arm squash FZ16 behaviour for conversions.patch needs review

This still seems to regress the NaN conversion case I mentioned
in review of the previous series:

(3) Here's a NaN case we get wrong now: 64 to IEEE-16 conversion,
input is 0x7ff0000000000001 (an SNaN), we produce
0x7c00 (infinity) but should produce 0x7e00 (a QNaN).

thanks
-- PMM

Re: [Qemu-devel] [PATCH v3 0/5] refactor float-to-float and fix AHP
Posted by Alex Bennée 7 years, 5 months ago
Peter Maydell <peter.maydell@linaro.org> writes:

> On 10 May 2018 at 10:42, Alex Bennée <alex.bennee@linaro.org> wrote:
>> Hi,
>>
>> Hi,
>>
>> I've not included the test case in the series but you can find it in
>> my TCG fixup branch:
>>
>>   https://github.com/stsquad/qemu/blob/testing/tcg-tests-revival-v4/tests/tcg/arm/fcvt.c
>>
>> Some of the ARMv7 versions are commented out as they where not
>> supported until later revs. I do have a build that includes that but
>> unfortunately the Debian compiler it too old to build it.
>>
>> : patch 0001/fpu softfloat int_to_float ensure r fully initial.patch needs review
>> : patch 0004/target arm convert conversion helpers to fpst ahp.patch needs review
>> : patch 0005/target arm squash FZ16 behaviour for conversions.patch needs review
>
> This still seems to regress the NaN conversion case I mentioned
> in review of the previous series:
>
> (3) Here's a NaN case we get wrong now: 64 to IEEE-16 conversion,
> input is 0x7ff0000000000001 (an SNaN), we produce
> 0x7c00 (infinity) but should produce 0x7e00 (a QNaN).

Hmm I had added the test case but due to another bug it never actually
ran :-/

>
> thanks
> -- PMM


--
Alex Bennée