Reflect that the PC/AT implementation is used.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
include/hw/dma/i8257.h | 17 +++++++++++++++--
hw/i386/pc.c | 2 +-
hw/mips/mips_fulong2e.c | 2 +-
hw/mips/mips_jazz.c | 2 +-
hw/mips/mips_malta.c | 2 +-
5 files changed, 19 insertions(+), 6 deletions(-)
diff --git a/include/hw/dma/i8257.h b/include/hw/dma/i8257.h
index 986319e4e3..15db8b4d29 100644
--- a/include/hw/dma/i8257.h
+++ b/include/hw/dma/i8257.h
@@ -47,9 +47,22 @@ typedef struct I8257State {
} I8257State;
void i8257_dma_init_cascaded(ISABus *bus, bool high_page_enable);
-static inline void i8257_dma_init(ISABus *bus, bool high_page_enable)
+
+/**
+ * i8257_dma_init_pc_at: Install 8 DMA channels on the ISA bus.
+ *
+ * This is the PC/AT DMA implementation:
+ *
+ * Two i8257 controllers are created.
+ * The primary controller register channels [0..3] on the bus,
+ * the secondary controller (slave) is cascaded on the primary (master),
+ * registering channels [4..7].
+ *
+ * @bus: the #ISABus against which these are created.
+ */
+static inline void i8257_dma_init_pc_at(ISABus *bus)
{
- i8257_dma_init_cascaded(bus, high_page_enable);
+ i8257_dma_init_cascaded(bus, false);
}
#endif
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index d36bac8c89..baba079d7f 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1624,7 +1624,7 @@ void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
pcspk_init(isa_bus, pit);
}
- i8257_dma_init(isa_bus, 0);
+ i8257_dma_init_pc_at(isa_bus);
/* Super I/O */
pc_superio_init(isa_bus, create_fdctrl, no_vmport);
diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c
index 02fb2fdcc4..8168e6cf16 100644
--- a/hw/mips/mips_fulong2e.c
+++ b/hw/mips/mips_fulong2e.c
@@ -243,7 +243,7 @@ static void vt82c686b_southbridge_init(PCIBus *pci_bus, int slot, qemu_irq intc,
isa_bus_irqs(isa_bus, i8259);
/* init other devices */
i8254_pit_init(isa_bus, 0x40, 0, NULL);
- i8257_dma_init(isa_bus, 0);
+ i8257_dma_init_pc_at(isa_bus);
/* Super I/O */
isa_create_simple(isa_bus, TYPE_VT82C686B_SUPERIO);
diff --git a/hw/mips/mips_jazz.c b/hw/mips/mips_jazz.c
index 7223085547..2577e8383d 100644
--- a/hw/mips/mips_jazz.c
+++ b/hw/mips/mips_jazz.c
@@ -222,7 +222,7 @@ static void mips_jazz_init(MachineState *machine,
/* ISA devices */
i8259 = i8259_init(isa_bus, env->irq[4]);
isa_bus_irqs(isa_bus, i8259);
- i8257_dma_init(isa_bus, 0);
+ i8257_dma_init_pc_at(isa_bus);
pit = i8254_pit_init(isa_bus, 0x40, 0, NULL);
pcspk_init(isa_bus, pit);
diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
index f6513a4fd5..9d0409bc36 100644
--- a/hw/mips/mips_malta.c
+++ b/hw/mips/mips_malta.c
@@ -1198,7 +1198,7 @@ void mips_malta_init(MachineState *machine)
smbus = piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100,
isa_get_irq(NULL, 9), NULL, 0, NULL);
pit = i8254_pit_init(isa_bus, 0x40, 0, NULL);
- i8257_dma_init(isa_bus, 0);
+ i8257_dma_init_pc_at(isa_bus);
mc146818_rtc_init(isa_bus, 2000, NULL);
/* generate SPD EEPROM data */
--
2.16.3
On 26/03/2018 18:34, Philippe Mathieu-Daudé wrote:
> Reflect that the PC/AT implementation is used.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> include/hw/dma/i8257.h | 17 +++++++++++++++--
> hw/i386/pc.c | 2 +-
> hw/mips/mips_fulong2e.c | 2 +-
> hw/mips/mips_jazz.c | 2 +-
> hw/mips/mips_malta.c | 2 +-
> 5 files changed, 19 insertions(+), 6 deletions(-)
>
> diff --git a/include/hw/dma/i8257.h b/include/hw/dma/i8257.h
> index 986319e4e3..15db8b4d29 100644
> --- a/include/hw/dma/i8257.h
> +++ b/include/hw/dma/i8257.h
> @@ -47,9 +47,22 @@ typedef struct I8257State {
> } I8257State;
>
> void i8257_dma_init_cascaded(ISABus *bus, bool high_page_enable);
> -static inline void i8257_dma_init(ISABus *bus, bool high_page_enable)
> +
> +/**
> + * i8257_dma_init_pc_at: Install 8 DMA channels on the ISA bus.
> + *
> + * This is the PC/AT DMA implementation:
> + *
> + * Two i8257 controllers are created.
> + * The primary controller register channels [0..3] on the bus,
> + * the secondary controller (slave) is cascaded on the primary (master),
> + * registering channels [4..7].
> + *
> + * @bus: the #ISABus against which these are created.
> + */
> +static inline void i8257_dma_init_pc_at(ISABus *bus)
> {
> - i8257_dma_init_cascaded(bus, high_page_enable);
> + i8257_dma_init_cascaded(bus, false);
> }
>
> #endif
> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> index d36bac8c89..baba079d7f 100644
> --- a/hw/i386/pc.c
> +++ b/hw/i386/pc.c
> @@ -1624,7 +1624,7 @@ void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
> pcspk_init(isa_bus, pit);
> }
>
> - i8257_dma_init(isa_bus, 0);
> + i8257_dma_init_pc_at(isa_bus);
>
> /* Super I/O */
> pc_superio_init(isa_bus, create_fdctrl, no_vmport);
> diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c
> index 02fb2fdcc4..8168e6cf16 100644
> --- a/hw/mips/mips_fulong2e.c
> +++ b/hw/mips/mips_fulong2e.c
> @@ -243,7 +243,7 @@ static void vt82c686b_southbridge_init(PCIBus *pci_bus, int slot, qemu_irq intc,
> isa_bus_irqs(isa_bus, i8259);
> /* init other devices */
> i8254_pit_init(isa_bus, 0x40, 0, NULL);
> - i8257_dma_init(isa_bus, 0);
> + i8257_dma_init_pc_at(isa_bus);
> /* Super I/O */
> isa_create_simple(isa_bus, TYPE_VT82C686B_SUPERIO);
>
> diff --git a/hw/mips/mips_jazz.c b/hw/mips/mips_jazz.c
> index 7223085547..2577e8383d 100644
> --- a/hw/mips/mips_jazz.c
> +++ b/hw/mips/mips_jazz.c
> @@ -222,7 +222,7 @@ static void mips_jazz_init(MachineState *machine,
> /* ISA devices */
> i8259 = i8259_init(isa_bus, env->irq[4]);
> isa_bus_irqs(isa_bus, i8259);
> - i8257_dma_init(isa_bus, 0);
> + i8257_dma_init_pc_at(isa_bus);
> pit = i8254_pit_init(isa_bus, 0x40, 0, NULL);
> pcspk_init(isa_bus, pit);
>
> diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
> index f6513a4fd5..9d0409bc36 100644
> --- a/hw/mips/mips_malta.c
> +++ b/hw/mips/mips_malta.c
> @@ -1198,7 +1198,7 @@ void mips_malta_init(MachineState *machine)
> smbus = piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100,
> isa_get_irq(NULL, 9), NULL, 0, NULL);
> pit = i8254_pit_init(isa_bus, 0x40, 0, NULL);
> - i8257_dma_init(isa_bus, 0);
> + i8257_dma_init_pc_at(isa_bus);
> mc146818_rtc_init(isa_bus, 2000, NULL);
>
> /* generate SPD EEPROM data */
>
Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
Thanks,
Marcel
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