The following changes since commit 6eeea6725a70e6fcb5abba0764496bdab07ddfb3:

Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2020-10-06' into staging (2020-10-06 21:13:34 +0100)

https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20201008

for you to fetch changes up to ba118c26e16a97e6ff6de8184057d3420ce16a23:

target/arm: Make '-cpu max' have a 48-bit PA (2020-10-08 15:24:32 +0100)

* hw/ssi/npcm7xx_fiu: Fix handling of unsigned integer

* hw/arm/fsl-imx25: Fix a typo

* hw/arm/sbsa-ref : Fix SMMUv3 Initialisation

* hw/arm/sbsa-ref : allocate IRQs for SMMUv3

* hw/char/bcm2835_aux: Allow less than 32-bit accesses

* hw/arm/virt: Implement kvm-steal-time

* target/arm: Make '-cpu max' have a 48-bit PA

Andrew Jones (6):

linux headers: sync to 5.9-rc7

target/arm/kvm: Make uncalled stubs explicitly unreachable

hw/arm/virt: Move post cpu realize check into its own function

hw/arm/virt: Move kvm pmu setup to virt_cpu_post_init

tests/qtest: Restore aarch64 arm-cpu-features test

hw/arm/virt: Implement kvm-steal-time

Graeme Gregory (2):

hw/arm/sbsa-ref : Fix SMMUv3 Initialisation

hw/arm/sbsa-ref : allocate IRQs for SMMUv3

Peter Maydell (1):

target/arm: Make '-cpu max' have a 48-bit PA

Philippe Mathieu-Daudé (3):

hw/ssi/npcm7xx_fiu: Fix handling of unsigned integer

hw/arm/fsl-imx25: Fix a typo

hw/char/bcm2835_aux: Allow less than 32-bit accesses

docs/system/arm/cpu-features.rst | 11 ++++

include/hw/arm/fsl-imx25.h | 2 +-

include/hw/arm/virt.h | 5 ++

linux-headers/linux/kvm.h | 6 ++-

target/arm/cpu.h | 4 ++

target/arm/kvm_arm.h | 94 ++++++++++++++++++++++++++-------

hw/arm/sbsa-ref.c | 3 +-

hw/arm/virt.c | 110 ++++++++++++++++++++++++++++-----------

hw/char/bcm2835_aux.c | 4 +-

hw/ssi/npcm7xx_fiu.c | 12 ++---

target/arm/cpu.c | 8 +++

target/arm/cpu64.c | 4 ++

target/arm/kvm.c | 16 ++++++

target/arm/kvm64.c | 64 +++++++++++++++++++++--

target/arm/monitor.c | 2 +-

tests/qtest/arm-cpu-features.c | 25 +++++++--

hw/ssi/trace-events | 2 +-

tests/qtest/meson.build | 3 +-

18 files changed, 303 insertions(+), 72 deletions(-)

From: Philippe Mathieu-Daudé <f4bug@amsat.org>

hw/ssi/npcm7xx_fiu.c | 12 ++++++------

hw/ssi/trace-events | 2 +-

2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/hw/ssi/npcm7xx_fiu.c b/hw/ssi/npcm7xx_fiu.c

--- a/hw/ssi/npcm7xx_fiu.c

+++ b/hw/ssi/npcm7xx_fiu.c

@@ -XXX,XX +XXX,XX @@ enum NPCM7xxFIURegister {

* Returns the index of flash in the fiu->flash array. This corresponds to the

* chip select ID of the flash.

*/

-static int npcm7xx_fiu_cs_index(NPCM7xxFIUState *fiu, NPCM7xxFIUFlash *flash)

+static unsigned npcm7xx_fiu_cs_index(NPCM7xxFIUState *fiu,

+ NPCM7xxFIUFlash *flash)

{

int index = flash - fiu->flash;

@@ -XXX,XX +XXX,XX @@ static int npcm7xx_fiu_cs_index(NPCM7xxFIUState *fiu, NPCM7xxFIUFlash *flash)

}

/* Assert the chip select specified in the UMA Control/Status Register. */

-static void npcm7xx_fiu_select(NPCM7xxFIUState *s, int cs_id)

+static void npcm7xx_fiu_select(NPCM7xxFIUState *s, unsigned cs_id)

{

trace_npcm7xx_fiu_select(DEVICE(s)->canonical_path, cs_id);

if (cs_id < s->cs_count) {

qemu_irq_lower(s->cs_lines[cs_id]);

+ s->active_cs = cs_id;

} else {

qemu_log_mask(LOG_GUEST_ERROR,

"%s: UMA to CS%d; this module has only %d chip selects",

DEVICE(s)->canonical_path, cs_id, s->cs_count);

- cs_id = -1;

+ s->active_cs = -1;

}

-

- s->active_cs = cs_id;

}

/* Deassert the currently active chip select. */

@@ -XXX,XX +XXX,XX @@ static void npcm7xx_fiu_flash_write(void *opaque, hwaddr addr, uint64_t v,

NPCM7xxFIUFlash *f = opaque;

NPCM7xxFIUState *fiu = f->fiu;

uint32_t dwr_cfg;

- int cs_id;

+ unsigned cs_id;

int i;

if (fiu->active_cs != -1) {

diff --git a/hw/ssi/trace-events b/hw/ssi/trace-events

index XXXXXXX..XXXXXXX 100644

--- a/hw/ssi/trace-events

+++ b/hw/ssi/trace-events

@@ -XXX,XX +XXX,XX @@ npcm7xx_fiu_deselect(const char *id, int cs) "%s deselect CS%d"

npcm7xx_fiu_ctrl_read(const char *id, uint64_t addr, uint32_t data) "%s offset: 0x%04" PRIx64 " value: 0x%08" PRIx32

npcm7xx_fiu_ctrl_write(const char *id, uint64_t addr, uint32_t data) "%s offset: 0x%04" PRIx64 " value: 0x%08" PRIx32

npcm7xx_fiu_flash_read(const char *id, int cs, uint64_t addr, unsigned int size, uint64_t value) "%s[%d] offset: 0x%08" PRIx64 " size: %u value: 0x%" PRIx64

-npcm7xx_fiu_flash_write(const char *id, int cs, uint64_t addr, unsigned int size, uint64_t value) "%s[%d] offset: 0x%08" PRIx64 " size: %u value: 0x%" PRIx64

+npcm7xx_fiu_flash_write(const char *id, unsigned cs, uint64_t addr, unsigned int size, uint64_t value) "%s[%d] offset: 0x%08" PRIx64 " size: %u value: 0x%" PRIx64

2.20.1

From: Philippe Mathieu-Daudé <f4bug@amsat.org>

include/hw/arm/fsl-imx25.h | 2 +-

diff --git a/include/hw/arm/fsl-imx25.h b/include/hw/arm/fsl-imx25.h

--- a/include/hw/arm/fsl-imx25.h

+++ b/include/hw/arm/fsl-imx25.h

@@ -XXX,XX +XXX,XX @@ struct FslIMX25State {

* 0xBB00_0000 0xBB00_0FFF 4 Kbytes NAND flash main area buffer

* 0xBB00_1000 0xBB00_11FF 512 B NAND flash spare area buffer

* 0xBB00_1200 0xBB00_1DFF 3 Kbytes Reserved

- * 0xBB00_1E00 0xBB00_1FFF 512 B NAND flash control regisers

+ * 0xBB00_1E00 0xBB00_1FFF 512 B NAND flash control registers

* 0xBB01_2000 0xBFFF_FFFF 96 Mbytes (minus 8 Kbytes) Reserved

* 0xC000_0000 0xFFFF_FFFF 1024 Mbytes Reserved

*/

2.20.1

From: Graeme Gregory <graeme@nuviainc.com>

SMMUv3 has an error in a previous patch where an i was transposed to a 1

meaning interrupts would not have been correctly assigned to the SMMUv3

instance.

Fixes: 48ba18e6d3f3 ("hw/arm/sbsa-ref: Simplify by moving the gic in the machine state")

Signed-off-by: Graeme Gregory <graeme@nuviainc.com>

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Reviewed-by: Eric Auger <eric.auger@redhat.com>

Message-id: 20201007100732.4103790-2-graeme@nuviainc.com

hw/arm/sbsa-ref.c | 2 +-

1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c

--- a/hw/arm/sbsa-ref.c

+++ b/hw/arm/sbsa-ref.c

@@ -XXX,XX +XXX,XX @@ static void create_smmu(const SBSAMachineState *sms, PCIBus *bus)

sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);

for (i = 0; i < NUM_SMMU_IRQS; i++) {

sysbus_connect_irq(SYS_BUS_DEVICE(dev), i,

- qdev_get_gpio_in(sms->gic, irq + 1));

+ qdev_get_gpio_in(sms->gic, irq + i));

}

2.20.1

From: Graeme Gregory <graeme@nuviainc.com>

Original commit did not allocate IRQs for the SMMUv3 in the irqmap

effectively using irq 0->3 (shared with other devices). Assuming

original intent was to allocate unique IRQs then add an allocation

to the irqmap.

Fixes: e9fdf453240 ("hw/arm: Add arm SBSA reference machine, devices part")

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Signed-off-by: Graeme Gregory <graeme@nuviainc.com>

Reviewed-by: Eric Auger <eric.auger@redhat.com>

Message-id: 20201007100732.4103790-3-graeme@nuviainc.com

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

---

hw/arm/sbsa-ref.c | 1 +

1 file changed, 1 insertion(+)

diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c

--- a/hw/arm/sbsa-ref.c

+++ b/hw/arm/sbsa-ref.c

@@ -XXX,XX +XXX,XX @@ static const int sbsa_ref_irqmap[] = {

[SBSA_SECURE_UART_MM] = 9,

[SBSA_AHCI] = 10,

[SBSA_EHCI] = 11,

+ [SBSA_SMMU] = 12, /* ... to 15 */

static uint64_t sbsa_ref_cpu_mp_affinity(SBSAMachineState *sms, int idx)

2.20.1

From: Philippe Mathieu-Daudé <f4bug@amsat.org>

The "BCM2835 ARM Peripherals" datasheet [*] chapter 2

("Auxiliaries: UART1 & SPI1, SPI2"), list the register

sizes as 3/8/16/32 bits. We assume this means this

peripheral allows 8-bit accesses.

This was not an issue until commit 5d971f9e67 which reverted

("memory: accept mismatching sizes in memory_region_access_valid").

The model is implemented as 32-bit accesses (see commit 97398d900c,

all registers are 32-bit) so replace MemoryRegionOps.valid as

MemoryRegionOps.impl, and re-introduce MemoryRegionOps.valid

with a 8/32-bit range.

[*] https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf

Fixes: 97398d900c ("bcm2835_aux: add emulation of BCM2835 AUX (aka UART1) block")

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Message-id: 20201002181032.1899463-1-f4bug@amsat.org

hw/char/bcm2835_aux.c | 4 +++-

1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/hw/char/bcm2835_aux.c b/hw/char/bcm2835_aux.c

--- a/hw/char/bcm2835_aux.c

+++ b/hw/char/bcm2835_aux.c

@@ -XXX,XX +XXX,XX @@ static const MemoryRegionOps bcm2835_aux_ops = {

.read = bcm2835_aux_read,

.write = bcm2835_aux_write,

.endianness = DEVICE_NATIVE_ENDIAN,

- .valid.min_access_size = 4,

+ .impl.min_access_size = 4,

+ .impl.max_access_size = 4,

+ .valid.min_access_size = 1,

.valid.max_access_size = 4,

2.20.1

From: Andrew Jones <drjones@redhat.com>

Update against Linux 5.9-rc7.

linux-headers/linux/kvm.h | 6 ++++--

1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h

--- a/linux-headers/linux/kvm.h

+++ b/linux-headers/linux/kvm.h

@@ -XXX,XX +XXX,XX @@ struct kvm_ppc_resize_hpt {

#define KVM_VM_PPC_HV 1

#define KVM_VM_PPC_PR 2

-/* on MIPS, 0 forces trap & emulate, 1 forces VZ ASE */

-#define KVM_VM_MIPS_TE        0

+/* on MIPS, 0 indicates auto, 1 forces VZ ASE, 2 forces trap & emulate */

+#define KVM_VM_MIPS_AUTO    0

#define KVM_VM_MIPS_VZ        1

+#define KVM_VM_MIPS_TE        2

#define KVM_S390_SIE_PAGE_OFFSET 1

@@ -XXX,XX +XXX,XX @@ struct kvm_ppc_resize_hpt {

#define KVM_CAP_LAST_CPU 184

#define KVM_CAP_SMALLER_MAXPHYADDR 185

#define KVM_CAP_S390_DIAG318 186

+#define KVM_CAP_STEAL_TIME 187

#ifdef KVM_CAP_IRQ_ROUTING

2.20.1

From: Andrew Jones <drjones@redhat.com>

When we compile without KVM support !defined(CONFIG_KVM) we generate

stubs for functions that the linker will still encounter. Sometimes

these stubs can be executed safely and are placed in paths where they

get executed with or without KVM. Other functions should never be

called without KVM. Those functions should be guarded by kvm_enabled(),

but should also be robust to refactoring mistakes. Putting a

g_assert_not_reached() in the function should help. Additionally,

the g_assert_not_reached() calls may actually help the linker remove

some code.

target/arm/kvm_arm.h | 51 +++++++++++++++++++++++++++-----------------

1 file changed, 32 insertions(+), 19 deletions(-)

diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h

--- a/target/arm/kvm_arm.h

+++ b/target/arm/kvm_arm.h

@@ -XXX,XX +XXX,XX @@ int kvm_arm_set_irq(int cpu, int irqtype, int irq, int level);

#else

-static inline void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu)

-{

- /*

- * This should never actually be called in the "not KVM" case,

- * but set up the fields to indicate an error anyway.

- */

- cpu->kvm_target = QEMU_KVM_ARM_TARGET_NONE;

- cpu->host_cpu_probe_failed = true;

-}

-

-static inline void kvm_arm_add_vcpu_properties(Object *obj) {}

-

+/*

+ * It's safe to call these functions without KVM support.

+ * They should either do nothing or return "not supported".

+ */

static inline bool kvm_arm_aarch32_supported(void)

return false;

@@ -XXX,XX +XXX,XX @@ static inline bool kvm_arm_sve_supported(void)

return false;

}

+/*

+ * These functions should never actually be called without KVM support.

+ */

+static inline void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu)

+{

+ g_assert_not_reached();

+}

+

+static inline void kvm_arm_add_vcpu_properties(Object *obj)

+{

+ g_assert_not_reached();

+}

+

static inline int kvm_arm_get_max_vm_ipa_size(MachineState *ms)

- return -ENOENT;

+ g_assert_not_reached();

static inline int kvm_arm_vgic_probe(void)

{

- return 0;

+ g_assert_not_reached();

-static inline void kvm_arm_pmu_set_irq(CPUState *cs, int irq) {}

-static inline void kvm_arm_pmu_init(CPUState *cs) {}

+static inline void kvm_arm_pmu_set_irq(CPUState *cs, int irq)

+{

+ g_assert_not_reached();

+}

-static inline void kvm_arm_sve_get_vls(CPUState *cs, unsigned long *map) {}

+static inline void kvm_arm_pmu_init(CPUState *cs)

+{

+ g_assert_not_reached();

+}

+

+static inline void kvm_arm_sve_get_vls(CPUState *cs, unsigned long *map)

+{

+ g_assert_not_reached();

+}

-static inline void kvm_arm_get_virtual_time(CPUState *cs) {}

-static inline void kvm_arm_put_virtual_time(CPUState *cs) {}

#endif

static inline const char *gic_class_name(void)

2.20.1

From: Andrew Jones <drjones@redhat.com>

hw/arm/virt.c | 43 +++++++++++++++++++++++++++----------------

1 file changed, 27 insertions(+), 16 deletions(-)

diff --git a/hw/arm/virt.c b/hw/arm/virt.c

--- a/hw/arm/virt.c

+++ b/hw/arm/virt.c

@@ -XXX,XX +XXX,XX @@ static void finalize_gic_version(VirtMachineState *vms)

}

+/*

+ * virt_cpu_post_init() must be called after the CPUs have

+ * been realized and the GIC has been created.

+ */

+static void virt_cpu_post_init(VirtMachineState *vms)

+ bool aarch64;

+ aarch64 = object_property_get_bool(OBJECT(first_cpu), "aarch64", NULL);

+ if (!kvm_enabled()) {

+ if (aarch64 && vms->highmem) {

+ int requested_pa_size = 64 - clz64(vms->highest_gpa);

+ int pamax = arm_pamax(ARM_CPU(first_cpu));

+

+ if (pamax < requested_pa_size) {

+ error_report("VCPU supports less PA bits (%d) than "

+ "requested by the memory map (%d)",

+ pamax, requested_pa_size);

+ exit(1);

+ }

+ }

+ }

static void machvirt_init(MachineState *machine)

VirtMachineState *vms = VIRT_MACHINE(machine);

@@ -XXX,XX +XXX,XX @@ static void machvirt_init(MachineState *machine)

fdt_add_timer_nodes(vms);

fdt_add_cpu_nodes(vms);

- if (!kvm_enabled()) {

- ARMCPU *cpu = ARM_CPU(first_cpu);

- bool aarch64 = object_property_get_bool(OBJECT(cpu), "aarch64", NULL);

-

- if (aarch64 && vms->highmem) {

- int requested_pa_size, pamax = arm_pamax(cpu);

-

- requested_pa_size = 64 - clz64(vms->highest_gpa);

- if (pamax < requested_pa_size) {

- error_report("VCPU supports less PA bits (%d) than requested "

- "by the memory map (%d)", pamax, requested_pa_size);

- exit(1);

- }

- }

- }

-

memory_region_add_subregion(sysmem, vms->memmap[VIRT_MEM].base,

machine->ram);

if (machine->device_memory) {

@@ -XXX,XX +XXX,XX @@ static void machvirt_init(MachineState *machine)

create_gic(vms);

+ virt_cpu_post_init(vms);

+

fdt_add_pmu_nodes(vms);

create_uart(vms, VIRT_UART, sysmem, serial_hd(0));

2.20.1

From: Andrew Jones <drjones@redhat.com>

Move the KVM PMU setup part of fdt_add_pmu_nodes() to

virt_cpu_post_init(), which is a more appropriate location. Now

fdt_add_pmu_nodes() is also named more appropriately, because it

no longer does anything but fdt node creation.

No functional change intended.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

Reviewed-by: Eric Auger <eric.auger@redhat.com>

Signed-off-by: Andrew Jones <drjones@redhat.com>

Message-id: 20201001061718.101915-5-drjones@redhat.com

hw/arm/virt.c | 34 ++++++++++++++++++----------------

1 file changed, 18 insertions(+), 16 deletions(-)

diff --git a/hw/arm/virt.c b/hw/arm/virt.c

--- a/hw/arm/virt.c

+++ b/hw/arm/virt.c

@@ -XXX,XX +XXX,XX @@ static void fdt_add_gic_node(VirtMachineState *vms)

static void fdt_add_pmu_nodes(const VirtMachineState *vms)

{

- CPUState *cpu;

- ARMCPU *armcpu;

+ ARMCPU *armcpu = ARM_CPU(first_cpu);

uint32_t irqflags = GIC_FDT_IRQ_FLAGS_LEVEL_HI;

- CPU_FOREACH(cpu) {

- armcpu = ARM_CPU(cpu);

- if (!arm_feature(&armcpu->env, ARM_FEATURE_PMU)) {

- return;

- }

- if (kvm_enabled()) {

- if (kvm_irqchip_in_kernel()) {

- kvm_arm_pmu_set_irq(cpu, PPI(VIRTUAL_PMU_IRQ));

- }

- kvm_arm_pmu_init(cpu);

- }

+ if (!arm_feature(&armcpu->env, ARM_FEATURE_PMU)) {

+ assert(!object_property_get_bool(OBJECT(armcpu), "pmu", NULL));

+ return;

}

if (vms->gic_version == VIRT_GIC_VERSION_2) {

@@ -XXX,XX +XXX,XX @@ static void fdt_add_pmu_nodes(const VirtMachineState *vms)

(1 << vms->smp_cpus) - 1);

}

- armcpu = ARM_CPU(qemu_get_cpu(0));

qemu_fdt_add_subnode(vms->fdt, "/pmu");

if (arm_feature(&armcpu->env, ARM_FEATURE_V8)) {

const char compat[] = "arm,armv8-pmuv3";

@@ -XXX,XX +XXX,XX @@ static void finalize_gic_version(VirtMachineState *vms)

*/

static void virt_cpu_post_init(VirtMachineState *vms)

{

- bool aarch64;

+ bool aarch64, pmu;

+ CPUState *cpu;

aarch64 = object_property_get_bool(OBJECT(first_cpu), "aarch64", NULL);

+ pmu = object_property_get_bool(OBJECT(first_cpu), "pmu", NULL);

- if (!kvm_enabled()) {

+ if (kvm_enabled()) {

+ CPU_FOREACH(cpu) {

+ if (pmu) {

+ assert(arm_feature(&ARM_CPU(cpu)->env, ARM_FEATURE_PMU));

+ if (kvm_irqchip_in_kernel()) {

+ kvm_arm_pmu_set_irq(cpu, PPI(VIRTUAL_PMU_IRQ));

+ }

+ kvm_arm_pmu_init(cpu);

+ }

+ } else {

if (aarch64 && vms->highmem) {

int requested_pa_size = 64 - clz64(vms->highest_gpa);

int pamax = arm_pamax(ARM_CPU(first_cpu));

2.20.1

From: Andrew Jones <drjones@redhat.com>

arm-cpu-features got dropped from the AArch64 tests during the meson

conversion shuffle.

Signed-off-by: Andrew Jones <drjones@redhat.com>

Message-id: 20201001061718.101915-6-drjones@redhat.com

tests/qtest/meson.build | 3 ++-

1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build

--- a/tests/qtest/meson.build

+++ b/tests/qtest/meson.build

@@ -XXX,XX +XXX,XX @@ qtests_aarch64 = \

(cpu != 'arm' ? ['bios-tables-test'] : []) + \

(config_all_devices.has_key('CONFIG_TPM_TIS_SYSBUS') ? ['tpm-tis-device-test'] : []) + \

(config_all_devices.has_key('CONFIG_TPM_TIS_SYSBUS') ? ['tpm-tis-device-swtpm-test'] : []) + \

- ['numa-test',

+ ['arm-cpu-features',

+ 'numa-test',

'boot-serial-test',

'migration-test']

2.20.1