1 | Arm patch queue -- these are all bug fix patches but we might | 1 | Last lot of target-arm changes to squeeze in before rc1: |
---|---|---|---|
2 | as well put them in to rc0... | 2 | * various minor Arm bug fixes |
3 | * David Carlier's Haiku build portability fixes | ||
4 | * Wentong Wu's fixes for icount handling in the nios2 target | ||
3 | 5 | ||
4 | thanks | 6 | The following changes since commit 00ce6c36b35e0eb8cc5d68a28f288a6335848813: |
5 | -- PMM | ||
6 | 7 | ||
7 | The following changes since commit 2c8cfc0b52b5a4d123c26c0b5fdf941be24805be: | 8 | Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2020-07-13' into staging (2020-07-13 13:01:30 +0100) |
8 | |||
9 | Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging (2018-03-19 11:44:26 +0000) | ||
10 | 9 | ||
11 | are available in the Git repository at: | 10 | are available in the Git repository at: |
12 | 11 | ||
13 | git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20180319 | 12 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200713 |
14 | 13 | ||
15 | for you to fetch changes up to ff72cb6b46b95bb530787add5277c211af3d31c6: | 14 | for you to fetch changes up to 756f739b1682bf131994ec96dad7fbdf8b54493a: |
16 | 15 | ||
17 | hw/arm/raspi: Provide spin-loop code for AArch64 CPUs (2018-03-19 18:23:24 +0000) | 16 | hw/arm/aspeed: Do not create and attach empty SD cards by default (2020-07-13 14:36:12 +0100) |
18 | 17 | ||
19 | ---------------------------------------------------------------- | 18 | ---------------------------------------------------------------- |
20 | target-arm queue: | 19 | target-arm queue: |
21 | * fsl-imx6: Fix incorrect Ethernet interrupt defines | 20 | * hw/arm/bcm2836: Remove unused 'cpu_type' field |
22 | * dump: Update correct kdump phys_base field for AArch64 | 21 | * target/arm: Fix mtedesc for do_mem_zpz |
23 | * char: i.MX: Add support for "TX complete" interrupt | 22 | * Add the ability to change the FEC PHY MDIO device number on i.MX25/i.MX6/i.MX7 |
24 | * bcm2836/raspi: Fix various bugs resulting in panics trying | 23 | * target/arm: Don't do raw writes for PMINTENCLR |
25 | to boot a Debian Linux kernel on raspi3 | 24 | * virtio-iommu: Fix coverity issue in virtio_iommu_handle_command() |
25 | * build: Fix various issues with building on Haiku | ||
26 | * target/nios2: fix wrctl behaviour when using icount | ||
27 | * hw/arm/tosa: Encapsulate misc GPIO handling in a device | ||
28 | * hw/arm/palm.c: Encapsulate misc GPIO handling in a device | ||
29 | * hw/arm/aspeed: Do not create and attach empty SD cards by default | ||
26 | 30 | ||
27 | ---------------------------------------------------------------- | 31 | ---------------------------------------------------------------- |
28 | Andrey Smirnov (2): | 32 | Aaron Lindsay (1): |
29 | char: i.MX: Simplify imx_update() | 33 | target/arm: Don't do raw writes for PMINTENCLR |
30 | char: i.MX: Add support for "TX complete" interrupt | ||
31 | 34 | ||
32 | Guenter Roeck (1): | 35 | David CARLIER (8): |
33 | fsl-imx6: Swap Ethernet interrupt defines | 36 | build: Enable BSD symbols for Haiku |
37 | util/qemu-openpty.c: Don't assume pty.h is glibc-only | ||
38 | build: Check that mlockall() exists | ||
39 | osdep.h: Always include <sys/signal.h> if it exists | ||
40 | osdep.h: For Haiku, define SIGIO as equivalent to SIGPOLL | ||
41 | bswap.h: Include <endian.h> on Haiku for bswap operations | ||
42 | util/compatfd.c: Only include <sys/syscall.h> if CONFIG_SIGNALFD | ||
43 | util/oslib-posix.c: Implement qemu_init_exec_dir() for Haiku | ||
34 | 44 | ||
35 | Peter Maydell (9): | 45 | Eric Auger (1): |
36 | hw/arm/raspi: Don't do board-setup or secure-boot for raspi3 | 46 | virtio-iommu: Fix coverity issue in virtio_iommu_handle_command() |
37 | hw/arm/boot: assert that secure_boot and secure_board_setup are false for AArch64 | ||
38 | hw/arm/boot: If booting a kernel in EL2, set SCR_EL3.HCE | ||
39 | hw/arm/bcm2386: Fix parent type of bcm2386 | ||
40 | hw/arm/bcm2836: Rename bcm2836 type/struct to bcm283x | ||
41 | hw/arm/bcm2836: Create proper bcm2837 device | ||
42 | hw/arm/bcm2836: Use correct affinity values for BCM2837 | ||
43 | hw/arm/bcm2836: Hardcode correct CPU type | ||
44 | hw/arm/raspi: Provide spin-loop code for AArch64 CPUs | ||
45 | 47 | ||
46 | Wei Huang (1): | 48 | Gerd Hoffmann (1): |
47 | dump: Update correct kdump phys_base field for AArch64 | 49 | util/drm: make portable by avoiding struct dirent d_type |
48 | 50 | ||
49 | include/hw/arm/bcm2836.h | 31 +++++++++++++--- | 51 | Jean-Christophe Dubois (3): |
50 | include/hw/arm/fsl-imx6.h | 4 +- | 52 | Add the ability to change the FEC PHY MDIO device number on i.MX25 processor |
51 | include/hw/char/imx_serial.h | 3 ++ | 53 | Add the ability to change the FEC PHY MDIO device number on i.MX6 processor |
52 | dump.c | 14 +++++-- | 54 | Add the ability to change the FEC PHY MDIO devices numbers on i.MX7 processor |
53 | hw/arm/bcm2836.c | 87 +++++++++++++++++++++++++++++++------------- | ||
54 | hw/arm/boot.c | 12 ++++++ | ||
55 | hw/arm/raspi.c | 77 +++++++++++++++++++++++++++++++-------- | ||
56 | hw/char/imx_serial.c | 44 ++++++++++++++++------ | ||
57 | hw/net/imx_fec.c | 28 +++++++++++++- | ||
58 | 9 files changed, 237 insertions(+), 63 deletions(-) | ||
59 | 55 | ||
56 | Peter Maydell (4): | ||
57 | hw/arm/tosa.c: Detabify | ||
58 | hw/arm/tosa: Encapsulate misc GPIO handling in a device | ||
59 | hw/arm/palm.c: Detabify | ||
60 | hw/arm/palm.c: Encapsulate misc GPIO handling in a device | ||
61 | |||
62 | Philippe Mathieu-Daudé (2): | ||
63 | hw/arm/bcm2836: Remove unused 'cpu_type' field | ||
64 | hw/arm/aspeed: Do not create and attach empty SD cards by default | ||
65 | |||
66 | Richard Henderson (1): | ||
67 | target/arm: Fix mtedesc for do_mem_zpz | ||
68 | |||
69 | Wentong Wu (4): | ||
70 | target/nios2: add DISAS_NORETURN case for nothing more to generate | ||
71 | target/nios2: in line the semantics of DISAS_UPDATE with other targets | ||
72 | target/nios2: Use gen_io_start around wrctl instruction | ||
73 | hw/nios2: exit to main CPU loop only when unmasking interrupts | ||
74 | |||
75 | configure | 38 ++++++++++++- | ||
76 | include/hw/arm/bcm2836.h | 1 - | ||
77 | include/hw/arm/fsl-imx25.h | 1 + | ||
78 | include/hw/arm/fsl-imx6.h | 1 + | ||
79 | include/hw/arm/fsl-imx7.h | 1 + | ||
80 | include/qemu/bswap.h | 2 + | ||
81 | include/qemu/osdep.h | 6 +- | ||
82 | hw/arm/aspeed.c | 9 +-- | ||
83 | hw/arm/fsl-imx25.c | 7 +++ | ||
84 | hw/arm/fsl-imx6.c | 7 +++ | ||
85 | hw/arm/fsl-imx7.c | 9 +++ | ||
86 | hw/arm/palm.c | 111 +++++++++++++++++++++++++------------ | ||
87 | hw/arm/tosa.c | 132 +++++++++++++++++++++++++++++--------------- | ||
88 | hw/nios2/cpu_pic.c | 3 +- | ||
89 | hw/virtio/virtio-iommu.c | 1 + | ||
90 | hw/xen/xen-legacy-backend.c | 1 - | ||
91 | os-posix.c | 4 ++ | ||
92 | target/arm/helper.c | 4 +- | ||
93 | target/arm/translate-sve.c | 2 +- | ||
94 | target/nios2/translate.c | 12 +++- | ||
95 | util/compatfd.c | 2 + | ||
96 | util/drm.c | 19 +++++-- | ||
97 | util/oslib-posix.c | 20 ++++++- | ||
98 | util/qemu-openpty.c | 2 +- | ||
99 | 24 files changed, 292 insertions(+), 103 deletions(-) | ||
100 | diff view generated by jsdifflib |
1 | Our BCM2836 type is really a generic one that can be any of | 1 | From: Philippe Mathieu-Daudé <f4bug@amsat.org> |
---|---|---|---|
2 | the bcm283x family. Rename it accordingly. We change only | ||
3 | the names which are visible via the header file to the | ||
4 | rest of the QEMU code, leaving private function names | ||
5 | in bcm2836.c as they are. | ||
6 | 2 | ||
7 | This is a preliminary to making bcm283x be an abstract | 3 | The 'cpu_type' has been moved from BCM283XState to BCM283XClass |
8 | parent class to specific types for the bcm2836 and bcm2837. | 4 | in commit 210f47840d, but we forgot to remove the old variable. |
5 | Do it now. | ||
9 | 6 | ||
7 | Fixes: 210f47840d ("hw/arm/bcm2836: Hardcode correct CPU type") | ||
8 | Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> | ||
9 | Reviewed-by: Alistair Francis <alistair.francis@wdc.com> | ||
10 | Message-id: 20200703200459.23294-1-f4bug@amsat.org | ||
10 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 11 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
11 | Reviewed-by: Andrew Baumann <Andrew.Baumann@microsoft.com> | ||
12 | Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> | ||
13 | Message-id: 20180313153458.26822-6-peter.maydell@linaro.org | ||
14 | --- | 12 | --- |
15 | include/hw/arm/bcm2836.h | 12 ++++++------ | 13 | include/hw/arm/bcm2836.h | 1 - |
16 | hw/arm/bcm2836.c | 17 +++++++++-------- | 14 | 1 file changed, 1 deletion(-) |
17 | hw/arm/raspi.c | 16 ++++++++-------- | ||
18 | 3 files changed, 23 insertions(+), 22 deletions(-) | ||
19 | 15 | ||
20 | diff --git a/include/hw/arm/bcm2836.h b/include/hw/arm/bcm2836.h | 16 | diff --git a/include/hw/arm/bcm2836.h b/include/hw/arm/bcm2836.h |
21 | index XXXXXXX..XXXXXXX 100644 | 17 | index XXXXXXX..XXXXXXX 100644 |
22 | --- a/include/hw/arm/bcm2836.h | 18 | --- a/include/hw/arm/bcm2836.h |
23 | +++ b/include/hw/arm/bcm2836.h | 19 | +++ b/include/hw/arm/bcm2836.h |
24 | @@ -XXX,XX +XXX,XX @@ | 20 | @@ -XXX,XX +XXX,XX @@ typedef struct BCM283XState { |
25 | #include "hw/arm/bcm2835_peripherals.h" | ||
26 | #include "hw/intc/bcm2836_control.h" | ||
27 | |||
28 | -#define TYPE_BCM2836 "bcm2836" | ||
29 | -#define BCM2836(obj) OBJECT_CHECK(BCM2836State, (obj), TYPE_BCM2836) | ||
30 | +#define TYPE_BCM283X "bcm283x" | ||
31 | +#define BCM283X(obj) OBJECT_CHECK(BCM283XState, (obj), TYPE_BCM283X) | ||
32 | |||
33 | -#define BCM2836_NCPUS 4 | ||
34 | +#define BCM283X_NCPUS 4 | ||
35 | |||
36 | -typedef struct BCM2836State { | ||
37 | +typedef struct BCM283XState { | ||
38 | /*< private >*/ | ||
39 | DeviceState parent_obj; | 21 | DeviceState parent_obj; |
40 | /*< public >*/ | 22 | /*< public >*/ |
41 | @@ -XXX,XX +XXX,XX @@ typedef struct BCM2836State { | 23 | |
42 | char *cpu_type; | 24 | - char *cpu_type; |
43 | uint32_t enabled_cpus; | 25 | uint32_t enabled_cpus; |
44 | 26 | ||
45 | - ARMCPU cpus[BCM2836_NCPUS]; | 27 | struct { |
46 | + ARMCPU cpus[BCM283X_NCPUS]; | ||
47 | BCM2836ControlState control; | ||
48 | BCM2835PeripheralState peripherals; | ||
49 | -} BCM2836State; | ||
50 | +} BCM283XState; | ||
51 | |||
52 | #endif /* BCM2836_H */ | ||
53 | diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c | ||
54 | index XXXXXXX..XXXXXXX 100644 | ||
55 | --- a/hw/arm/bcm2836.c | ||
56 | +++ b/hw/arm/bcm2836.c | ||
57 | @@ -XXX,XX +XXX,XX @@ | ||
58 | |||
59 | static void bcm2836_init(Object *obj) | ||
60 | { | ||
61 | - BCM2836State *s = BCM2836(obj); | ||
62 | + BCM283XState *s = BCM283X(obj); | ||
63 | |||
64 | object_initialize(&s->control, sizeof(s->control), TYPE_BCM2836_CONTROL); | ||
65 | object_property_add_child(obj, "control", OBJECT(&s->control), NULL); | ||
66 | @@ -XXX,XX +XXX,XX @@ static void bcm2836_init(Object *obj) | ||
67 | |||
68 | static void bcm2836_realize(DeviceState *dev, Error **errp) | ||
69 | { | ||
70 | - BCM2836State *s = BCM2836(dev); | ||
71 | + BCM283XState *s = BCM283X(dev); | ||
72 | Object *obj; | ||
73 | Error *err = NULL; | ||
74 | int n; | ||
75 | @@ -XXX,XX +XXX,XX @@ static void bcm2836_realize(DeviceState *dev, Error **errp) | ||
76 | /* common peripherals from bcm2835 */ | ||
77 | |||
78 | obj = OBJECT(dev); | ||
79 | - for (n = 0; n < BCM2836_NCPUS; n++) { | ||
80 | + for (n = 0; n < BCM283X_NCPUS; n++) { | ||
81 | object_initialize(&s->cpus[n], sizeof(s->cpus[n]), | ||
82 | s->cpu_type); | ||
83 | object_property_add_child(obj, "cpu[*]", OBJECT(&s->cpus[n]), | ||
84 | @@ -XXX,XX +XXX,XX @@ static void bcm2836_realize(DeviceState *dev, Error **errp) | ||
85 | sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 1, | ||
86 | qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-fiq", 0)); | ||
87 | |||
88 | - for (n = 0; n < BCM2836_NCPUS; n++) { | ||
89 | + for (n = 0; n < BCM283X_NCPUS; n++) { | ||
90 | /* Mirror bcm2836, which has clusterid set to 0xf | ||
91 | * TODO: this should be converted to a property of ARM_CPU | ||
92 | */ | ||
93 | @@ -XXX,XX +XXX,XX @@ static void bcm2836_realize(DeviceState *dev, Error **errp) | ||
94 | } | ||
95 | |||
96 | static Property bcm2836_props[] = { | ||
97 | - DEFINE_PROP_STRING("cpu-type", BCM2836State, cpu_type), | ||
98 | - DEFINE_PROP_UINT32("enabled-cpus", BCM2836State, enabled_cpus, BCM2836_NCPUS), | ||
99 | + DEFINE_PROP_STRING("cpu-type", BCM283XState, cpu_type), | ||
100 | + DEFINE_PROP_UINT32("enabled-cpus", BCM283XState, enabled_cpus, | ||
101 | + BCM283X_NCPUS), | ||
102 | DEFINE_PROP_END_OF_LIST() | ||
103 | }; | ||
104 | |||
105 | @@ -XXX,XX +XXX,XX @@ static void bcm2836_class_init(ObjectClass *oc, void *data) | ||
106 | } | ||
107 | |||
108 | static const TypeInfo bcm2836_type_info = { | ||
109 | - .name = TYPE_BCM2836, | ||
110 | + .name = TYPE_BCM283X, | ||
111 | .parent = TYPE_DEVICE, | ||
112 | - .instance_size = sizeof(BCM2836State), | ||
113 | + .instance_size = sizeof(BCM283XState), | ||
114 | .instance_init = bcm2836_init, | ||
115 | .class_init = bcm2836_class_init, | ||
116 | }; | ||
117 | diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c | ||
118 | index XXXXXXX..XXXXXXX 100644 | ||
119 | --- a/hw/arm/raspi.c | ||
120 | +++ b/hw/arm/raspi.c | ||
121 | @@ -XXX,XX +XXX,XX @@ | ||
122 | static const int raspi_boardid[] = {[1] = 0xc42, [2] = 0xc43, [3] = 0xc44}; | ||
123 | |||
124 | typedef struct RasPiState { | ||
125 | - BCM2836State soc; | ||
126 | + BCM283XState soc; | ||
127 | MemoryRegion ram; | ||
128 | } RasPiState; | ||
129 | |||
130 | @@ -XXX,XX +XXX,XX @@ static void raspi_init(MachineState *machine, int version) | ||
131 | BusState *bus; | ||
132 | DeviceState *carddev; | ||
133 | |||
134 | - object_initialize(&s->soc, sizeof(s->soc), TYPE_BCM2836); | ||
135 | + object_initialize(&s->soc, sizeof(s->soc), TYPE_BCM283X); | ||
136 | object_property_add_child(OBJECT(machine), "soc", OBJECT(&s->soc), | ||
137 | &error_abort); | ||
138 | |||
139 | @@ -XXX,XX +XXX,XX @@ static void raspi2_machine_init(MachineClass *mc) | ||
140 | mc->no_floppy = 1; | ||
141 | mc->no_cdrom = 1; | ||
142 | mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a15"); | ||
143 | - mc->max_cpus = BCM2836_NCPUS; | ||
144 | - mc->min_cpus = BCM2836_NCPUS; | ||
145 | - mc->default_cpus = BCM2836_NCPUS; | ||
146 | + mc->max_cpus = BCM283X_NCPUS; | ||
147 | + mc->min_cpus = BCM283X_NCPUS; | ||
148 | + mc->default_cpus = BCM283X_NCPUS; | ||
149 | mc->default_ram_size = 1024 * 1024 * 1024; | ||
150 | mc->ignore_memory_transaction_failures = true; | ||
151 | }; | ||
152 | @@ -XXX,XX +XXX,XX @@ static void raspi3_machine_init(MachineClass *mc) | ||
153 | mc->no_floppy = 1; | ||
154 | mc->no_cdrom = 1; | ||
155 | mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a53"); | ||
156 | - mc->max_cpus = BCM2836_NCPUS; | ||
157 | - mc->min_cpus = BCM2836_NCPUS; | ||
158 | - mc->default_cpus = BCM2836_NCPUS; | ||
159 | + mc->max_cpus = BCM283X_NCPUS; | ||
160 | + mc->min_cpus = BCM283X_NCPUS; | ||
161 | + mc->default_cpus = BCM283X_NCPUS; | ||
162 | mc->default_ram_size = 1024 * 1024 * 1024; | ||
163 | } | ||
164 | DEFINE_MACHINE("raspi3", raspi3_machine_init) | ||
165 | -- | 28 | -- |
166 | 2.16.2 | 29 | 2.20.1 |
167 | 30 | ||
168 | 31 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | From: Richard Henderson <richard.henderson@linaro.org> | ||
1 | 2 | ||
3 | The mtedesc that was constructed was not actually passed in. | ||
4 | Found by Coverity (CID 1429996). | ||
5 | |||
6 | Fixes: d28d12f008e | ||
7 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | ||
8 | Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> | ||
9 | Message-id: 20200706202345.193676-1-richard.henderson@linaro.org | ||
10 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
11 | --- | ||
12 | target/arm/translate-sve.c | 2 +- | ||
13 | 1 file changed, 1 insertion(+), 1 deletion(-) | ||
14 | |||
15 | diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c | ||
16 | index XXXXXXX..XXXXXXX 100644 | ||
17 | --- a/target/arm/translate-sve.c | ||
18 | +++ b/target/arm/translate-sve.c | ||
19 | @@ -XXX,XX +XXX,XX @@ static void do_mem_zpz(DisasContext *s, int zt, int pg, int zm, | ||
20 | desc = FIELD_DP32(desc, MTEDESC, ESIZE, 1 << msz); | ||
21 | desc <<= SVE_MTEDESC_SHIFT; | ||
22 | } | ||
23 | - desc = simd_desc(vsz, vsz, scale); | ||
24 | + desc = simd_desc(vsz, vsz, desc | scale); | ||
25 | t_desc = tcg_const_i32(desc); | ||
26 | |||
27 | tcg_gen_addi_ptr(t_pg, cpu_env, pred_full_reg_offset(s, pg)); | ||
28 | -- | ||
29 | 2.20.1 | ||
30 | |||
31 | diff view generated by jsdifflib |
1 | The bcm2837 is pretty similar to the bcm2836, but it does have | 1 | From: Jean-Christophe Dubois <jcd@tribudubois.net> |
---|---|---|---|
2 | some differences. Notably, the MPIDR affinity aff1 values it | ||
3 | sets for the CPUs are 0x0, rather than the 0xf that the bcm2836 | ||
4 | uses, and if this is wrong Linux will not boot. | ||
5 | 2 | ||
6 | Rather than trying to have one device with properties that | 3 | Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> |
7 | configure it differently for the two cases, create two | 4 | Message-id: 9f8923ecd974160ae8f634c275b1100c2cbe66d7.1593806826.git.jcd@tribudubois.net |
8 | separate QOM devices for the two SoCs. We use the same approach | 5 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> |
9 | as hw/arm/aspeed_soc.c and share code and have a data table | 6 | [PMM: updated for object_property_set_uint() argument reordering] |
10 | that might differ per-SoC. For the moment the two types don't | 7 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
11 | actually have different behaviour. | 8 | --- |
9 | include/hw/arm/fsl-imx25.h | 1 + | ||
10 | hw/arm/fsl-imx25.c | 7 +++++++ | ||
11 | 2 files changed, 8 insertions(+) | ||
12 | 12 | ||
13 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 13 | diff --git a/include/hw/arm/fsl-imx25.h b/include/hw/arm/fsl-imx25.h |
14 | Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> | ||
15 | Message-id: 20180313153458.26822-7-peter.maydell@linaro.org | ||
16 | --- | ||
17 | include/hw/arm/bcm2836.h | 19 +++++++++++++++++++ | ||
18 | hw/arm/bcm2836.c | 37 ++++++++++++++++++++++++++++++++----- | ||
19 | hw/arm/raspi.c | 3 ++- | ||
20 | 3 files changed, 53 insertions(+), 6 deletions(-) | ||
21 | |||
22 | diff --git a/include/hw/arm/bcm2836.h b/include/hw/arm/bcm2836.h | ||
23 | index XXXXXXX..XXXXXXX 100644 | 14 | index XXXXXXX..XXXXXXX 100644 |
24 | --- a/include/hw/arm/bcm2836.h | 15 | --- a/include/hw/arm/fsl-imx25.h |
25 | +++ b/include/hw/arm/bcm2836.h | 16 | +++ b/include/hw/arm/fsl-imx25.h |
26 | @@ -XXX,XX +XXX,XX @@ | 17 | @@ -XXX,XX +XXX,XX @@ typedef struct FslIMX25State { |
27 | 18 | MemoryRegion rom[2]; | |
28 | #define BCM283X_NCPUS 4 | 19 | MemoryRegion iram; |
29 | 20 | MemoryRegion iram_alias; | |
30 | +/* These type names are for specific SoCs; other than instantiating | 21 | + uint32_t phy_num; |
31 | + * them, code using these devices should always handle them via the | 22 | } FslIMX25State; |
32 | + * BCM283x base class, so they have no BCM2836(obj) etc macros. | 23 | |
33 | + */ | 24 | /** |
34 | +#define TYPE_BCM2836 "bcm2836" | 25 | diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c |
35 | +#define TYPE_BCM2837 "bcm2837" | ||
36 | + | ||
37 | typedef struct BCM283XState { | ||
38 | /*< private >*/ | ||
39 | DeviceState parent_obj; | ||
40 | @@ -XXX,XX +XXX,XX @@ typedef struct BCM283XState { | ||
41 | BCM2835PeripheralState peripherals; | ||
42 | } BCM283XState; | ||
43 | |||
44 | +typedef struct BCM283XInfo BCM283XInfo; | ||
45 | + | ||
46 | +typedef struct BCM283XClass { | ||
47 | + DeviceClass parent_class; | ||
48 | + const BCM283XInfo *info; | ||
49 | +} BCM283XClass; | ||
50 | + | ||
51 | +#define BCM283X_CLASS(klass) \ | ||
52 | + OBJECT_CLASS_CHECK(BCM283XClass, (klass), TYPE_BCM283X) | ||
53 | +#define BCM283X_GET_CLASS(obj) \ | ||
54 | + OBJECT_GET_CLASS(BCM283XClass, (obj), TYPE_BCM283X) | ||
55 | + | ||
56 | #endif /* BCM2836_H */ | ||
57 | diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c | ||
58 | index XXXXXXX..XXXXXXX 100644 | 26 | index XXXXXXX..XXXXXXX 100644 |
59 | --- a/hw/arm/bcm2836.c | 27 | --- a/hw/arm/fsl-imx25.c |
60 | +++ b/hw/arm/bcm2836.c | 28 | +++ b/hw/arm/fsl-imx25.c |
61 | @@ -XXX,XX +XXX,XX @@ | 29 | @@ -XXX,XX +XXX,XX @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp) |
62 | /* "QA7" (Pi2) interrupt controller and mailboxes etc. */ | 30 | epit_table[i].irq)); |
63 | #define BCM2836_CONTROL_BASE 0x40000000 | 31 | } |
64 | 32 | ||
65 | +struct BCM283XInfo { | 33 | + object_property_set_uint(OBJECT(&s->fec), "phy-num", s->phy_num, &err); |
66 | + const char *name; | 34 | qdev_set_nic_properties(DEVICE(&s->fec), &nd_table[0]); |
35 | |||
36 | if (!sysbus_realize(SYS_BUS_DEVICE(&s->fec), errp)) { | ||
37 | @@ -XXX,XX +XXX,XX @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp) | ||
38 | &s->iram_alias); | ||
39 | } | ||
40 | |||
41 | +static Property fsl_imx25_properties[] = { | ||
42 | + DEFINE_PROP_UINT32("fec-phy-num", FslIMX25State, phy_num, 0), | ||
43 | + DEFINE_PROP_END_OF_LIST(), | ||
67 | +}; | 44 | +}; |
68 | + | 45 | + |
69 | +static const BCM283XInfo bcm283x_socs[] = { | 46 | static void fsl_imx25_class_init(ObjectClass *oc, void *data) |
70 | + { | ||
71 | + .name = TYPE_BCM2836, | ||
72 | + }, | ||
73 | + { | ||
74 | + .name = TYPE_BCM2837, | ||
75 | + }, | ||
76 | +}; | ||
77 | + | ||
78 | static void bcm2836_init(Object *obj) | ||
79 | { | ||
80 | BCM283XState *s = BCM283X(obj); | ||
81 | @@ -XXX,XX +XXX,XX @@ static Property bcm2836_props[] = { | ||
82 | DEFINE_PROP_END_OF_LIST() | ||
83 | }; | ||
84 | |||
85 | -static void bcm2836_class_init(ObjectClass *oc, void *data) | ||
86 | +static void bcm283x_class_init(ObjectClass *oc, void *data) | ||
87 | { | 47 | { |
88 | DeviceClass *dc = DEVICE_CLASS(oc); | 48 | DeviceClass *dc = DEVICE_CLASS(oc); |
89 | + BCM283XClass *bc = BCM283X_CLASS(oc); | 49 | |
90 | 50 | + device_class_set_props(dc, fsl_imx25_properties); | |
91 | - dc->props = bcm2836_props; | 51 | dc->realize = fsl_imx25_realize; |
92 | + bc->info = data; | 52 | dc->desc = "i.MX25 SOC"; |
93 | dc->realize = bcm2836_realize; | 53 | /* |
94 | + dc->props = bcm2836_props; | ||
95 | } | ||
96 | |||
97 | -static const TypeInfo bcm2836_type_info = { | ||
98 | +static const TypeInfo bcm283x_type_info = { | ||
99 | .name = TYPE_BCM283X, | ||
100 | .parent = TYPE_DEVICE, | ||
101 | .instance_size = sizeof(BCM283XState), | ||
102 | .instance_init = bcm2836_init, | ||
103 | - .class_init = bcm2836_class_init, | ||
104 | + .class_size = sizeof(BCM283XClass), | ||
105 | + .abstract = true, | ||
106 | }; | ||
107 | |||
108 | static void bcm2836_register_types(void) | ||
109 | { | ||
110 | - type_register_static(&bcm2836_type_info); | ||
111 | + int i; | ||
112 | + | ||
113 | + type_register_static(&bcm283x_type_info); | ||
114 | + for (i = 0; i < ARRAY_SIZE(bcm283x_socs); i++) { | ||
115 | + TypeInfo ti = { | ||
116 | + .name = bcm283x_socs[i].name, | ||
117 | + .parent = TYPE_BCM283X, | ||
118 | + .class_init = bcm283x_class_init, | ||
119 | + .class_data = (void *) &bcm283x_socs[i], | ||
120 | + }; | ||
121 | + type_register(&ti); | ||
122 | + } | ||
123 | } | ||
124 | |||
125 | type_init(bcm2836_register_types) | ||
126 | diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c | ||
127 | index XXXXXXX..XXXXXXX 100644 | ||
128 | --- a/hw/arm/raspi.c | ||
129 | +++ b/hw/arm/raspi.c | ||
130 | @@ -XXX,XX +XXX,XX @@ static void raspi_init(MachineState *machine, int version) | ||
131 | BusState *bus; | ||
132 | DeviceState *carddev; | ||
133 | |||
134 | - object_initialize(&s->soc, sizeof(s->soc), TYPE_BCM283X); | ||
135 | + object_initialize(&s->soc, sizeof(s->soc), | ||
136 | + version == 3 ? TYPE_BCM2837 : TYPE_BCM2836); | ||
137 | object_property_add_child(OBJECT(machine), "soc", OBJECT(&s->soc), | ||
138 | &error_abort); | ||
139 | |||
140 | -- | 54 | -- |
141 | 2.16.2 | 55 | 2.20.1 |
142 | 56 | ||
143 | 57 | diff view generated by jsdifflib |
1 | From: Guenter Roeck <linux@roeck-us.net> | 1 | From: Jean-Christophe Dubois <jcd@tribudubois.net> |
---|---|---|---|
2 | 2 | ||
3 | The sabrelite machine model used by qemu-system-arm is based on the | 3 | Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> |
4 | Freescale/NXP i.MX6Q processor. This SoC has an on-board ethernet | 4 | Message-id: 05a64e83eb1c0c865ac077b22c599425c024c02c.1593806826.git.jcd@tribudubois.net |
5 | controller which is supported in QEMU using the imx_fec.c module | ||
6 | (actually called imx.enet for this model.) | ||
7 | |||
8 | The include/hw/arm/fsm-imx6.h file defines the interrupt vectors for the | ||
9 | imx.enet device like this: | ||
10 | |||
11 | #define FSL_IMX6_ENET_MAC_1588_IRQ 118 | ||
12 | #define FSL_IMX6_ENET_MAC_IRQ 119 | ||
13 | |||
14 | According to https://www.nxp.com/docs/en/reference-manual/IMX6DQRM.pdf, | ||
15 | page 225, in Table 3-1. ARM Cortex A9 domain interrupt summary, | ||
16 | interrupts are as follows. | ||
17 | |||
18 | 150 ENET MAC 0 IRQ | ||
19 | 151 ENET MAC 0 1588 Timer interrupt | ||
20 | |||
21 | where | ||
22 | |||
23 | 150 - 32 == 118 | ||
24 | 151 - 32 == 119 | ||
25 | |||
26 | In other words, the vector definitions in the fsl-imx6.h file are reversed. | ||
27 | |||
28 | Fixing the interrupts alone causes problems with older Linux kernels: | ||
29 | The Ethernet interface will fail to probe with Linux v4.9 and earlier. | ||
30 | Linux v4.1 and earlier will crash due to a bug in Ethernet driver probe | ||
31 | error handling. This is a Linux kernel problem, not a qemu problem: | ||
32 | the Linux kernel only worked by accident since it requested both interrupts. | ||
33 | |||
34 | For backward compatibility, generate the Ethernet interrupt on both interrupt | ||
35 | lines. This was shown to work from all Linux kernel releases starting with | ||
36 | v3.16. | ||
37 | |||
38 | Link: https://bugs.launchpad.net/qemu/+bug/1753309 | ||
39 | Signed-off-by: Guenter Roeck <linux@roeck-us.net> | ||
40 | Message-id: 1520723090-22130-1-git-send-email-linux@roeck-us.net | ||
41 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | 5 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> |
6 | [PMM: updated for object_property_set_uint() argument reordering] | ||
42 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 7 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
43 | --- | 8 | --- |
44 | include/hw/arm/fsl-imx6.h | 4 ++-- | 9 | include/hw/arm/fsl-imx6.h | 1 + |
45 | hw/net/imx_fec.c | 28 +++++++++++++++++++++++++++- | 10 | hw/arm/fsl-imx6.c | 7 +++++++ |
46 | 2 files changed, 29 insertions(+), 3 deletions(-) | 11 | 2 files changed, 8 insertions(+) |
47 | 12 | ||
48 | diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h | 13 | diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h |
49 | index XXXXXXX..XXXXXXX 100644 | 14 | index XXXXXXX..XXXXXXX 100644 |
50 | --- a/include/hw/arm/fsl-imx6.h | 15 | --- a/include/hw/arm/fsl-imx6.h |
51 | +++ b/include/hw/arm/fsl-imx6.h | 16 | +++ b/include/hw/arm/fsl-imx6.h |
52 | @@ -XXX,XX +XXX,XX @@ typedef struct FslIMX6State { | 17 | @@ -XXX,XX +XXX,XX @@ typedef struct FslIMX6State { |
53 | #define FSL_IMX6_HDMI_MASTER_IRQ 115 | 18 | MemoryRegion caam; |
54 | #define FSL_IMX6_HDMI_CEC_IRQ 116 | 19 | MemoryRegion ocram; |
55 | #define FSL_IMX6_MLB150_LOW_IRQ 117 | 20 | MemoryRegion ocram_alias; |
56 | -#define FSL_IMX6_ENET_MAC_1588_IRQ 118 | 21 | + uint32_t phy_num; |
57 | -#define FSL_IMX6_ENET_MAC_IRQ 119 | 22 | } FslIMX6State; |
58 | +#define FSL_IMX6_ENET_MAC_IRQ 118 | 23 | |
59 | +#define FSL_IMX6_ENET_MAC_1588_IRQ 119 | 24 | |
60 | #define FSL_IMX6_PCIE1_IRQ 120 | 25 | diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c |
61 | #define FSL_IMX6_PCIE2_IRQ 121 | ||
62 | #define FSL_IMX6_PCIE3_IRQ 122 | ||
63 | diff --git a/hw/net/imx_fec.c b/hw/net/imx_fec.c | ||
64 | index XXXXXXX..XXXXXXX 100644 | 26 | index XXXXXXX..XXXXXXX 100644 |
65 | --- a/hw/net/imx_fec.c | 27 | --- a/hw/arm/fsl-imx6.c |
66 | +++ b/hw/net/imx_fec.c | 28 | +++ b/hw/arm/fsl-imx6.c |
67 | @@ -XXX,XX +XXX,XX @@ static void imx_enet_write_bd(IMXENETBufDesc *bd, dma_addr_t addr) | 29 | @@ -XXX,XX +XXX,XX @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) |
68 | 30 | spi_table[i].irq)); | |
69 | static void imx_eth_update(IMXFECState *s) | 31 | } |
32 | |||
33 | + object_property_set_uint(OBJECT(&s->eth), "phy-num", s->phy_num, &err); | ||
34 | qdev_set_nic_properties(DEVICE(&s->eth), &nd_table[0]); | ||
35 | if (!sysbus_realize(SYS_BUS_DEVICE(&s->eth), errp)) { | ||
36 | return; | ||
37 | @@ -XXX,XX +XXX,XX @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) | ||
38 | &s->ocram_alias); | ||
39 | } | ||
40 | |||
41 | +static Property fsl_imx6_properties[] = { | ||
42 | + DEFINE_PROP_UINT32("fec-phy-num", FslIMX6State, phy_num, 0), | ||
43 | + DEFINE_PROP_END_OF_LIST(), | ||
44 | +}; | ||
45 | + | ||
46 | static void fsl_imx6_class_init(ObjectClass *oc, void *data) | ||
70 | { | 47 | { |
71 | - if (s->regs[ENET_EIR] & s->regs[ENET_EIMR] & ENET_INT_TS_TIMER) { | 48 | DeviceClass *dc = DEVICE_CLASS(oc); |
72 | + /* | 49 | |
73 | + * Previous versions of qemu had the ENET_INT_MAC and ENET_INT_TS_TIMER | 50 | + device_class_set_props(dc, fsl_imx6_properties); |
74 | + * interrupts swapped. This worked with older versions of Linux (4.14 | 51 | dc->realize = fsl_imx6_realize; |
75 | + * and older) since Linux associated both interrupt lines with Ethernet | 52 | dc->desc = "i.MX6 SOC"; |
76 | + * MAC interrupts. Specifically, | 53 | /* Reason: Uses serial_hd() in the realize() function */ |
77 | + * - Linux 4.15 and later have separate interrupt handlers for the MAC and | ||
78 | + * timer interrupts. Those versions of Linux fail with versions of QEMU | ||
79 | + * with swapped interrupt assignments. | ||
80 | + * - In linux 4.14, both interrupt lines were registered with the Ethernet | ||
81 | + * MAC interrupt handler. As a result, all versions of qemu happen to | ||
82 | + * work, though that is accidental. | ||
83 | + * - In Linux 4.9 and older, the timer interrupt was registered directly | ||
84 | + * with the Ethernet MAC interrupt handler. The MAC interrupt was | ||
85 | + * redirected to a GPIO interrupt to work around erratum ERR006687. | ||
86 | + * This was implemented using the SOC's IOMUX block. In qemu, this GPIO | ||
87 | + * interrupt never fired since IOMUX is currently not supported in qemu. | ||
88 | + * Linux instead received MAC interrupts on the timer interrupt. | ||
89 | + * As a result, qemu versions with the swapped interrupt assignment work, | ||
90 | + * albeit accidentally, but qemu versions with the correct interrupt | ||
91 | + * assignment fail. | ||
92 | + * | ||
93 | + * To ensure that all versions of Linux work, generate ENET_INT_MAC | ||
94 | + * interrrupts on both interrupt lines. This should be changed if and when | ||
95 | + * qemu supports IOMUX. | ||
96 | + */ | ||
97 | + if (s->regs[ENET_EIR] & s->regs[ENET_EIMR] & | ||
98 | + (ENET_INT_MAC | ENET_INT_TS_TIMER)) { | ||
99 | qemu_set_irq(s->irq[1], 1); | ||
100 | } else { | ||
101 | qemu_set_irq(s->irq[1], 0); | ||
102 | -- | 54 | -- |
103 | 2.16.2 | 55 | 2.20.1 |
104 | 56 | ||
105 | 57 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | From: Jean-Christophe Dubois <jcd@tribudubois.net> | ||
1 | 2 | ||
3 | Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> | ||
4 | Message-id: c850187322be9930e47c8b234c385a7d0da245cb.1593806826.git.jcd@tribudubois.net | ||
5 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
6 | [PMM: updated for object_property_set_uint() argument reordering] | ||
7 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
8 | --- | ||
9 | include/hw/arm/fsl-imx7.h | 1 + | ||
10 | hw/arm/fsl-imx7.c | 9 +++++++++ | ||
11 | 2 files changed, 10 insertions(+) | ||
12 | |||
13 | diff --git a/include/hw/arm/fsl-imx7.h b/include/hw/arm/fsl-imx7.h | ||
14 | index XXXXXXX..XXXXXXX 100644 | ||
15 | --- a/include/hw/arm/fsl-imx7.h | ||
16 | +++ b/include/hw/arm/fsl-imx7.h | ||
17 | @@ -XXX,XX +XXX,XX @@ typedef struct FslIMX7State { | ||
18 | IMX7GPRState gpr; | ||
19 | ChipideaState usb[FSL_IMX7_NUM_USBS]; | ||
20 | DesignwarePCIEHost pcie; | ||
21 | + uint32_t phy_num[FSL_IMX7_NUM_ETHS]; | ||
22 | } FslIMX7State; | ||
23 | |||
24 | enum FslIMX7MemoryMap { | ||
25 | diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c | ||
26 | index XXXXXXX..XXXXXXX 100644 | ||
27 | --- a/hw/arm/fsl-imx7.c | ||
28 | +++ b/hw/arm/fsl-imx7.c | ||
29 | @@ -XXX,XX +XXX,XX @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp) | ||
30 | FSL_IMX7_ENET2_ADDR, | ||
31 | }; | ||
32 | |||
33 | + object_property_set_uint(OBJECT(&s->eth[i]), "phy-num", | ||
34 | + s->phy_num[i], &error_abort); | ||
35 | object_property_set_uint(OBJECT(&s->eth[i]), "tx-ring-num", | ||
36 | FSL_IMX7_ETH_NUM_TX_RINGS, &error_abort); | ||
37 | qdev_set_nic_properties(DEVICE(&s->eth[i]), &nd_table[i]); | ||
38 | @@ -XXX,XX +XXX,XX @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp) | ||
39 | FSL_IMX7_PCIE_PHY_SIZE); | ||
40 | } | ||
41 | |||
42 | +static Property fsl_imx7_properties[] = { | ||
43 | + DEFINE_PROP_UINT32("fec1-phy-num", FslIMX7State, phy_num[0], 0), | ||
44 | + DEFINE_PROP_UINT32("fec2-phy-num", FslIMX7State, phy_num[1], 1), | ||
45 | + DEFINE_PROP_END_OF_LIST(), | ||
46 | +}; | ||
47 | + | ||
48 | static void fsl_imx7_class_init(ObjectClass *oc, void *data) | ||
49 | { | ||
50 | DeviceClass *dc = DEVICE_CLASS(oc); | ||
51 | |||
52 | + device_class_set_props(dc, fsl_imx7_properties); | ||
53 | dc->realize = fsl_imx7_realize; | ||
54 | |||
55 | /* Reason: Uses serial_hds and nd_table in realize() directly */ | ||
56 | -- | ||
57 | 2.20.1 | ||
58 | |||
59 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | From: Aaron Lindsay <aaron@os.amperecomputing.com> | ||
1 | 2 | ||
3 | Raw writes to this register when in KVM mode can cause interrupts to be | ||
4 | raised (even when the PMU is disabled). Because the underlying state is | ||
5 | already aliased to PMINTENSET (which already provides raw write | ||
6 | functions), we can safely disable raw accesses to PMINTENCLR entirely. | ||
7 | |||
8 | Signed-off-by: Aaron Lindsay <aaron@os.amperecomputing.com> | ||
9 | Message-id: 20200707152616.1917154-1-aaron@os.amperecomputing.com | ||
10 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
11 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
12 | --- | ||
13 | target/arm/helper.c | 4 ++-- | ||
14 | 1 file changed, 2 insertions(+), 2 deletions(-) | ||
15 | |||
16 | diff --git a/target/arm/helper.c b/target/arm/helper.c | ||
17 | index XXXXXXX..XXXXXXX 100644 | ||
18 | --- a/target/arm/helper.c | ||
19 | +++ b/target/arm/helper.c | ||
20 | @@ -XXX,XX +XXX,XX @@ static const ARMCPRegInfo v7_cp_reginfo[] = { | ||
21 | .resetvalue = 0x0 }, | ||
22 | { .name = "PMINTENCLR", .cp = 15, .crn = 9, .crm = 14, .opc1 = 0, .opc2 = 2, | ||
23 | .access = PL1_RW, .accessfn = access_tpm, | ||
24 | - .type = ARM_CP_ALIAS | ARM_CP_IO, | ||
25 | + .type = ARM_CP_ALIAS | ARM_CP_IO | ARM_CP_NO_RAW, | ||
26 | .fieldoffset = offsetof(CPUARMState, cp15.c9_pminten), | ||
27 | .writefn = pmintenclr_write, }, | ||
28 | { .name = "PMINTENCLR_EL1", .state = ARM_CP_STATE_AA64, | ||
29 | .opc0 = 3, .opc1 = 0, .crn = 9, .crm = 14, .opc2 = 2, | ||
30 | .access = PL1_RW, .accessfn = access_tpm, | ||
31 | - .type = ARM_CP_ALIAS | ARM_CP_IO, | ||
32 | + .type = ARM_CP_ALIAS | ARM_CP_IO | ARM_CP_NO_RAW, | ||
33 | .fieldoffset = offsetof(CPUARMState, cp15.c9_pminten), | ||
34 | .writefn = pmintenclr_write }, | ||
35 | { .name = "CCSIDR", .state = ARM_CP_STATE_BOTH, | ||
36 | -- | ||
37 | 2.20.1 | ||
38 | |||
39 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | From: Eric Auger <eric.auger@redhat.com> | ||
1 | 2 | ||
3 | Coverity points out (CID 1430180) that the new case is missing | ||
4 | break or a /* fallthrough */ comment. Break is the right thing to | ||
5 | do as in that case, tail is not used. | ||
6 | |||
7 | Fixes 1733eebb9e ("virtio-iommu: Implement RESV_MEM probe request") | ||
8 | Signed-off-by: Eric Auger <eric.auger@redhat.com> | ||
9 | Reported-by: Peter Maydell <peter.maydell@linaro.org> | ||
10 | Message-id: 20200708160147.18426-1-eric.auger@redhat.com | ||
11 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
12 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
13 | --- | ||
14 | hw/virtio/virtio-iommu.c | 1 + | ||
15 | 1 file changed, 1 insertion(+) | ||
16 | |||
17 | diff --git a/hw/virtio/virtio-iommu.c b/hw/virtio/virtio-iommu.c | ||
18 | index XXXXXXX..XXXXXXX 100644 | ||
19 | --- a/hw/virtio/virtio-iommu.c | ||
20 | +++ b/hw/virtio/virtio-iommu.c | ||
21 | @@ -XXX,XX +XXX,XX @@ static void virtio_iommu_handle_command(VirtIODevice *vdev, VirtQueue *vq) | ||
22 | ptail = (struct virtio_iommu_req_tail *) | ||
23 | (buf + s->config.probe_size); | ||
24 | ptail->status = virtio_iommu_handle_probe(s, iov, iov_cnt, buf); | ||
25 | + break; | ||
26 | } | ||
27 | default: | ||
28 | tail.status = VIRTIO_IOMMU_S_UNSUPP; | ||
29 | -- | ||
30 | 2.20.1 | ||
31 | |||
32 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | From: David CARLIER <devnexen@gmail.com> | ||
1 | 2 | ||
3 | Tell Haiku to provide various BSD functions by setting BSD_SOURCE | ||
4 | and linking libbsd. | ||
5 | |||
6 | Signed-off-by: David Carlier <devnexen@gmail.com> | ||
7 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
8 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
9 | Message-id: 20200703145614.16684-2-peter.maydell@linaro.org | ||
10 | [PMM: expanded commit message] | ||
11 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
12 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
13 | --- | ||
14 | configure | 4 ++-- | ||
15 | 1 file changed, 2 insertions(+), 2 deletions(-) | ||
16 | |||
17 | diff --git a/configure b/configure | ||
18 | index XXXXXXX..XXXXXXX 100755 | ||
19 | --- a/configure | ||
20 | +++ b/configure | ||
21 | @@ -XXX,XX +XXX,XX @@ SunOS) | ||
22 | ;; | ||
23 | Haiku) | ||
24 | haiku="yes" | ||
25 | - QEMU_CFLAGS="-DB_USE_POSITIVE_POSIX_ERRORS $QEMU_CFLAGS" | ||
26 | - LIBS="-lposix_error_mapper -lnetwork $LIBS" | ||
27 | + QEMU_CFLAGS="-DB_USE_POSITIVE_POSIX_ERRORS -DBSD_SOURCE $QEMU_CFLAGS" | ||
28 | + LIBS="-lposix_error_mapper -lnetwork -lbsd $LIBS" | ||
29 | ;; | ||
30 | Linux) | ||
31 | audio_drv_list="try-pa oss" | ||
32 | -- | ||
33 | 2.20.1 | ||
34 | |||
35 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | From: David CARLIER <devnexen@gmail.com> | ||
1 | 2 | ||
3 | Instead of using an OS-specific ifdef test to select the "openpty() | ||
4 | is in pty.h" codepath, make configure check for the existence of | ||
5 | the header and use the new CONFIG_PTY instead. | ||
6 | |||
7 | This is necessary to build on Haiku, which also provides openpty() | ||
8 | via pty.h. | ||
9 | |||
10 | Signed-off-by: David Carlier <devnexen@gmail.com> | ||
11 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
12 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
13 | Message-id: 20200703145614.16684-3-peter.maydell@linaro.org | ||
14 | [PMM: Expanded commit message; rename to HAVE_PTY_H] | ||
15 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
16 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
17 | --- | ||
18 | configure | 9 +++++++++ | ||
19 | util/qemu-openpty.c | 2 +- | ||
20 | 2 files changed, 10 insertions(+), 1 deletion(-) | ||
21 | |||
22 | diff --git a/configure b/configure | ||
23 | index XXXXXXX..XXXXXXX 100755 | ||
24 | --- a/configure | ||
25 | +++ b/configure | ||
26 | @@ -XXX,XX +XXX,XX @@ else | ||
27 | l2tpv3=no | ||
28 | fi | ||
29 | |||
30 | +if check_include "pty.h" ; then | ||
31 | + pty_h=yes | ||
32 | +else | ||
33 | + pty_h=no | ||
34 | +fi | ||
35 | + | ||
36 | ######################################### | ||
37 | # vhost interdependencies and host support | ||
38 | |||
39 | @@ -XXX,XX +XXX,XX @@ fi | ||
40 | if test "$sheepdog" = "yes" ; then | ||
41 | echo "CONFIG_SHEEPDOG=y" >> $config_host_mak | ||
42 | fi | ||
43 | +if test "$pty_h" = "yes" ; then | ||
44 | + echo "HAVE_PTY_H=y" >> $config_host_mak | ||
45 | +fi | ||
46 | if test "$fuzzing" = "yes" ; then | ||
47 | if test "$have_fuzzer" = "yes"; then | ||
48 | FUZZ_LDFLAGS=" -fsanitize=address,fuzzer" | ||
49 | diff --git a/util/qemu-openpty.c b/util/qemu-openpty.c | ||
50 | index XXXXXXX..XXXXXXX 100644 | ||
51 | --- a/util/qemu-openpty.c | ||
52 | +++ b/util/qemu-openpty.c | ||
53 | @@ -XXX,XX +XXX,XX @@ | ||
54 | #include "qemu/osdep.h" | ||
55 | #include "qemu-common.h" | ||
56 | |||
57 | -#if defined(__GLIBC__) | ||
58 | +#if defined HAVE_PTY_H | ||
59 | # include <pty.h> | ||
60 | #elif defined CONFIG_BSD | ||
61 | # include <termios.h> | ||
62 | -- | ||
63 | 2.20.1 | ||
64 | |||
65 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | From: David CARLIER <devnexen@gmail.com> | ||
1 | 2 | ||
3 | Instead of assuming that all POSIX platforms provide mlockall(), | ||
4 | test for it in configure. If the host doesn't provide this platform | ||
5 | then os_mlock() will fail -ENOSYS, as it does already on Windows. | ||
6 | |||
7 | This is necessary for Haiku, which does not have mlockall(). | ||
8 | |||
9 | Signed-off-by: David Carlier <devnexen@gmail.com> | ||
10 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
11 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
12 | Message-id: 20200703145614.16684-4-peter.maydell@linaro.org | ||
13 | [PMM: Expanded commit message; rename to HAVE_MLOCKALL] | ||
14 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
15 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
16 | --- | ||
17 | configure | 15 +++++++++++++++ | ||
18 | os-posix.c | 4 ++++ | ||
19 | 2 files changed, 19 insertions(+) | ||
20 | |||
21 | diff --git a/configure b/configure | ||
22 | index XXXXXXX..XXXXXXX 100755 | ||
23 | --- a/configure | ||
24 | +++ b/configure | ||
25 | @@ -XXX,XX +XXX,XX @@ else | ||
26 | pty_h=no | ||
27 | fi | ||
28 | |||
29 | +cat > $TMPC <<EOF | ||
30 | +#include <sys/mman.h> | ||
31 | +int main(int argc, char *argv[]) { | ||
32 | + return mlockall(MCL_FUTURE); | ||
33 | +} | ||
34 | +EOF | ||
35 | +if compile_prog "" "" ; then | ||
36 | + have_mlockall=yes | ||
37 | +else | ||
38 | + have_mlockall=no | ||
39 | +fi | ||
40 | + | ||
41 | ######################################### | ||
42 | # vhost interdependencies and host support | ||
43 | |||
44 | @@ -XXX,XX +XXX,XX @@ fi | ||
45 | if test "$pty_h" = "yes" ; then | ||
46 | echo "HAVE_PTY_H=y" >> $config_host_mak | ||
47 | fi | ||
48 | +if test "$have_mlockall" = "yes" ; then | ||
49 | + echo "HAVE_MLOCKALL=y" >> $config_host_mak | ||
50 | +fi | ||
51 | if test "$fuzzing" = "yes" ; then | ||
52 | if test "$have_fuzzer" = "yes"; then | ||
53 | FUZZ_LDFLAGS=" -fsanitize=address,fuzzer" | ||
54 | diff --git a/os-posix.c b/os-posix.c | ||
55 | index XXXXXXX..XXXXXXX 100644 | ||
56 | --- a/os-posix.c | ||
57 | +++ b/os-posix.c | ||
58 | @@ -XXX,XX +XXX,XX @@ bool is_daemonized(void) | ||
59 | |||
60 | int os_mlock(void) | ||
61 | { | ||
62 | +#ifdef HAVE_MLOCKALL | ||
63 | int ret = 0; | ||
64 | |||
65 | ret = mlockall(MCL_CURRENT | MCL_FUTURE); | ||
66 | @@ -XXX,XX +XXX,XX @@ int os_mlock(void) | ||
67 | } | ||
68 | |||
69 | return ret; | ||
70 | +#else | ||
71 | + return -ENOSYS; | ||
72 | +#endif | ||
73 | } | ||
74 | -- | ||
75 | 2.20.1 | ||
76 | |||
77 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | From: David CARLIER <devnexen@gmail.com> | ||
1 | 2 | ||
3 | Regularize our handling of <sys/signal.h>: currently we include it in | ||
4 | osdep.h, but only for OpenBSD, and we include it without an ifdef | ||
5 | guard in a couple of C files. This causes problems for Haiku, which | ||
6 | doesn't have that header. | ||
7 | |||
8 | Instead, check in configure whether sys/signal.h exists, and if it | ||
9 | does then always include it from osdep.h. | ||
10 | |||
11 | Signed-off-by: David Carlier <devnexen@gmail.com> | ||
12 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
13 | Reviewed-by: Thomas Huth <thuth@redhat.com> | ||
14 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
15 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
16 | Message-id: 20200703145614.16684-5-peter.maydell@linaro.org | ||
17 | [PMM: Expanded commit message; rename to HAVE_SYS_SIGNAL_H] | ||
18 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
19 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
20 | --- | ||
21 | configure | 10 ++++++++++ | ||
22 | include/qemu/osdep.h | 2 +- | ||
23 | hw/xen/xen-legacy-backend.c | 1 - | ||
24 | util/oslib-posix.c | 1 - | ||
25 | 4 files changed, 11 insertions(+), 3 deletions(-) | ||
26 | |||
27 | diff --git a/configure b/configure | ||
28 | index XXXXXXX..XXXXXXX 100755 | ||
29 | --- a/configure | ||
30 | +++ b/configure | ||
31 | @@ -XXX,XX +XXX,XX @@ if check_include "libdrm/drm.h" ; then | ||
32 | have_drm_h=yes | ||
33 | fi | ||
34 | |||
35 | +######################################### | ||
36 | +# sys/signal.h check | ||
37 | +have_sys_signal_h=no | ||
38 | +if check_include "sys/signal.h" ; then | ||
39 | + have_sys_signal_h=yes | ||
40 | +fi | ||
41 | + | ||
42 | ########################################## | ||
43 | # VTE probe | ||
44 | |||
45 | @@ -XXX,XX +XXX,XX @@ fi | ||
46 | if test "$have_openpty" = "yes" ; then | ||
47 | echo "HAVE_OPENPTY=y" >> $config_host_mak | ||
48 | fi | ||
49 | +if test "$have_sys_signal_h" = "yes" ; then | ||
50 | + echo "HAVE_SYS_SIGNAL_H=y" >> $config_host_mak | ||
51 | +fi | ||
52 | |||
53 | # Work around a system header bug with some kernel/XFS header | ||
54 | # versions where they both try to define 'struct fsxattr': | ||
55 | diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h | ||
56 | index XXXXXXX..XXXXXXX 100644 | ||
57 | --- a/include/qemu/osdep.h | ||
58 | +++ b/include/qemu/osdep.h | ||
59 | @@ -XXX,XX +XXX,XX @@ extern int daemon(int, int); | ||
60 | #include <setjmp.h> | ||
61 | #include <signal.h> | ||
62 | |||
63 | -#ifdef __OpenBSD__ | ||
64 | +#ifdef HAVE_SYS_SIGNAL_H | ||
65 | #include <sys/signal.h> | ||
66 | #endif | ||
67 | |||
68 | diff --git a/hw/xen/xen-legacy-backend.c b/hw/xen/xen-legacy-backend.c | ||
69 | index XXXXXXX..XXXXXXX 100644 | ||
70 | --- a/hw/xen/xen-legacy-backend.c | ||
71 | +++ b/hw/xen/xen-legacy-backend.c | ||
72 | @@ -XXX,XX +XXX,XX @@ | ||
73 | */ | ||
74 | |||
75 | #include "qemu/osdep.h" | ||
76 | -#include <sys/signal.h> | ||
77 | |||
78 | #include "hw/sysbus.h" | ||
79 | #include "hw/boards.h" | ||
80 | diff --git a/util/oslib-posix.c b/util/oslib-posix.c | ||
81 | index XXXXXXX..XXXXXXX 100644 | ||
82 | --- a/util/oslib-posix.c | ||
83 | +++ b/util/oslib-posix.c | ||
84 | @@ -XXX,XX +XXX,XX @@ | ||
85 | #include "qemu/sockets.h" | ||
86 | #include "qemu/thread.h" | ||
87 | #include <libgen.h> | ||
88 | -#include <sys/signal.h> | ||
89 | #include "qemu/cutils.h" | ||
90 | |||
91 | #ifdef CONFIG_LINUX | ||
92 | -- | ||
93 | 2.20.1 | ||
94 | |||
95 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | From: David CARLIER <devnexen@gmail.com> | ||
1 | 2 | ||
3 | Haiku doesn't provide SIGIO; fix this up in osdep.h by defining it as | ||
4 | equal to SIGPOLL. | ||
5 | |||
6 | Signed-off-by: David Carlier <devnexen@gmail.com> | ||
7 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
8 | Reviewed-by: Thomas Huth <thuth@redhat.com> | ||
9 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
10 | Message-id: 20200703145614.16684-6-peter.maydell@linaro.org | ||
11 | [PMM: Expanded commit message] | ||
12 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
13 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
14 | --- | ||
15 | include/qemu/osdep.h | 4 ++++ | ||
16 | 1 file changed, 4 insertions(+) | ||
17 | |||
18 | diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h | ||
19 | index XXXXXXX..XXXXXXX 100644 | ||
20 | --- a/include/qemu/osdep.h | ||
21 | +++ b/include/qemu/osdep.h | ||
22 | @@ -XXX,XX +XXX,XX @@ void qemu_anon_ram_free(void *ptr, size_t size); | ||
23 | #define HAVE_CHARDEV_PARPORT 1 | ||
24 | #endif | ||
25 | |||
26 | +#if defined(__HAIKU__) | ||
27 | +#define SIGIO SIGPOLL | ||
28 | +#endif | ||
29 | + | ||
30 | #if defined(CONFIG_LINUX) | ||
31 | #ifndef BUS_MCEERR_AR | ||
32 | #define BUS_MCEERR_AR 4 | ||
33 | -- | ||
34 | 2.20.1 | ||
35 | |||
36 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | From: David CARLIER <devnexen@gmail.com> | ||
1 | 2 | ||
3 | Haiku puts the bswap* functions in <endian.h>; pull in that | ||
4 | include file on that platform. | ||
5 | |||
6 | Signed-off-by: David Carlier <devnexen@gmail.com> | ||
7 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
8 | Reviewed-by: Thomas Huth <thuth@redhat.com> | ||
9 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> | ||
10 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
11 | Message-id: 20200703145614.16684-7-peter.maydell@linaro.org | ||
12 | [PMM: Expanded commit message] | ||
13 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
14 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
15 | --- | ||
16 | include/qemu/bswap.h | 2 ++ | ||
17 | 1 file changed, 2 insertions(+) | ||
18 | |||
19 | diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h | ||
20 | index XXXXXXX..XXXXXXX 100644 | ||
21 | --- a/include/qemu/bswap.h | ||
22 | +++ b/include/qemu/bswap.h | ||
23 | @@ -XXX,XX +XXX,XX @@ | ||
24 | # include <machine/bswap.h> | ||
25 | #elif defined(__FreeBSD__) | ||
26 | # include <sys/endian.h> | ||
27 | +#elif defined(__HAIKU__) | ||
28 | +# include <endian.h> | ||
29 | #elif defined(CONFIG_BYTESWAP_H) | ||
30 | # include <byteswap.h> | ||
31 | |||
32 | -- | ||
33 | 2.20.1 | ||
34 | |||
35 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | From: David CARLIER <devnexen@gmail.com> | ||
1 | 2 | ||
3 | util/compatfd.c includes <sys/syscall.h> so that the CONFIG_SIGNALFD | ||
4 | code can use SYS_signalfd. Guard the #include with CONFIG_SIGNALFD | ||
5 | to avoid portability issues on hosts like Haiku which do not | ||
6 | provide that header file. | ||
7 | |||
8 | Signed-off-by: David Carlier <devnexen@gmail.com> | ||
9 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
10 | Reviewed-by: Thomas Huth <thuth@redhat.com> | ||
11 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
12 | Message-id: 20200703145614.16684-8-peter.maydell@linaro.org | ||
13 | [PMM: Expanded commit message] | ||
14 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
15 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
16 | --- | ||
17 | util/compatfd.c | 2 ++ | ||
18 | 1 file changed, 2 insertions(+) | ||
19 | |||
20 | diff --git a/util/compatfd.c b/util/compatfd.c | ||
21 | index XXXXXXX..XXXXXXX 100644 | ||
22 | --- a/util/compatfd.c | ||
23 | +++ b/util/compatfd.c | ||
24 | @@ -XXX,XX +XXX,XX @@ | ||
25 | #include "qemu/osdep.h" | ||
26 | #include "qemu/thread.h" | ||
27 | |||
28 | +#if defined(CONFIG_SIGNALFD) | ||
29 | #include <sys/syscall.h> | ||
30 | +#endif | ||
31 | |||
32 | struct sigfd_compat_info | ||
33 | { | ||
34 | -- | ||
35 | 2.20.1 | ||
36 | |||
37 | diff view generated by jsdifflib |
New patch | |||
---|---|---|---|
1 | From: David CARLIER <devnexen@gmail.com> | ||
1 | 2 | ||
3 | The qemu_init_exec_dir() function is inherently non-portable; | ||
4 | provide an implementation for Haiku hosts. | ||
5 | |||
6 | Signed-off-by: David Carlier <devnexen@gmail.com> | ||
7 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
8 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
9 | Message-id: 20200703145614.16684-9-peter.maydell@linaro.org | ||
10 | [PMM: Expanded commit message] | ||
11 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
12 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
13 | --- | ||
14 | util/oslib-posix.c | 19 +++++++++++++++++++ | ||
15 | 1 file changed, 19 insertions(+) | ||
16 | |||
17 | diff --git a/util/oslib-posix.c b/util/oslib-posix.c | ||
18 | index XXXXXXX..XXXXXXX 100644 | ||
19 | --- a/util/oslib-posix.c | ||
20 | +++ b/util/oslib-posix.c | ||
21 | @@ -XXX,XX +XXX,XX @@ | ||
22 | #include <mach-o/dyld.h> | ||
23 | #endif | ||
24 | |||
25 | +#ifdef __HAIKU__ | ||
26 | +#include <kernel/image.h> | ||
27 | +#endif | ||
28 | + | ||
29 | #include "qemu/mmap-alloc.h" | ||
30 | |||
31 | #ifdef CONFIG_DEBUG_STACK_USAGE | ||
32 | @@ -XXX,XX +XXX,XX @@ void qemu_init_exec_dir(const char *argv0) | ||
33 | } | ||
34 | } | ||
35 | } | ||
36 | +#elif defined(__HAIKU__) | ||
37 | + { | ||
38 | + image_info ii; | ||
39 | + int32_t c = 0; | ||
40 | + | ||
41 | + *buf = '\0'; | ||
42 | + while (get_next_image_info(0, &c, &ii) == B_OK) { | ||
43 | + if (ii.type == B_APP_IMAGE) { | ||
44 | + strncpy(buf, ii.name, sizeof(buf)); | ||
45 | + buf[sizeof(buf) - 1] = 0; | ||
46 | + p = buf; | ||
47 | + break; | ||
48 | + } | ||
49 | + } | ||
50 | + } | ||
51 | #endif | ||
52 | /* If we don't have any way of figuring out the actual executable | ||
53 | location then try argv[0]. */ | ||
54 | -- | ||
55 | 2.20.1 | ||
56 | |||
57 | diff view generated by jsdifflib |
1 | From: Wei Huang <wei@redhat.com> | 1 | From: Gerd Hoffmann <kraxel@redhat.com> |
---|---|---|---|
2 | 2 | ||
3 | For guest kernel that supports KASLR, the load address can change every | 3 | Given this isn't perforance critical at all lets avoid the non-portable |
4 | time when guest VM runs. To find the physical base address correctly, | 4 | d_type and use fstat instead to check whenever the file is a chardev. |
5 | current QEMU dump searches VMCOREINFO for the string "NUMBER(phys_base)=". | ||
6 | However this string pattern is only available on x86_64. AArch64 uses a | ||
7 | different field, called "NUMBER(PHYS_OFFSET)=". This patch makes sure | ||
8 | QEMU dump uses the correct string on AArch64. | ||
9 | 5 | ||
10 | Signed-off-by: Wei Huang <wei@redhat.com> | 6 | Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> |
11 | Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> | 7 | Reported-by: David Carlier <devnexen@gmail.com> |
12 | Message-id: 1520615003-20869-1-git-send-email-wei@redhat.com | 8 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> |
9 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
10 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
11 | Message-id: 20200703145614.16684-10-peter.maydell@linaro.org | ||
12 | Message-id: 20200701180302.14821-1-kraxel@redhat.com | ||
13 | [PMM: fixed comment style; tweaked subject line] | ||
14 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
13 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 15 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
14 | --- | 16 | --- |
15 | dump.c | 14 +++++++++++--- | 17 | util/drm.c | 19 ++++++++++++++----- |
16 | 1 file changed, 11 insertions(+), 3 deletions(-) | 18 | 1 file changed, 14 insertions(+), 5 deletions(-) |
17 | 19 | ||
18 | diff --git a/dump.c b/dump.c | 20 | diff --git a/util/drm.c b/util/drm.c |
19 | index XXXXXXX..XXXXXXX 100644 | 21 | index XXXXXXX..XXXXXXX 100644 |
20 | --- a/dump.c | 22 | --- a/util/drm.c |
21 | +++ b/dump.c | 23 | +++ b/util/drm.c |
22 | @@ -XXX,XX +XXX,XX @@ static void vmcoreinfo_update_phys_base(DumpState *s) | 24 | @@ -XXX,XX +XXX,XX @@ int qemu_drm_rendernode_open(const char *rendernode) |
23 | 25 | { | |
24 | lines = g_strsplit((char *)vmci, "\n", -1); | 26 | DIR *dir; |
25 | for (i = 0; lines[i]; i++) { | 27 | struct dirent *e; |
26 | - if (g_str_has_prefix(lines[i], "NUMBER(phys_base)=")) { | 28 | - int r, fd; |
27 | - if (qemu_strtou64(lines[i] + 18, NULL, 16, | 29 | + struct stat st; |
28 | + const char *prefix = NULL; | 30 | + int r, fd, ret; |
31 | char *p; | ||
32 | |||
33 | if (rendernode) { | ||
34 | @@ -XXX,XX +XXX,XX @@ int qemu_drm_rendernode_open(const char *rendernode) | ||
35 | |||
36 | fd = -1; | ||
37 | while ((e = readdir(dir))) { | ||
38 | - if (e->d_type != DT_CHR) { | ||
39 | - continue; | ||
40 | - } | ||
41 | - | ||
42 | if (strncmp(e->d_name, "renderD", 7)) { | ||
43 | continue; | ||
44 | } | ||
45 | @@ -XXX,XX +XXX,XX @@ int qemu_drm_rendernode_open(const char *rendernode) | ||
46 | g_free(p); | ||
47 | continue; | ||
48 | } | ||
29 | + | 49 | + |
30 | + if (s->dump_info.d_machine == EM_X86_64) { | 50 | + /* |
31 | + prefix = "NUMBER(phys_base)="; | 51 | + * prefer fstat() over checking e->d_type == DT_CHR for |
32 | + } else if (s->dump_info.d_machine == EM_AARCH64) { | 52 | + * portability reasons |
33 | + prefix = "NUMBER(PHYS_OFFSET)="; | 53 | + */ |
54 | + ret = fstat(r, &st); | ||
55 | + if (ret < 0 || (st.st_mode & S_IFMT) != S_IFCHR) { | ||
56 | + close(r); | ||
57 | + g_free(p); | ||
58 | + continue; | ||
34 | + } | 59 | + } |
35 | + | 60 | + |
36 | + if (prefix && g_str_has_prefix(lines[i], prefix)) { | 61 | fd = r; |
37 | + if (qemu_strtou64(lines[i] + strlen(prefix), NULL, 16, | 62 | g_free(p); |
38 | &phys_base) < 0) { | 63 | break; |
39 | - warn_report("Failed to read NUMBER(phys_base)="); | ||
40 | + warn_report("Failed to read %s", prefix); | ||
41 | } else { | ||
42 | s->dump_info.phys_base = phys_base; | ||
43 | } | ||
44 | -- | 64 | -- |
45 | 2.16.2 | 65 | 2.20.1 |
46 | 66 | ||
47 | 67 | diff view generated by jsdifflib |
1 | From: Andrey Smirnov <andrew.smirnov@gmail.com> | 1 | From: Wentong Wu <wentong.wu@intel.com> |
---|---|---|---|
2 | 2 | ||
3 | Code of imx_update() is slightly confusing since the "flags" variable | 3 | Add DISAS_NORETURN case for nothing more to generate because at runtime |
4 | doesn't really corespond to anything in real hardware and server as a | 4 | execution will never return from some helper call. And at the same time |
5 | kitchensink accumulating events normally reported via USR1 and USR2 | 5 | replace DISAS_UPDATE in t_gen_helper_raise_exception and gen_exception |
6 | registers. | 6 | with the newly added DISAS_NORETURN. |
7 | 7 | ||
8 | Change the code to explicitly evaluate state of interrupts reported | 8 | Signed-off-by: Wentong Wu <wentong.wu@intel.com> |
9 | via USR1 and USR2 against corresponding masking bits and use the to | 9 | Message-id: 20200710233433.19729-1-wentong.wu@intel.com |
10 | detemine if IRQ line should be asserted or not. | 10 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> |
11 | |||
12 | NOTE: Check for UTS1_TXEMPTY being set has been dropped for two | ||
13 | reasons: | ||
14 | |||
15 | 1. Emulation code implements a single character FIFO, so this flag | ||
16 | will always be set since characters are trasmitted as a part of | ||
17 | the code emulating "push" into the FIFO | ||
18 | |||
19 | 2. imx_update() is really just a function doing ORing and maksing | ||
20 | of reported events, so checking for UTS1_TXEMPTY should happen, | ||
21 | if it's ever really needed should probably happen outside of | ||
22 | it. | ||
23 | |||
24 | Cc: qemu-devel@nongnu.org | ||
25 | Cc: qemu-arm@nongnu.org | ||
26 | Cc: Bill Paul <wpaul@windriver.com> | ||
27 | Cc: Peter Maydell <peter.maydell@linaro.org> | ||
28 | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> | ||
29 | Message-id: 20180315191141.6789-1-andrew.smirnov@gmail.com | ||
30 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
31 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 11 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
32 | --- | 12 | --- |
33 | hw/char/imx_serial.c | 24 ++++++++++++++++-------- | 13 | target/nios2/translate.c | 5 +++-- |
34 | 1 file changed, 16 insertions(+), 8 deletions(-) | 14 | 1 file changed, 3 insertions(+), 2 deletions(-) |
35 | 15 | ||
36 | diff --git a/hw/char/imx_serial.c b/hw/char/imx_serial.c | 16 | diff --git a/target/nios2/translate.c b/target/nios2/translate.c |
37 | index XXXXXXX..XXXXXXX 100644 | 17 | index XXXXXXX..XXXXXXX 100644 |
38 | --- a/hw/char/imx_serial.c | 18 | --- a/target/nios2/translate.c |
39 | +++ b/hw/char/imx_serial.c | 19 | +++ b/target/nios2/translate.c |
40 | @@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_imx_serial = { | 20 | @@ -XXX,XX +XXX,XX @@ static void t_gen_helper_raise_exception(DisasContext *dc, |
41 | 21 | tcg_gen_movi_tl(dc->cpu_R[R_PC], dc->pc); | |
42 | static void imx_update(IMXSerialState *s) | 22 | gen_helper_raise_exception(dc->cpu_env, tmp); |
43 | { | 23 | tcg_temp_free_i32(tmp); |
44 | - uint32_t flags; | 24 | - dc->is_jmp = DISAS_UPDATE; |
45 | + uint32_t usr1; | 25 | + dc->is_jmp = DISAS_NORETURN; |
46 | + uint32_t usr2; | ||
47 | + uint32_t mask; | ||
48 | |||
49 | - flags = (s->usr1 & s->ucr1) & (USR1_TRDY|USR1_RRDY); | ||
50 | - if (s->ucr1 & UCR1_TXMPTYEN) { | ||
51 | - flags |= (s->uts1 & UTS1_TXEMPTY); | ||
52 | - } else { | ||
53 | - flags &= ~USR1_TRDY; | ||
54 | - } | ||
55 | + /* | ||
56 | + * Lucky for us TRDY and RRDY has the same offset in both USR1 and | ||
57 | + * UCR1, so we can get away with something as simple as the | ||
58 | + * following: | ||
59 | + */ | ||
60 | + usr1 = s->usr1 & s->ucr1 & (USR1_TRDY | USR1_RRDY); | ||
61 | + /* | ||
62 | + * Bits that we want in USR2 are not as conveniently laid out, | ||
63 | + * unfortunately. | ||
64 | + */ | ||
65 | + mask = (s->ucr1 & UCR1_TXMPTYEN) ? USR2_TXFE : 0; | ||
66 | + usr2 = s->usr2 & mask; | ||
67 | |||
68 | - qemu_set_irq(s->irq, !!flags); | ||
69 | + qemu_set_irq(s->irq, usr1 || usr2); | ||
70 | } | 26 | } |
71 | 27 | ||
72 | static void imx_serial_reset(IMXSerialState *s) | 28 | static bool use_goto_tb(DisasContext *dc, uint32_t dest) |
29 | @@ -XXX,XX +XXX,XX @@ static void gen_exception(DisasContext *dc, uint32_t excp) | ||
30 | tcg_gen_movi_tl(cpu_R[R_PC], dc->pc); | ||
31 | gen_helper_raise_exception(cpu_env, tmp); | ||
32 | tcg_temp_free_i32(tmp); | ||
33 | - dc->is_jmp = DISAS_UPDATE; | ||
34 | + dc->is_jmp = DISAS_NORETURN; | ||
35 | } | ||
36 | |||
37 | /* generate intermediate code for basic block 'tb'. */ | ||
38 | @@ -XXX,XX +XXX,XX @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns) | ||
39 | tcg_gen_exit_tb(NULL, 0); | ||
40 | break; | ||
41 | |||
42 | + case DISAS_NORETURN: | ||
43 | case DISAS_TB_JUMP: | ||
44 | /* nothing more to generate */ | ||
45 | break; | ||
73 | -- | 46 | -- |
74 | 2.16.2 | 47 | 2.20.1 |
75 | 48 | ||
76 | 49 | diff view generated by jsdifflib |
1 | The TypeInfo and state struct for bcm2386 disagree about what the | 1 | From: Wentong Wu <wentong.wu@intel.com> |
---|---|---|---|
2 | parent class is -- the TypeInfo says it's TYPE_SYS_BUS_DEVICE, | ||
3 | but the BCM2386State struct only defines the parent_obj field | ||
4 | as DeviceState. This would have caused problems if anything | ||
5 | actually tried to treat the object as a TYPE_SYS_BUS_DEVICE. | ||
6 | Fix the TypeInfo to use TYPE_DEVICE as the parent, since we don't | ||
7 | need any of the additional functionality TYPE_SYS_BUS_DEVICE | ||
8 | provides. | ||
9 | 2 | ||
3 | In line the semantics of DISAS_UPDATE on nios2 target with other targets | ||
4 | which is to explicitly write the PC back into the cpu state before doing | ||
5 | a tcg_gen_exit_tb(). | ||
6 | |||
7 | Signed-off-by: Wentong Wu <wentong.wu@intel.com> | ||
8 | Message-id: 20200710233433.19729-2-wentong.wu@intel.com | ||
9 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | ||
10 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 10 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
11 | Reviewed-by: Andrew Baumann <Andrew.Baumann@microsoft.com> | ||
12 | Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> | ||
13 | Message-id: 20180313153458.26822-5-peter.maydell@linaro.org | ||
14 | --- | 11 | --- |
15 | hw/arm/bcm2836.c | 2 +- | 12 | target/nios2/translate.c | 2 +- |
16 | 1 file changed, 1 insertion(+), 1 deletion(-) | 13 | 1 file changed, 1 insertion(+), 1 deletion(-) |
17 | 14 | ||
18 | diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c | 15 | diff --git a/target/nios2/translate.c b/target/nios2/translate.c |
19 | index XXXXXXX..XXXXXXX 100644 | 16 | index XXXXXXX..XXXXXXX 100644 |
20 | --- a/hw/arm/bcm2836.c | 17 | --- a/target/nios2/translate.c |
21 | +++ b/hw/arm/bcm2836.c | 18 | +++ b/target/nios2/translate.c |
22 | @@ -XXX,XX +XXX,XX @@ static void bcm2836_class_init(ObjectClass *oc, void *data) | 19 | @@ -XXX,XX +XXX,XX @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns) |
23 | 20 | /* Indicate where the next block should start */ | |
24 | static const TypeInfo bcm2836_type_info = { | 21 | switch (dc->is_jmp) { |
25 | .name = TYPE_BCM2836, | 22 | case DISAS_NEXT: |
26 | - .parent = TYPE_SYS_BUS_DEVICE, | 23 | + case DISAS_UPDATE: |
27 | + .parent = TYPE_DEVICE, | 24 | /* Save the current PC back into the CPU register */ |
28 | .instance_size = sizeof(BCM2836State), | 25 | tcg_gen_movi_tl(cpu_R[R_PC], dc->pc); |
29 | .instance_init = bcm2836_init, | 26 | tcg_gen_exit_tb(NULL, 0); |
30 | .class_init = bcm2836_class_init, | 27 | @@ -XXX,XX +XXX,XX @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns) |
28 | |||
29 | default: | ||
30 | case DISAS_JUMP: | ||
31 | - case DISAS_UPDATE: | ||
32 | /* The jump will already have updated the PC register */ | ||
33 | tcg_gen_exit_tb(NULL, 0); | ||
34 | break; | ||
31 | -- | 35 | -- |
32 | 2.16.2 | 36 | 2.20.1 |
33 | 37 | ||
34 | 38 | diff view generated by jsdifflib |
1 | If we're directly booting a Linux kernel and the CPU supports both | 1 | From: Wentong Wu <wentong.wu@intel.com> |
---|---|---|---|
2 | EL3 and EL2, we start the kernel in EL2, as it expects. We must also | ||
3 | set the SCR_EL3.HCE bit in this situation, so that the HVC | ||
4 | instruction is enabled rather than UNDEFing. Otherwise at least some | ||
5 | kernels will panic when trying to initialize KVM in the guest. | ||
6 | 2 | ||
3 | wrctl instruction on nios2 target will cause checking cpu | ||
4 | interrupt but tcg_handle_interrupt() will call cpu_abort() | ||
5 | if the CPU gets an interrupt while it's not in 'can do IO' | ||
6 | state, so add gen_io_start around wrctl instruction. Also | ||
7 | at the same time, end the onging TB with DISAS_UPDATE. | ||
8 | |||
9 | Signed-off-by: Wentong Wu <wentong.wu@intel.com> | ||
10 | Message-id: 20200710233433.19729-3-wentong.wu@intel.com | ||
11 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
7 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 12 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
8 | Message-id: 20180313153458.26822-4-peter.maydell@linaro.org | ||
9 | --- | 13 | --- |
10 | hw/arm/boot.c | 5 +++++ | 14 | target/nios2/translate.c | 5 +++++ |
11 | 1 file changed, 5 insertions(+) | 15 | 1 file changed, 5 insertions(+) |
12 | 16 | ||
13 | diff --git a/hw/arm/boot.c b/hw/arm/boot.c | 17 | diff --git a/target/nios2/translate.c b/target/nios2/translate.c |
14 | index XXXXXXX..XXXXXXX 100644 | 18 | index XXXXXXX..XXXXXXX 100644 |
15 | --- a/hw/arm/boot.c | 19 | --- a/target/nios2/translate.c |
16 | +++ b/hw/arm/boot.c | 20 | +++ b/target/nios2/translate.c |
17 | @@ -XXX,XX +XXX,XX @@ static void do_cpu_reset(void *opaque) | 21 | @@ -XXX,XX +XXX,XX @@ |
18 | assert(!info->secure_board_setup); | 22 | #include "exec/cpu_ldst.h" |
19 | } | 23 | #include "exec/translator.h" |
20 | 24 | #include "qemu/qemu-print.h" | |
21 | + if (arm_feature(env, ARM_FEATURE_EL2)) { | 25 | +#include "exec/gen-icount.h" |
22 | + /* If we have EL2 then Linux expects the HVC insn to work */ | 26 | |
23 | + env->cp15.scr_el3 |= SCR_HCE; | 27 | /* is_jmp field values */ |
24 | + } | 28 | #define DISAS_JUMP DISAS_TARGET_0 /* only pc was modified dynamically */ |
25 | + | 29 | @@ -XXX,XX +XXX,XX @@ static void wrctl(DisasContext *dc, uint32_t code, uint32_t flags) |
26 | /* Set to non-secure if not a secure boot */ | 30 | /* If interrupts were enabled using WRCTL, trigger them. */ |
27 | if (!info->secure_boot && | 31 | #if !defined(CONFIG_USER_ONLY) |
28 | (cs != first_cpu || !info->secure_board_setup)) { | 32 | if ((instr.imm5 + CR_BASE) == CR_STATUS) { |
33 | + if (tb_cflags(dc->tb) & CF_USE_ICOUNT) { | ||
34 | + gen_io_start(); | ||
35 | + } | ||
36 | gen_helper_check_interrupts(dc->cpu_env); | ||
37 | + dc->is_jmp = DISAS_UPDATE; | ||
38 | } | ||
39 | #endif | ||
40 | } | ||
29 | -- | 41 | -- |
30 | 2.16.2 | 42 | 2.20.1 |
31 | 43 | ||
32 | 44 | diff view generated by jsdifflib |
1 | From: Andrey Smirnov <andrew.smirnov@gmail.com> | 1 | From: Wentong Wu <wentong.wu@intel.com> |
---|---|---|---|
2 | 2 | ||
3 | Add support for "TX complete"/TXDC interrupt generate by real HW since | 3 | Only when guest code is unmasking interrupts, terminate the excution |
4 | it is needed to support guests other than Linux. | 4 | of translated code and exit to the main CPU loop to handle previous |
5 | pended interrupts because of the interrupts mask by guest code. | ||
5 | 6 | ||
6 | Based on the patch by Bill Paul as found here: | 7 | Signed-off-by: Wentong Wu <wentong.wu@intel.com> |
7 | https://bugs.launchpad.net/qemu/+bug/1753314 | 8 | Message-id: 20200710233433.19729-4-wentong.wu@intel.com |
8 | |||
9 | Cc: qemu-devel@nongnu.org | ||
10 | Cc: qemu-arm@nongnu.org | ||
11 | Cc: Bill Paul <wpaul@windriver.com> | ||
12 | Cc: Peter Maydell <peter.maydell@linaro.org> | ||
13 | Signed-off-by: Bill Paul <wpaul@windriver.com> | ||
14 | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> | ||
15 | Message-id: 20180315191141.6789-2-andrew.smirnov@gmail.com | ||
16 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | 9 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> |
17 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 10 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
18 | --- | 11 | --- |
19 | include/hw/char/imx_serial.h | 3 +++ | 12 | hw/nios2/cpu_pic.c | 3 ++- |
20 | hw/char/imx_serial.c | 20 +++++++++++++++++--- | 13 | 1 file changed, 2 insertions(+), 1 deletion(-) |
21 | 2 files changed, 20 insertions(+), 3 deletions(-) | ||
22 | 14 | ||
23 | diff --git a/include/hw/char/imx_serial.h b/include/hw/char/imx_serial.h | 15 | diff --git a/hw/nios2/cpu_pic.c b/hw/nios2/cpu_pic.c |
24 | index XXXXXXX..XXXXXXX 100644 | 16 | index XXXXXXX..XXXXXXX 100644 |
25 | --- a/include/hw/char/imx_serial.h | 17 | --- a/hw/nios2/cpu_pic.c |
26 | +++ b/include/hw/char/imx_serial.h | 18 | +++ b/hw/nios2/cpu_pic.c |
27 | @@ -XXX,XX +XXX,XX @@ | 19 | @@ -XXX,XX +XXX,XX @@ static void nios2_pic_cpu_handler(void *opaque, int irq, int level) |
28 | #define UCR2_RXEN (1<<1) /* Receiver enable */ | 20 | |
29 | #define UCR2_SRST (1<<0) /* Reset complete */ | 21 | void nios2_check_interrupts(CPUNios2State *env) |
30 | 22 | { | |
31 | +#define UCR4_TCEN BIT(3) /* TX complete interrupt enable */ | 23 | - if (env->irq_pending) { |
32 | + | 24 | + if (env->irq_pending && |
33 | #define UTS1_TXEMPTY (1<<6) | 25 | + (env->regs[CR_STATUS] & CR_STATUS_PIE)) { |
34 | #define UTS1_RXEMPTY (1<<5) | 26 | env->irq_pending = 0; |
35 | #define UTS1_TXFULL (1<<4) | 27 | cpu_interrupt(env_cpu(env), CPU_INTERRUPT_HARD); |
36 | @@ -XXX,XX +XXX,XX @@ typedef struct IMXSerialState { | 28 | } |
37 | uint32_t ubmr; | ||
38 | uint32_t ubrc; | ||
39 | uint32_t ucr3; | ||
40 | + uint32_t ucr4; | ||
41 | |||
42 | qemu_irq irq; | ||
43 | CharBackend chr; | ||
44 | diff --git a/hw/char/imx_serial.c b/hw/char/imx_serial.c | ||
45 | index XXXXXXX..XXXXXXX 100644 | ||
46 | --- a/hw/char/imx_serial.c | ||
47 | +++ b/hw/char/imx_serial.c | ||
48 | @@ -XXX,XX +XXX,XX @@ | ||
49 | |||
50 | static const VMStateDescription vmstate_imx_serial = { | ||
51 | .name = TYPE_IMX_SERIAL, | ||
52 | - .version_id = 1, | ||
53 | - .minimum_version_id = 1, | ||
54 | + .version_id = 2, | ||
55 | + .minimum_version_id = 2, | ||
56 | .fields = (VMStateField[]) { | ||
57 | VMSTATE_INT32(readbuff, IMXSerialState), | ||
58 | VMSTATE_UINT32(usr1, IMXSerialState), | ||
59 | @@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_imx_serial = { | ||
60 | VMSTATE_UINT32(ubmr, IMXSerialState), | ||
61 | VMSTATE_UINT32(ubrc, IMXSerialState), | ||
62 | VMSTATE_UINT32(ucr3, IMXSerialState), | ||
63 | + VMSTATE_UINT32(ucr4, IMXSerialState), | ||
64 | VMSTATE_END_OF_LIST() | ||
65 | }, | ||
66 | }; | ||
67 | @@ -XXX,XX +XXX,XX @@ static void imx_update(IMXSerialState *s) | ||
68 | * unfortunately. | ||
69 | */ | ||
70 | mask = (s->ucr1 & UCR1_TXMPTYEN) ? USR2_TXFE : 0; | ||
71 | + /* | ||
72 | + * TCEN and TXDC are both bit 3 | ||
73 | + */ | ||
74 | + mask |= s->ucr4 & UCR4_TCEN; | ||
75 | + | ||
76 | usr2 = s->usr2 & mask; | ||
77 | |||
78 | qemu_set_irq(s->irq, usr1 || usr2); | ||
79 | @@ -XXX,XX +XXX,XX @@ static uint64_t imx_serial_read(void *opaque, hwaddr offset, | ||
80 | return s->ucr3; | ||
81 | |||
82 | case 0x23: /* UCR4 */ | ||
83 | + return s->ucr4; | ||
84 | + | ||
85 | case 0x29: /* BRM Incremental */ | ||
86 | return 0x0; /* TODO */ | ||
87 | |||
88 | @@ -XXX,XX +XXX,XX @@ static void imx_serial_write(void *opaque, hwaddr offset, | ||
89 | * qemu_chr_fe_write and background I/O callbacks */ | ||
90 | qemu_chr_fe_write_all(&s->chr, &ch, 1); | ||
91 | s->usr1 &= ~USR1_TRDY; | ||
92 | + s->usr2 &= ~USR2_TXDC; | ||
93 | imx_update(s); | ||
94 | s->usr1 |= USR1_TRDY; | ||
95 | + s->usr2 |= USR2_TXDC; | ||
96 | imx_update(s); | ||
97 | } | ||
98 | break; | ||
99 | @@ -XXX,XX +XXX,XX @@ static void imx_serial_write(void *opaque, hwaddr offset, | ||
100 | s->ucr3 = value & 0xffff; | ||
101 | break; | ||
102 | |||
103 | - case 0x2d: /* UTS1 */ | ||
104 | case 0x23: /* UCR4 */ | ||
105 | + s->ucr4 = value & 0xffff; | ||
106 | + imx_update(s); | ||
107 | + break; | ||
108 | + | ||
109 | + case 0x2d: /* UTS1 */ | ||
110 | qemu_log_mask(LOG_UNIMP, "[%s]%s: Unimplemented reg 0x%" | ||
111 | HWADDR_PRIx "\n", TYPE_IMX_SERIAL, __func__, offset); | ||
112 | /* TODO */ | ||
113 | -- | 29 | -- |
114 | 2.16.2 | 30 | 2.20.1 |
115 | 31 | ||
116 | 32 | diff view generated by jsdifflib |
1 | Add some assertions that if we're about to boot an AArch64 kernel, | 1 | Remove the hardcoded tabs from hw/arm/tosa.c. There aren't |
---|---|---|---|
2 | the board code has not mistakenly set either secure_boot or | 2 | many, but since they're all in constant #defines they're not |
3 | secure_board_setup. It doesn't make sense to set secure_boot, | 3 | going to go away with our usual "only when we touch a function" |
4 | because all AArch64 kernels must be booted in non-secure mode. | 4 | policy on reformatting. |
5 | |||
6 | It might in theory make sense to set secure_board_setup, but | ||
7 | we don't currently support that, because only the AArch32 | ||
8 | bootloader[] code calls this hook; bootloader_aarch64[] does not. | ||
9 | Since we don't have a current need for this functionality, just | ||
10 | assert that we don't try to use it. If it's needed we'll add | ||
11 | it later. | ||
12 | 5 | ||
13 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 6 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
14 | Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> | 7 | Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
15 | Message-id: 20180313153458.26822-3-peter.maydell@linaro.org | 8 | Message-id: 20200628203748.14250-2-peter.maydell@linaro.org |
16 | --- | 9 | --- |
17 | hw/arm/boot.c | 7 +++++++ | 10 | hw/arm/tosa.c | 44 ++++++++++++++++++++++---------------------- |
18 | 1 file changed, 7 insertions(+) | 11 | 1 file changed, 22 insertions(+), 22 deletions(-) |
19 | 12 | ||
20 | diff --git a/hw/arm/boot.c b/hw/arm/boot.c | 13 | diff --git a/hw/arm/tosa.c b/hw/arm/tosa.c |
21 | index XXXXXXX..XXXXXXX 100644 | 14 | index XXXXXXX..XXXXXXX 100644 |
22 | --- a/hw/arm/boot.c | 15 | --- a/hw/arm/tosa.c |
23 | +++ b/hw/arm/boot.c | 16 | +++ b/hw/arm/tosa.c |
24 | @@ -XXX,XX +XXX,XX @@ static void do_cpu_reset(void *opaque) | 17 | @@ -XXX,XX +XXX,XX @@ |
25 | } else { | 18 | #include "hw/sysbus.h" |
26 | env->pstate = PSTATE_MODE_EL1h; | 19 | #include "exec/address-spaces.h" |
27 | } | 20 | |
28 | + /* AArch64 kernels never boot in secure mode */ | 21 | -#define TOSA_RAM 0x04000000 |
29 | + assert(!info->secure_boot); | 22 | -#define TOSA_ROM 0x00800000 |
30 | + /* This hook is only supported for AArch32 currently: | 23 | +#define TOSA_RAM 0x04000000 |
31 | + * bootloader_aarch64[] will not call the hook, and | 24 | +#define TOSA_ROM 0x00800000 |
32 | + * the code above has already dropped us into EL2 or EL1. | 25 | |
33 | + */ | 26 | -#define TOSA_GPIO_USB_IN (5) |
34 | + assert(!info->secure_board_setup); | 27 | -#define TOSA_GPIO_nSD_DETECT (9) |
35 | } | 28 | -#define TOSA_GPIO_ON_RESET (19) |
36 | 29 | -#define TOSA_GPIO_CF_IRQ (21) /* CF slot0 Ready */ | |
37 | /* Set to non-secure if not a secure boot */ | 30 | -#define TOSA_GPIO_CF_CD (13) |
31 | -#define TOSA_GPIO_TC6393XB_INT (15) | ||
32 | -#define TOSA_GPIO_JC_CF_IRQ (36) /* CF slot1 Ready */ | ||
33 | +#define TOSA_GPIO_USB_IN (5) | ||
34 | +#define TOSA_GPIO_nSD_DETECT (9) | ||
35 | +#define TOSA_GPIO_ON_RESET (19) | ||
36 | +#define TOSA_GPIO_CF_IRQ (21) /* CF slot0 Ready */ | ||
37 | +#define TOSA_GPIO_CF_CD (13) | ||
38 | +#define TOSA_GPIO_TC6393XB_INT (15) | ||
39 | +#define TOSA_GPIO_JC_CF_IRQ (36) /* CF slot1 Ready */ | ||
40 | |||
41 | -#define TOSA_SCOOP_GPIO_BASE 1 | ||
42 | -#define TOSA_GPIO_IR_POWERDWN (TOSA_SCOOP_GPIO_BASE + 2) | ||
43 | -#define TOSA_GPIO_SD_WP (TOSA_SCOOP_GPIO_BASE + 3) | ||
44 | -#define TOSA_GPIO_PWR_ON (TOSA_SCOOP_GPIO_BASE + 4) | ||
45 | +#define TOSA_SCOOP_GPIO_BASE 1 | ||
46 | +#define TOSA_GPIO_IR_POWERDWN (TOSA_SCOOP_GPIO_BASE + 2) | ||
47 | +#define TOSA_GPIO_SD_WP (TOSA_SCOOP_GPIO_BASE + 3) | ||
48 | +#define TOSA_GPIO_PWR_ON (TOSA_SCOOP_GPIO_BASE + 4) | ||
49 | |||
50 | -#define TOSA_SCOOP_JC_GPIO_BASE 1 | ||
51 | -#define TOSA_GPIO_BT_LED (TOSA_SCOOP_JC_GPIO_BASE + 0) | ||
52 | -#define TOSA_GPIO_NOTE_LED (TOSA_SCOOP_JC_GPIO_BASE + 1) | ||
53 | -#define TOSA_GPIO_CHRG_ERR_LED (TOSA_SCOOP_JC_GPIO_BASE + 2) | ||
54 | -#define TOSA_GPIO_TC6393XB_L3V_ON (TOSA_SCOOP_JC_GPIO_BASE + 5) | ||
55 | -#define TOSA_GPIO_WLAN_LED (TOSA_SCOOP_JC_GPIO_BASE + 7) | ||
56 | +#define TOSA_SCOOP_JC_GPIO_BASE 1 | ||
57 | +#define TOSA_GPIO_BT_LED (TOSA_SCOOP_JC_GPIO_BASE + 0) | ||
58 | +#define TOSA_GPIO_NOTE_LED (TOSA_SCOOP_JC_GPIO_BASE + 1) | ||
59 | +#define TOSA_GPIO_CHRG_ERR_LED (TOSA_SCOOP_JC_GPIO_BASE + 2) | ||
60 | +#define TOSA_GPIO_TC6393XB_L3V_ON (TOSA_SCOOP_JC_GPIO_BASE + 5) | ||
61 | +#define TOSA_GPIO_WLAN_LED (TOSA_SCOOP_JC_GPIO_BASE + 7) | ||
62 | |||
63 | -#define DAC_BASE 0x4e | ||
64 | -#define DAC_CH1 0 | ||
65 | -#define DAC_CH2 1 | ||
66 | +#define DAC_BASE 0x4e | ||
67 | +#define DAC_CH1 0 | ||
68 | +#define DAC_CH2 1 | ||
69 | |||
70 | static void tosa_microdrive_attach(PXA2xxState *cpu) | ||
71 | { | ||
38 | -- | 72 | -- |
39 | 2.16.2 | 73 | 2.20.1 |
40 | 74 | ||
41 | 75 | diff view generated by jsdifflib |
1 | Now we have separate types for BCM2386 and BCM2387, we might as well | 1 | Currently we have a free-floating set of IRQs and a function |
---|---|---|---|
2 | just hard-code the CPU type they use rather than having it passed | 2 | tosa_out_switch() which handle the GPIO lines on the tosa board which |
3 | through as an object property. This then lets us put the initialization | 3 | connect to LEDs, and another free-floating IRQ and tosa_reset() |
4 | of the CPU object in init rather than realize. | 4 | function to handle the GPIO line that resets the system. Encapsulate |
5 | this behaviour in a simple QOM device. | ||
5 | 6 | ||
6 | Note that this change means that it's no longer possible on | 7 | This commit fixes Coverity issue CID 1421929 (which pointed out that |
7 | the command line to use -cpu to ask for a different kind of | 8 | the 'outsignals' in tosa_gpio_setup() were leaked), because it |
8 | CPU than the SoC supports. This was never a supported thing to | 9 | removes the use of the qemu_allocate_irqs() API from this code |
9 | do anyway; we were just not sanity-checking the command line. | 10 | entirely. |
10 | |||
11 | This does require us to only build the bcm2837 object on | ||
12 | TARGET_AARCH64 configs, since otherwise it won't instantiate | ||
13 | due to the missing cortex-a53 device and "make check" will fail. | ||
14 | 11 | ||
15 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 12 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
16 | Reviewed-by: Andrew Baumann <Andrew.Baumann@microsoft.com> | ||
17 | Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> | 13 | Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
18 | Message-id: 20180313153458.26822-9-peter.maydell@linaro.org | 14 | Message-id: 20200628203748.14250-3-peter.maydell@linaro.org |
19 | --- | 15 | --- |
20 | hw/arm/bcm2836.c | 24 +++++++++++++++--------- | 16 | hw/arm/tosa.c | 88 +++++++++++++++++++++++++++++++++++++-------------- |
21 | hw/arm/raspi.c | 2 -- | 17 | 1 file changed, 64 insertions(+), 24 deletions(-) |
22 | 2 files changed, 15 insertions(+), 11 deletions(-) | ||
23 | 18 | ||
24 | diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c | 19 | diff --git a/hw/arm/tosa.c b/hw/arm/tosa.c |
25 | index XXXXXXX..XXXXXXX 100644 | 20 | index XXXXXXX..XXXXXXX 100644 |
26 | --- a/hw/arm/bcm2836.c | 21 | --- a/hw/arm/tosa.c |
27 | +++ b/hw/arm/bcm2836.c | 22 | +++ b/hw/arm/tosa.c |
28 | @@ -XXX,XX +XXX,XX @@ | 23 | @@ -XXX,XX +XXX,XX @@ static void tosa_microdrive_attach(PXA2xxState *cpu) |
29 | 24 | pxa2xx_pcmcia_attach(cpu->pcmcia[0], md); | |
30 | struct BCM283XInfo { | 25 | } |
31 | const char *name; | 26 | |
32 | + const char *cpu_type; | 27 | -static void tosa_out_switch(void *opaque, int line, int level) |
33 | int clusterid; | 28 | +/* |
29 | + * Encapsulation of some GPIO line behaviour for the Tosa board | ||
30 | + * | ||
31 | + * QEMU interface: | ||
32 | + * + named GPIO inputs "leds[0..3]": assert to light LEDs | ||
33 | + * + named GPIO input "reset": when asserted, resets the system | ||
34 | + */ | ||
35 | + | ||
36 | +#define TYPE_TOSA_MISC_GPIO "tosa-misc-gpio" | ||
37 | +#define TOSA_MISC_GPIO(obj) \ | ||
38 | + OBJECT_CHECK(TosaMiscGPIOState, (obj), TYPE_TOSA_MISC_GPIO) | ||
39 | + | ||
40 | +typedef struct TosaMiscGPIOState { | ||
41 | + SysBusDevice parent_obj; | ||
42 | +} TosaMiscGPIOState; | ||
43 | + | ||
44 | +static void tosa_gpio_leds(void *opaque, int line, int level) | ||
45 | { | ||
46 | switch (line) { | ||
47 | - case 0: | ||
48 | - fprintf(stderr, "blue LED %s.\n", level ? "on" : "off"); | ||
49 | - break; | ||
50 | - case 1: | ||
51 | - fprintf(stderr, "green LED %s.\n", level ? "on" : "off"); | ||
52 | - break; | ||
53 | - case 2: | ||
54 | - fprintf(stderr, "amber LED %s.\n", level ? "on" : "off"); | ||
55 | - break; | ||
56 | - case 3: | ||
57 | - fprintf(stderr, "wlan LED %s.\n", level ? "on" : "off"); | ||
58 | - break; | ||
59 | - default: | ||
60 | - fprintf(stderr, "Uhandled out event: %d = %d\n", line, level); | ||
61 | - break; | ||
62 | + case 0: | ||
63 | + fprintf(stderr, "blue LED %s.\n", level ? "on" : "off"); | ||
64 | + break; | ||
65 | + case 1: | ||
66 | + fprintf(stderr, "green LED %s.\n", level ? "on" : "off"); | ||
67 | + break; | ||
68 | + case 2: | ||
69 | + fprintf(stderr, "amber LED %s.\n", level ? "on" : "off"); | ||
70 | + break; | ||
71 | + case 3: | ||
72 | + fprintf(stderr, "wlan LED %s.\n", level ? "on" : "off"); | ||
73 | + break; | ||
74 | + default: | ||
75 | + g_assert_not_reached(); | ||
76 | } | ||
77 | } | ||
78 | |||
79 | @@ -XXX,XX +XXX,XX @@ static void tosa_reset(void *opaque, int line, int level) | ||
80 | } | ||
81 | } | ||
82 | |||
83 | +static void tosa_misc_gpio_init(Object *obj) | ||
84 | +{ | ||
85 | + DeviceState *dev = DEVICE(obj); | ||
86 | + | ||
87 | + qdev_init_gpio_in_named(dev, tosa_gpio_leds, "leds", 4); | ||
88 | + qdev_init_gpio_in_named(dev, tosa_reset, "reset", 1); | ||
89 | +} | ||
90 | + | ||
91 | static void tosa_gpio_setup(PXA2xxState *cpu, | ||
92 | DeviceState *scp0, | ||
93 | DeviceState *scp1, | ||
94 | TC6393xbState *tmio) | ||
95 | { | ||
96 | - qemu_irq *outsignals = qemu_allocate_irqs(tosa_out_switch, cpu, 4); | ||
97 | - qemu_irq reset; | ||
98 | + DeviceState *misc_gpio; | ||
99 | + | ||
100 | + misc_gpio = sysbus_create_simple(TYPE_TOSA_MISC_GPIO, -1, NULL); | ||
101 | |||
102 | /* MMC/SD host */ | ||
103 | pxa2xx_mmci_handlers(cpu->mmc, | ||
104 | @@ -XXX,XX +XXX,XX @@ static void tosa_gpio_setup(PXA2xxState *cpu, | ||
105 | qemu_irq_invert(qdev_get_gpio_in(cpu->gpio, TOSA_GPIO_nSD_DETECT))); | ||
106 | |||
107 | /* Handle reset */ | ||
108 | - reset = qemu_allocate_irq(tosa_reset, cpu, 0); | ||
109 | - qdev_connect_gpio_out(cpu->gpio, TOSA_GPIO_ON_RESET, reset); | ||
110 | + qdev_connect_gpio_out(cpu->gpio, TOSA_GPIO_ON_RESET, | ||
111 | + qdev_get_gpio_in_named(misc_gpio, "reset", 0)); | ||
112 | |||
113 | /* PCMCIA signals: card's IRQ and Card-Detect */ | ||
114 | pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0], | ||
115 | @@ -XXX,XX +XXX,XX @@ static void tosa_gpio_setup(PXA2xxState *cpu, | ||
116 | qdev_get_gpio_in(cpu->gpio, TOSA_GPIO_JC_CF_IRQ), | ||
117 | NULL); | ||
118 | |||
119 | - qdev_connect_gpio_out(scp1, TOSA_GPIO_BT_LED, outsignals[0]); | ||
120 | - qdev_connect_gpio_out(scp1, TOSA_GPIO_NOTE_LED, outsignals[1]); | ||
121 | - qdev_connect_gpio_out(scp1, TOSA_GPIO_CHRG_ERR_LED, outsignals[2]); | ||
122 | - qdev_connect_gpio_out(scp1, TOSA_GPIO_WLAN_LED, outsignals[3]); | ||
123 | + qdev_connect_gpio_out(scp1, TOSA_GPIO_BT_LED, | ||
124 | + qdev_get_gpio_in_named(misc_gpio, "leds", 0)); | ||
125 | + qdev_connect_gpio_out(scp1, TOSA_GPIO_NOTE_LED, | ||
126 | + qdev_get_gpio_in_named(misc_gpio, "leds", 1)); | ||
127 | + qdev_connect_gpio_out(scp1, TOSA_GPIO_CHRG_ERR_LED, | ||
128 | + qdev_get_gpio_in_named(misc_gpio, "leds", 2)); | ||
129 | + qdev_connect_gpio_out(scp1, TOSA_GPIO_WLAN_LED, | ||
130 | + qdev_get_gpio_in_named(misc_gpio, "leds", 3)); | ||
131 | |||
132 | qdev_connect_gpio_out(scp1, TOSA_GPIO_TC6393XB_L3V_ON, tc6393xb_l3v_get(tmio)); | ||
133 | |||
134 | @@ -XXX,XX +XXX,XX @@ static const TypeInfo tosa_ssp_info = { | ||
135 | .class_init = tosa_ssp_class_init, | ||
34 | }; | 136 | }; |
35 | 137 | ||
36 | static const BCM283XInfo bcm283x_socs[] = { | 138 | +static const TypeInfo tosa_misc_gpio_info = { |
37 | { | 139 | + .name = "tosa-misc-gpio", |
38 | .name = TYPE_BCM2836, | 140 | + .parent = TYPE_SYS_BUS_DEVICE, |
39 | + .cpu_type = ARM_CPU_TYPE_NAME("cortex-a15"), | 141 | + .instance_size = sizeof(TosaMiscGPIOState), |
40 | .clusterid = 0xf, | 142 | + .instance_init = tosa_misc_gpio_init, |
41 | }, | 143 | + /* |
42 | +#ifdef TARGET_AARCH64 | 144 | + * No class init required: device has no internal state so does not |
43 | { | 145 | + * need to set up reset or vmstate, and has no realize method. |
44 | .name = TYPE_BCM2837, | 146 | + */ |
45 | + .cpu_type = ARM_CPU_TYPE_NAME("cortex-a53"), | 147 | +}; |
46 | .clusterid = 0x0, | 148 | + |
47 | }, | 149 | static void tosa_register_types(void) |
48 | +#endif | ||
49 | }; | ||
50 | |||
51 | static void bcm2836_init(Object *obj) | ||
52 | { | 150 | { |
53 | BCM283XState *s = BCM283X(obj); | 151 | type_register_static(&tosa_dac_info); |
54 | + BCM283XClass *bc = BCM283X_GET_CLASS(obj); | 152 | type_register_static(&tosa_ssp_info); |
55 | + const BCM283XInfo *info = bc->info; | 153 | + type_register_static(&tosa_misc_gpio_info); |
56 | + int n; | ||
57 | + | ||
58 | + for (n = 0; n < BCM283X_NCPUS; n++) { | ||
59 | + object_initialize(&s->cpus[n], sizeof(s->cpus[n]), | ||
60 | + info->cpu_type); | ||
61 | + object_property_add_child(obj, "cpu[*]", OBJECT(&s->cpus[n]), | ||
62 | + &error_abort); | ||
63 | + } | ||
64 | |||
65 | object_initialize(&s->control, sizeof(s->control), TYPE_BCM2836_CONTROL); | ||
66 | object_property_add_child(obj, "control", OBJECT(&s->control), NULL); | ||
67 | @@ -XXX,XX +XXX,XX @@ static void bcm2836_realize(DeviceState *dev, Error **errp) | ||
68 | |||
69 | /* common peripherals from bcm2835 */ | ||
70 | |||
71 | - obj = OBJECT(dev); | ||
72 | - for (n = 0; n < BCM283X_NCPUS; n++) { | ||
73 | - object_initialize(&s->cpus[n], sizeof(s->cpus[n]), | ||
74 | - s->cpu_type); | ||
75 | - object_property_add_child(obj, "cpu[*]", OBJECT(&s->cpus[n]), | ||
76 | - &error_abort); | ||
77 | - } | ||
78 | - | ||
79 | obj = object_property_get_link(OBJECT(dev), "ram", &err); | ||
80 | if (obj == NULL) { | ||
81 | error_setg(errp, "%s: required ram link not found: %s", | ||
82 | @@ -XXX,XX +XXX,XX @@ static void bcm2836_realize(DeviceState *dev, Error **errp) | ||
83 | } | 154 | } |
84 | 155 | ||
85 | static Property bcm2836_props[] = { | 156 | type_init(tosa_register_types) |
86 | - DEFINE_PROP_STRING("cpu-type", BCM283XState, cpu_type), | ||
87 | DEFINE_PROP_UINT32("enabled-cpus", BCM283XState, enabled_cpus, | ||
88 | BCM283X_NCPUS), | ||
89 | DEFINE_PROP_END_OF_LIST() | ||
90 | diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c | ||
91 | index XXXXXXX..XXXXXXX 100644 | ||
92 | --- a/hw/arm/raspi.c | ||
93 | +++ b/hw/arm/raspi.c | ||
94 | @@ -XXX,XX +XXX,XX @@ static void raspi_init(MachineState *machine, int version) | ||
95 | /* Setup the SOC */ | ||
96 | object_property_add_const_link(OBJECT(&s->soc), "ram", OBJECT(&s->ram), | ||
97 | &error_abort); | ||
98 | - object_property_set_str(OBJECT(&s->soc), machine->cpu_type, "cpu-type", | ||
99 | - &error_abort); | ||
100 | object_property_set_int(OBJECT(&s->soc), smp_cpus, "enabled-cpus", | ||
101 | &error_abort); | ||
102 | int board_rev = version == 3 ? 0xa02082 : 0xa21041; | ||
103 | -- | 157 | -- |
104 | 2.16.2 | 158 | 2.20.1 |
105 | 159 | ||
106 | 160 | diff view generated by jsdifflib |
1 | The BCM2837 sets the Aff1 field of the MPIDR affinity values for the | 1 | Remove hard-tabs from palm.c. |
---|---|---|---|
2 | CPUs to 0, whereas the BCM2836 uses 0xf. Set this correctly, as it | ||
3 | is required for Linux to boot. | ||
4 | 2 | ||
5 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 3 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
6 | Reviewed-by: Andrew Baumann <Andrew.Baumann@microsoft.com> | 4 | Reviewed-by: Li Qiang <liq3ea@gmail.com> |
7 | Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> | 5 | Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
8 | Message-id: 20180313153458.26822-8-peter.maydell@linaro.org | 6 | Message-id: 20200628214230.2592-2-peter.maydell@linaro.org |
9 | --- | 7 | --- |
10 | hw/arm/bcm2836.c | 11 +++++++---- | 8 | hw/arm/palm.c | 64 +++++++++++++++++++++++++-------------------------- |
11 | 1 file changed, 7 insertions(+), 4 deletions(-) | 9 | 1 file changed, 32 insertions(+), 32 deletions(-) |
12 | 10 | ||
13 | diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c | 11 | diff --git a/hw/arm/palm.c b/hw/arm/palm.c |
14 | index XXXXXXX..XXXXXXX 100644 | 12 | index XXXXXXX..XXXXXXX 100644 |
15 | --- a/hw/arm/bcm2836.c | 13 | --- a/hw/arm/palm.c |
16 | +++ b/hw/arm/bcm2836.c | 14 | +++ b/hw/arm/palm.c |
17 | @@ -XXX,XX +XXX,XX @@ | 15 | @@ -XXX,XX +XXX,XX @@ static const MemoryRegionOps static_ops = { |
18 | 16 | /* Palm Tunsgten|E support */ | |
19 | struct BCM283XInfo { | 17 | |
20 | const char *name; | 18 | /* Shared GPIOs */ |
21 | + int clusterid; | 19 | -#define PALMTE_USBDETECT_GPIO 0 |
20 | -#define PALMTE_USB_OR_DC_GPIO 1 | ||
21 | -#define PALMTE_TSC_GPIO 4 | ||
22 | -#define PALMTE_PINTDAV_GPIO 6 | ||
23 | -#define PALMTE_MMC_WP_GPIO 8 | ||
24 | -#define PALMTE_MMC_POWER_GPIO 9 | ||
25 | -#define PALMTE_HDQ_GPIO 11 | ||
26 | -#define PALMTE_HEADPHONES_GPIO 14 | ||
27 | -#define PALMTE_SPEAKER_GPIO 15 | ||
28 | +#define PALMTE_USBDETECT_GPIO 0 | ||
29 | +#define PALMTE_USB_OR_DC_GPIO 1 | ||
30 | +#define PALMTE_TSC_GPIO 4 | ||
31 | +#define PALMTE_PINTDAV_GPIO 6 | ||
32 | +#define PALMTE_MMC_WP_GPIO 8 | ||
33 | +#define PALMTE_MMC_POWER_GPIO 9 | ||
34 | +#define PALMTE_HDQ_GPIO 11 | ||
35 | +#define PALMTE_HEADPHONES_GPIO 14 | ||
36 | +#define PALMTE_SPEAKER_GPIO 15 | ||
37 | /* MPU private GPIOs */ | ||
38 | -#define PALMTE_DC_GPIO 2 | ||
39 | -#define PALMTE_MMC_SWITCH_GPIO 4 | ||
40 | -#define PALMTE_MMC1_GPIO 6 | ||
41 | -#define PALMTE_MMC2_GPIO 7 | ||
42 | -#define PALMTE_MMC3_GPIO 11 | ||
43 | +#define PALMTE_DC_GPIO 2 | ||
44 | +#define PALMTE_MMC_SWITCH_GPIO 4 | ||
45 | +#define PALMTE_MMC1_GPIO 6 | ||
46 | +#define PALMTE_MMC2_GPIO 7 | ||
47 | +#define PALMTE_MMC3_GPIO 11 | ||
48 | |||
49 | static MouseTransformInfo palmte_pointercal = { | ||
50 | .x = 320, | ||
51 | @@ -XXX,XX +XXX,XX @@ static struct { | ||
52 | int column; | ||
53 | } palmte_keymap[0x80] = { | ||
54 | [0 ... 0x7f] = { -1, -1 }, | ||
55 | - [0x3b] = { 0, 0 }, /* F1 -> Calendar */ | ||
56 | - [0x3c] = { 1, 0 }, /* F2 -> Contacts */ | ||
57 | - [0x3d] = { 2, 0 }, /* F3 -> Tasks List */ | ||
58 | - [0x3e] = { 3, 0 }, /* F4 -> Note Pad */ | ||
59 | - [0x01] = { 4, 0 }, /* Esc -> Power */ | ||
60 | - [0x4b] = { 0, 1 }, /* Left */ | ||
61 | - [0x50] = { 1, 1 }, /* Down */ | ||
62 | - [0x48] = { 2, 1 }, /* Up */ | ||
63 | - [0x4d] = { 3, 1 }, /* Right */ | ||
64 | - [0x4c] = { 4, 1 }, /* Centre */ | ||
65 | - [0x39] = { 4, 1 }, /* Spc -> Centre */ | ||
66 | + [0x3b] = { 0, 0 }, /* F1 -> Calendar */ | ||
67 | + [0x3c] = { 1, 0 }, /* F2 -> Contacts */ | ||
68 | + [0x3d] = { 2, 0 }, /* F3 -> Tasks List */ | ||
69 | + [0x3e] = { 3, 0 }, /* F4 -> Note Pad */ | ||
70 | + [0x01] = { 4, 0 }, /* Esc -> Power */ | ||
71 | + [0x4b] = { 0, 1 }, /* Left */ | ||
72 | + [0x50] = { 1, 1 }, /* Down */ | ||
73 | + [0x48] = { 2, 1 }, /* Up */ | ||
74 | + [0x4d] = { 3, 1 }, /* Right */ | ||
75 | + [0x4c] = { 4, 1 }, /* Centre */ | ||
76 | + [0x39] = { 4, 1 }, /* Spc -> Centre */ | ||
22 | }; | 77 | }; |
23 | 78 | ||
24 | static const BCM283XInfo bcm283x_socs[] = { | 79 | static void palmte_button_event(void *opaque, int keycode) |
25 | { | 80 | @@ -XXX,XX +XXX,XX @@ static void palmte_gpio_setup(struct omap_mpu_state_s *cpu) |
26 | .name = TYPE_BCM2836, | 81 | [PALMTE_MMC_SWITCH_GPIO])); |
27 | + .clusterid = 0xf, | 82 | |
28 | }, | 83 | misc_gpio = qemu_allocate_irqs(palmte_onoff_gpios, cpu, 7); |
29 | { | 84 | - qdev_connect_gpio_out(cpu->gpio, PALMTE_MMC_POWER_GPIO, misc_gpio[0]); |
30 | .name = TYPE_BCM2837, | 85 | - qdev_connect_gpio_out(cpu->gpio, PALMTE_SPEAKER_GPIO, misc_gpio[1]); |
31 | + .clusterid = 0x0, | 86 | - qdev_connect_gpio_out(cpu->gpio, 11, misc_gpio[2]); |
32 | }, | 87 | - qdev_connect_gpio_out(cpu->gpio, 12, misc_gpio[3]); |
33 | }; | 88 | - qdev_connect_gpio_out(cpu->gpio, 13, misc_gpio[4]); |
34 | 89 | - omap_mpuio_out_set(cpu->mpuio, 1, misc_gpio[5]); | |
35 | @@ -XXX,XX +XXX,XX @@ static void bcm2836_init(Object *obj) | 90 | - omap_mpuio_out_set(cpu->mpuio, 3, misc_gpio[6]); |
36 | static void bcm2836_realize(DeviceState *dev, Error **errp) | 91 | + qdev_connect_gpio_out(cpu->gpio, PALMTE_MMC_POWER_GPIO, misc_gpio[0]); |
37 | { | 92 | + qdev_connect_gpio_out(cpu->gpio, PALMTE_SPEAKER_GPIO, misc_gpio[1]); |
38 | BCM283XState *s = BCM283X(dev); | 93 | + qdev_connect_gpio_out(cpu->gpio, 11, misc_gpio[2]); |
39 | + BCM283XClass *bc = BCM283X_GET_CLASS(dev); | 94 | + qdev_connect_gpio_out(cpu->gpio, 12, misc_gpio[3]); |
40 | + const BCM283XInfo *info = bc->info; | 95 | + qdev_connect_gpio_out(cpu->gpio, 13, misc_gpio[4]); |
41 | Object *obj; | 96 | + omap_mpuio_out_set(cpu->mpuio, 1, misc_gpio[5]); |
42 | Error *err = NULL; | 97 | + omap_mpuio_out_set(cpu->mpuio, 3, misc_gpio[6]); |
43 | int n; | 98 | |
44 | @@ -XXX,XX +XXX,XX @@ static void bcm2836_realize(DeviceState *dev, Error **errp) | 99 | /* Reset some inputs to initial state. */ |
45 | qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-fiq", 0)); | 100 | qemu_irq_lower(qdev_get_gpio_in(cpu->gpio, PALMTE_USBDETECT_GPIO)); |
46 | |||
47 | for (n = 0; n < BCM283X_NCPUS; n++) { | ||
48 | - /* Mirror bcm2836, which has clusterid set to 0xf | ||
49 | - * TODO: this should be converted to a property of ARM_CPU | ||
50 | - */ | ||
51 | - s->cpus[n].mp_affinity = 0xF00 | n; | ||
52 | + /* TODO: this should be converted to a property of ARM_CPU */ | ||
53 | + s->cpus[n].mp_affinity = (info->clusterid << 8) | n; | ||
54 | |||
55 | /* set periphbase/CBAR value for CPU-local registers */ | ||
56 | object_property_set_int(OBJECT(&s->cpus[n]), | ||
57 | -- | 101 | -- |
58 | 2.16.2 | 102 | 2.20.1 |
59 | 103 | ||
60 | 104 | diff view generated by jsdifflib |
1 | The raspi3 has AArch64 CPUs, which means that our smpboot | 1 | Replace the free-floating set of IRQs and palmte_onoff_gpios() |
---|---|---|---|
2 | code for keeping the secondary CPUs in a pen needs to have | 2 | function with a simple QOM device that encapsulates this |
3 | a version for A64 as well as A32. Without this, the | 3 | behaviour. |
4 | secondary CPUs go into an infinite loop of taking undefined | 4 | |
5 | instruction exceptions. | 5 | This fixes Coverity issue CID 1421944, which points out that |
6 | the memory returned by qemu_allocate_irqs() is leaked. | ||
6 | 7 | ||
7 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 8 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
9 | Reviewed-by: Li Qiang <liq3ea@gmail.com> | ||
8 | Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> | 10 | Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
9 | Message-id: 20180313153458.26822-10-peter.maydell@linaro.org | 11 | Message-id: 20200628214230.2592-3-peter.maydell@linaro.org |
10 | --- | 12 | --- |
11 | hw/arm/raspi.c | 41 ++++++++++++++++++++++++++++++++++++++++- | 13 | hw/arm/palm.c | 61 +++++++++++++++++++++++++++++++++++++++++++-------- |
12 | 1 file changed, 40 insertions(+), 1 deletion(-) | 14 | 1 file changed, 52 insertions(+), 9 deletions(-) |
13 | 15 | ||
14 | diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c | 16 | diff --git a/hw/arm/palm.c b/hw/arm/palm.c |
15 | index XXXXXXX..XXXXXXX 100644 | 17 | index XXXXXXX..XXXXXXX 100644 |
16 | --- a/hw/arm/raspi.c | 18 | --- a/hw/arm/palm.c |
17 | +++ b/hw/arm/raspi.c | 19 | +++ b/hw/arm/palm.c |
18 | @@ -XXX,XX +XXX,XX @@ | 20 | @@ -XXX,XX +XXX,XX @@ static void palmte_button_event(void *opaque, int keycode) |
19 | #define BOARDSETUP_ADDR (MVBAR_ADDR + 0x20) /* board setup code */ | 21 | !(keycode & 0x80)); |
20 | #define FIRMWARE_ADDR_2 0x8000 /* Pi 2 loads kernel.img here by default */ | ||
21 | #define FIRMWARE_ADDR_3 0x80000 /* Pi 3 loads kernel.img here by default */ | ||
22 | +#define SPINTABLE_ADDR 0xd8 /* Pi 3 bootloader spintable */ | ||
23 | |||
24 | /* Table of Linux board IDs for different Pi versions */ | ||
25 | static const int raspi_boardid[] = {[1] = 0xc42, [2] = 0xc43, [3] = 0xc44}; | ||
26 | @@ -XXX,XX +XXX,XX @@ static void write_smpboot(ARMCPU *cpu, const struct arm_boot_info *info) | ||
27 | info->smp_loader_start); | ||
28 | } | 22 | } |
29 | 23 | ||
30 | +static void write_smpboot64(ARMCPU *cpu, const struct arm_boot_info *info) | 24 | +/* |
25 | + * Encapsulation of some GPIO line behaviour for the Palm board | ||
26 | + * | ||
27 | + * QEMU interface: | ||
28 | + * + unnamed GPIO inputs 0..6: for the various miscellaneous input lines | ||
29 | + */ | ||
30 | + | ||
31 | +#define TYPE_PALM_MISC_GPIO "palm-misc-gpio" | ||
32 | +#define PALM_MISC_GPIO(obj) \ | ||
33 | + OBJECT_CHECK(PalmMiscGPIOState, (obj), TYPE_PALM_MISC_GPIO) | ||
34 | + | ||
35 | +typedef struct PalmMiscGPIOState { | ||
36 | + SysBusDevice parent_obj; | ||
37 | +} PalmMiscGPIOState; | ||
38 | + | ||
39 | static void palmte_onoff_gpios(void *opaque, int line, int level) | ||
40 | { | ||
41 | switch (line) { | ||
42 | @@ -XXX,XX +XXX,XX @@ static void palmte_onoff_gpios(void *opaque, int line, int level) | ||
43 | } | ||
44 | } | ||
45 | |||
46 | +static void palm_misc_gpio_init(Object *obj) | ||
31 | +{ | 47 | +{ |
32 | + /* Unlike the AArch32 version we don't need to call the board setup hook. | 48 | + DeviceState *dev = DEVICE(obj); |
33 | + * The mechanism for doing the spin-table is also entirely different. | ||
34 | + * We must have four 64-bit fields at absolute addresses | ||
35 | + * 0xd8, 0xe0, 0xe8, 0xf0 in RAM, which are the flag variables for | ||
36 | + * our CPUs, and which we must ensure are zero initialized before | ||
37 | + * the primary CPU goes into the kernel. We put these variables inside | ||
38 | + * a rom blob, so that the reset for ROM contents zeroes them for us. | ||
39 | + */ | ||
40 | + static const uint32_t smpboot[] = { | ||
41 | + 0xd2801b05, /* mov x5, 0xd8 */ | ||
42 | + 0xd53800a6, /* mrs x6, mpidr_el1 */ | ||
43 | + 0x924004c6, /* and x6, x6, #0x3 */ | ||
44 | + 0xd503205f, /* spin: wfe */ | ||
45 | + 0xf86678a4, /* ldr x4, [x5,x6,lsl #3] */ | ||
46 | + 0xb4ffffc4, /* cbz x4, spin */ | ||
47 | + 0xd2800000, /* mov x0, #0x0 */ | ||
48 | + 0xd2800001, /* mov x1, #0x0 */ | ||
49 | + 0xd2800002, /* mov x2, #0x0 */ | ||
50 | + 0xd2800003, /* mov x3, #0x0 */ | ||
51 | + 0xd61f0080, /* br x4 */ | ||
52 | + }; | ||
53 | + | 49 | + |
54 | + static const uint64_t spintables[] = { | 50 | + qdev_init_gpio_in(dev, palmte_onoff_gpios, 7); |
55 | + 0, 0, 0, 0 | ||
56 | + }; | ||
57 | + | ||
58 | + rom_add_blob_fixed("raspi_smpboot", smpboot, sizeof(smpboot), | ||
59 | + info->smp_loader_start); | ||
60 | + rom_add_blob_fixed("raspi_spintables", spintables, sizeof(spintables), | ||
61 | + SPINTABLE_ADDR); | ||
62 | +} | 51 | +} |
63 | + | 52 | + |
64 | static void write_board_setup(ARMCPU *cpu, const struct arm_boot_info *info) | 53 | +static const TypeInfo palm_misc_gpio_info = { |
54 | + .name = TYPE_PALM_MISC_GPIO, | ||
55 | + .parent = TYPE_SYS_BUS_DEVICE, | ||
56 | + .instance_size = sizeof(PalmMiscGPIOState), | ||
57 | + .instance_init = palm_misc_gpio_init, | ||
58 | + /* | ||
59 | + * No class init required: device has no internal state so does not | ||
60 | + * need to set up reset or vmstate, and has no realize method. | ||
61 | + */ | ||
62 | +}; | ||
63 | + | ||
64 | static void palmte_gpio_setup(struct omap_mpu_state_s *cpu) | ||
65 | { | 65 | { |
66 | arm_write_secure_board_setup_dummy_smc(cpu, info, MVBAR_ADDR); | 66 | - qemu_irq *misc_gpio; |
67 | @@ -XXX,XX +XXX,XX @@ static void setup_boot(MachineState *machine, int version, size_t ram_size) | 67 | + DeviceState *misc_gpio; |
68 | /* Pi2 and Pi3 requires SMP setup */ | 68 | + |
69 | if (version >= 2) { | 69 | + misc_gpio = sysbus_create_simple(TYPE_PALM_MISC_GPIO, -1, NULL); |
70 | binfo.smp_loader_start = SMPBOOT_ADDR; | 70 | |
71 | - binfo.write_secondary_boot = write_smpboot; | 71 | omap_mmc_handlers(cpu->mmc, |
72 | + if (version == 2) { | 72 | qdev_get_gpio_in(cpu->gpio, PALMTE_MMC_WP_GPIO), |
73 | + binfo.write_secondary_boot = write_smpboot; | 73 | qemu_irq_invert(omap_mpuio_in_get(cpu->mpuio) |
74 | + } else { | 74 | [PALMTE_MMC_SWITCH_GPIO])); |
75 | + binfo.write_secondary_boot = write_smpboot64; | 75 | |
76 | + } | 76 | - misc_gpio = qemu_allocate_irqs(palmte_onoff_gpios, cpu, 7); |
77 | binfo.secondary_cpu_reset_hook = reset_secondary; | 77 | - qdev_connect_gpio_out(cpu->gpio, PALMTE_MMC_POWER_GPIO, misc_gpio[0]); |
78 | } | 78 | - qdev_connect_gpio_out(cpu->gpio, PALMTE_SPEAKER_GPIO, misc_gpio[1]); |
79 | 79 | - qdev_connect_gpio_out(cpu->gpio, 11, misc_gpio[2]); | |
80 | - qdev_connect_gpio_out(cpu->gpio, 12, misc_gpio[3]); | ||
81 | - qdev_connect_gpio_out(cpu->gpio, 13, misc_gpio[4]); | ||
82 | - omap_mpuio_out_set(cpu->mpuio, 1, misc_gpio[5]); | ||
83 | - omap_mpuio_out_set(cpu->mpuio, 3, misc_gpio[6]); | ||
84 | + qdev_connect_gpio_out(cpu->gpio, PALMTE_MMC_POWER_GPIO, | ||
85 | + qdev_get_gpio_in(misc_gpio, 0)); | ||
86 | + qdev_connect_gpio_out(cpu->gpio, PALMTE_SPEAKER_GPIO, | ||
87 | + qdev_get_gpio_in(misc_gpio, 1)); | ||
88 | + qdev_connect_gpio_out(cpu->gpio, 11, qdev_get_gpio_in(misc_gpio, 2)); | ||
89 | + qdev_connect_gpio_out(cpu->gpio, 12, qdev_get_gpio_in(misc_gpio, 3)); | ||
90 | + qdev_connect_gpio_out(cpu->gpio, 13, qdev_get_gpio_in(misc_gpio, 4)); | ||
91 | + omap_mpuio_out_set(cpu->mpuio, 1, qdev_get_gpio_in(misc_gpio, 5)); | ||
92 | + omap_mpuio_out_set(cpu->mpuio, 3, qdev_get_gpio_in(misc_gpio, 6)); | ||
93 | |||
94 | /* Reset some inputs to initial state. */ | ||
95 | qemu_irq_lower(qdev_get_gpio_in(cpu->gpio, PALMTE_USBDETECT_GPIO)); | ||
96 | @@ -XXX,XX +XXX,XX @@ static void palmte_machine_init(MachineClass *mc) | ||
97 | } | ||
98 | |||
99 | DEFINE_MACHINE("cheetah", palmte_machine_init) | ||
100 | + | ||
101 | +static void palm_register_types(void) | ||
102 | +{ | ||
103 | + type_register_static(&palm_misc_gpio_info); | ||
104 | +} | ||
105 | + | ||
106 | +type_init(palm_register_types) | ||
80 | -- | 107 | -- |
81 | 2.16.2 | 108 | 2.20.1 |
82 | 109 | ||
83 | 110 | diff view generated by jsdifflib |
1 | For the rpi1 and 2 we want to boot the Linux kernel via some | 1 | From: Philippe Mathieu-Daudé <f4bug@amsat.org> |
---|---|---|---|
2 | custom setup code that makes sure that the SMC instruction | ||
3 | acts as a no-op, because it's used for cache maintenance. | ||
4 | The rpi3 boots AArch64 kernels, which don't need SMC for | ||
5 | cache maintenance and always expect to be booted non-secure. | ||
6 | Don't fill in the aarch32-specific parts of the binfo struct. | ||
7 | 2 | ||
3 | Since added in commit 2bea128c3d, each SDHCI is wired with a SD | ||
4 | card, using empty card when no block drive provided. This is not | ||
5 | the desired behavior. The SDHCI exposes a SD bus to plug cards | ||
6 | on, if no card available, it is fine to have an unplugged bus. | ||
7 | |||
8 | Avoid creating unnecessary SD card device when no block drive | ||
9 | provided. | ||
10 | |||
11 | Fixes: 2bea128c3d ("hw/sd/aspeed_sdhci: New device") | ||
12 | Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> | ||
13 | Message-id: 20200705173402.15620-1-f4bug@amsat.org | ||
14 | Reviewed-by: Cédric Le Goater <clg@kaod.org> | ||
8 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 15 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
9 | Reviewed-by: Andrew Baumann <Andrew.Baumann@microsoft.com> | ||
10 | Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> | ||
11 | Message-id: 20180313153458.26822-2-peter.maydell@linaro.org | ||
12 | --- | 16 | --- |
13 | hw/arm/raspi.c | 17 +++++++++++++---- | 17 | hw/arm/aspeed.c | 9 +++++---- |
14 | 1 file changed, 13 insertions(+), 4 deletions(-) | 18 | 1 file changed, 5 insertions(+), 4 deletions(-) |
15 | 19 | ||
16 | diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c | 20 | diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c |
17 | index XXXXXXX..XXXXXXX 100644 | 21 | index XXXXXXX..XXXXXXX 100644 |
18 | --- a/hw/arm/raspi.c | 22 | --- a/hw/arm/aspeed.c |
19 | +++ b/hw/arm/raspi.c | 23 | +++ b/hw/arm/aspeed.c |
20 | @@ -XXX,XX +XXX,XX @@ static void setup_boot(MachineState *machine, int version, size_t ram_size) | 24 | @@ -XXX,XX +XXX,XX @@ static void sdhci_attach_drive(SDHCIState *sdhci, DriveInfo *dinfo) |
21 | binfo.board_id = raspi_boardid[version]; | 25 | { |
22 | binfo.ram_size = ram_size; | 26 | DeviceState *card; |
23 | binfo.nb_cpus = smp_cpus; | 27 | |
24 | - binfo.board_setup_addr = BOARDSETUP_ADDR; | 28 | - card = qdev_new(TYPE_SD_CARD); |
25 | - binfo.write_board_setup = write_board_setup; | 29 | - if (dinfo) { |
26 | - binfo.secure_board_setup = true; | 30 | - qdev_prop_set_drive_err(card, "drive", blk_by_legacy_dinfo(dinfo), |
27 | - binfo.secure_boot = true; | 31 | - &error_fatal); |
28 | + | 32 | + if (!dinfo) { |
29 | + if (version <= 2) { | 33 | + return; |
30 | + /* The rpi1 and 2 require some custom setup code to run in Secure | 34 | } |
31 | + * mode before booting a kernel (to set up the SMC vectors so | 35 | + card = qdev_new(TYPE_SD_CARD); |
32 | + * that we get a no-op SMC; this is used by Linux to call the | 36 | + qdev_prop_set_drive_err(card, "drive", blk_by_legacy_dinfo(dinfo), |
33 | + * firmware for some cache maintenance operations. | 37 | + &error_fatal); |
34 | + * The rpi3 doesn't need this. | 38 | qdev_realize_and_unref(card, |
35 | + */ | 39 | qdev_get_child_bus(DEVICE(sdhci), "sd-bus"), |
36 | + binfo.board_setup_addr = BOARDSETUP_ADDR; | 40 | &error_fatal); |
37 | + binfo.write_board_setup = write_board_setup; | ||
38 | + binfo.secure_board_setup = true; | ||
39 | + binfo.secure_boot = true; | ||
40 | + } | ||
41 | |||
42 | /* Pi2 and Pi3 requires SMP setup */ | ||
43 | if (version >= 2) { | ||
44 | -- | 41 | -- |
45 | 2.16.2 | 42 | 2.20.1 |
46 | 43 | ||
47 | 44 | diff view generated by jsdifflib |