target-arm queue. The big thing here is the landing of the 3-phase

reset patches...

The following changes since commit 204aa60b37c23a89e690d418f49787d274303ca7:

Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-jan-29-2020' into staging (2020-01-30 14:18:45 +0000)

https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200130

for you to fetch changes up to dea101a1ae9968c9fec6ab0291489dad7c49f36f:

target/arm/cpu: Add the kvm-no-adjvtime CPU property (2020-01-30 16:02:06 +0000)

* hw/core/or-irq: Fix incorrect assert forbidding num-lines == MAX_OR_LINES

* target/arm/arm-semi: Don't let the guest close stdin/stdout/stderr

* aspeed: some minor bugfixes

* aspeed: add eMMC controller model for AST2600 SoC

* hw/arm/raspi: Remove obsolete use of -smp to set the soc 'enabled-cpus'

* New 3-phase reset API for device models

* hw/intc/arm_gicv3_kvm: Stop wrongly programming GICR_PENDBASER.PTZ bit

* Arm KVM: stop/restart the guest counter when the VM is stopped and started

Andrew Jeffery (2):

hw/sd: Configure number of slots exposed by the ASPEED SDHCI model

hw/arm: ast2600: Wire up the eMMC controller

Andrew Jones (6):

target/arm/kvm: trivial: Clean up header documentation

hw/arm/virt: Add missing 5.0 options call to 4.2 options

target/arm/kvm64: kvm64 cpus have timer registers

tests/arm-cpu-features: Check feature default values

target/arm/kvm: Implement virtual time adjustment

target/arm/cpu: Add the kvm-no-adjvtime CPU property

Cédric Le Goater (2):

ftgmac100: check RX and TX buffer alignment

hw/arm/aspeed: add a 'execute-in-place' property to boot directly from CE0

Damien Hedde (11):

add device_legacy_reset function to prepare for reset api change

hw/core/qdev: add trace events to help with resettable transition

hw/core: create Resettable QOM interface

hw/core: add Resettable support to BusClass and DeviceClass

hw/core/resettable: add support for changing parent

hw/core/qdev: handle parent bus change regarding resettable

hw/core/qdev: update hotplug reset regarding resettable

hw/core: deprecate old reset functions and introduce new ones

docs/devel/reset.rst: add doc about Resettable interface

vl: replace deprecated qbus_reset_all registration

hw/s390x/ipl: replace deprecated qdev_reset_all registration

Joel Stanley (1):

misc/pca9552: Add qom set and get

The num-lines property of the TYPE_OR_GATE device sets the number

of input lines it has. An assert() in or_irq_realize() restricts

this to the maximum supported by the implementation. However we

got the condition in the assert wrong: it should be using <=,

because num-lines == MAX_OR_LINES is permitted, and means that

all entries from 0 to MAX_OR_LINES-1 in the s->levels[] array

are used.

Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>

Reviewed-by: Guenter Roeck <linux@roeck-us.net>

Message-id: 20200120142235.10432-1-peter.maydell@linaro.org

hw/core/or-irq.c | 2 +-

diff --git a/hw/core/or-irq.c b/hw/core/or-irq.c

--- a/hw/core/or-irq.c

+++ b/hw/core/or-irq.c

@@ -XXX,XX +XXX,XX @@ static void or_irq_realize(DeviceState *dev, Error **errp)

{

qemu_or_irq *s = OR_IRQ(dev);

- assert(s->num_lines < MAX_OR_LINES);

+ assert(s->num_lines <= MAX_OR_LINES);

qdev_init_gpio_in(dev, or_irq_handler, s->num_lines);

}

2.20.1

The guest can use the semihosting API to open a handle

corresponding to QEMU's own stdin, stdout, or stderr.

When the guest closes this handle, we should not

close the underlying host stdin/stdout/stderr

the way we would do if the handle corresponded to

a host fd we'd opened on behalf of the guest in SYS_OPEN.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>

Message-id: 20200124172954.28481-1-peter.maydell@linaro.org

target/arm/arm-semi.c | 9 +++++++++

1 file changed, 9 insertions(+)

diff --git a/target/arm/arm-semi.c b/target/arm/arm-semi.c

--- a/target/arm/arm-semi.c

+++ b/target/arm/arm-semi.c

@@ -XXX,XX +XXX,XX @@ static uint32_t host_closefn(ARMCPU *cpu, GuestFD *gf)

CPUARMState *env = &cpu->env;

+ /*

+ * Only close the underlying host fd if it's one we opened on behalf

+ * of the guest in SYS_OPEN.

+ */

+ if (gf->hostfd == STDIN_FILENO ||

+ gf->hostfd == STDOUT_FILENO ||

+ gf->hostfd == STDERR_FILENO) {

+ return 0;

+ }

return set_swi_errno(env, close(gf->hostfd));

2.20.1

From: Andrew Jeffery <andrew@aj.id.au>

include/hw/sd/aspeed_sdhci.h | 1 +

hw/arm/aspeed.c | 2 +-

hw/arm/aspeed_ast2600.c | 2 ++

hw/arm/aspeed_soc.c | 2 ++

hw/sd/aspeed_sdhci.c | 11 +++++++++--

5 files changed, 15 insertions(+), 3 deletions(-)

diff --git a/include/hw/sd/aspeed_sdhci.h b/include/hw/sd/aspeed_sdhci.h

--- a/include/hw/sd/aspeed_sdhci.h

+++ b/include/hw/sd/aspeed_sdhci.h

@@ -XXX,XX +XXX,XX @@ typedef struct AspeedSDHCIState {

SysBusDevice parent;

SDHCIState slots[ASPEED_SDHCI_NUM_SLOTS];

+ uint8_t num_slots;

MemoryRegion iomem;

qemu_irq irq;

diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/arm/aspeed.c

+++ b/hw/arm/aspeed.c

@@ -XXX,XX +XXX,XX @@ static void aspeed_machine_init(MachineState *machine)

amc->i2c_init(bmc);

}

- for (i = 0; i < ARRAY_SIZE(bmc->soc.sdhci.slots); i++) {

+ for (i = 0; i < bmc->soc.sdhci.num_slots; i++) {

SDHCIState *sdhci = &bmc->soc.sdhci.slots[i];

DriveInfo *dinfo = drive_get_next(IF_SD);

BlockBackend *blk;

diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/arm/aspeed_ast2600.c

+++ b/hw/arm/aspeed_ast2600.c

@@ -XXX,XX +XXX,XX @@ static void aspeed_soc_ast2600_init(Object *obj)

sysbus_init_child_obj(obj, "sdc", OBJECT(&s->sdhci), sizeof(s->sdhci),

TYPE_ASPEED_SDHCI);

+ object_property_set_int(OBJECT(&s->sdhci), 2, "num-slots", &error_abort);

+

/* Init sd card slot class here so that they're under the correct parent */

for (i = 0; i < ASPEED_SDHCI_NUM_SLOTS; ++i) {

sysbus_init_child_obj(obj, "sdhci[*]", OBJECT(&s->sdhci.slots[i]),

diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/arm/aspeed_soc.c

+++ b/hw/arm/aspeed_soc.c

@@ -XXX,XX +XXX,XX @@ static void aspeed_soc_init(Object *obj)

sysbus_init_child_obj(obj, "sdc", OBJECT(&s->sdhci), sizeof(s->sdhci),

TYPE_ASPEED_SDHCI);

+ object_property_set_int(OBJECT(&s->sdhci), 2, "num-slots", &error_abort);

+

/* Init sd card slot class here so that they're under the correct parent */

for (i = 0; i < ASPEED_SDHCI_NUM_SLOTS; ++i) {

sysbus_init_child_obj(obj, "sdhci[*]", OBJECT(&s->sdhci.slots[i]),

diff --git a/hw/sd/aspeed_sdhci.c b/hw/sd/aspeed_sdhci.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/sd/aspeed_sdhci.c

+++ b/hw/sd/aspeed_sdhci.c

#include "qapi/error.h"

#include "hw/irq.h"

#include "migration/vmstate.h"

+#include "hw/qdev-properties.h"

#define ASPEED_SDHCI_INFO 0x00

#define ASPEED_SDHCI_INFO_RESET 0x00030000

@@ -XXX,XX +XXX,XX @@ static void aspeed_sdhci_realize(DeviceState *dev, Error **errp)

/* Create input irqs for the slots */

qdev_init_gpio_in_named_with_opaque(DEVICE(sbd), aspeed_sdhci_set_irq,

- sdhci, NULL, ASPEED_SDHCI_NUM_SLOTS);

+ sdhci, NULL, sdhci->num_slots);

sysbus_init_irq(sbd, &sdhci->irq);

memory_region_init_io(&sdhci->iomem, OBJECT(sdhci), &aspeed_sdhci_ops,

sdhci, TYPE_ASPEED_SDHCI, 0x1000);

sysbus_init_mmio(sbd, &sdhci->iomem);

- for (int i = 0; i < ASPEED_SDHCI_NUM_SLOTS; ++i) {

+ for (int i = 0; i < sdhci->num_slots; ++i) {

Object *sdhci_slot = OBJECT(&sdhci->slots[i]);

SysBusDevice *sbd_slot = SYS_BUS_DEVICE(&sdhci->slots[i]);

@@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_aspeed_sdhci = {

+static Property aspeed_sdhci_properties[] = {

+ DEFINE_PROP_UINT8("num-slots", AspeedSDHCIState, num_slots, 0),

+ DEFINE_PROP_END_OF_LIST(),

+};

+

static void aspeed_sdhci_class_init(ObjectClass *classp, void *data)

DeviceClass *dc = DEVICE_CLASS(classp);

@@ -XXX,XX +XXX,XX @@ static void aspeed_sdhci_class_init(ObjectClass *classp, void *data)

dc->realize = aspeed_sdhci_realize;

dc->reset = aspeed_sdhci_reset;

dc->vmsd = &vmstate_aspeed_sdhci;

+ device_class_set_props(dc, aspeed_sdhci_properties);

}

static TypeInfo aspeed_sdhci_info = {

2.20.1

From: Andrew Jeffery <andrew@aj.id.au>

include/hw/arm/aspeed_soc.h | 2 ++

hw/arm/aspeed.c | 26 +++++++++++++++++---------

hw/arm/aspeed_ast2600.c | 29 ++++++++++++++++++++++++++---

3 files changed, 45 insertions(+), 12 deletions(-)

diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h

--- a/include/hw/arm/aspeed_soc.h

+++ b/include/hw/arm/aspeed_soc.h

@@ -XXX,XX +XXX,XX @@ typedef struct AspeedSoCState {

AspeedGPIOState gpio;

AspeedGPIOState gpio_1_8v;

AspeedSDHCIState sdhci;

+ AspeedSDHCIState emmc;

} AspeedSoCState;

#define TYPE_ASPEED_SOC "aspeed-soc"

@@ -XXX,XX +XXX,XX @@ enum {

ASPEED_MII4,

ASPEED_SDRAM,

ASPEED_XDMA,

+ ASPEED_EMMC,

};

#endif /* ASPEED_SOC_H */

diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/arm/aspeed.c

+++ b/hw/arm/aspeed.c

@@ -XXX,XX +XXX,XX @@ static void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype,

}

+static void sdhci_attach_drive(SDHCIState *sdhci, DriveInfo *dinfo)

+ DeviceState *card;

+ card = qdev_create(qdev_get_child_bus(DEVICE(sdhci), "sd-bus"),

+ TYPE_SD_CARD);

+ if (dinfo) {

+ qdev_prop_set_drive(card, "drive", blk_by_legacy_dinfo(dinfo),

+ &error_fatal);

+ }

+ object_property_set_bool(OBJECT(card), true, "realized", &error_fatal);

static void aspeed_machine_init(MachineState *machine)

AspeedBoardState *bmc;

@@ -XXX,XX +XXX,XX @@ static void aspeed_machine_init(MachineState *machine)

2.20.1

From: Cédric Le Goater <clg@kaod.org>

These buffers should be aligned on 16 bytes.

Ignore invalid RX and TX buffer addresses and log an error. All

incoming and outgoing traffic will be dropped because no valid RX or

TX descriptors will be available.

Signed-off-by: Cédric Le Goater <clg@kaod.org>

Message-id: 20200114103433.30534-4-clg@kaod.org

hw/net/ftgmac100.c | 13 +++++++++++++

1 file changed, 13 insertions(+)

diff --git a/hw/net/ftgmac100.c b/hw/net/ftgmac100.c

--- a/hw/net/ftgmac100.c

+++ b/hw/net/ftgmac100.c

@@ -XXX,XX +XXX,XX @@ typedef struct {

uint32_t des3;

} FTGMAC100Desc;

+#define FTGMAC100_DESC_ALIGNMENT 16

/*

* Specific RTL8211E MII Registers

*/

@@ -XXX,XX +XXX,XX @@ static void ftgmac100_write(void *opaque, hwaddr addr,

s->itc = value;

break;

case FTGMAC100_RXR_BADR: /* Ring buffer address */

+ if (!QEMU_IS_ALIGNED(value, FTGMAC100_DESC_ALIGNMENT)) {

+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad RX buffer alignment 0x%"

+ HWADDR_PRIx "\n", __func__, value);

+ return;

+ }

s->rx_ring = value;

s->rx_descriptor = s->rx_ring;

@@ -XXX,XX +XXX,XX @@ static void ftgmac100_write(void *opaque, hwaddr addr,

case FTGMAC100_NPTXR_BADR: /* Transmit buffer address */

+ if (!QEMU_IS_ALIGNED(value, FTGMAC100_DESC_ALIGNMENT)) {

+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad TX buffer alignment 0x%"

+ HWADDR_PRIx "\n", __func__, value);

+ return;

+ }

s->tx_ring = value;

s->tx_descriptor = s->tx_ring;

break;

2.20.1

From: Joel Stanley <joel@jms.id.au>

Following the pattern of the work recently done with the ASPEED GPIO

model, this adds support for inspecting and modifying the PCA9552 LEDs

from the monitor.

(qemu) qom-set /machine/unattached/device[17] led0 on

(qemu) qom-set /machine/unattached/device[17] led0 off

(qemu) qom-set /machine/unattached/device[17] led0 pwm0

(qemu) qom-set /machine/unattached/device[17] led0 pwm1

Signed-off-by: Joel Stanley <joel@jms.id.au>

Signed-off-by: Cédric Le Goater <clg@kaod.org>

Message-id: 20200114103433.30534-6-clg@kaod.org

[clg: - removed the "qom-get" examples from the commit log

- merged memory leak fixes from Joel ]

Signed-off-by: Cédric Le Goater <clg@kaod.org>

hw/misc/pca9552.c | 90 +++++++++++++++++++++++++++++++++++++++++++++++

1 file changed, 90 insertions(+)

diff --git a/hw/misc/pca9552.c b/hw/misc/pca9552.c

--- a/hw/misc/pca9552.c

+++ b/hw/misc/pca9552.c

@@ -XXX,XX +XXX,XX @@

#include "hw/misc/pca9552.h"

#include "hw/misc/pca9552_regs.h"

#include "migration/vmstate.h"

+#include "qapi/error.h"

+#include "qapi/visitor.h"

#define PCA9552_LED_ON 0x0

#define PCA9552_LED_OFF 0x1

#define PCA9552_LED_PWM0 0x2

#define PCA9552_LED_PWM1 0x3

+static const char *led_state[] = {"on", "off", "pwm0", "pwm1"};

+

static uint8_t pca9552_pin_get_config(PCA9552State *s, int pin)

uint8_t reg = PCA9552_LS0 + (pin / 4);

@@ -XXX,XX +XXX,XX @@ static int pca9552_event(I2CSlave *i2c, enum i2c_event event)

return 0;

}

+static void pca9552_get_led(Object *obj, Visitor *v, const char *name,

+ void *opaque, Error **errp)

+{

+ PCA9552State *s = PCA9552(obj);

+ int led, rc, reg;

+ uint8_t state;

+

+ rc = sscanf(name, "led%2d", &led);

+ if (rc != 1) {

+ error_setg(errp, "%s: error reading %s", __func__, name);

+ return;

+ }

+ if (led < 0 || led > s->nr_leds) {

+ error_setg(errp, "%s invalid led %s", __func__, name);

+ return;

+ }

+ * Get the LSx register as the qom interface should expose the device

+ * state, not the modeled 'input line' behaviour which would come from

+ * reading the INPUTx reg

+ reg = PCA9552_LS0 + led / 4;

+ state = (pca9552_read(s, reg) >> (led % 8)) & 0x3;

+ visit_type_str(v, name, (char **)&led_state[state], errp);

+}

+

+/*

+ * Return an LED selector register value based on an existing one, with

+ * the appropriate 2-bit state value set for the given LED number (0-3).

+ */

+static inline uint8_t pca955x_ledsel(uint8_t oldval, int led_num, int state)

+{

+ return (oldval & (~(0x3 << (led_num << 1)))) |

+ ((state & 0x3) << (led_num << 1));

+}

+

+static void pca9552_set_led(Object *obj, Visitor *v, const char *name,

+ void *opaque, Error **errp)

+{

+ PCA9552State *s = PCA9552(obj);

+ Error *local_err = NULL;

+ int led, rc, reg, val;

+ uint8_t state;

+ char *state_str;

+

+ visit_type_str(v, name, &state_str, &local_err);

+ if (local_err) {

+ error_propagate(errp, local_err);

+ return;

+ }

+ rc = sscanf(name, "led%2d", &led);

+ if (rc != 1) {

+ error_setg(errp, "%s: error reading %s", __func__, name);

+ return;

+ }

+ if (led < 0 || led > s->nr_leds) {

+ error_setg(errp, "%s invalid led %s", __func__, name);

+ return;

+ }

+

+ for (state = 0; state < ARRAY_SIZE(led_state); state++) {

+ if (!strcmp(state_str, led_state[state])) {

+ break;

+ }

+ }

+ if (state >= ARRAY_SIZE(led_state)) {

+ error_setg(errp, "%s invalid led state %s", __func__, state_str);

+ return;

+ }

+

+ reg = PCA9552_LS0 + led / 4;

+ val = pca9552_read(s, reg);

+ val = pca955x_ledsel(val, led % 4, state);

+ pca9552_write(s, reg, val);

+}

+

static const VMStateDescription pca9552_vmstate = {

.name = "PCA9552",

.version_id = 0,

@@ -XXX,XX +XXX,XX @@ static void pca9552_reset(DeviceState *dev)

static void pca9552_initfn(Object *obj)

{

PCA9552State *s = PCA9552(obj);

+ int led;

/* If support for the other PCA955X devices are implemented, these

* constant values might be part of class structure describing the

@@ -XXX,XX +XXX,XX @@ static void pca9552_initfn(Object *obj)

*/

s->max_reg = PCA9552_LS3;

s->nr_leds = 16;

+

+ for (led = 0; led < s->nr_leds; led++) {

+ char *name;

+

+ name = g_strdup_printf("led%d", led);

+ object_property_add(obj, name, "bool", pca9552_get_led, pca9552_set_led,

+ NULL, NULL, NULL);

+ g_free(name);

+ }

static void pca9552_class_init(ObjectClass *klass, void *data)

2.20.1

From: Philippe Mathieu-Daudé <f4bug@amsat.org>

Since we enabled parallel TCG code generation for softmmu (see

commit 3468b59 "tcg: enable multiple TCG contexts in softmmu")

and its subsequent fix (commit 72649619 "add .min_cpus and

.default_cpus fields to machine_class"), the raspi machines are

restricted to always use their 4 cores:

See in hw/arm/raspi2 (with BCM283X_NCPUS set to 4):

hw/arm/raspi.c | 2 --

1 file changed, 2 deletions(-)

- object_property_set_int(OBJECT(&s->soc), machine->smp.cpus, "enabled-cpus",

int board_rev = version == 3 ? 0xa02082 : 0xa21041;

object_property_set_int(OBJECT(&s->soc), board_rev, "board-rev",

2.20.1

From: Damien Hedde <damien.hedde@greensocs.com>

Provide a temporary device_legacy_reset function doing what

device_reset does to prepare for the transition with Resettable

API.

All occurrence of device_reset in the code tree are also replaced

by device_legacy_reset.

The new resettable API has different prototype and semantics

(resetting child buses as well as the specified device). Subsequent

commits will make the changeover for each call site individually; once