From: Alistair Francis <alistair.francis@xilinx.com>

Initial commit of the ZynqMP RTC device.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

---

hw/timer/Makefile.objs | 1 +

include/hw/timer/xlnx-zynqmp-rtc.h | 84 +++++++++++++++

hw/timer/xlnx-zynqmp-rtc.c | 214 +++++++++++++++++++++++++++++++++++++

3 files changed, 299 insertions(+)

create mode 100644 include/hw/timer/xlnx-zynqmp-rtc.h

create mode 100644 hw/timer/xlnx-zynqmp-rtc.c

diff --git a/hw/timer/Makefile.objs b/hw/timer/Makefile.objs

index XXXXXXX..XXXXXXX 100644

--- a/hw/timer/Makefile.objs

+++ b/hw/timer/Makefile.objs

@@ -XXX,XX +XXX,XX @@ common-obj-$(CONFIG_IMX) += imx_epit.o

common-obj-$(CONFIG_IMX) += imx_gpt.o

common-obj-$(CONFIG_LM32) += lm32_timer.o

common-obj-$(CONFIG_MILKYMIST) += milkymist-sysctl.o

+common-obj-$(CONFIG_XLNX_ZYNQMP) += xlnx-zynqmp-rtc.o

obj-$(CONFIG_ALTERA_TIMER) += altera_timer.o

obj-$(CONFIG_EXYNOS4) += exynos4210_mct.o

diff --git a/include/hw/timer/xlnx-zynqmp-rtc.h b/include/hw/timer/xlnx-zynqmp-rtc.h

new file mode 100644

index XXXXXXX..XXXXXXX

--- /dev/null

+++ b/include/hw/timer/xlnx-zynqmp-rtc.h

@@ -XXX,XX +XXX,XX @@

+/*

+ * QEMU model of the Xilinx ZynqMP Real Time Clock (RTC).

+ *

+ * Copyright (c) 2017 Xilinx Inc.

+ *

+ * Written-by: Alistair Francis <alistair.francis@xilinx.com>

+ *

+ * Permission is hereby granted, free of charge, to any person obtaining a copy

+ * of this software and associated documentation files (the "Software"), to deal

+ * in the Software without restriction, including without limitation the rights

+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell

+ * copies of the Software, and to permit persons to whom the Software is

+ * furnished to do so, subject to the following conditions:

+ *

+ * The above copyright notice and this permission notice shall be included in

+ * all copies or substantial portions of the Software.

+ *

+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL

+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER

+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,

+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN

+ * THE SOFTWARE.

+ */

+

+#include "hw/register.h"

+

+#define TYPE_XLNX_ZYNQMP_RTC "xlnx-zynmp.rtc"

+

+#define XLNX_ZYNQMP_RTC(obj) \

+ OBJECT_CHECK(XlnxZynqMPRTC, (obj), TYPE_XLNX_ZYNQMP_RTC)

+

+REG32(SET_TIME_WRITE, 0x0)

+REG32(SET_TIME_READ, 0x4)

+REG32(CALIB_WRITE, 0x8)

+ FIELD(CALIB_WRITE, FRACTION_EN, 20, 1)

+ FIELD(CALIB_WRITE, FRACTION_DATA, 16, 4)

+ FIELD(CALIB_WRITE, MAX_TICK, 0, 16)

+REG32(CALIB_READ, 0xc)

+ FIELD(CALIB_READ, FRACTION_EN, 20, 1)

+ FIELD(CALIB_READ, FRACTION_DATA, 16, 4)

+ FIELD(CALIB_READ, MAX_TICK, 0, 16)

+REG32(CURRENT_TIME, 0x10)

+REG32(CURRENT_TICK, 0x14)

+ FIELD(CURRENT_TICK, VALUE, 0, 16)

+REG32(ALARM, 0x18)

+REG32(RTC_INT_STATUS, 0x20)

+ FIELD(RTC_INT_STATUS, ALARM, 1, 1)

+ FIELD(RTC_INT_STATUS, SECONDS, 0, 1)

+REG32(RTC_INT_MASK, 0x24)

+ FIELD(RTC_INT_MASK, ALARM, 1, 1)

+ FIELD(RTC_INT_MASK, SECONDS, 0, 1)

+REG32(RTC_INT_EN, 0x28)

+ FIELD(RTC_INT_EN, ALARM, 1, 1)

+ FIELD(RTC_INT_EN, SECONDS, 0, 1)

+REG32(RTC_INT_DIS, 0x2c)

+ FIELD(RTC_INT_DIS, ALARM, 1, 1)

+ FIELD(RTC_INT_DIS, SECONDS, 0, 1)

+REG32(ADDR_ERROR, 0x30)

+ FIELD(ADDR_ERROR, STATUS, 0, 1)

+REG32(ADDR_ERROR_INT_MASK, 0x34)

+ FIELD(ADDR_ERROR_INT_MASK, MASK, 0, 1)

+REG32(ADDR_ERROR_INT_EN, 0x38)

+ FIELD(ADDR_ERROR_INT_EN, MASK, 0, 1)

+REG32(ADDR_ERROR_INT_DIS, 0x3c)

+ FIELD(ADDR_ERROR_INT_DIS, MASK, 0, 1)

+REG32(CONTROL, 0x40)

+ FIELD(CONTROL, BATTERY_DISABLE, 31, 1)

+ FIELD(CONTROL, OSC_CNTRL, 24, 4)

+ FIELD(CONTROL, SLVERR_ENABLE, 0, 1)

+REG32(SAFETY_CHK, 0x50)

+

+#define XLNX_ZYNQMP_RTC_R_MAX (R_SAFETY_CHK + 1)

+

+typedef struct XlnxZynqMPRTC {

+ SysBusDevice parent_obj;

+ MemoryRegion iomem;

+ qemu_irq irq_rtc_int;

+ qemu_irq irq_addr_error_int;

+

+ uint32_t regs[XLNX_ZYNQMP_RTC_R_MAX];

+ RegisterInfo regs_info[XLNX_ZYNQMP_RTC_R_MAX];

+} XlnxZynqMPRTC;

diff --git a/hw/timer/xlnx-zynqmp-rtc.c b/hw/timer/xlnx-zynqmp-rtc.c

new file mode 100644

index XXXXXXX..XXXXXXX

--- /dev/null

+++ b/hw/timer/xlnx-zynqmp-rtc.c

@@ -XXX,XX +XXX,XX @@

+/*

+ * QEMU model of the Xilinx ZynqMP Real Time Clock (RTC).

+ *

+ * Copyright (c) 2017 Xilinx Inc.

+ *

+ * Written-by: Alistair Francis <alistair.francis@xilinx.com>

+ *

+ * Permission is hereby granted, free of charge, to any person obtaining a copy

+ * of this software and associated documentation files (the "Software"), to deal

+ * in the Software without restriction, including without limitation the rights

+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell

+ * copies of the Software, and to permit persons to whom the Software is

+ * furnished to do so, subject to the following conditions:

+ *

+ * The above copyright notice and this permission notice shall be included in

+ * all copies or substantial portions of the Software.

+ *

+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL

+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER

+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,

+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN

+ * THE SOFTWARE.

+ */

+

+#include "qemu/osdep.h"

+#include "hw/sysbus.h"

+#include "hw/register.h"

+#include "qemu/bitops.h"

+#include "qemu/log.h"

+#include "hw/timer/xlnx-zynqmp-rtc.h"

+

+#ifndef XLNX_ZYNQMP_RTC_ERR_DEBUG

+#define XLNX_ZYNQMP_RTC_ERR_DEBUG 0

+#endif

+

+static void rtc_int_update_irq(XlnxZynqMPRTC *s)

+{

+ bool pending = s->regs[R_RTC_INT_STATUS] & ~s->regs[R_RTC_INT_MASK];

+ qemu_set_irq(s->irq_rtc_int, pending);

+}

+

+static void addr_error_int_update_irq(XlnxZynqMPRTC *s)

+{

+ bool pending = s->regs[R_ADDR_ERROR] & ~s->regs[R_ADDR_ERROR_INT_MASK];

+ qemu_set_irq(s->irq_addr_error_int, pending);

+}

+

+static void rtc_int_status_postw(RegisterInfo *reg, uint64_t val64)

+{

+ XlnxZynqMPRTC *s = XLNX_ZYNQMP_RTC(reg->opaque);

+ rtc_int_update_irq(s);

+}

+

+static uint64_t rtc_int_en_prew(RegisterInfo *reg, uint64_t val64)

+{

+ XlnxZynqMPRTC *s = XLNX_ZYNQMP_RTC(reg->opaque);

+

+ s->regs[R_RTC_INT_MASK] &= (uint32_t) ~val64;

+ rtc_int_update_irq(s);

+ return 0;

+}

+

+static uint64_t rtc_int_dis_prew(RegisterInfo *reg, uint64_t val64)

+{

+ XlnxZynqMPRTC *s = XLNX_ZYNQMP_RTC(reg->opaque);

+

+ s->regs[R_RTC_INT_MASK] |= (uint32_t) val64;

+ rtc_int_update_irq(s);

+ return 0;

+}

+

+static void addr_error_postw(RegisterInfo *reg, uint64_t val64)

+{

+ XlnxZynqMPRTC *s = XLNX_ZYNQMP_RTC(reg->opaque);

+ addr_error_int_update_irq(s);

+}

+

+static uint64_t addr_error_int_en_prew(RegisterInfo *reg, uint64_t val64)

+{

+ XlnxZynqMPRTC *s = XLNX_ZYNQMP_RTC(reg->opaque);

+

+ s->regs[R_ADDR_ERROR_INT_MASK] &= (uint32_t) ~val64;

+ addr_error_int_update_irq(s);

+ return 0;

+}

+

+static uint64_t addr_error_int_dis_prew(RegisterInfo *reg, uint64_t val64)

+{

+ XlnxZynqMPRTC *s = XLNX_ZYNQMP_RTC(reg->opaque);

+

+ s->regs[R_ADDR_ERROR_INT_MASK] |= (uint32_t) val64;

+ addr_error_int_update_irq(s);

+ return 0;

+}

+

+static const RegisterAccessInfo rtc_regs_info[] = {

+ { .name = "SET_TIME_WRITE", .addr = A_SET_TIME_WRITE,

+ },{ .name = "SET_TIME_READ", .addr = A_SET_TIME_READ,

+ .ro = 0xffffffff,

+ },{ .name = "CALIB_WRITE", .addr = A_CALIB_WRITE,

+ },{ .name = "CALIB_READ", .addr = A_CALIB_READ,

+ .ro = 0x1fffff,

+ },{ .name = "CURRENT_TIME", .addr = A_CURRENT_TIME,

+ .ro = 0xffffffff,

+ },{ .name = "CURRENT_TICK", .addr = A_CURRENT_TICK,

+ .ro = 0xffff,

+ },{ .name = "ALARM", .addr = A_ALARM,

+ },{ .name = "RTC_INT_STATUS", .addr = A_RTC_INT_STATUS,

+ .w1c = 0x3,

+ .post_write = rtc_int_status_postw,

+ },{ .name = "RTC_INT_MASK", .addr = A_RTC_INT_MASK,

+ .reset = 0x3,

+ .ro = 0x3,

+ },{ .name = "RTC_INT_EN", .addr = A_RTC_INT_EN,

+ .pre_write = rtc_int_en_prew,

+ },{ .name = "RTC_INT_DIS", .addr = A_RTC_INT_DIS,

+ .pre_write = rtc_int_dis_prew,

+ },{ .name = "ADDR_ERROR", .addr = A_ADDR_ERROR,

+ .w1c = 0x1,

+ .post_write = addr_error_postw,

+ },{ .name = "ADDR_ERROR_INT_MASK", .addr = A_ADDR_ERROR_INT_MASK,

+ .reset = 0x1,

+ .ro = 0x1,

+ },{ .name = "ADDR_ERROR_INT_EN", .addr = A_ADDR_ERROR_INT_EN,

+ .pre_write = addr_error_int_en_prew,

+ },{ .name = "ADDR_ERROR_INT_DIS", .addr = A_ADDR_ERROR_INT_DIS,

+ .pre_write = addr_error_int_dis_prew,

+ },{ .name = "CONTROL", .addr = A_CONTROL,

+ .reset = 0x1000000,

+ .rsvd = 0x70fffffe,

+ },{ .name = "SAFETY_CHK", .addr = A_SAFETY_CHK,

+ }

+};

+

+static void rtc_reset(DeviceState *dev)

+{

+ XlnxZynqMPRTC *s = XLNX_ZYNQMP_RTC(dev);

+ unsigned int i;

+

+ for (i = 0; i < ARRAY_SIZE(s->regs_info); ++i) {

+ register_reset(&s->regs_info[i]);

+ }

+

+ rtc_int_update_irq(s);

+ addr_error_int_update_irq(s);

+}

+

+static const MemoryRegionOps rtc_ops = {

+ .read = register_read_memory,

+ .write = register_write_memory,

+ .endianness = DEVICE_LITTLE_ENDIAN,

+ .valid = {

+ .min_access_size = 4,

+ .max_access_size = 4,

+ },

+};

+

+static void rtc_init(Object *obj)

+{

+ XlnxZynqMPRTC *s = XLNX_ZYNQMP_RTC(obj);

+ SysBusDevice *sbd = SYS_BUS_DEVICE(obj);

+ RegisterInfoArray *reg_array;

+

+ memory_region_init(&s->iomem, obj, TYPE_XLNX_ZYNQMP_RTC,

+ XLNX_ZYNQMP_RTC_R_MAX * 4);

+ reg_array =

+ register_init_block32(DEVICE(obj), rtc_regs_info,

+ ARRAY_SIZE(rtc_regs_info),

+ s->regs_info, s->regs,

+ &rtc_ops,

+ XLNX_ZYNQMP_RTC_ERR_DEBUG,

+ XLNX_ZYNQMP_RTC_R_MAX * 4);

+ memory_region_add_subregion(&s->iomem,

+ 0x0,

+ &reg_array->mem);

+ sysbus_init_mmio(sbd, &s->iomem);

+ sysbus_init_irq(sbd, &s->irq_rtc_int);

+ sysbus_init_irq(sbd, &s->irq_addr_error_int);

+}

+

+static const VMStateDescription vmstate_rtc = {

+ .name = TYPE_XLNX_ZYNQMP_RTC,

+ .version_id = 1,

+ .minimum_version_id = 1,

+ .fields = (VMStateField[]) {

+ VMSTATE_UINT32_ARRAY(regs, XlnxZynqMPRTC, XLNX_ZYNQMP_RTC_R_MAX),

+ VMSTATE_END_OF_LIST(),

+ }

+};

+

+static void rtc_class_init(ObjectClass *klass, void *data)

+{

+ DeviceClass *dc = DEVICE_CLASS(klass);

+

+ dc->reset = rtc_reset;

+ dc->vmsd = &vmstate_rtc;

+}

+

+static const TypeInfo rtc_info = {

+ .name = TYPE_XLNX_ZYNQMP_RTC,

+ .parent = TYPE_SYS_BUS_DEVICE,

+ .instance_size = sizeof(XlnxZynqMPRTC),

+ .class_init = rtc_class_init,

+ .instance_init = rtc_init,

+};

+

+static void rtc_register_types(void)

+{

+ type_register_static(&rtc_info);

+}

+

+type_init(rtc_register_types)

--

2.16.2

From: Alistair Francis <alistair.francis@xilinx.com>

Allow the guest to determine the time set from the QEMU command line.

This includes adding a trace event to debug the new time.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

---

include/hw/timer/xlnx-zynqmp-rtc.h | 2 ++

hw/timer/xlnx-zynqmp-rtc.c | 58 ++++++++++++++++++++++++++++++++++++++

hw/timer/trace-events | 3 ++

3 files changed, 63 insertions(+)

diff --git a/include/hw/timer/xlnx-zynqmp-rtc.h b/include/hw/timer/xlnx-zynqmp-rtc.h

index XXXXXXX..XXXXXXX 100644

--- a/include/hw/timer/xlnx-zynqmp-rtc.h

+++ b/include/hw/timer/xlnx-zynqmp-rtc.h

@@ -XXX,XX +XXX,XX @@ typedef struct XlnxZynqMPRTC {

qemu_irq irq_rtc_int;

qemu_irq irq_addr_error_int;

+ uint32_t tick_offset;

+

uint32_t regs[XLNX_ZYNQMP_RTC_R_MAX];

RegisterInfo regs_info[XLNX_ZYNQMP_RTC_R_MAX];

} XlnxZynqMPRTC;

diff --git a/hw/timer/xlnx-zynqmp-rtc.c b/hw/timer/xlnx-zynqmp-rtc.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/timer/xlnx-zynqmp-rtc.c

+++ b/hw/timer/xlnx-zynqmp-rtc.c

@@ -XXX,XX +XXX,XX @@

#include "hw/register.h"

#include "qemu/bitops.h"

#include "qemu/log.h"

+#include "hw/ptimer.h"

+#include "qemu/cutils.h"

+#include "sysemu/sysemu.h"

+#include "trace.h"

#include "hw/timer/xlnx-zynqmp-rtc.h"

#ifndef XLNX_ZYNQMP_RTC_ERR_DEBUG

@@ -XXX,XX +XXX,XX @@ static void addr_error_int_update_irq(XlnxZynqMPRTC *s)

qemu_set_irq(s->irq_addr_error_int, pending);

}

+static uint32_t rtc_get_count(XlnxZynqMPRTC *s)

+{

+ int64_t now = qemu_clock_get_ns(rtc_clock);

+ return s->tick_offset + now / NANOSECONDS_PER_SECOND;

+}

+

+static uint64_t current_time_postr(RegisterInfo *reg, uint64_t val64)

+{

+ XlnxZynqMPRTC *s = XLNX_ZYNQMP_RTC(reg->opaque);

+

+ return rtc_get_count(s);

+}

+

static void rtc_int_status_postw(RegisterInfo *reg, uint64_t val64)

{

XlnxZynqMPRTC *s = XLNX_ZYNQMP_RTC(reg->opaque);

@@ -XXX,XX +XXX,XX @@ static uint64_t addr_error_int_dis_prew(RegisterInfo *reg, uint64_t val64)

static const RegisterAccessInfo rtc_regs_info[] = {

{ .name = "SET_TIME_WRITE", .addr = A_SET_TIME_WRITE,

+ .unimp = MAKE_64BIT_MASK(0, 32),

},{ .name = "SET_TIME_READ", .addr = A_SET_TIME_READ,

.ro = 0xffffffff,

+ .post_read = current_time_postr,

},{ .name = "CALIB_WRITE", .addr = A_CALIB_WRITE,

+ .unimp = MAKE_64BIT_MASK(0, 32),

},{ .name = "CALIB_READ", .addr = A_CALIB_READ,

.ro = 0x1fffff,

},{ .name = "CURRENT_TIME", .addr = A_CURRENT_TIME,

.ro = 0xffffffff,

+ .post_read = current_time_postr,

},{ .name = "CURRENT_TICK", .addr = A_CURRENT_TICK,

.ro = 0xffff,

},{ .name = "ALARM", .addr = A_ALARM,

@@ -XXX,XX +XXX,XX @@ static void rtc_init(Object *obj)

XlnxZynqMPRTC *s = XLNX_ZYNQMP_RTC(obj);

SysBusDevice *sbd = SYS_BUS_DEVICE(obj);

RegisterInfoArray *reg_array;

+ struct tm current_tm;

memory_region_init(&s->iomem, obj, TYPE_XLNX_ZYNQMP_RTC,

XLNX_ZYNQMP_RTC_R_MAX * 4);

@@ -XXX,XX +XXX,XX @@ static void rtc_init(Object *obj)

sysbus_init_mmio(sbd, &s->iomem);

sysbus_init_irq(sbd, &s->irq_rtc_int);

sysbus_init_irq(sbd, &s->irq_addr_error_int);

+

+ qemu_get_timedate(&current_tm, 0);

+ s->tick_offset = mktimegm(&current_tm) -

+ qemu_clock_get_ns(rtc_clock) / NANOSECONDS_PER_SECOND;

+

+ trace_xlnx_zynqmp_rtc_gettime(current_tm.tm_year, current_tm.tm_mon,

+ current_tm.tm_mday, current_tm.tm_hour,

+ current_tm.tm_min, current_tm.tm_sec);

+}

+

+static int rtc_pre_save(void *opaque)

+{

+ XlnxZynqMPRTC *s = opaque;

+ int64_t now = qemu_clock_get_ns(rtc_clock) / NANOSECONDS_PER_SECOND;

+

+ /* Add the time at migration */

+ s->tick_offset = s->tick_offset + now;

+

+ return 0;

+}

+

+static int rtc_post_load(void *opaque, int version_id)

+{

+ XlnxZynqMPRTC *s = opaque;

+ int64_t now = qemu_clock_get_ns(rtc_clock) / NANOSECONDS_PER_SECOND;

+

+ /* Subtract the time after migration. This combined with the pre_save

+ * action results in us having subtracted the time that the guest was

+ * stopped to the offset.

+ */

+ s->tick_offset = s->tick_offset - now;

+

+ return 0;

}

static const VMStateDescription vmstate_rtc = {

.name = TYPE_XLNX_ZYNQMP_RTC,

.version_id = 1,

.minimum_version_id = 1,

+ .pre_save = rtc_pre_save,

+ .post_load = rtc_post_load,

.fields = (VMStateField[]) {

VMSTATE_UINT32_ARRAY(regs, XlnxZynqMPRTC, XLNX_ZYNQMP_RTC_R_MAX),

+ VMSTATE_UINT32(tick_offset, XlnxZynqMPRTC),

VMSTATE_END_OF_LIST(),

}

};

diff --git a/hw/timer/trace-events b/hw/timer/trace-events

index XXXXXXX..XXXXXXX 100644

--- a/hw/timer/trace-events

+++ b/hw/timer/trace-events

@@ -XXX,XX +XXX,XX @@ systick_write(uint64_t addr, uint32_t value, unsigned size) "systick write addr

cmsdk_apb_timer_read(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB timer read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"

cmsdk_apb_timer_write(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB timer write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u"

cmsdk_apb_timer_reset(void) "CMSDK APB timer: reset"

+

+# hw/timer/xlnx-zynqmp-rtc.c

+xlnx_zynqmp_rtc_gettime(int year, int month, int day, int hour, int min, int sec) "Get time from host: %d-%d-%d %2d:%02d:%02d"

--

2.16.2

From: Alistair Francis <alistair.francis@xilinx.com>

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

---

include/hw/arm/xlnx-zynqmp.h | 2 ++

hw/arm/xlnx-zynqmp.c | 14 ++++++++++++++

2 files changed, 16 insertions(+)

diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h

index XXXXXXX..XXXXXXX 100644

--- a/include/hw/arm/xlnx-zynqmp.h

+++ b/include/hw/arm/xlnx-zynqmp.h

@@ -XXX,XX +XXX,XX @@

#include "hw/dma/xlnx_dpdma.h"

#include "hw/display/xlnx_dp.h"

#include "hw/intc/xlnx-zynqmp-ipi.h"

+#include "hw/timer/xlnx-zynqmp-rtc.h"

#define TYPE_XLNX_ZYNQMP "xlnx,zynqmp"

#define XLNX_ZYNQMP(obj) OBJECT_CHECK(XlnxZynqMPState, (obj), \

@@ -XXX,XX +XXX,XX @@ typedef struct XlnxZynqMPState {

XlnxDPState dp;

XlnxDPDMAState dpdma;

XlnxZynqMPIPI ipi;

+ XlnxZynqMPRTC rtc;

char *boot_cpu;

ARMCPU *boot_cpu_ptr;

diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/arm/xlnx-zynqmp.c

+++ b/hw/arm/xlnx-zynqmp.c

@@ -XXX,XX +XXX,XX @@

#define IPI_ADDR 0xFF300000

#define IPI_IRQ 64

+#define RTC_ADDR 0xffa60000

+#define RTC_IRQ 26

+

#define SDHCI_CAPABILITIES 0x280737ec6481 /* Datasheet: UG1085 (v1.7) */

static const uint64_t gem_addr[XLNX_ZYNQMP_NUM_GEMS] = {

@@ -XXX,XX +XXX,XX @@ static void xlnx_zynqmp_init(Object *obj)

object_initialize(&s->ipi, sizeof(s->ipi), TYPE_XLNX_ZYNQMP_IPI);

qdev_set_parent_bus(DEVICE(&s->ipi), sysbus_get_default());

+

+ object_initialize(&s->rtc, sizeof(s->rtc), TYPE_XLNX_ZYNQMP_RTC);

+ qdev_set_parent_bus(DEVICE(&s->rtc), sysbus_get_default());

}

static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)

@@ -XXX,XX +XXX,XX @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)

}

sysbus_mmio_map(SYS_BUS_DEVICE(&s->ipi), 0, IPI_ADDR);

sysbus_connect_irq(SYS_BUS_DEVICE(&s->ipi), 0, gic_spi[IPI_IRQ]);

+

+ object_property_set_bool(OBJECT(&s->rtc), true, "realized", &err);

+ if (err) {

+ error_propagate(errp, err);

+ return;

+ }

+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->rtc), 0, RTC_ADDR);

+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->rtc), 0, gic_spi[RTC_IRQ]);

}

static Property xlnx_zynqmp_props[] = {

--

2.16.2

From: Richard Henderson <richard.henderson@linaro.org>

Allow the translate subroutines to return false for invalid insns.

At present we can of course invoke an invalid insn exception from within

the translate subroutine, but in the short term this consolidates code.

In the long term it would allow the decodetree language to support

overlapping patterns for ISA extensions.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Message-id: 20180227232618.2908-1-richard.henderson@linaro.org

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

---

scripts/decodetree.py | 5 ++---

1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/scripts/decodetree.py b/scripts/decodetree.py

index XXXXXXX..XXXXXXX 100755

--- a/scripts/decodetree.py

+++ b/scripts/decodetree.py

@@ -XXX,XX +XXX,XX @@ class Pattern(General):

global translate_prefix

output('typedef ', self.base.base.struct_name(),

' arg_', self.name, ';\n')

- output(translate_scope, 'void ', translate_prefix, '_', self.name,

+ output(translate_scope, 'bool ', translate_prefix, '_', self.name,

'(DisasContext *ctx, arg_', self.name,

' *a, ', insntype, ' insn);\n')

@@ -XXX,XX +XXX,XX @@ class Pattern(General):

output(ind, self.base.extract_name(), '(&u.f_', arg, ', insn);\n')

for n, f in self.fields.items():

output(ind, 'u.f_', arg, '.', n, ' = ', f.str_extract(), ';\n')

- output(ind, translate_prefix, '_', self.name,

+ output(ind, 'return ', translate_prefix, '_', self.name,

'(ctx, &u.f_', arg, ', insn);\n')

- output(ind, 'return true;\n')

# end Pattern

--

2.16.2

Add a function load_ramdisk_as() which behaves like the existing

load_ramdisk() but allows the caller to specify the AddressSpace

to use. This matches the pattern we have already for various

other loader functions.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Message-id: 20180220180325.29818-2-peter.maydell@linaro.org

---

include/hw/loader.h | 12 +++++++++++-

hw/core/loader.c | 8 +++++++-

2 files changed, 18 insertions(+), 2 deletions(-)

diff --git a/include/hw/loader.h b/include/hw/loader.h

index XXXXXXX..XXXXXXX 100644

--- a/include/hw/loader.h

+++ b/include/hw/loader.h

@@ -XXX,XX +XXX,XX @@ int load_uimage(const char *filename, hwaddr *ep,

void *translate_opaque);

/**

- * load_ramdisk:

+ * load_ramdisk_as:

* @filename: Path to the ramdisk image

* @addr: Memory address to load the ramdisk to

* @max_sz: Maximum allowed ramdisk size (for non-u-boot ramdisks)

+ * @as: The AddressSpace to load the ELF to. The value of address_space_memory

+ * is used if nothing is supplied here.

*

* Load a ramdisk image with U-Boot header to the specified memory

* address.

*

* Returns the size of the loaded image on success, -1 otherwise.

*/

+int load_ramdisk_as(const char *filename, hwaddr addr, uint64_t max_sz,

+ AddressSpace *as);

+

+/**

+ * load_ramdisk:

+ * Same as load_ramdisk_as(), but doesn't allow the caller to specify

+ * an AddressSpace.

+ */

int load_ramdisk(const char *filename, hwaddr addr, uint64_t max_sz);

ssize_t gunzip(void *dst, size_t dstlen, uint8_t *src, size_t srclen);

diff --git a/hw/core/loader.c b/hw/core/loader.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/core/loader.c

+++ b/hw/core/loader.c

@@ -XXX,XX +XXX,XX @@ int load_uimage_as(const char *filename, hwaddr *ep, hwaddr *loadaddr,

/* Load a ramdisk. */

int load_ramdisk(const char *filename, hwaddr addr, uint64_t max_sz)

+{

+ return load_ramdisk_as(filename, addr, max_sz, NULL);

+}

+

+int load_ramdisk_as(const char *filename, hwaddr addr, uint64_t max_sz,

+ AddressSpace *as)

{

return load_uboot_image(filename, NULL, &addr, NULL, IH_TYPE_RAMDISK,

- NULL, NULL, NULL);

+ NULL, NULL, as);

}

/* Load a gzip-compressed kernel to a dynamically allocated buffer. */

--

2.16.2

Instead of loading kernels, device trees, and the like to

the system address space, use the CPU's address space. This

is important if we're trying to load the file to memory or

via an alias memory region that is provided by an SoC

object and thus not mapped into the system address space.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Message-id: 20180220180325.29818-3-peter.maydell@linaro.org

---

hw/arm/boot.c | 119 +++++++++++++++++++++++++++++++++++++---------------------

1 file changed, 76 insertions(+), 43 deletions(-)

diff --git a/hw/arm/boot.c b/hw/arm/boot.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/arm/boot.c

+++ b/hw/arm/boot.c

@@ -XXX,XX +XXX,XX @@

#define ARM64_TEXT_OFFSET_OFFSET 8

#define ARM64_MAGIC_OFFSET 56

+static AddressSpace *arm_boot_address_space(ARMCPU *cpu,

+ const struct arm_boot_info *info)

+{

+ /* Return the address space to use for bootloader reads and writes.

+ * We prefer the secure address space if the CPU has it and we're

+ * going to boot the guest into it.

+ */

+ int asidx;

+ CPUState *cs = CPU(cpu);

+

+ if (arm_feature(&cpu->env, ARM_FEATURE_EL3) && info->secure_boot) {

+ asidx = ARMASIdx_S;

+ } else {

+ asidx = ARMASIdx_NS;

+ }

+

+ return cpu_get_address_space(cs, asidx);

+}

+

typedef enum {

FIXUP_NONE = 0, /* do nothing */

FIXUP_TERMINATOR, /* end of insns */

@@ -XXX,XX +XXX,XX @@ static const ARMInsnFixup smpboot[] = {

};

static void write_bootloader(const char *name, hwaddr addr,

- const ARMInsnFixup *insns, uint32_t *fixupcontext)

+ const ARMInsnFixup *insns, uint32_t *fixupcontext,

+ AddressSpace *as)

{

/* Fix up the specified bootloader fragment and write it into

* guest memory using rom_add_blob_fixed(). fixupcontext is

@@ -XXX,XX +XXX,XX @@ static void write_bootloader(const char *name, hwaddr addr,

code[i] = tswap32(insn);

}

- rom_add_blob_fixed(name, code, len * sizeof(uint32_t), addr);

+ rom_add_blob_fixed_as(name, code, len * sizeof(uint32_t), addr, as);

g_free(code);

}

@@ -XXX,XX +XXX,XX @@ static void default_write_secondary(ARMCPU *cpu,

const struct arm_boot_info *info)

{

uint32_t fixupcontext[FIXUP_MAX];

+ AddressSpace *as = arm_boot_address_space(cpu, info);

fixupcontext[FIXUP_GIC_CPU_IF] = info->gic_cpu_if_addr;

fixupcontext[FIXUP_BOOTREG] = info->smp_bootreg_addr;

@@ -XXX,XX +XXX,XX @@ static void default_write_secondary(ARMCPU *cpu,

}

write_bootloader("smpboot", info->smp_loader_start,

- smpboot, fixupcontext);

+ smpboot, fixupcontext, as);

}

void arm_write_secure_board_setup_dummy_smc(ARMCPU *cpu,

const struct arm_boot_info *info,

hwaddr mvbar_addr)

{

+ AddressSpace *as = arm_boot_address_space(cpu, info);

int n;

uint32_t mvbar_blob[] = {

/* mvbar_addr: secure monitor vectors

@@ -XXX,XX +XXX,XX @@ void arm_write_secure_board_setup_dummy_smc(ARMCPU *cpu,

for (n = 0; n < ARRAY_SIZE(mvbar_blob); n++) {

mvbar_blob[n] = tswap32(mvbar_blob[n]);

}

- rom_add_blob_fixed("board-setup-mvbar", mvbar_blob, sizeof(mvbar_blob),

- mvbar_addr);

+ rom_add_blob_fixed_as("board-setup-mvbar", mvbar_blob, sizeof(mvbar_blob),

+ mvbar_addr, as);

for (n = 0; n < ARRAY_SIZE(board_setup_blob); n++) {

board_setup_blob[n] = tswap32(board_setup_blob[n]);

}

- rom_add_blob_fixed("board-setup", board_setup_blob,

- sizeof(board_setup_blob), info->board_setup_addr);

+ rom_add_blob_fixed_as("board-setup", board_setup_blob,

+ sizeof(board_setup_blob), info->board_setup_addr, as);

}

static void default_reset_secondary(ARMCPU *cpu,

const struct arm_boot_info *info)

{

+ AddressSpace *as = arm_boot_address_space(cpu, info);

CPUState *cs = CPU(cpu);

- address_space_stl_notdirty(&address_space_memory, info->smp_bootreg_addr,

+ address_space_stl_notdirty(as, info->smp_bootreg_addr,

0, MEMTXATTRS_UNSPECIFIED, NULL);

cpu_set_pc(cs, info->smp_loader_start);

}

@@ -XXX,XX +XXX,XX @@ static inline bool have_dtb(const struct arm_boot_info *info)

}

#define WRITE_WORD(p, value) do { \

- address_space_stl_notdirty(&address_space_memory, p, value, \

+ address_space_stl_notdirty(as, p, value, \

MEMTXATTRS_UNSPECIFIED, NULL); \

p += 4; \

} while (0)

-static void set_kernel_args(const struct arm_boot_info *info)

+static void set_kernel_args(const struct arm_boot_info *info, AddressSpace *as)

{

int initrd_size = info->initrd_size;

hwaddr base = info->loader_start;

@@ -XXX,XX +XXX,XX @@ static void set_kernel_args(const struct arm_boot_info *info)

int cmdline_size;

cmdline_size = strlen(info->kernel_cmdline);

- cpu_physical_memory_write(p + 8, info->kernel_cmdline,

- cmdline_size + 1);

+ address_space_write(as, p + 8, MEMTXATTRS_UNSPECIFIED,

+ (const uint8_t *)info->kernel_cmdline,

+ cmdline_size + 1);

cmdline_size = (cmdline_size >> 2) + 1;

WRITE_WORD(p, cmdline_size + 2);

WRITE_WORD(p, 0x54410009);

@@ -XXX,XX +XXX,XX @@ static void set_kernel_args(const struct arm_boot_info *info)

atag_board_len = (info->atag_board(info, atag_board_buf) + 3) & ~3;

WRITE_WORD(p, (atag_board_len + 8) >> 2);

WRITE_WORD(p, 0x414f4d50);

- cpu_physical_memory_write(p, atag_board_buf, atag_board_len);

+ address_space_write(as, p, MEMTXATTRS_UNSPECIFIED,

+ atag_board_buf, atag_board_len);

p += atag_board_len;

}

/* ATAG_END */

@@ -XXX,XX +XXX,XX @@ static void set_kernel_args(const struct arm_boot_info *info)

WRITE_WORD(p, 0);

}

-static void set_kernel_args_old(const struct arm_boot_info *info)

+static void set_kernel_args_old(const struct arm_boot_info *info,

+ AddressSpace *as)

{

hwaddr p;

const char *s;

@@ -XXX,XX +XXX,XX @@ static void set_kernel_args_old(const struct arm_boot_info *info)

}

s = info->kernel_cmdline;

if (s) {

- cpu_physical_memory_write(p, s, strlen(s) + 1);

+ address_space_write(as, p, MEMTXATTRS_UNSPECIFIED,

+ (const uint8_t *)s, strlen(s) + 1);

} else {

WRITE_WORD(p, 0);

}

@@ -XXX,XX +XXX,XX @@ static void fdt_add_psci_node(void *fdt)

* @addr: the address to load the image at

* @binfo: struct describing the boot environment

* @addr_limit: upper limit of the available memory area at @addr

+ * @as: address space to load image to

*

* Load a device tree supplied by the machine or by the user with the

* '-dtb' command line option, and put it at offset @addr in target

@@ -XXX,XX +XXX,XX @@ static void fdt_add_psci_node(void *fdt)

* Note: Must not be called unless have_dtb(binfo) is true.

*/

static int load_dtb(hwaddr addr, const struct arm_boot_info *binfo,

- hwaddr addr_limit)

+ hwaddr addr_limit, AddressSpace *as)

{

void *fdt = NULL;

int size, rc;

@@ -XXX,XX +XXX,XX @@ static int load_dtb(hwaddr addr, const struct arm_boot_info *binfo,

/* Put the DTB into the memory map as a ROM image: this will ensure

* the DTB is copied again upon reset, even if addr points into RAM.

*/

- rom_add_blob_fixed("dtb", fdt, size, addr);

+ rom_add_blob_fixed_as("dtb", fdt, size, addr, as);

g_free(fdt);

@@ -XXX,XX +XXX,XX @@ static void do_cpu_reset(void *opaque)

}

if (cs == first_cpu) {

+ AddressSpace *as = arm_boot_address_space(cpu, info);

+

cpu_set_pc(cs, info->loader_start);

if (!have_dtb(info)) {

if (old_param) {

- set_kernel_args_old(info);

+ set_kernel_args_old(info, as);

} else {

- set_kernel_args(info);

+ set_kernel_args(info, as);

}

}

} else {

@@ -XXX,XX +XXX,XX @@ static int do_arm_linux_init(Object *obj, void *opaque)

static uint64_t arm_load_elf(struct arm_boot_info *info, uint64_t *pentry,

uint64_t *lowaddr, uint64_t *highaddr,

- int elf_machine)

+ int elf_machine, AddressSpace *as)

{

bool elf_is64;

union {

@@ -XXX,XX +XXX,XX @@ static uint64_t arm_load_elf(struct arm_boot_info *info, uint64_t *pentry,

}

}

- ret = load_elf(info->kernel_filename, NULL, NULL,

- pentry, lowaddr, highaddr, big_endian, elf_machine,

- 1, data_swab);

+ ret = load_elf_as(info->kernel_filename, NULL, NULL,

+ pentry, lowaddr, highaddr, big_endian, elf_machine,

+ 1, data_swab, as);

if (ret <= 0) {

/* The header loaded but the image didn't */

exit(1);

@@ -XXX,XX +XXX,XX @@ static uint64_t arm_load_elf(struct arm_boot_info *info, uint64_t *pentry,

}

static uint64_t load_aarch64_image(const char *filename, hwaddr mem_base,

- hwaddr *entry)

+ hwaddr *entry, AddressSpace *as)

{

hwaddr kernel_load_offset = KERNEL64_LOAD_ADDR;

uint8_t *buffer;

@@ -XXX,XX +XXX,XX @@ static uint64_t load_aarch64_image(const char *filename, hwaddr mem_base,

}

*entry = mem_base + kernel_load_offset;

- rom_add_blob_fixed(filename, buffer, size, *entry);

+ rom_add_blob_fixed_as(filename, buffer, size, *entry, as);

g_free(buffer);

@@ -XXX,XX +XXX,XX @@ static void arm_load_kernel_notify(Notifier *notifier, void *data)

ARMCPU *cpu = n->cpu;

struct arm_boot_info *info =

container_of(n, struct arm_boot_info, load_kernel_notifier);

+ AddressSpace *as = arm_boot_address_space(cpu, info);

/* The board code is not supposed to set secure_board_setup unless

* running its code in secure mode is actually possible, and KVM

@@ -XXX,XX +XXX,XX @@ static void arm_load_kernel_notify(Notifier *notifier, void *data)

* the kernel is supposed to be loaded by the bootloader), copy the

* DTB to the base of RAM for the bootloader to pick up.

*/

- if (load_dtb(info->loader_start, info, 0) < 0) {

+ if (load_dtb(info->loader_start, info, 0, as) < 0) {

exit(1);

}

}

@@ -XXX,XX +XXX,XX @@ static void arm_load_kernel_notify(Notifier *notifier, void *data)

/* Assume that raw images are linux kernels, and ELF images are not. */

kernel_size = arm_load_elf(info, &elf_entry, &elf_low_addr,

- &elf_high_addr, elf_machine);

+ &elf_high_addr, elf_machine, as);

if (kernel_size > 0 && have_dtb(info)) {

/* If there is still some room left at the base of RAM, try and put

* the DTB there like we do for images loaded with -bios or -pflash.

@@ -XXX,XX +XXX,XX @@ static void arm_load_kernel_notify(Notifier *notifier, void *data)

if (elf_low_addr < info->loader_start) {

elf_low_addr = 0;

}

- if (load_dtb(info->loader_start, info, elf_low_addr) < 0) {

+ if (load_dtb(info->loader_start, info, elf_low_addr, as) < 0) {

exit(1);

}

}

}

entry = elf_entry;

if (kernel_size < 0) {

- kernel_size = load_uimage(info->kernel_filename, &entry, NULL,

- &is_linux, NULL, NULL);

+ kernel_size = load_uimage_as(info->kernel_filename, &entry, NULL,

+ &is_linux, NULL, NULL, as);

}

if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64) && kernel_size < 0) {

kernel_size = load_aarch64_image(info->kernel_filename,

- info->loader_start, &entry);

+ info->loader_start, &entry, as);

is_linux = 1;

} else if (kernel_size < 0) {

/* 32-bit ARM */

entry = info->loader_start + KERNEL_LOAD_ADDR;

- kernel_size = load_image_targphys(info->kernel_filename, entry,

- info->ram_size - KERNEL_LOAD_ADDR);

+ kernel_size = load_image_targphys_as(info->kernel_filename, entry,

+ info->ram_size - KERNEL_LOAD_ADDR,

+ as);

is_linux = 1;

}

if (kernel_size < 0) {

@@ -XXX,XX +XXX,XX @@ static void arm_load_kernel_notify(Notifier *notifier, void *data)

uint32_t fixupcontext[FIXUP_MAX];

if (info->initrd_filename) {

- initrd_size = load_ramdisk(info->initrd_filename,

- info->initrd_start,

- info->ram_size -

- info->initrd_start);

+ initrd_size = load_ramdisk_as(info->initrd_filename,

+ info->initrd_start,

+ info->ram_size - info->initrd_start,

+ as);

if (initrd_size < 0) {

- initrd_size = load_image_targphys(info->initrd_filename,

- info->initrd_start,

- info->ram_size -

- info->initrd_start);

+ initrd_size = load_image_targphys_as(info->initrd_filename,

+ info->initrd_start,

+ info->ram_size -

+ info->initrd_start,

+ as);

}

if (initrd_size < 0) {

error_report("could not load initrd '%s'",

@@ -XXX,XX +XXX,XX @@ static void arm_load_kernel_notify(Notifier *notifier, void *data)

/* Place the DTB after the initrd in memory with alignment. */

dtb_start = QEMU_ALIGN_UP(info->initrd_start + initrd_size, align);

- if (load_dtb(dtb_start, info, 0) < 0) {

+ if (load_dtb(dtb_start, info, 0, as) < 0) {

exit(1);

}

fixupcontext[FIXUP_ARGPTR] = dtb_start;

@@ -XXX,XX +XXX,XX @@ static void arm_load_kernel_notify(Notifier *notifier, void *data)

fixupcontext[FIXUP_ENTRYPOINT] = entry;

write_bootloader("bootloader", info->loader_start,

- primary_loader, fixupcontext);

+ primary_loader, fixupcontext, as);

if (info->nb_cpus > 1) {

info->write_secondary_boot(cpu, info);

--

2.16.2

Instead of loading guest images to the system address space, use the

CPU's address space. This is important if we're trying to load the

file to memory or via an alias memory region that is provided by an

SoC object and thus not mapped into the system address space.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Message-id: 20180220180325.29818-4-peter.maydell@linaro.org

---

hw/arm/armv7m.c | 17 ++++++++++++++---

1 file changed, 14 insertions(+), 3 deletions(-)

diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c

index XXXXXXX..XXXXXXX 100644

--- a/hw/arm/armv7m.c

+++ b/hw/arm/armv7m.c

@@ -XXX,XX +XXX,XX @@ void armv7m_load_kernel(ARMCPU *cpu, const char *kernel_filename, int mem_size)

uint64_t entry;

uint64_t lowaddr;

int big_endian;

+ AddressSpace *as;

+ int asidx;

+ CPUState *cs = CPU(cpu);

#ifdef TARGET_WORDS_BIGENDIAN

big_endian = 1;

@@ -XXX,XX +XXX,XX @@ void armv7m_load_kernel(ARMCPU *cpu, const char *kernel_filename, int mem_size)

exit(1);

}

+ if (arm_feature(&cpu->env, ARM_FEATURE_EL3)) {

+ asidx = ARMASIdx_S;

+ } else {

+ asidx = ARMASIdx_NS;

+ }

+ as = cpu_get_address_space(cs, asidx);

+

if (kernel_filename) {

- image_size = load_elf(kernel_filename, NULL, NULL, &entry, &lowaddr,

- NULL, big_endian, EM_ARM, 1, 0);

+ image_size = load_elf_as(kernel_filename, NULL, NULL, &entry, &lowaddr,

+ NULL, big_endian, EM_ARM, 1, 0, as);

if (image_size < 0) {

- image_size = load_image_targphys(kernel_filename, 0, mem_size);

+ image_size = load_image_targphys_as(kernel_filename, 0,

+ mem_size, as);

lowaddr = 0;

}

if (image_size < 0) {

--

2.16.2