1 | Changes v1->v2: it turns out that the raspi3 support exposes a | 1 | The following changes since commit b7c359c748a2e3ccb97a184b9739feb2cd48de2f: |
---|---|---|---|
2 | preexisting bug in our register definitions for VMPIDR/VMIDR: | ||
3 | https://lists.gnu.org/archive/html/qemu-devel/2018-02/msg04181.html | ||
4 | 2 | ||
5 | So I've dropped the final "enable raspi3 board" patch for the | 3 | Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-5.0-pull-request' into staging (2020-01-23 14:38:43 +0000) |
6 | moment. When that VMIDR/VMPIDR patch gets reviewed we can | ||
7 | put the raspi3 patch in with it. | ||
8 | |||
9 | |||
10 | thanks | ||
11 | -- PMM | ||
12 | |||
13 | The following changes since commit f003d07337a6d4d02c43429b26a4270459afb51a: | ||
14 | |||
15 | Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into staging (2018-02-15 15:45:33 +0000) | ||
16 | 4 | ||
17 | are available in the Git repository at: | 5 | are available in the Git repository at: |
18 | 6 | ||
19 | git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20180215-1 | 7 | https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200123 |
20 | 8 | ||
21 | for you to fetch changes up to bade58166f4466546600d824a2695a00269d10eb: | 9 | for you to fetch changes up to 53c75ad8e72dc3a5102de7ed21e4990969cb0a19: |
22 | 10 | ||
23 | raspi: Raspberry Pi 3 support (2018-02-15 18:33:46 +0000) | 11 | hw/arm/exynos4210: Connect serial port DMA busy signals with pl330 (2020-01-23 15:22:42 +0000) |
24 | 12 | ||
25 | ---------------------------------------------------------------- | 13 | ---------------------------------------------------------------- |
26 | target-arm queue: | 14 | target-arm queue: |
27 | * aspeed: code cleanup to use unimplemented_device | 15 | * fix bug in PAuth emulation |
28 | * preparatory work for 'raspi3' RaspberryPi 3 machine model | 16 | * add PMU to Cortex-R5, Cortex-R5F |
29 | * more SVE prep work | 17 | * qemu-nbd: Convert documentation to rST |
30 | * v8M: add minor missing registers | 18 | * qemu-block-drivers: Convert documentation to rST |
31 | * v7M: fix bug where we weren't migrating v7m.other_sp | 19 | * Fix Exynos4210 UART DMA support |
32 | * v7M: fix bugs in handling of interrupt registers for | 20 | * Various minor code cleanups |
33 | external interrupts beyond 32 | ||
34 | 21 | ||
35 | ---------------------------------------------------------------- | 22 | ---------------------------------------------------------------- |
36 | Pekka Enberg (2): | 23 | Andrew Jones (1): |
37 | bcm2836: Make CPU type configurable | 24 | target/arm/arch_dump: Add SVE notes |
38 | raspi: Raspberry Pi 3 support | ||
39 | 25 | ||
40 | Peter Maydell (11): | 26 | Clement Deschamps (1): |
41 | hw/intc/armv7m_nvic: Don't hardcode M profile ID registers in NVIC | 27 | target/arm: add PMU feature to cortex-r5 and cortex-r5f |
42 | hw/intc/armv7m_nvic: Fix ICSR PENDNMISET/CLR handling | ||
43 | hw/intc/armv7m_nvic: Implement M profile cache maintenance ops | ||
44 | hw/intc/armv7m_nvic: Implement v8M CPPWR register | ||
45 | hw/intc/armv7m_nvic: Implement cache ID registers | ||
46 | hw/intc/armv7m_nvic: Implement SCR | ||
47 | target/arm: Implement writing to CONTROL_NS for v8M | ||
48 | hw/intc/armv7m_nvic: Fix byte-to-interrupt number conversions | ||
49 | target/arm: Add AIRCR to vmstate struct | ||
50 | target/arm: Migrate v7m.other_sp | ||
51 | target/arm: Implement v8M MSPLIM and PSPLIM registers | ||
52 | 28 | ||
53 | Philippe Mathieu-Daudé (2): | 29 | Guenter Roeck (8): |
54 | hw/arm/aspeed: directly map the serial device to the system address space | 30 | dma/pl330: Convert to support tracing |
55 | hw/arm/aspeed: simplify using the 'unimplemented device' for aspeed_soc.io | 31 | hw/core/or-irq: Increase limit of or-lines to 48 |
32 | hw/arm/exynos4210: Fix DMA initialization | ||
33 | hw/char/exynos4210_uart: Convert to support tracing | ||
34 | hw/char/exynos4210_uart: Implement post_load function | ||
35 | hw/char/exynos4210_uart: Implement Rx FIFO level triggers and timeouts | ||
36 | hw/char/exynos4210_uart: Add receive DMA support | ||
37 | hw/arm/exynos4210: Connect serial port DMA busy signals with pl330 | ||
56 | 38 | ||
57 | Richard Henderson (5): | 39 | Keqian Zhu (2): |
58 | target/arm: Remove ARM_CP_64BIT from ZCR_EL registers | 40 | hw/acpi: Remove extra indent in ACPI GED hotplug cb |
59 | target/arm: Enforce FP access to FPCR/FPSR | 41 | hw/arm: Use helper function to trigger hotplug handler plug |
60 | target/arm: Suppress TB end for FPCR/FPSR | ||
61 | target/arm: Enforce access to ZCR_EL at translation | ||
62 | target/arm: Handle SVE registers when using clear_vec_high | ||
63 | 42 | ||
64 | include/hw/arm/aspeed_soc.h | 1 - | 43 | Peter Maydell (3): |
65 | include/hw/arm/bcm2836.h | 1 + | 44 | qemu-nbd: Convert invocation documentation to rST |
66 | target/arm/cpu.h | 71 ++++++++++++----- | 45 | docs: Create stub system manual |
67 | target/arm/internals.h | 6 ++ | 46 | qemu-block-drivers: Convert to rST |
68 | hw/arm/aspeed_soc.c | 35 ++------- | ||
69 | hw/arm/bcm2836.c | 17 +++-- | ||
70 | hw/arm/raspi.c | 34 ++++++--- | ||
71 | hw/intc/armv7m_nvic.c | 98 ++++++++++++++++++------ | ||
72 | target/arm/cpu.c | 28 +++++++ | ||
73 | target/arm/helper.c | 84 +++++++++++++++----- | ||
74 | target/arm/machine.c | 84 ++++++++++++++++++++ | ||
75 | target/arm/translate-a64.c | 181 ++++++++++++++++++++------------------------ | ||
76 | 12 files changed, 429 insertions(+), 211 deletions(-) | ||
77 | 47 | ||
48 | Philippe Mathieu-Daudé (1): | ||
49 | hw/misc/stm32f4xx_syscfg: Fix copy/paste error | ||
50 | |||
51 | Richard Henderson (3): | ||
52 | tests/tcg/aarch64: Fix compilation parameters for pauth-% | ||
53 | tests/tcg/aarch64: Add pauth-3 | ||
54 | tests/tcg/aarch64: Add pauth-4 | ||
55 | |||
56 | Vincent Dehors (1): | ||
57 | target/arm: Fix PAuth sbox functions | ||
58 | |||
59 | Makefile | 37 +- | ||
60 | tests/tcg/aarch64/Makefile.softmmu-target | 5 +- | ||
61 | tests/tcg/aarch64/Makefile.target | 3 +- | ||
62 | include/elf.h | 1 + | ||
63 | include/hw/arm/exynos4210.h | 4 + | ||
64 | include/hw/or-irq.h | 2 +- | ||
65 | target/arm/cpu.h | 25 + | ||
66 | hw/acpi/generic_event_device.c | 2 +- | ||
67 | hw/arm/exynos4210.c | 77 ++- | ||
68 | hw/arm/virt.c | 6 +- | ||
69 | hw/char/exynos4210_uart.c | 245 +++++--- | ||
70 | hw/dma/pl330.c | 88 +-- | ||
71 | hw/misc/stm32f4xx_syscfg.c | 2 +- | ||
72 | target/arm/arch_dump.c | 124 +++- | ||
73 | target/arm/cpu.c | 1 + | ||
74 | target/arm/kvm64.c | 24 - | ||
75 | target/arm/pauth_helper.c | 4 +- | ||
76 | tests/tcg/aarch64/pauth-1.c | 2 - | ||
77 | tests/tcg/aarch64/pauth-2.c | 2 - | ||
78 | tests/tcg/aarch64/pauth-4.c | 25 + | ||
79 | tests/tcg/aarch64/system/pauth-3.c | 40 ++ | ||
80 | MAINTAINERS | 1 + | ||
81 | docs/index.html.in | 1 + | ||
82 | docs/interop/conf.py | 4 +- | ||
83 | docs/interop/index.rst | 1 + | ||
84 | docs/interop/qemu-nbd.rst | 263 ++++++++ | ||
85 | docs/interop/qemu-option-trace.rst.inc | 30 + | ||
86 | docs/qemu-block-drivers.texi | 889 --------------------------- | ||
87 | docs/system/conf.py | 22 + | ||
88 | docs/system/index.rst | 17 + | ||
89 | docs/system/qemu-block-drivers.rst | 985 ++++++++++++++++++++++++++++++ | ||
90 | hw/char/trace-events | 20 + | ||
91 | hw/dma/trace-events | 24 + | ||
92 | qemu-doc.texi | 18 - | ||
93 | qemu-nbd.texi | 214 ------- | ||
94 | qemu-option-trace.texi | 4 + | ||
95 | qemu-options.hx | 2 +- | ||
96 | 37 files changed, 1897 insertions(+), 1317 deletions(-) | ||
97 | create mode 100644 tests/tcg/aarch64/pauth-4.c | ||
98 | create mode 100644 tests/tcg/aarch64/system/pauth-3.c | ||
99 | create mode 100644 docs/interop/qemu-nbd.rst | ||
100 | create mode 100644 docs/interop/qemu-option-trace.rst.inc | ||
101 | delete mode 100644 docs/qemu-block-drivers.texi | ||
102 | create mode 100644 docs/system/conf.py | ||
103 | create mode 100644 docs/system/index.rst | ||
104 | create mode 100644 docs/system/qemu-block-drivers.rst | ||
105 | delete mode 100644 qemu-nbd.texi | ||
106 | diff view generated by jsdifflib |
1 | Instead of hardcoding the values of M profile ID registers in the | 1 | From: Clement Deschamps <clement.deschamps@greensocs.com> |
---|---|---|---|
2 | NVIC, use the fields in the CPU struct. This will allow us to | ||
3 | give different M profile CPU types different ID register values. | ||
4 | 2 | ||
5 | This commit includes the addition of the missing ID_ISAR5, | 3 | The PMU is not optional on cortex-r5 and cortex-r5f (see |
6 | which exists as RES0 in both v7M and v8M. | 4 | the "Features" chapter of the Technical Reference Manual). |
7 | 5 | ||
8 | (The values of the ID registers might be wrong for the M4 -- | 6 | Signed-off-by: Clement Deschamps <clement.deschamps@greensocs.com> |
9 | this commit leaves the behaviour there unchanged.) | 7 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> |
8 | Message-id: 20200114105918.2366370-1-clement.deschamps@greensocs.com | ||
9 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
10 | --- | ||
11 | target/arm/cpu.c | 1 + | ||
12 | 1 file changed, 1 insertion(+) | ||
10 | 13 | ||
11 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | ||
12 | Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> | ||
13 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | ||
14 | Message-id: 20180209165810.6668-2-peter.maydell@linaro.org | ||
15 | --- | ||
16 | hw/intc/armv7m_nvic.c | 30 ++++++++++++++++-------------- | ||
17 | target/arm/cpu.c | 28 ++++++++++++++++++++++++++++ | ||
18 | 2 files changed, 44 insertions(+), 14 deletions(-) | ||
19 | |||
20 | diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c | ||
21 | index XXXXXXX..XXXXXXX 100644 | ||
22 | --- a/hw/intc/armv7m_nvic.c | ||
23 | +++ b/hw/intc/armv7m_nvic.c | ||
24 | @@ -XXX,XX +XXX,XX @@ static uint32_t nvic_readl(NVICState *s, uint32_t offset, MemTxAttrs attrs) | ||
25 | "Aux Fault status registers unimplemented\n"); | ||
26 | return 0; | ||
27 | case 0xd40: /* PFR0. */ | ||
28 | - return 0x00000030; | ||
29 | - case 0xd44: /* PRF1. */ | ||
30 | - return 0x00000200; | ||
31 | + return cpu->id_pfr0; | ||
32 | + case 0xd44: /* PFR1. */ | ||
33 | + return cpu->id_pfr1; | ||
34 | case 0xd48: /* DFR0. */ | ||
35 | - return 0x00100000; | ||
36 | + return cpu->id_dfr0; | ||
37 | case 0xd4c: /* AFR0. */ | ||
38 | - return 0x00000000; | ||
39 | + return cpu->id_afr0; | ||
40 | case 0xd50: /* MMFR0. */ | ||
41 | - return 0x00000030; | ||
42 | + return cpu->id_mmfr0; | ||
43 | case 0xd54: /* MMFR1. */ | ||
44 | - return 0x00000000; | ||
45 | + return cpu->id_mmfr1; | ||
46 | case 0xd58: /* MMFR2. */ | ||
47 | - return 0x00000000; | ||
48 | + return cpu->id_mmfr2; | ||
49 | case 0xd5c: /* MMFR3. */ | ||
50 | - return 0x00000000; | ||
51 | + return cpu->id_mmfr3; | ||
52 | case 0xd60: /* ISAR0. */ | ||
53 | - return 0x01141110; | ||
54 | + return cpu->id_isar0; | ||
55 | case 0xd64: /* ISAR1. */ | ||
56 | - return 0x02111000; | ||
57 | + return cpu->id_isar1; | ||
58 | case 0xd68: /* ISAR2. */ | ||
59 | - return 0x21112231; | ||
60 | + return cpu->id_isar2; | ||
61 | case 0xd6c: /* ISAR3. */ | ||
62 | - return 0x01111110; | ||
63 | + return cpu->id_isar3; | ||
64 | case 0xd70: /* ISAR4. */ | ||
65 | - return 0x01310102; | ||
66 | + return cpu->id_isar4; | ||
67 | + case 0xd74: /* ISAR5. */ | ||
68 | + return cpu->id_isar5; | ||
69 | /* TODO: Implement debug registers. */ | ||
70 | case 0xd90: /* MPU_TYPE */ | ||
71 | /* Unified MPU; if the MPU is not present this value is zero */ | ||
72 | diff --git a/target/arm/cpu.c b/target/arm/cpu.c | 14 | diff --git a/target/arm/cpu.c b/target/arm/cpu.c |
73 | index XXXXXXX..XXXXXXX 100644 | 15 | index XXXXXXX..XXXXXXX 100644 |
74 | --- a/target/arm/cpu.c | 16 | --- a/target/arm/cpu.c |
75 | +++ b/target/arm/cpu.c | 17 | +++ b/target/arm/cpu.c |
76 | @@ -XXX,XX +XXX,XX @@ static void cortex_m3_initfn(Object *obj) | 18 | @@ -XXX,XX +XXX,XX @@ static void cortex_r5_initfn(Object *obj) |
77 | set_feature(&cpu->env, ARM_FEATURE_M); | 19 | set_feature(&cpu->env, ARM_FEATURE_V7); |
78 | cpu->midr = 0x410fc231; | 20 | set_feature(&cpu->env, ARM_FEATURE_V7MP); |
79 | cpu->pmsav7_dregion = 8; | 21 | set_feature(&cpu->env, ARM_FEATURE_PMSA); |
80 | + cpu->id_pfr0 = 0x00000030; | 22 | + set_feature(&cpu->env, ARM_FEATURE_PMU); |
81 | + cpu->id_pfr1 = 0x00000200; | 23 | cpu->midr = 0x411fc153; /* r1p3 */ |
82 | + cpu->id_dfr0 = 0x00100000; | 24 | cpu->id_pfr0 = 0x0131; |
83 | + cpu->id_afr0 = 0x00000000; | 25 | cpu->id_pfr1 = 0x001; |
84 | + cpu->id_mmfr0 = 0x00000030; | ||
85 | + cpu->id_mmfr1 = 0x00000000; | ||
86 | + cpu->id_mmfr2 = 0x00000000; | ||
87 | + cpu->id_mmfr3 = 0x00000000; | ||
88 | + cpu->id_isar0 = 0x01141110; | ||
89 | + cpu->id_isar1 = 0x02111000; | ||
90 | + cpu->id_isar2 = 0x21112231; | ||
91 | + cpu->id_isar3 = 0x01111110; | ||
92 | + cpu->id_isar4 = 0x01310102; | ||
93 | + cpu->id_isar5 = 0x00000000; | ||
94 | } | ||
95 | |||
96 | static void cortex_m4_initfn(Object *obj) | ||
97 | @@ -XXX,XX +XXX,XX @@ static void cortex_m4_initfn(Object *obj) | ||
98 | set_feature(&cpu->env, ARM_FEATURE_THUMB_DSP); | ||
99 | cpu->midr = 0x410fc240; /* r0p0 */ | ||
100 | cpu->pmsav7_dregion = 8; | ||
101 | + cpu->id_pfr0 = 0x00000030; | ||
102 | + cpu->id_pfr1 = 0x00000200; | ||
103 | + cpu->id_dfr0 = 0x00100000; | ||
104 | + cpu->id_afr0 = 0x00000000; | ||
105 | + cpu->id_mmfr0 = 0x00000030; | ||
106 | + cpu->id_mmfr1 = 0x00000000; | ||
107 | + cpu->id_mmfr2 = 0x00000000; | ||
108 | + cpu->id_mmfr3 = 0x00000000; | ||
109 | + cpu->id_isar0 = 0x01141110; | ||
110 | + cpu->id_isar1 = 0x02111000; | ||
111 | + cpu->id_isar2 = 0x21112231; | ||
112 | + cpu->id_isar3 = 0x01111110; | ||
113 | + cpu->id_isar4 = 0x01310102; | ||
114 | + cpu->id_isar5 = 0x00000000; | ||
115 | } | ||
116 | |||
117 | static void arm_v7m_class_init(ObjectClass *oc, void *data) | ||
118 | -- | 26 | -- |
119 | 2.16.1 | 27 | 2.20.1 |
120 | 28 | ||
121 | 29 | diff view generated by jsdifflib |
1 | From: Philippe Mathieu-Daudé <f4bug@amsat.org> | 1 | From: Vincent Dehors <vincent.dehors@smile.fr> |
---|---|---|---|
2 | 2 | ||
3 | (qemu) info mtree | 3 | In the PAC computation, sbox was applied over wrong bits. |
4 | address-space: cpu-memory-0 | 4 | As this is a 4-bit sbox, bit index should be incremented by 4 instead of 16. |
5 | 0000000000000000-ffffffffffffffff (prio 0, i/o): system | ||
6 | 0000000000000000-0000000007ffffff (prio 0, rom): aspeed.boot_rom | ||
7 | - 000000001e600000-000000001e7fffff (prio -1, i/o): aspeed_soc.io | ||
8 | + 000000001e600000-000000001e7fffff (prio -1000, i/o): aspeed_soc.io | ||
9 | 000000001e620000-000000001e6200ff (prio 0, i/o): aspeed.smc.ast2500-fmc | ||
10 | 000000001e630000-000000001e6300ff (prio 0, i/o): aspeed.smc.ast2500-spi1 | ||
11 | 000000001e631000-000000001e6310ff (prio 0, i/o): aspeed.smc.ast2500-spi2 | ||
12 | 5 | ||
13 | Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> | 6 | Test vector from QARMA paper (https://eprint.iacr.org/2016/444.pdf) was |
14 | Reviewed-by: Cédric Le Goater <clg@kaod.org> | 7 | used to verify one computation of the pauth_computepac() function which |
15 | Reviewed-by: Andrew Jeffery <andrew@aj.id.au> | 8 | uses sbox2. |
16 | Message-id: 20180209085755.30414-3-f4bug@amsat.org | 9 | |
10 | Launchpad: https://bugs.launchpad.net/bugs/1859713 | ||
11 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | ||
12 | Signed-off-by: Vincent DEHORS <vincent.dehors@smile.fr> | ||
13 | Signed-off-by: Adrien GRASSEIN <adrien.grassein@smile.fr> | ||
14 | Message-id: 20200116230809.19078-2-richard.henderson@linaro.org | ||
15 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
17 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 16 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
18 | --- | 17 | --- |
19 | include/hw/arm/aspeed_soc.h | 1 - | 18 | target/arm/pauth_helper.c | 4 ++-- |
20 | hw/arm/aspeed_soc.c | 32 +++----------------------------- | 19 | 1 file changed, 2 insertions(+), 2 deletions(-) |
21 | 2 files changed, 3 insertions(+), 30 deletions(-) | ||
22 | 20 | ||
23 | diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h | 21 | diff --git a/target/arm/pauth_helper.c b/target/arm/pauth_helper.c |
24 | index XXXXXXX..XXXXXXX 100644 | 22 | index XXXXXXX..XXXXXXX 100644 |
25 | --- a/include/hw/arm/aspeed_soc.h | 23 | --- a/target/arm/pauth_helper.c |
26 | +++ b/include/hw/arm/aspeed_soc.h | 24 | +++ b/target/arm/pauth_helper.c |
27 | @@ -XXX,XX +XXX,XX @@ typedef struct AspeedSoCState { | 25 | @@ -XXX,XX +XXX,XX @@ static uint64_t pac_sub(uint64_t i) |
28 | 26 | uint64_t o = 0; | |
29 | /*< public >*/ | 27 | int b; |
30 | ARMCPU cpu; | 28 | |
31 | - MemoryRegion iomem; | 29 | - for (b = 0; b < 64; b += 16) { |
32 | MemoryRegion sram; | 30 | + for (b = 0; b < 64; b += 4) { |
33 | AspeedVICState vic; | 31 | o |= (uint64_t)sub[(i >> b) & 0xf] << b; |
34 | AspeedTimerCtrlState timerctrl; | 32 | } |
35 | diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c | 33 | return o; |
36 | index XXXXXXX..XXXXXXX 100644 | 34 | @@ -XXX,XX +XXX,XX @@ static uint64_t pac_inv_sub(uint64_t i) |
37 | --- a/hw/arm/aspeed_soc.c | 35 | uint64_t o = 0; |
38 | +++ b/hw/arm/aspeed_soc.c | 36 | int b; |
39 | @@ -XXX,XX +XXX,XX @@ | 37 | |
40 | #include "qemu-common.h" | 38 | - for (b = 0; b < 64; b += 16) { |
41 | #include "cpu.h" | 39 | + for (b = 0; b < 64; b += 4) { |
42 | #include "exec/address-spaces.h" | 40 | o |= (uint64_t)inv_sub[(i >> b) & 0xf] << b; |
43 | +#include "hw/misc/unimp.h" | 41 | } |
44 | #include "hw/arm/aspeed_soc.h" | 42 | return o; |
45 | #include "hw/char/serial.h" | ||
46 | #include "qemu/log.h" | ||
47 | @@ -XXX,XX +XXX,XX @@ static const AspeedSoCInfo aspeed_socs[] = { | ||
48 | }, | ||
49 | }; | ||
50 | |||
51 | -/* | ||
52 | - * IO handlers: simply catch any reads/writes to IO addresses that aren't | ||
53 | - * handled by a device mapping. | ||
54 | - */ | ||
55 | - | ||
56 | -static uint64_t aspeed_soc_io_read(void *p, hwaddr offset, unsigned size) | ||
57 | -{ | ||
58 | - qemu_log_mask(LOG_UNIMP, "%s: 0x%" HWADDR_PRIx " [%u]\n", | ||
59 | - __func__, offset, size); | ||
60 | - return 0; | ||
61 | -} | ||
62 | - | ||
63 | -static void aspeed_soc_io_write(void *opaque, hwaddr offset, uint64_t value, | ||
64 | - unsigned size) | ||
65 | -{ | ||
66 | - qemu_log_mask(LOG_UNIMP, "%s: 0x%" HWADDR_PRIx " <- 0x%" PRIx64 " [%u]\n", | ||
67 | - __func__, offset, value, size); | ||
68 | -} | ||
69 | - | ||
70 | -static const MemoryRegionOps aspeed_soc_io_ops = { | ||
71 | - .read = aspeed_soc_io_read, | ||
72 | - .write = aspeed_soc_io_write, | ||
73 | - .endianness = DEVICE_LITTLE_ENDIAN, | ||
74 | -}; | ||
75 | - | ||
76 | static void aspeed_soc_init(Object *obj) | ||
77 | { | ||
78 | AspeedSoCState *s = ASPEED_SOC(obj); | ||
79 | @@ -XXX,XX +XXX,XX @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) | ||
80 | Error *err = NULL, *local_err = NULL; | ||
81 | |||
82 | /* IO space */ | ||
83 | - memory_region_init_io(&s->iomem, NULL, &aspeed_soc_io_ops, NULL, | ||
84 | - "aspeed_soc.io", ASPEED_SOC_IOMEM_SIZE); | ||
85 | - memory_region_add_subregion_overlap(get_system_memory(), | ||
86 | - ASPEED_SOC_IOMEM_BASE, &s->iomem, -1); | ||
87 | + create_unimplemented_device("aspeed_soc.io", | ||
88 | + ASPEED_SOC_IOMEM_BASE, ASPEED_SOC_IOMEM_SIZE); | ||
89 | |||
90 | /* CPU */ | ||
91 | object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err); | ||
92 | -- | 43 | -- |
93 | 2.16.1 | 44 | 2.20.1 |
94 | 45 | ||
95 | 46 | diff view generated by jsdifflib |
1 | From: Richard Henderson <richard.henderson@linaro.org> | 1 | From: Richard Henderson <richard.henderson@linaro.org> |
---|---|---|---|
2 | 2 | ||
3 | Nothing in either register affects the TB. | 3 | We were incorrectly requiring ARMv8.4 support for the pauth |
4 | tests, but Pointer Authentication is an ARMv8.3 extension. | ||
5 | Further, hiding the required architecture within asm() is | ||
6 | not correct. | ||
7 | |||
8 | Correct the architecture version requested, and specify it | ||
9 | in the cflags of the (cross-) compiler rather than in the asm. | ||
4 | 10 | ||
5 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | 11 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
6 | Message-id: 20180211205848.4568-4-richard.henderson@linaro.org | 12 | Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> |
7 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | 13 | Message-id: 20200116230809.19078-3-richard.henderson@linaro.org |
14 | [PMM: tweaked commit message] | ||
8 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 15 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
9 | --- | 16 | --- |
10 | target/arm/helper.c | 4 ++-- | 17 | tests/tcg/aarch64/Makefile.target | 1 + |
11 | 1 file changed, 2 insertions(+), 2 deletions(-) | 18 | tests/tcg/aarch64/pauth-1.c | 2 -- |
19 | tests/tcg/aarch64/pauth-2.c | 2 -- | ||
20 | 3 files changed, 1 insertion(+), 4 deletions(-) | ||
12 | 21 | ||
13 | diff --git a/target/arm/helper.c b/target/arm/helper.c | 22 | diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target |
14 | index XXXXXXX..XXXXXXX 100644 | 23 | index XXXXXXX..XXXXXXX 100644 |
15 | --- a/target/arm/helper.c | 24 | --- a/tests/tcg/aarch64/Makefile.target |
16 | +++ b/target/arm/helper.c | 25 | +++ b/tests/tcg/aarch64/Makefile.target |
17 | @@ -XXX,XX +XXX,XX @@ static const ARMCPRegInfo v8_cp_reginfo[] = { | 26 | @@ -XXX,XX +XXX,XX @@ run-fcvt: fcvt |
18 | .writefn = aa64_daif_write, .resetfn = arm_cp_reset_ignore }, | 27 | # Pauth Tests |
19 | { .name = "FPCR", .state = ARM_CP_STATE_AA64, | 28 | AARCH64_TESTS += pauth-1 pauth-2 |
20 | .opc0 = 3, .opc1 = 3, .opc2 = 0, .crn = 4, .crm = 4, | 29 | run-pauth-%: QEMU_OPTS += -cpu max |
21 | - .access = PL0_RW, .type = ARM_CP_FPU, | 30 | +pauth-%: CFLAGS += -march=armv8.3-a |
22 | + .access = PL0_RW, .type = ARM_CP_FPU | ARM_CP_SUPPRESS_TB_END, | 31 | |
23 | .readfn = aa64_fpcr_read, .writefn = aa64_fpcr_write }, | 32 | # Semihosting smoke test for linux-user |
24 | { .name = "FPSR", .state = ARM_CP_STATE_AA64, | 33 | AARCH64_TESTS += semihosting |
25 | .opc0 = 3, .opc1 = 3, .opc2 = 1, .crn = 4, .crm = 4, | 34 | diff --git a/tests/tcg/aarch64/pauth-1.c b/tests/tcg/aarch64/pauth-1.c |
26 | - .access = PL0_RW, .type = ARM_CP_FPU, | 35 | index XXXXXXX..XXXXXXX 100644 |
27 | + .access = PL0_RW, .type = ARM_CP_FPU | ARM_CP_SUPPRESS_TB_END, | 36 | --- a/tests/tcg/aarch64/pauth-1.c |
28 | .readfn = aa64_fpsr_read, .writefn = aa64_fpsr_write }, | 37 | +++ b/tests/tcg/aarch64/pauth-1.c |
29 | { .name = "DCZID_EL0", .state = ARM_CP_STATE_AA64, | 38 | @@ -XXX,XX +XXX,XX @@ |
30 | .opc0 = 3, .opc1 = 3, .opc2 = 7, .crn = 0, .crm = 0, | 39 | #include <sys/prctl.h> |
40 | #include <stdio.h> | ||
41 | |||
42 | -asm(".arch armv8.4-a"); | ||
43 | - | ||
44 | #ifndef PR_PAC_RESET_KEYS | ||
45 | #define PR_PAC_RESET_KEYS 54 | ||
46 | #define PR_PAC_APDAKEY (1 << 2) | ||
47 | diff --git a/tests/tcg/aarch64/pauth-2.c b/tests/tcg/aarch64/pauth-2.c | ||
48 | index XXXXXXX..XXXXXXX 100644 | ||
49 | --- a/tests/tcg/aarch64/pauth-2.c | ||
50 | +++ b/tests/tcg/aarch64/pauth-2.c | ||
51 | @@ -XXX,XX +XXX,XX @@ | ||
52 | #include <stdint.h> | ||
53 | #include <assert.h> | ||
54 | |||
55 | -asm(".arch armv8.4-a"); | ||
56 | - | ||
57 | void do_test(uint64_t value) | ||
58 | { | ||
59 | uint64_t salt1, salt2; | ||
31 | -- | 60 | -- |
32 | 2.16.1 | 61 | 2.20.1 |
33 | 62 | ||
34 | 63 | diff view generated by jsdifflib |
1 | From: Richard Henderson <richard.henderson@linaro.org> | 1 | From: Richard Henderson <richard.henderson@linaro.org> |
---|---|---|---|
2 | 2 | ||
3 | Because they are ARM_CP_STATE_AA64, ARM_CP_64BIT is implied. | 3 | This is the test vector from the QARMA paper, run through PACGA. |
4 | 4 | ||
5 | Suggested-by: Vincent Dehors <vincent.dehors@smile.fr> | ||
5 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | 6 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
6 | Message-id: 20180211205848.4568-2-richard.henderson@linaro.org | 7 | Message-id: 20200116230809.19078-4-richard.henderson@linaro.org |
7 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
8 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 8 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
9 | --- | 9 | --- |
10 | target/arm/helper.c | 8 ++++---- | 10 | tests/tcg/aarch64/Makefile.softmmu-target | 5 ++- |
11 | 1 file changed, 4 insertions(+), 4 deletions(-) | 11 | tests/tcg/aarch64/system/pauth-3.c | 40 +++++++++++++++++++++++ |
12 | 2 files changed, 44 insertions(+), 1 deletion(-) | ||
13 | create mode 100644 tests/tcg/aarch64/system/pauth-3.c | ||
12 | 14 | ||
13 | diff --git a/target/arm/helper.c b/target/arm/helper.c | 15 | diff --git a/tests/tcg/aarch64/Makefile.softmmu-target b/tests/tcg/aarch64/Makefile.softmmu-target |
14 | index XXXXXXX..XXXXXXX 100644 | 16 | index XXXXXXX..XXXXXXX 100644 |
15 | --- a/target/arm/helper.c | 17 | --- a/tests/tcg/aarch64/Makefile.softmmu-target |
16 | +++ b/target/arm/helper.c | 18 | +++ b/tests/tcg/aarch64/Makefile.softmmu-target |
17 | @@ -XXX,XX +XXX,XX @@ static void zcr_write(CPUARMState *env, const ARMCPRegInfo *ri, | 19 | @@ -XXX,XX +XXX,XX @@ run-memory-replay: memory-replay run-memory-record |
18 | static const ARMCPRegInfo zcr_el1_reginfo = { | 20 | $(QEMU_OPTS) memory, \ |
19 | .name = "ZCR_EL1", .state = ARM_CP_STATE_AA64, | 21 | "$< on $(TARGET_NAME)") |
20 | .opc0 = 3, .opc1 = 0, .crn = 1, .crm = 2, .opc2 = 0, | 22 | |
21 | - .access = PL1_RW, .accessfn = zcr_access, .type = ARM_CP_64BIT, | 23 | -EXTRA_TESTS+=memory-record memory-replay |
22 | + .access = PL1_RW, .accessfn = zcr_access, | 24 | +run-pauth-3: pauth-3 |
23 | .fieldoffset = offsetof(CPUARMState, vfp.zcr_el[1]), | 25 | +pauth-3: CFLAGS += -march=armv8.3-a |
24 | .writefn = zcr_write, .raw_writefn = raw_write | 26 | + |
25 | }; | 27 | +EXTRA_TESTS+=memory-record memory-replay pauth-3 |
26 | @@ -XXX,XX +XXX,XX @@ static const ARMCPRegInfo zcr_el1_reginfo = { | 28 | diff --git a/tests/tcg/aarch64/system/pauth-3.c b/tests/tcg/aarch64/system/pauth-3.c |
27 | static const ARMCPRegInfo zcr_el2_reginfo = { | 29 | new file mode 100644 |
28 | .name = "ZCR_EL2", .state = ARM_CP_STATE_AA64, | 30 | index XXXXXXX..XXXXXXX |
29 | .opc0 = 3, .opc1 = 4, .crn = 1, .crm = 2, .opc2 = 0, | 31 | --- /dev/null |
30 | - .access = PL2_RW, .accessfn = zcr_access, .type = ARM_CP_64BIT, | 32 | +++ b/tests/tcg/aarch64/system/pauth-3.c |
31 | + .access = PL2_RW, .accessfn = zcr_access, | 33 | @@ -XXX,XX +XXX,XX @@ |
32 | .fieldoffset = offsetof(CPUARMState, vfp.zcr_el[2]), | 34 | +#include <inttypes.h> |
33 | .writefn = zcr_write, .raw_writefn = raw_write | 35 | +#include <minilib.h> |
34 | }; | 36 | + |
35 | @@ -XXX,XX +XXX,XX @@ static const ARMCPRegInfo zcr_el2_reginfo = { | 37 | +int main() |
36 | static const ARMCPRegInfo zcr_no_el2_reginfo = { | 38 | +{ |
37 | .name = "ZCR_EL2", .state = ARM_CP_STATE_AA64, | 39 | + /* |
38 | .opc0 = 3, .opc1 = 4, .crn = 1, .crm = 2, .opc2 = 0, | 40 | + * Test vector from QARMA paper (https://eprint.iacr.org/2016/444.pdf) |
39 | - .access = PL2_RW, .type = ARM_CP_64BIT, | 41 | + * to verify one computation of the pauth_computepac() function, |
40 | + .access = PL2_RW, | 42 | + * which uses sbox2. |
41 | .readfn = arm_cp_read_zero, .writefn = arm_cp_write_ignore | 43 | + * |
42 | }; | 44 | + * Use PACGA, because it returns the most bits from ComputePAC. |
43 | 45 | + * We still only get the most significant 32-bits of the result. | |
44 | static const ARMCPRegInfo zcr_el3_reginfo = { | 46 | + */ |
45 | .name = "ZCR_EL3", .state = ARM_CP_STATE_AA64, | 47 | + |
46 | .opc0 = 3, .opc1 = 6, .crn = 1, .crm = 2, .opc2 = 0, | 48 | + static const uint64_t d[5] = { |
47 | - .access = PL3_RW, .accessfn = zcr_access, .type = ARM_CP_64BIT, | 49 | + 0xfb623599da6e8127ull, |
48 | + .access = PL3_RW, .accessfn = zcr_access, | 50 | + 0x477d469dec0b8762ull, |
49 | .fieldoffset = offsetof(CPUARMState, vfp.zcr_el[3]), | 51 | + 0x84be85ce9804e94bull, |
50 | .writefn = zcr_write, .raw_writefn = raw_write | 52 | + 0xec2802d4e0a488e9ull, |
51 | }; | 53 | + 0xc003b93999b33765ull & 0xffffffff00000000ull |
54 | + }; | ||
55 | + uint64_t r; | ||
56 | + | ||
57 | + asm("msr apgakeyhi_el1, %[w0]\n\t" | ||
58 | + "msr apgakeylo_el1, %[k0]\n\t" | ||
59 | + "pacga %[r], %[P], %[T]" | ||
60 | + : [r] "=r"(r) | ||
61 | + : [P] "r" (d[0]), | ||
62 | + [T] "r" (d[1]), | ||
63 | + [w0] "r" (d[2]), | ||
64 | + [k0] "r" (d[3])); | ||
65 | + | ||
66 | + if (r == d[4]) { | ||
67 | + ml_printf("OK\n"); | ||
68 | + return 0; | ||
69 | + } else { | ||
70 | + ml_printf("FAIL: %lx != %lx\n", r, d[4]); | ||
71 | + return 1; | ||
72 | + } | ||
73 | +} | ||
52 | -- | 74 | -- |
53 | 2.16.1 | 75 | 2.20.1 |
54 | 76 | ||
55 | 77 | diff view generated by jsdifflib |
1 | From: Richard Henderson <richard.henderson@linaro.org> | 1 | From: Richard Henderson <richard.henderson@linaro.org> |
---|---|---|---|
2 | 2 | ||
3 | Perform the set of operations and test described in LP 1859713. | ||
4 | |||
5 | Suggested-by: Adrien GRASSEIN <adrien.grassein@smile.fr> | ||
3 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | 6 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
4 | Message-id: 20180211205848.4568-3-richard.henderson@linaro.org | 7 | Message-id: 20200116230809.19078-5-richard.henderson@linaro.org |
5 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | 8 | [PMM: fixed hard-coded tabs] |
6 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 9 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
7 | --- | 10 | --- |
8 | target/arm/cpu.h | 35 ++++++++++++++++++----------------- | 11 | tests/tcg/aarch64/Makefile.target | 2 +- |
9 | target/arm/helper.c | 6 ++++-- | 12 | tests/tcg/aarch64/pauth-4.c | 25 +++++++++++++++++++++++++ |
10 | target/arm/translate-a64.c | 3 +++ | 13 | 2 files changed, 26 insertions(+), 1 deletion(-) |
11 | 3 files changed, 25 insertions(+), 19 deletions(-) | 14 | create mode 100644 tests/tcg/aarch64/pauth-4.c |
12 | 15 | ||
13 | diff --git a/target/arm/cpu.h b/target/arm/cpu.h | 16 | diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target |
14 | index XXXXXXX..XXXXXXX 100644 | 17 | index XXXXXXX..XXXXXXX 100644 |
15 | --- a/target/arm/cpu.h | 18 | --- a/tests/tcg/aarch64/Makefile.target |
16 | +++ b/target/arm/cpu.h | 19 | +++ b/tests/tcg/aarch64/Makefile.target |
17 | @@ -XXX,XX +XXX,XX @@ static inline uint64_t cpreg_to_kvm_id(uint32_t cpregid) | 20 | @@ -XXX,XX +XXX,XX @@ run-fcvt: fcvt |
18 | } | 21 | $(call diff-out,$<,$(AARCH64_SRC)/fcvt.ref) |
19 | 22 | ||
20 | /* ARMCPRegInfo type field bits. If the SPECIAL bit is set this is a | 23 | # Pauth Tests |
21 | - * special-behaviour cp reg and bits [15..8] indicate what behaviour | 24 | -AARCH64_TESTS += pauth-1 pauth-2 |
22 | + * special-behaviour cp reg and bits [11..8] indicate what behaviour | 25 | +AARCH64_TESTS += pauth-1 pauth-2 pauth-4 |
23 | * it has. Otherwise it is a simple cp reg, where CONST indicates that | 26 | run-pauth-%: QEMU_OPTS += -cpu max |
24 | * TCG can assume the value to be constant (ie load at translate time) | 27 | pauth-%: CFLAGS += -march=armv8.3-a |
25 | * and 64BIT indicates a 64 bit wide coprocessor register. SUPPRESS_TB_END | 28 | |
26 | @@ -XXX,XX +XXX,XX @@ static inline uint64_t cpreg_to_kvm_id(uint32_t cpregid) | 29 | diff --git a/tests/tcg/aarch64/pauth-4.c b/tests/tcg/aarch64/pauth-4.c |
27 | * need to be surrounded by gen_io_start()/gen_io_end(). In particular, | 30 | new file mode 100644 |
28 | * registers which implement clocks or timers require this. | 31 | index XXXXXXX..XXXXXXX |
29 | */ | 32 | --- /dev/null |
30 | -#define ARM_CP_SPECIAL 1 | 33 | +++ b/tests/tcg/aarch64/pauth-4.c |
31 | -#define ARM_CP_CONST 2 | 34 | @@ -XXX,XX +XXX,XX @@ |
32 | -#define ARM_CP_64BIT 4 | 35 | +#include <stdint.h> |
33 | -#define ARM_CP_SUPPRESS_TB_END 8 | 36 | +#include <assert.h> |
34 | -#define ARM_CP_OVERRIDE 16 | 37 | + |
35 | -#define ARM_CP_ALIAS 32 | 38 | +int main() |
36 | -#define ARM_CP_IO 64 | 39 | +{ |
37 | -#define ARM_CP_NO_RAW 128 | 40 | + uintptr_t x, y; |
38 | -#define ARM_CP_NOP (ARM_CP_SPECIAL | (1 << 8)) | 41 | + |
39 | -#define ARM_CP_WFI (ARM_CP_SPECIAL | (2 << 8)) | 42 | + asm("mov %0, lr\n\t" |
40 | -#define ARM_CP_NZCV (ARM_CP_SPECIAL | (3 << 8)) | 43 | + "pacia %0, sp\n\t" /* sigill if pauth not supported */ |
41 | -#define ARM_CP_CURRENTEL (ARM_CP_SPECIAL | (4 << 8)) | 44 | + "eor %0, %0, #4\n\t" /* corrupt single bit */ |
42 | -#define ARM_CP_DC_ZVA (ARM_CP_SPECIAL | (5 << 8)) | 45 | + "mov %1, %0\n\t" |
43 | -#define ARM_LAST_SPECIAL ARM_CP_DC_ZVA | 46 | + "autia %1, sp\n\t" /* validate corrupted pointer */ |
44 | +#define ARM_CP_SPECIAL 0x0001 | 47 | + "xpaci %0\n\t" /* strip pac from corrupted pointer */ |
45 | +#define ARM_CP_CONST 0x0002 | 48 | + : "=r"(x), "=r"(y)); |
46 | +#define ARM_CP_64BIT 0x0004 | 49 | + |
47 | +#define ARM_CP_SUPPRESS_TB_END 0x0008 | 50 | + /* |
48 | +#define ARM_CP_OVERRIDE 0x0010 | 51 | + * Once stripped, the corrupted pointer is of the form 0x0000...wxyz. |
49 | +#define ARM_CP_ALIAS 0x0020 | 52 | + * We expect the autia to indicate failure, producing a pointer of the |
50 | +#define ARM_CP_IO 0x0040 | 53 | + * form 0x000e....wxyz. Use xpaci and != for the test, rather than |
51 | +#define ARM_CP_NO_RAW 0x0080 | 54 | + * extracting explicit bits from the top, because the location of the |
52 | +#define ARM_CP_NOP (ARM_CP_SPECIAL | 0x0100) | 55 | + * error code "e" depends on the configuration of virtual memory. |
53 | +#define ARM_CP_WFI (ARM_CP_SPECIAL | 0x0200) | 56 | + */ |
54 | +#define ARM_CP_NZCV (ARM_CP_SPECIAL | 0x0300) | 57 | + assert(x != y); |
55 | +#define ARM_CP_CURRENTEL (ARM_CP_SPECIAL | 0x0400) | 58 | + return 0; |
56 | +#define ARM_CP_DC_ZVA (ARM_CP_SPECIAL | 0x0500) | 59 | +} |
57 | +#define ARM_LAST_SPECIAL ARM_CP_DC_ZVA | ||
58 | +#define ARM_CP_FPU 0x1000 | ||
59 | /* Used only as a terminator for ARMCPRegInfo lists */ | ||
60 | -#define ARM_CP_SENTINEL 0xffff | ||
61 | +#define ARM_CP_SENTINEL 0xffff | ||
62 | /* Mask of only the flag bits in a type field */ | ||
63 | -#define ARM_CP_FLAG_MASK 0xff | ||
64 | +#define ARM_CP_FLAG_MASK 0x10ff | ||
65 | |||
66 | /* Valid values for ARMCPRegInfo state field, indicating which of | ||
67 | * the AArch32 and AArch64 execution states this register is visible in. | ||
68 | diff --git a/target/arm/helper.c b/target/arm/helper.c | ||
69 | index XXXXXXX..XXXXXXX 100644 | ||
70 | --- a/target/arm/helper.c | ||
71 | +++ b/target/arm/helper.c | ||
72 | @@ -XXX,XX +XXX,XX @@ static const ARMCPRegInfo v8_cp_reginfo[] = { | ||
73 | .writefn = aa64_daif_write, .resetfn = arm_cp_reset_ignore }, | ||
74 | { .name = "FPCR", .state = ARM_CP_STATE_AA64, | ||
75 | .opc0 = 3, .opc1 = 3, .opc2 = 0, .crn = 4, .crm = 4, | ||
76 | - .access = PL0_RW, .readfn = aa64_fpcr_read, .writefn = aa64_fpcr_write }, | ||
77 | + .access = PL0_RW, .type = ARM_CP_FPU, | ||
78 | + .readfn = aa64_fpcr_read, .writefn = aa64_fpcr_write }, | ||
79 | { .name = "FPSR", .state = ARM_CP_STATE_AA64, | ||
80 | .opc0 = 3, .opc1 = 3, .opc2 = 1, .crn = 4, .crm = 4, | ||
81 | - .access = PL0_RW, .readfn = aa64_fpsr_read, .writefn = aa64_fpsr_write }, | ||
82 | + .access = PL0_RW, .type = ARM_CP_FPU, | ||
83 | + .readfn = aa64_fpsr_read, .writefn = aa64_fpsr_write }, | ||
84 | { .name = "DCZID_EL0", .state = ARM_CP_STATE_AA64, | ||
85 | .opc0 = 3, .opc1 = 3, .opc2 = 7, .crn = 0, .crm = 0, | ||
86 | .access = PL0_R, .type = ARM_CP_NO_RAW, | ||
87 | diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c | ||
88 | index XXXXXXX..XXXXXXX 100644 | ||
89 | --- a/target/arm/translate-a64.c | ||
90 | +++ b/target/arm/translate-a64.c | ||
91 | @@ -XXX,XX +XXX,XX @@ static void handle_sys(DisasContext *s, uint32_t insn, bool isread, | ||
92 | default: | ||
93 | break; | ||
94 | } | ||
95 | + if ((ri->type & ARM_CP_FPU) && !fp_access_check(s)) { | ||
96 | + return; | ||
97 | + } | ||
98 | |||
99 | if ((tb_cflags(s->base.tb) & CF_USE_ICOUNT) && (ri->type & ARM_CP_IO)) { | ||
100 | gen_io_start(); | ||
101 | -- | 60 | -- |
102 | 2.16.1 | 61 | 2.20.1 |
103 | 62 | ||
104 | 63 | diff view generated by jsdifflib |
1 | In commit abc24d86cc0364f we accidentally broke migration of | 1 | From: Keqian Zhu <zhukeqian1@huawei.com> |
---|---|---|---|
2 | the stack pointer value for the mode (process, handler) the CPU | ||
3 | is not currently running as. (The commit correctly removed the | ||
4 | no-longer-used v7m.current_sp flag from the VMState but also | ||
5 | deleted the still very much in use v7m.other_sp SP value field.) | ||
6 | 2 | ||
7 | Add a subsection to migrate it again. (We don't need to care | 3 | There is extra indent in ACPI GED hotplug cb that should be |
8 | about trying to retain compatibility with pre-abc24d86cc0364f | 4 | deleted. |
9 | versions of QEMU, because that commit bumped the version_id | ||
10 | and we've since bumped it again a couple of times.) | ||
11 | 5 | ||
6 | Reviewed-by: Igor Mammedov <imammedo@redhat.com> | ||
7 | Signed-off-by: Keqian Zhu <zhukeqian1@huawei.com> | ||
8 | Message-id: 20200120012755.44581-2-zhukeqian1@huawei.com | ||
12 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 9 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
13 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | ||
14 | Message-id: 20180209165810.6668-11-peter.maydell@linaro.org | ||
15 | --- | 10 | --- |
16 | target/arm/machine.c | 11 +++++++++++ | 11 | hw/acpi/generic_event_device.c | 2 +- |
17 | 1 file changed, 11 insertions(+) | 12 | 1 file changed, 1 insertion(+), 1 deletion(-) |
18 | 13 | ||
19 | diff --git a/target/arm/machine.c b/target/arm/machine.c | 14 | diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c |
20 | index XXXXXXX..XXXXXXX 100644 | 15 | index XXXXXXX..XXXXXXX 100644 |
21 | --- a/target/arm/machine.c | 16 | --- a/hw/acpi/generic_event_device.c |
22 | +++ b/target/arm/machine.c | 17 | +++ b/hw/acpi/generic_event_device.c |
23 | @@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_m_scr = { | 18 | @@ -XXX,XX +XXX,XX @@ static void acpi_ged_device_plug_cb(HotplugHandler *hotplug_dev, |
24 | } | 19 | AcpiGedState *s = ACPI_GED(hotplug_dev); |
25 | }; | 20 | |
26 | 21 | if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { | |
27 | +static const VMStateDescription vmstate_m_other_sp = { | 22 | - acpi_memory_plug_cb(hotplug_dev, &s->memhp_state, dev, errp); |
28 | + .name = "cpu/m/other-sp", | 23 | + acpi_memory_plug_cb(hotplug_dev, &s->memhp_state, dev, errp); |
29 | + .version_id = 1, | 24 | } else { |
30 | + .minimum_version_id = 1, | 25 | error_setg(errp, "virt: device plug request for unsupported device" |
31 | + .fields = (VMStateField[]) { | 26 | " type: %s", object_get_typename(OBJECT(dev))); |
32 | + VMSTATE_UINT32(env.v7m.other_sp, ARMCPU), | ||
33 | + VMSTATE_END_OF_LIST() | ||
34 | + } | ||
35 | +}; | ||
36 | + | ||
37 | static const VMStateDescription vmstate_m = { | ||
38 | .name = "cpu/m", | ||
39 | .version_id = 4, | ||
40 | @@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_m = { | ||
41 | &vmstate_m_faultmask_primask, | ||
42 | &vmstate_m_csselr, | ||
43 | &vmstate_m_scr, | ||
44 | + &vmstate_m_other_sp, | ||
45 | NULL | ||
46 | } | ||
47 | }; | ||
48 | -- | 27 | -- |
49 | 2.16.1 | 28 | 2.20.1 |
50 | 29 | ||
51 | 30 | diff view generated by jsdifflib |
1 | The PENDNMISET/CLR bits in the ICSR should be RAZ/WI from | 1 | From: Keqian Zhu <zhukeqian1@huawei.com> |
---|---|---|---|
2 | NonSecure state if the AIRCR.BFHFNMINS bit is zero. We had | ||
3 | misimplemented this as making the bits RAZ/WI from both | ||
4 | Secure and NonSecure states. Fix this bug by checking | ||
5 | attrs.secure so that Secure code can pend and unpend NMIs. | ||
6 | 2 | ||
3 | We can use existing helper function to trigger hotplug handler | ||
4 | plug, which makes code clearer. | ||
5 | |||
6 | Reviewed-by: Igor Mammedov <imammedo@redhat.com> | ||
7 | Signed-off-by: Keqian Zhu <zhukeqian1@huawei.com> | ||
8 | Message-id: 20200120012755.44581-3-zhukeqian1@huawei.com | ||
7 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 9 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
8 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | ||
9 | Message-id: 20180209165810.6668-3-peter.maydell@linaro.org | ||
10 | --- | 10 | --- |
11 | hw/intc/armv7m_nvic.c | 6 +++--- | 11 | hw/arm/virt.c | 6 +++--- |
12 | 1 file changed, 3 insertions(+), 3 deletions(-) | 12 | 1 file changed, 3 insertions(+), 3 deletions(-) |
13 | 13 | ||
14 | diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c | 14 | diff --git a/hw/arm/virt.c b/hw/arm/virt.c |
15 | index XXXXXXX..XXXXXXX 100644 | 15 | index XXXXXXX..XXXXXXX 100644 |
16 | --- a/hw/intc/armv7m_nvic.c | 16 | --- a/hw/arm/virt.c |
17 | +++ b/hw/intc/armv7m_nvic.c | 17 | +++ b/hw/arm/virt.c |
18 | @@ -XXX,XX +XXX,XX @@ static uint32_t nvic_readl(NVICState *s, uint32_t offset, MemTxAttrs attrs) | 18 | @@ -XXX,XX +XXX,XX @@ static void virt_memory_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, |
19 | } | 19 | static void virt_memory_plug(HotplugHandler *hotplug_dev, |
20 | } | 20 | DeviceState *dev, Error **errp) |
21 | /* NMIPENDSET */ | 21 | { |
22 | - if ((cpu->env.v7m.aircr & R_V7M_AIRCR_BFHFNMINS_MASK) && | 22 | - HotplugHandlerClass *hhc; |
23 | - s->vectors[ARMV7M_EXCP_NMI].pending) { | 23 | VirtMachineState *vms = VIRT_MACHINE(hotplug_dev); |
24 | + if ((attrs.secure || (cpu->env.v7m.aircr & R_V7M_AIRCR_BFHFNMINS_MASK)) | 24 | Error *local_err = NULL; |
25 | + && s->vectors[ARMV7M_EXCP_NMI].pending) { | 25 | |
26 | val |= (1 << 31); | 26 | @@ -XXX,XX +XXX,XX @@ static void virt_memory_plug(HotplugHandler *hotplug_dev, |
27 | } | 27 | goto out; |
28 | /* ISRPREEMPT: RES0 when halting debug not implemented */ | ||
29 | @@ -XXX,XX +XXX,XX @@ static void nvic_writel(NVICState *s, uint32_t offset, uint32_t value, | ||
30 | break; | ||
31 | } | 28 | } |
32 | case 0xd04: /* Interrupt Control State (ICSR) */ | 29 | |
33 | - if (cpu->env.v7m.aircr & R_V7M_AIRCR_BFHFNMINS_MASK) { | 30 | - hhc = HOTPLUG_HANDLER_GET_CLASS(vms->acpi_dev); |
34 | + if (attrs.secure || cpu->env.v7m.aircr & R_V7M_AIRCR_BFHFNMINS_MASK) { | 31 | - hhc->plug(HOTPLUG_HANDLER(vms->acpi_dev), dev, &error_abort); |
35 | if (value & (1 << 31)) { | 32 | + hotplug_handler_plug(HOTPLUG_HANDLER(vms->acpi_dev), |
36 | armv7m_nvic_set_pending(s, ARMV7M_EXCP_NMI, false); | 33 | + dev, &error_abort); |
37 | } else if (value & (1 << 30) && | 34 | + |
35 | out: | ||
36 | error_propagate(errp, local_err); | ||
37 | } | ||
38 | -- | 38 | -- |
39 | 2.16.1 | 39 | 2.20.1 |
40 | 40 | ||
41 | 41 | diff view generated by jsdifflib |
1 | In commit commit 3b2e934463121 we added support for the AIRCR | 1 | The qemu-nbd documentation is currently in qemu-nbd.texi in Texinfo |
---|---|---|---|
2 | register holding state, but forgot to add it to the vmstate | 2 | format, which we present to the user as: |
3 | structs. Since it only holds r/w state if the security extension | 3 | * a qemu-nbd manpage |
4 | is implemented, we can just add it to vmstate_m_security. | 4 | * a section of the main qemu-doc HTML documentation |
5 | |||
6 | Convert the documentation to rST format, and present it to the user as: | ||
7 | * a qemu-nbd manpage | ||
8 | * part of the interop/ Sphinx manual | ||
9 | |||
10 | This follows the same pattern as commit 27a296fce982 did for the | ||
11 | qemu-ga manpage. | ||
12 | |||
13 | All the content of the old manpage is retained, except that I have | ||
14 | dropped the "This is free software; see the source for copying | ||
15 | conditions. There is NO warranty..." text that was in the old AUTHOR | ||
16 | section; Sphinx's manpage builder doesn't expect that much text in | ||
17 | the AUTHOR section, and since none of our other manpages have it it | ||
18 | seems easiest to delete it rather than try to figure out where else | ||
19 | in the manpage to put it. | ||
20 | |||
21 | The only other textual change is that I have had to give the | ||
22 | --nocache option its own description ("Equivalent to --cache=none") | ||
23 | because Sphinx doesn't have an equivalent of using item/itemx | ||
24 | to share a description between two options. | ||
25 | |||
26 | Some minor aspects of the formatting have changed, to suit what is | ||
27 | easiest for Sphinx to output. (The most notable is that Sphinx | ||
28 | option section option syntax doesn't support '--option foo=bar' | ||
29 | with bar underlined rather than bold, so we have to switch to | ||
30 | '--option foo=BAR' instead.) | ||
31 | |||
32 | The contents of qemu-option-trace.texi are now duplicated in | ||
33 | docs/interop/qemu-option-trace.rst.inc, until such time as we complete | ||
34 | the conversion of the other files which use it; since it has had only | ||
35 | 3 changes in 3 years, this shouldn't be too awkward a burden. | ||
36 | (We use .rst.inc because if this file fragment has a .rst extension | ||
37 | then Sphinx complains about not seeing it in a toctree.) | ||
5 | 38 | ||
6 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 39 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
7 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | 40 | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> |
8 | Message-id: 20180209165810.6668-10-peter.maydell@linaro.org | 41 | Reviewed-by: Eric Blake <eblake@redhat.com> |
42 | Tested-by: Alex Bennée <alex.bennee@linaro.org> | ||
43 | Acked-by: Stefan Hajnoczi <stefanha@redhat.com> | ||
44 | Message-id: 20200116141511.16849-2-peter.maydell@linaro.org | ||
9 | --- | 45 | --- |
10 | target/arm/machine.c | 4 ++++ | 46 | Makefile | 16 +- |
11 | 1 file changed, 4 insertions(+) | 47 | MAINTAINERS | 1 + |
12 | 48 | docs/interop/conf.py | 4 +- | |
13 | diff --git a/target/arm/machine.c b/target/arm/machine.c | 49 | docs/interop/index.rst | 1 + |
50 | docs/interop/qemu-nbd.rst | 263 +++++++++++++++++++++++++ | ||
51 | docs/interop/qemu-option-trace.rst.inc | 30 +++ | ||
52 | qemu-doc.texi | 6 - | ||
53 | qemu-nbd.texi | 214 -------------------- | ||
54 | qemu-option-trace.texi | 4 + | ||
55 | 9 files changed, 313 insertions(+), 226 deletions(-) | ||
56 | create mode 100644 docs/interop/qemu-nbd.rst | ||
57 | create mode 100644 docs/interop/qemu-option-trace.rst.inc | ||
58 | delete mode 100644 qemu-nbd.texi | ||
59 | |||
60 | diff --git a/Makefile b/Makefile | ||
14 | index XXXXXXX..XXXXXXX 100644 | 61 | index XXXXXXX..XXXXXXX 100644 |
15 | --- a/target/arm/machine.c | 62 | --- a/Makefile |
16 | +++ b/target/arm/machine.c | 63 | +++ b/Makefile |
17 | @@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_m_security = { | 64 | @@ -XXX,XX +XXX,XX @@ MANUAL_BUILDDIR := docs |
18 | VMSTATE_VALIDATE("SAU_RNR is valid", sau_rnr_vmstate_validate), | 65 | endif |
19 | VMSTATE_UINT32(env.sau.ctrl, ARMCPU), | 66 | |
20 | VMSTATE_UINT32(env.v7m.scr[M_REG_S], ARMCPU), | 67 | ifdef BUILD_DOCS |
21 | + /* AIRCR is not secure-only, but our implementation is R/O if the | 68 | -DOCS=qemu-doc.html qemu-doc.txt qemu.1 qemu-img.1 qemu-nbd.8 $(MANUAL_BUILDDIR)/interop/qemu-ga.8 |
22 | + * security extension is unimplemented, so we migrate it here. | 69 | +DOCS=qemu-doc.html qemu-doc.txt qemu.1 qemu-img.1 |
23 | + */ | 70 | +DOCS+=$(MANUAL_BUILDDIR)/interop/qemu-nbd.8 |
24 | + VMSTATE_UINT32(env.v7m.aircr, ARMCPU), | 71 | +DOCS+=$(MANUAL_BUILDDIR)/interop/qemu-ga.8 |
25 | VMSTATE_END_OF_LIST() | 72 | DOCS+=docs/interop/qemu-qmp-ref.html docs/interop/qemu-qmp-ref.txt docs/interop/qemu-qmp-ref.7 |
26 | } | 73 | DOCS+=docs/interop/qemu-ga-ref.html docs/interop/qemu-ga-ref.txt docs/interop/qemu-ga-ref.7 |
27 | }; | 74 | DOCS+=docs/qemu-block-drivers.7 |
75 | @@ -XXX,XX +XXX,XX @@ ifdef CONFIG_POSIX | ||
76 | ifeq ($(CONFIG_TOOLS),y) | ||
77 | $(INSTALL_DATA) qemu-img.1 "$(DESTDIR)$(mandir)/man1" | ||
78 | $(INSTALL_DIR) "$(DESTDIR)$(mandir)/man8" | ||
79 | - $(INSTALL_DATA) qemu-nbd.8 "$(DESTDIR)$(mandir)/man8" | ||
80 | + $(INSTALL_DATA) $(MANUAL_BUILDDIR)/interop/qemu-nbd.8 "$(DESTDIR)$(mandir)/man8" | ||
81 | endif | ||
82 | ifdef CONFIG_TRACE_SYSTEMTAP | ||
83 | $(INSTALL_DATA) scripts/qemu-trace-stap.1 "$(DESTDIR)$(mandir)/man1" | ||
84 | @@ -XXX,XX +XXX,XX @@ sphinxdocs: $(MANUAL_BUILDDIR)/devel/index.html $(MANUAL_BUILDDIR)/interop/index | ||
85 | # a single doctree: https://github.com/sphinx-doc/sphinx/issues/2946 | ||
86 | build-manual = $(call quiet-command,CONFDIR="$(qemu_confdir)" sphinx-build $(if $(V),,-q) -W -b $2 -D version=$(VERSION) -D release="$(FULL_VERSION)" -d .doctrees/$1-$2 $(SRC_PATH)/docs/$1 $(MANUAL_BUILDDIR)/$1 ,"SPHINX","$(MANUAL_BUILDDIR)/$1") | ||
87 | # We assume all RST files in the manual's directory are used in it | ||
88 | -manual-deps = $(wildcard $(SRC_PATH)/docs/$1/*.rst) $(SRC_PATH)/docs/$1/conf.py $(SRC_PATH)/docs/conf.py | ||
89 | +manual-deps = $(wildcard $(SRC_PATH)/docs/$1/*.rst) \ | ||
90 | + $(wildcard $(SRC_PATH)/docs/$1/*.rst.inc) \ | ||
91 | + $(SRC_PATH)/docs/$1/conf.py $(SRC_PATH)/docs/conf.py | ||
92 | |||
93 | $(MANUAL_BUILDDIR)/devel/index.html: $(call manual-deps,devel) | ||
94 | $(call build-manual,devel,html) | ||
95 | @@ -XXX,XX +XXX,XX @@ $(MANUAL_BUILDDIR)/specs/index.html: $(call manual-deps,specs) | ||
96 | $(MANUAL_BUILDDIR)/interop/qemu-ga.8: $(call manual-deps,interop) | ||
97 | $(call build-manual,interop,man) | ||
98 | |||
99 | +$(MANUAL_BUILDDIR)/interop/qemu-nbd.8: $(call manual-deps,interop) | ||
100 | + $(call build-manual,interop,man) | ||
101 | + | ||
102 | $(MANUAL_BUILDDIR)/index.html: $(SRC_PATH)/docs/index.html.in qemu-version.h | ||
103 | @mkdir -p "$(MANUAL_BUILDDIR)" | ||
104 | $(call quiet-command, sed "s|@@VERSION@@|${VERSION}|g" $< >$@, \ | ||
105 | @@ -XXX,XX +XXX,XX @@ qemu.1: qemu-doc.texi qemu-options.texi qemu-monitor.texi qemu-monitor-info.texi | ||
106 | qemu.1: qemu-option-trace.texi | ||
107 | qemu-img.1: qemu-img.texi qemu-option-trace.texi qemu-img-cmds.texi | ||
108 | fsdev/virtfs-proxy-helper.1: fsdev/virtfs-proxy-helper.texi | ||
109 | -qemu-nbd.8: qemu-nbd.texi qemu-option-trace.texi | ||
110 | docs/qemu-block-drivers.7: docs/qemu-block-drivers.texi | ||
111 | docs/qemu-cpu-models.7: docs/qemu-cpu-models.texi | ||
112 | scripts/qemu-trace-stap.1: scripts/qemu-trace-stap.texi | ||
113 | @@ -XXX,XX +XXX,XX @@ pdf: qemu-doc.pdf docs/interop/qemu-qmp-ref.pdf docs/interop/qemu-ga-ref.pdf | ||
114 | txt: qemu-doc.txt docs/interop/qemu-qmp-ref.txt docs/interop/qemu-ga-ref.txt | ||
115 | |||
116 | qemu-doc.html qemu-doc.info qemu-doc.pdf qemu-doc.txt: \ | ||
117 | - qemu-img.texi qemu-nbd.texi qemu-options.texi \ | ||
118 | + qemu-img.texi qemu-options.texi \ | ||
119 | qemu-tech.texi qemu-option-trace.texi \ | ||
120 | qemu-deprecated.texi qemu-monitor.texi qemu-img-cmds.texi \ | ||
121 | qemu-monitor-info.texi docs/qemu-block-drivers.texi \ | ||
122 | diff --git a/MAINTAINERS b/MAINTAINERS | ||
123 | index XXXXXXX..XXXXXXX 100644 | ||
124 | --- a/MAINTAINERS | ||
125 | +++ b/MAINTAINERS | ||
126 | @@ -XXX,XX +XXX,XX @@ F: include/block/nbd* | ||
127 | F: qemu-nbd.* | ||
128 | F: blockdev-nbd.c | ||
129 | F: docs/interop/nbd.txt | ||
130 | +F: docs/interop/qemu-nbd.rst | ||
131 | T: git https://repo.or.cz/qemu/ericb.git nbd | ||
132 | |||
133 | NFS | ||
134 | diff --git a/docs/interop/conf.py b/docs/interop/conf.py | ||
135 | index XXXXXXX..XXXXXXX 100644 | ||
136 | --- a/docs/interop/conf.py | ||
137 | +++ b/docs/interop/conf.py | ||
138 | @@ -XXX,XX +XXX,XX @@ html_theme_options['description'] = u'System Emulation Management and Interopera | ||
139 | # (source start file, name, description, authors, manual section). | ||
140 | man_pages = [ | ||
141 | ('qemu-ga', 'qemu-ga', u'QEMU Guest Agent', | ||
142 | - ['Michael Roth <mdroth@linux.vnet.ibm.com>'], 8) | ||
143 | + ['Michael Roth <mdroth@linux.vnet.ibm.com>'], 8), | ||
144 | + ('qemu-nbd', 'qemu-nbd', u'QEMU Disk Network Block Device Server', | ||
145 | + ['Anthony Liguori <anthony@codemonkey.ws>'], 8) | ||
146 | ] | ||
147 | diff --git a/docs/interop/index.rst b/docs/interop/index.rst | ||
148 | index XXXXXXX..XXXXXXX 100644 | ||
149 | --- a/docs/interop/index.rst | ||
150 | +++ b/docs/interop/index.rst | ||
151 | @@ -XXX,XX +XXX,XX @@ Contents: | ||
152 | live-block-operations | ||
153 | pr-helper | ||
154 | qemu-ga | ||
155 | + qemu-nbd | ||
156 | vhost-user | ||
157 | vhost-user-gpu | ||
158 | diff --git a/docs/interop/qemu-nbd.rst b/docs/interop/qemu-nbd.rst | ||
159 | new file mode 100644 | ||
160 | index XXXXXXX..XXXXXXX | ||
161 | --- /dev/null | ||
162 | +++ b/docs/interop/qemu-nbd.rst | ||
163 | @@ -XXX,XX +XXX,XX @@ | ||
164 | +QEMU Disk Network Block Device Server | ||
165 | +===================================== | ||
166 | + | ||
167 | +Synopsis | ||
168 | +-------- | ||
169 | + | ||
170 | +**qemu-nbd** [*OPTION*]... *filename* | ||
171 | + | ||
172 | +**qemu-nbd** -L [*OPTION*]... | ||
173 | + | ||
174 | +**qemu-nbd** -d *dev* | ||
175 | + | ||
176 | +Description | ||
177 | +----------- | ||
178 | + | ||
179 | +Export a QEMU disk image using the NBD protocol. | ||
180 | + | ||
181 | +Other uses: | ||
182 | + | ||
183 | +- Bind a /dev/nbdX block device to a QEMU server (on Linux). | ||
184 | +- As a client to query exports of a remote NBD server. | ||
185 | + | ||
186 | +Options | ||
187 | +------- | ||
188 | + | ||
189 | +.. program:: qemu-nbd | ||
190 | + | ||
191 | +*filename* is a disk image filename, or a set of block | ||
192 | +driver options if ``--image-opts`` is specified. | ||
193 | + | ||
194 | +*dev* is an NBD device. | ||
195 | + | ||
196 | +.. option:: --object type,id=ID,...props... | ||
197 | + | ||
198 | + Define a new instance of the *type* object class identified by *ID*. | ||
199 | + See the :manpage:`qemu(1)` manual page for full details of the properties | ||
200 | + supported. The common object types that it makes sense to define are the | ||
201 | + ``secret`` object, which is used to supply passwords and/or encryption | ||
202 | + keys, and the ``tls-creds`` object, which is used to supply TLS | ||
203 | + credentials for the qemu-nbd server or client. | ||
204 | + | ||
205 | +.. option:: -p, --port=PORT | ||
206 | + | ||
207 | + TCP port to listen on as a server, or connect to as a client | ||
208 | + (default ``10809``). | ||
209 | + | ||
210 | +.. option:: -o, --offset=OFFSET | ||
211 | + | ||
212 | + The offset into the image. | ||
213 | + | ||
214 | +.. option:: -b, --bind=IFACE | ||
215 | + | ||
216 | + The interface to bind to as a server, or connect to as a client | ||
217 | + (default ``0.0.0.0``). | ||
218 | + | ||
219 | +.. option:: -k, --socket=PATH | ||
220 | + | ||
221 | + Use a unix socket with path *PATH*. | ||
222 | + | ||
223 | +.. option:: --image-opts | ||
224 | + | ||
225 | + Treat *filename* as a set of image options, instead of a plain | ||
226 | + filename. If this flag is specified, the ``-f`` flag should | ||
227 | + not be used, instead the :option:`format=` option should be set. | ||
228 | + | ||
229 | +.. option:: -f, --format=FMT | ||
230 | + | ||
231 | + Force the use of the block driver for format *FMT* instead of | ||
232 | + auto-detecting. | ||
233 | + | ||
234 | +.. option:: -r, --read-only | ||
235 | + | ||
236 | + Export the disk as read-only. | ||
237 | + | ||
238 | +.. option:: -P, --partition=NUM | ||
239 | + | ||
240 | + Deprecated: Only expose MBR partition *NUM*. Understands physical | ||
241 | + partitions 1-4 and logical partition 5. New code should instead use | ||
242 | + :option:`--image-opts` with the raw driver wrapping a subset of the | ||
243 | + original image. | ||
244 | + | ||
245 | +.. option:: -B, --bitmap=NAME | ||
246 | + | ||
247 | + If *filename* has a qcow2 persistent bitmap *NAME*, expose | ||
248 | + that bitmap via the ``qemu:dirty-bitmap:NAME`` context | ||
249 | + accessible through NBD_OPT_SET_META_CONTEXT. | ||
250 | + | ||
251 | +.. option:: -s, --snapshot | ||
252 | + | ||
253 | + Use *filename* as an external snapshot, create a temporary | ||
254 | + file with ``backing_file=``\ *filename*, redirect the write to | ||
255 | + the temporary one. | ||
256 | + | ||
257 | +.. option:: -l, --load-snapshot=SNAPSHOT_PARAM | ||
258 | + | ||
259 | + Load an internal snapshot inside *filename* and export it | ||
260 | + as an read-only device, SNAPSHOT_PARAM format is | ||
261 | + ``snapshot.id=[ID],snapshot.name=[NAME]`` or ``[ID_OR_NAME]`` | ||
262 | + | ||
263 | +.. option:: --cache=CACHE | ||
264 | + | ||
265 | + The cache mode to be used with the file. See the documentation of | ||
266 | + the emulator's ``-drive cache=...`` option for allowed values. | ||
267 | + | ||
268 | +.. option:: -n, --nocache | ||
269 | + | ||
270 | + Equivalent to :option:`--cache=none`. | ||
271 | + | ||
272 | +.. option:: --aio=AIO | ||
273 | + | ||
274 | + Set the asynchronous I/O mode between ``threads`` (the default) | ||
275 | + and ``native`` (Linux only). | ||
276 | + | ||
277 | +.. option:: --discard=DISCARD | ||
278 | + | ||
279 | + Control whether ``discard`` (also known as ``trim`` or ``unmap``) | ||
280 | + requests are ignored or passed to the filesystem. *DISCARD* is one of | ||
281 | + ``ignore`` (or ``off``), ``unmap`` (or ``on``). The default is | ||
282 | + ``ignore``. | ||
283 | + | ||
284 | +.. option:: --detect-zeroes=DETECT_ZEROES | ||
285 | + | ||
286 | + Control the automatic conversion of plain zero writes by the OS to | ||
287 | + driver-specific optimized zero write commands. *DETECT_ZEROES* is one of | ||
288 | + ``off``, ``on``, or ``unmap``. ``unmap`` | ||
289 | + converts a zero write to an unmap operation and can only be used if | ||
290 | + *DISCARD* is set to ``unmap``. The default is ``off``. | ||
291 | + | ||
292 | +.. option:: -c, --connect=DEV | ||
293 | + | ||
294 | + Connect *filename* to NBD device *DEV* (Linux only). | ||
295 | + | ||
296 | +.. option:: -d, --disconnect | ||
297 | + | ||
298 | + Disconnect the device *DEV* (Linux only). | ||
299 | + | ||
300 | +.. option:: -e, --shared=NUM | ||
301 | + | ||
302 | + Allow up to *NUM* clients to share the device (default | ||
303 | + ``1``). Safe for readers, but for now, consistency is not | ||
304 | + guaranteed between multiple writers. | ||
305 | + | ||
306 | +.. option:: -t, --persistent | ||
307 | + | ||
308 | + Don't exit on the last connection. | ||
309 | + | ||
310 | +.. option:: -x, --export-name=NAME | ||
311 | + | ||
312 | + Set the NBD volume export name (default of a zero-length string). | ||
313 | + | ||
314 | +.. option:: -D, --description=DESCRIPTION | ||
315 | + | ||
316 | + Set the NBD volume export description, as a human-readable | ||
317 | + string. | ||
318 | + | ||
319 | +.. option:: -L, --list | ||
320 | + | ||
321 | + Connect as a client and list all details about the exports exposed by | ||
322 | + a remote NBD server. This enables list mode, and is incompatible | ||
323 | + with options that change behavior related to a specific export (such as | ||
324 | + :option:`--export-name`, :option:`--offset`, ...). | ||
325 | + | ||
326 | +.. option:: --tls-creds=ID | ||
327 | + | ||
328 | + Enable mandatory TLS encryption for the server by setting the ID | ||
329 | + of the TLS credentials object previously created with the --object | ||
330 | + option; or provide the credentials needed for connecting as a client | ||
331 | + in list mode. | ||
332 | + | ||
333 | +.. option:: --fork | ||
334 | + | ||
335 | + Fork off the server process and exit the parent once the server is running. | ||
336 | + | ||
337 | +.. option:: --pid-file=PATH | ||
338 | + | ||
339 | + Store the server's process ID in the given file. | ||
340 | + | ||
341 | +.. option:: --tls-authz=ID | ||
342 | + | ||
343 | + Specify the ID of a qauthz object previously created with the | ||
344 | + :option:`--object` option. This will be used to authorize connecting users | ||
345 | + against their x509 distinguished name. | ||
346 | + | ||
347 | +.. option:: -v, --verbose | ||
348 | + | ||
349 | + Display extra debugging information. | ||
350 | + | ||
351 | +.. option:: -h, --help | ||
352 | + | ||
353 | + Display this help and exit. | ||
354 | + | ||
355 | +.. option:: -V, --version | ||
356 | + | ||
357 | + Display version information and exit. | ||
358 | + | ||
359 | +.. option:: -T, --trace [[enable=]PATTERN][,events=FILE][,file=FILE] | ||
360 | + | ||
361 | + .. include:: qemu-option-trace.rst.inc | ||
362 | + | ||
363 | +Examples | ||
364 | +-------- | ||
365 | + | ||
366 | +Start a server listening on port 10809 that exposes only the | ||
367 | +guest-visible contents of a qcow2 file, with no TLS encryption, and | ||
368 | +with the default export name (an empty string). The command is | ||
369 | +one-shot, and will block until the first successful client | ||
370 | +disconnects: | ||
371 | + | ||
372 | +:: | ||
373 | + | ||
374 | + qemu-nbd -f qcow2 file.qcow2 | ||
375 | + | ||
376 | +Start a long-running server listening with encryption on port 10810, | ||
377 | +and whitelist clients with a specific X.509 certificate to connect to | ||
378 | +a 1 megabyte subset of a raw file, using the export name 'subset': | ||
379 | + | ||
380 | +:: | ||
381 | + | ||
382 | + qemu-nbd \ | ||
383 | + --object tls-creds-x509,id=tls0,endpoint=server,dir=/path/to/qemutls \ | ||
384 | + --object 'authz-simple,id=auth0,identity=CN=laptop.example.com,,\ | ||
385 | + O=Example Org,,L=London,,ST=London,,C=GB' \ | ||
386 | + --tls-creds tls0 --tls-authz auth0 \ | ||
387 | + -t -x subset -p 10810 \ | ||
388 | + --image-opts driver=raw,offset=1M,size=1M,file.driver=file,file.filename=file.raw | ||
389 | + | ||
390 | +Serve a read-only copy of just the first MBR partition of a guest | ||
391 | +image over a Unix socket with as many as 5 simultaneous readers, with | ||
392 | +a persistent process forked as a daemon: | ||
393 | + | ||
394 | +:: | ||
395 | + | ||
396 | + qemu-nbd --fork --persistent --shared=5 --socket=/path/to/sock \ | ||
397 | + --partition=1 --read-only --format=qcow2 file.qcow2 | ||
398 | + | ||
399 | +Expose the guest-visible contents of a qcow2 file via a block device | ||
400 | +/dev/nbd0 (and possibly creating /dev/nbd0p1 and friends for | ||
401 | +partitions found within), then disconnect the device when done. | ||
402 | +Access to bind qemu-nbd to an /dev/nbd device generally requires root | ||
403 | +privileges, and may also require the execution of ``modprobe nbd`` | ||
404 | +to enable the kernel NBD client module. *CAUTION*: Do not use | ||
405 | +this method to mount filesystems from an untrusted guest image - a | ||
406 | +malicious guest may have prepared the image to attempt to trigger | ||
407 | +kernel bugs in partition probing or file system mounting. | ||
408 | + | ||
409 | +:: | ||
410 | + | ||
411 | + qemu-nbd -c /dev/nbd0 -f qcow2 file.qcow2 | ||
412 | + qemu-nbd -d /dev/nbd0 | ||
413 | + | ||
414 | +Query a remote server to see details about what export(s) it is | ||
415 | +serving on port 10809, and authenticating via PSK: | ||
416 | + | ||
417 | +:: | ||
418 | + | ||
419 | + qemu-nbd \ | ||
420 | + --object tls-creds-psk,id=tls0,dir=/tmp/keys,username=eblake,endpoint=client \ | ||
421 | + --tls-creds tls0 -L -b remote.example.com | ||
422 | + | ||
423 | +See also | ||
424 | +-------- | ||
425 | + | ||
426 | +:manpage:`qemu(1)`, :manpage:`qemu-img(1)` | ||
427 | diff --git a/docs/interop/qemu-option-trace.rst.inc b/docs/interop/qemu-option-trace.rst.inc | ||
428 | new file mode 100644 | ||
429 | index XXXXXXX..XXXXXXX | ||
430 | --- /dev/null | ||
431 | +++ b/docs/interop/qemu-option-trace.rst.inc | ||
432 | @@ -XXX,XX +XXX,XX @@ | ||
433 | +.. | ||
434 | + The contents of this file must be kept in sync with qemu-option-trace.texi | ||
435 | + until all the users of the texi file have been converted to rst and | ||
436 | + the texi file can be removed. | ||
437 | + | ||
438 | +Specify tracing options. | ||
439 | + | ||
440 | +.. option:: [enable=]PATTERN | ||
441 | + | ||
442 | + Immediately enable events matching *PATTERN* | ||
443 | + (either event name or a globbing pattern). This option is only | ||
444 | + available if QEMU has been compiled with the ``simple``, ``log`` | ||
445 | + or ``ftrace`` tracing backend. To specify multiple events or patterns, | ||
446 | + specify the :option:`-trace` option multiple times. | ||
447 | + | ||
448 | + Use :option:`-trace help` to print a list of names of trace points. | ||
449 | + | ||
450 | +.. option:: events=FILE | ||
451 | + | ||
452 | + Immediately enable events listed in *FILE*. | ||
453 | + The file must contain one event name (as listed in the ``trace-events-all`` | ||
454 | + file) per line; globbing patterns are accepted too. This option is only | ||
455 | + available if QEMU has been compiled with the ``simple``, ``log`` or | ||
456 | + ``ftrace`` tracing backend. | ||
457 | + | ||
458 | +.. option:: file=FILE | ||
459 | + | ||
460 | + Log output traces to *FILE*. | ||
461 | + This option is only available if QEMU has been compiled with | ||
462 | + the ``simple`` tracing backend. | ||
463 | diff --git a/qemu-doc.texi b/qemu-doc.texi | ||
464 | index XXXXXXX..XXXXXXX 100644 | ||
465 | --- a/qemu-doc.texi | ||
466 | +++ b/qemu-doc.texi | ||
467 | @@ -XXX,XX +XXX,XX @@ encrypted disk images. | ||
468 | * disk_images_snapshot_mode:: Snapshot mode | ||
469 | * vm_snapshots:: VM snapshots | ||
470 | * qemu_img_invocation:: qemu-img Invocation | ||
471 | -* qemu_nbd_invocation:: qemu-nbd Invocation | ||
472 | * disk_images_formats:: Disk image file formats | ||
473 | * host_drives:: Using host drives | ||
474 | * disk_images_fat_images:: Virtual FAT disk images | ||
475 | @@ -XXX,XX +XXX,XX @@ state is not saved or restored properly (in particular USB). | ||
476 | |||
477 | @include qemu-img.texi | ||
478 | |||
479 | -@node qemu_nbd_invocation | ||
480 | -@subsection @code{qemu-nbd} Invocation | ||
481 | - | ||
482 | -@include qemu-nbd.texi | ||
483 | - | ||
484 | @include docs/qemu-block-drivers.texi | ||
485 | |||
486 | @node pcsys_network | ||
487 | diff --git a/qemu-nbd.texi b/qemu-nbd.texi | ||
488 | deleted file mode 100644 | ||
489 | index XXXXXXX..XXXXXXX | ||
490 | --- a/qemu-nbd.texi | ||
491 | +++ /dev/null | ||
492 | @@ -XXX,XX +XXX,XX @@ | ||
493 | -@example | ||
494 | -@c man begin SYNOPSIS | ||
495 | -@command{qemu-nbd} [OPTION]... @var{filename} | ||
496 | - | ||
497 | -@command{qemu-nbd} @option{-L} [OPTION]... | ||
498 | - | ||
499 | -@command{qemu-nbd} @option{-d} @var{dev} | ||
500 | -@c man end | ||
501 | -@end example | ||
502 | - | ||
503 | -@c man begin DESCRIPTION | ||
504 | - | ||
505 | -Export a QEMU disk image using the NBD protocol. | ||
506 | - | ||
507 | -Other uses: | ||
508 | -@itemize | ||
509 | -@item | ||
510 | -Bind a /dev/nbdX block device to a QEMU server (on Linux). | ||
511 | -@item | ||
512 | -As a client to query exports of a remote NBD server. | ||
513 | -@end itemize | ||
514 | - | ||
515 | -@c man end | ||
516 | - | ||
517 | -@c man begin OPTIONS | ||
518 | -@var{filename} is a disk image filename, or a set of block | ||
519 | -driver options if @option{--image-opts} is specified. | ||
520 | - | ||
521 | -@var{dev} is an NBD device. | ||
522 | - | ||
523 | -@table @option | ||
524 | -@item --object type,id=@var{id},...props... | ||
525 | -Define a new instance of the @var{type} object class identified by @var{id}. | ||
526 | -See the @code{qemu(1)} manual page for full details of the properties | ||
527 | -supported. The common object types that it makes sense to define are the | ||
528 | -@code{secret} object, which is used to supply passwords and/or encryption | ||
529 | -keys, and the @code{tls-creds} object, which is used to supply TLS | ||
530 | -credentials for the qemu-nbd server or client. | ||
531 | -@item -p, --port=@var{port} | ||
532 | -The TCP port to listen on as a server, or connect to as a client | ||
533 | -(default @samp{10809}). | ||
534 | -@item -o, --offset=@var{offset} | ||
535 | -The offset into the image. | ||
536 | -@item -b, --bind=@var{iface} | ||
537 | -The interface to bind to as a server, or connect to as a client | ||
538 | -(default @samp{0.0.0.0}). | ||
539 | -@item -k, --socket=@var{path} | ||
540 | -Use a unix socket with path @var{path}. | ||
541 | -@item --image-opts | ||
542 | -Treat @var{filename} as a set of image options, instead of a plain | ||
543 | -filename. If this flag is specified, the @var{-f} flag should | ||
544 | -not be used, instead the '@code{format=}' option should be set. | ||
545 | -@item -f, --format=@var{fmt} | ||
546 | -Force the use of the block driver for format @var{fmt} instead of | ||
547 | -auto-detecting. | ||
548 | -@item -r, --read-only | ||
549 | -Export the disk as read-only. | ||
550 | -@item -P, --partition=@var{num} | ||
551 | -Deprecated: Only expose MBR partition @var{num}. Understands physical | ||
552 | -partitions 1-4 and logical partition 5. New code should instead use | ||
553 | -@option{--image-opts} with the raw driver wrapping a subset of the | ||
554 | -original image. | ||
555 | -@item -B, --bitmap=@var{name} | ||
556 | -If @var{filename} has a qcow2 persistent bitmap @var{name}, expose | ||
557 | -that bitmap via the ``qemu:dirty-bitmap:@var{name}'' context | ||
558 | -accessible through NBD_OPT_SET_META_CONTEXT. | ||
559 | -@item -s, --snapshot | ||
560 | -Use @var{filename} as an external snapshot, create a temporary | ||
561 | -file with backing_file=@var{filename}, redirect the write to | ||
562 | -the temporary one. | ||
563 | -@item -l, --load-snapshot=@var{snapshot_param} | ||
564 | -Load an internal snapshot inside @var{filename} and export it | ||
565 | -as an read-only device, @var{snapshot_param} format is | ||
566 | -'snapshot.id=[ID],snapshot.name=[NAME]' or '[ID_OR_NAME]' | ||
567 | -@item -n, --nocache | ||
568 | -@itemx --cache=@var{cache} | ||
569 | -The cache mode to be used with the file. See the documentation of | ||
570 | -the emulator's @code{-drive cache=...} option for allowed values. | ||
571 | -@item --aio=@var{aio} | ||
572 | -Set the asynchronous I/O mode between @samp{threads} (the default) | ||
573 | -and @samp{native} (Linux only). | ||
574 | -@item --discard=@var{discard} | ||
575 | -Control whether @dfn{discard} (also known as @dfn{trim} or @dfn{unmap}) | ||
576 | -requests are ignored or passed to the filesystem. @var{discard} is one of | ||
577 | -@samp{ignore} (or @samp{off}), @samp{unmap} (or @samp{on}). The default is | ||
578 | -@samp{ignore}. | ||
579 | -@item --detect-zeroes=@var{detect-zeroes} | ||
580 | -Control the automatic conversion of plain zero writes by the OS to | ||
581 | -driver-specific optimized zero write commands. @var{detect-zeroes} is one of | ||
582 | -@samp{off}, @samp{on} or @samp{unmap}. @samp{unmap} | ||
583 | -converts a zero write to an unmap operation and can only be used if | ||
584 | -@var{discard} is set to @samp{unmap}. The default is @samp{off}. | ||
585 | -@item -c, --connect=@var{dev} | ||
586 | -Connect @var{filename} to NBD device @var{dev} (Linux only). | ||
587 | -@item -d, --disconnect | ||
588 | -Disconnect the device @var{dev} (Linux only). | ||
589 | -@item -e, --shared=@var{num} | ||
590 | -Allow up to @var{num} clients to share the device (default | ||
591 | -@samp{1}). Safe for readers, but for now, consistency is not | ||
592 | -guaranteed between multiple writers. | ||
593 | -@item -t, --persistent | ||
594 | -Don't exit on the last connection. | ||
595 | -@item -x, --export-name=@var{name} | ||
596 | -Set the NBD volume export name (default of a zero-length string). | ||
597 | -@item -D, --description=@var{description} | ||
598 | -Set the NBD volume export description, as a human-readable | ||
599 | -string. | ||
600 | -@item -L, --list | ||
601 | -Connect as a client and list all details about the exports exposed by | ||
602 | -a remote NBD server. This enables list mode, and is incompatible | ||
603 | -with options that change behavior related to a specific export (such as | ||
604 | -@option{--export-name}, @option{--offset}, ...). | ||
605 | -@item --tls-creds=ID | ||
606 | -Enable mandatory TLS encryption for the server by setting the ID | ||
607 | -of the TLS credentials object previously created with the --object | ||
608 | -option; or provide the credentials needed for connecting as a client | ||
609 | -in list mode. | ||
610 | -@item --fork | ||
611 | -Fork off the server process and exit the parent once the server is running. | ||
612 | -@item --pid-file=PATH | ||
613 | -Store the server's process ID in the given file. | ||
614 | -@item --tls-authz=ID | ||
615 | -Specify the ID of a qauthz object previously created with the | ||
616 | ---object option. This will be used to authorize connecting users | ||
617 | -against their x509 distinguished name. | ||
618 | -@item -v, --verbose | ||
619 | -Display extra debugging information. | ||
620 | -@item -h, --help | ||
621 | -Display this help and exit. | ||
622 | -@item -V, --version | ||
623 | -Display version information and exit. | ||
624 | -@item -T, --trace [[enable=]@var{pattern}][,events=@var{file}][,file=@var{file}] | ||
625 | -@findex --trace | ||
626 | -@include qemu-option-trace.texi | ||
627 | -@end table | ||
628 | - | ||
629 | -@c man end | ||
630 | - | ||
631 | -@c man begin EXAMPLES | ||
632 | -Start a server listening on port 10809 that exposes only the | ||
633 | -guest-visible contents of a qcow2 file, with no TLS encryption, and | ||
634 | -with the default export name (an empty string). The command is | ||
635 | -one-shot, and will block until the first successful client | ||
636 | -disconnects: | ||
637 | - | ||
638 | -@example | ||
639 | -qemu-nbd -f qcow2 file.qcow2 | ||
640 | -@end example | ||
641 | - | ||
642 | -Start a long-running server listening with encryption on port 10810, | ||
643 | -and whitelist clients with a specific X.509 certificate to connect to | ||
644 | -a 1 megabyte subset of a raw file, using the export name 'subset': | ||
645 | - | ||
646 | -@example | ||
647 | -qemu-nbd \ | ||
648 | - --object tls-creds-x509,id=tls0,endpoint=server,dir=/path/to/qemutls \ | ||
649 | - --object 'authz-simple,id=auth0,identity=CN=laptop.example.com,,\ | ||
650 | - O=Example Org,,L=London,,ST=London,,C=GB' \ | ||
651 | - --tls-creds tls0 --tls-authz auth0 \ | ||
652 | - -t -x subset -p 10810 \ | ||
653 | - --image-opts driver=raw,offset=1M,size=1M,file.driver=file,file.filename=file.raw | ||
654 | -@end example | ||
655 | - | ||
656 | -Serve a read-only copy of just the first MBR partition of a guest | ||
657 | -image over a Unix socket with as many as 5 simultaneous readers, with | ||
658 | -a persistent process forked as a daemon: | ||
659 | - | ||
660 | -@example | ||
661 | -qemu-nbd --fork --persistent --shared=5 --socket=/path/to/sock \ | ||
662 | - --partition=1 --read-only --format=qcow2 file.qcow2 | ||
663 | -@end example | ||
664 | - | ||
665 | -Expose the guest-visible contents of a qcow2 file via a block device | ||
666 | -/dev/nbd0 (and possibly creating /dev/nbd0p1 and friends for | ||
667 | -partitions found within), then disconnect the device when done. | ||
668 | -Access to bind qemu-nbd to an /dev/nbd device generally requires root | ||
669 | -privileges, and may also require the execution of @code{modprobe nbd} | ||
670 | -to enable the kernel NBD client module. @emph{CAUTION}: Do not use | ||
671 | -this method to mount filesystems from an untrusted guest image - a | ||
672 | -malicious guest may have prepared the image to attempt to trigger | ||
673 | -kernel bugs in partition probing or file system mounting. | ||
674 | - | ||
675 | -@example | ||
676 | -qemu-nbd -c /dev/nbd0 -f qcow2 file.qcow2 | ||
677 | -qemu-nbd -d /dev/nbd0 | ||
678 | -@end example | ||
679 | - | ||
680 | -Query a remote server to see details about what export(s) it is | ||
681 | -serving on port 10809, and authenticating via PSK: | ||
682 | - | ||
683 | -@example | ||
684 | -qemu-nbd \ | ||
685 | - --object tls-creds-psk,id=tls0,dir=/tmp/keys,username=eblake,endpoint=client \ | ||
686 | - --tls-creds tls0 -L -b remote.example.com | ||
687 | -@end example | ||
688 | - | ||
689 | -@c man end | ||
690 | - | ||
691 | -@ignore | ||
692 | - | ||
693 | -@setfilename qemu-nbd | ||
694 | -@settitle QEMU Disk Network Block Device Server | ||
695 | - | ||
696 | -@c man begin AUTHOR | ||
697 | -Copyright (C) 2006 Anthony Liguori <anthony@codemonkey.ws>. | ||
698 | -This is free software; see the source for copying conditions. There is NO | ||
699 | -warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. | ||
700 | -@c man end | ||
701 | - | ||
702 | -@c man begin SEEALSO | ||
703 | -qemu(1), qemu-img(1) | ||
704 | -@c man end | ||
705 | - | ||
706 | -@end ignore | ||
707 | diff --git a/qemu-option-trace.texi b/qemu-option-trace.texi | ||
708 | index XXXXXXX..XXXXXXX 100644 | ||
709 | --- a/qemu-option-trace.texi | ||
710 | +++ b/qemu-option-trace.texi | ||
711 | @@ -XXX,XX +XXX,XX @@ | ||
712 | +@c The contents of this file must be kept in sync with qemu-option-trace.rst.inc | ||
713 | +@c until all the users of the texi file have been converted to rst and | ||
714 | +@c the texi file can be removed. | ||
715 | + | ||
716 | Specify tracing options. | ||
717 | |||
718 | @table @option | ||
28 | -- | 719 | -- |
29 | 2.16.1 | 720 | 2.20.1 |
30 | 721 | ||
31 | 722 | diff view generated by jsdifflib |
1 | In many of the NVIC registers relating to interrupts, we | 1 | We want a user-facing manual which contains system emulation |
---|---|---|---|
2 | have to convert from a byte offset within a register set | 2 | documentation. Create an empty one which we can populate. |
3 | into the number of the first interrupt which is affected. | ||
4 | We were getting this wrong for: | ||
5 | * reads of NVIC_ISPR<n>, NVIC_ISER<n>, NVIC_ICPR<n>, NVIC_ICER<n>, | ||
6 | NVIC_IABR<n> -- in all these cases we were missing the "* 8" | ||
7 | needed to convert from the byte offset to the interrupt number | ||
8 | (since all these registers use one bit per interrupt) | ||
9 | * writes of NVIC_IPR<n> had the opposite problem of a spurious | ||
10 | "* 8" (since these registers use one byte per interrupt) | ||
11 | 3 | ||
12 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 4 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
13 | Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> | 5 | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> |
14 | Message-id: 20180209165810.6668-9-peter.maydell@linaro.org | 6 | Acked-by: Stefan Hajnoczi <stefanha@redhat.com> |
7 | Message-id: 20200116141511.16849-3-peter.maydell@linaro.org | ||
15 | --- | 8 | --- |
16 | hw/intc/armv7m_nvic.c | 8 ++++---- | 9 | Makefile | 10 +++++++++- |
17 | 1 file changed, 4 insertions(+), 4 deletions(-) | 10 | docs/index.html.in | 1 + |
11 | docs/system/conf.py | 15 +++++++++++++++ | ||
12 | docs/system/index.rst | 16 ++++++++++++++++ | ||
13 | 4 files changed, 41 insertions(+), 1 deletion(-) | ||
14 | create mode 100644 docs/system/conf.py | ||
15 | create mode 100644 docs/system/index.rst | ||
18 | 16 | ||
19 | diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c | 17 | diff --git a/Makefile b/Makefile |
20 | index XXXXXXX..XXXXXXX 100644 | 18 | index XXXXXXX..XXXXXXX 100644 |
21 | --- a/hw/intc/armv7m_nvic.c | 19 | --- a/Makefile |
22 | +++ b/hw/intc/armv7m_nvic.c | 20 | +++ b/Makefile |
23 | @@ -XXX,XX +XXX,XX @@ static MemTxResult nvic_sysreg_read(void *opaque, hwaddr addr, | 21 | @@ -XXX,XX +XXX,XX @@ distclean: clean |
24 | /* fall through */ | 22 | $(call clean-manual,devel) |
25 | case 0x180 ... 0x1bf: /* NVIC Clear enable */ | 23 | $(call clean-manual,interop) |
26 | val = 0; | 24 | $(call clean-manual,specs) |
27 | - startvec = offset - 0x180 + NVIC_FIRST_IRQ; /* vector # */ | 25 | + $(call clean-manual,system) |
28 | + startvec = 8 * (offset - 0x180) + NVIC_FIRST_IRQ; /* vector # */ | 26 | for d in $(TARGET_DIRS); do \ |
29 | 27 | rm -rf $$d || exit 1 ; \ | |
30 | for (i = 0, end = size * 8; i < end && startvec + i < s->num_irq; i++) { | 28 | done |
31 | if (s->vectors[startvec + i].enabled && | 29 | @@ -XXX,XX +XXX,XX @@ endef |
32 | @@ -XXX,XX +XXX,XX @@ static MemTxResult nvic_sysreg_read(void *opaque, hwaddr addr, | 30 | install-sphinxdocs: sphinxdocs |
33 | /* fall through */ | 31 | $(call install-manual,interop) |
34 | case 0x280 ... 0x2bf: /* NVIC Clear pend */ | 32 | $(call install-manual,specs) |
35 | val = 0; | 33 | + $(call install-manual,system) |
36 | - startvec = offset - 0x280 + NVIC_FIRST_IRQ; /* vector # */ | 34 | |
37 | + startvec = 8 * (offset - 0x280) + NVIC_FIRST_IRQ; /* vector # */ | 35 | install-doc: $(DOCS) install-sphinxdocs |
38 | for (i = 0, end = size * 8; i < end && startvec + i < s->num_irq; i++) { | 36 | $(INSTALL_DIR) "$(DESTDIR)$(qemu_docdir)" |
39 | if (s->vectors[startvec + i].pending && | 37 | @@ -XXX,XX +XXX,XX @@ docs/version.texi: $(SRC_PATH)/VERSION config-host.mak |
40 | (attrs.secure || s->itns[startvec + i])) { | 38 | # and handles "don't rebuild things unless necessary" itself. |
41 | @@ -XXX,XX +XXX,XX @@ static MemTxResult nvic_sysreg_read(void *opaque, hwaddr addr, | 39 | # The '.doctrees' files are cached information to speed this up. |
42 | break; | 40 | .PHONY: sphinxdocs |
43 | case 0x300 ... 0x33f: /* NVIC Active */ | 41 | -sphinxdocs: $(MANUAL_BUILDDIR)/devel/index.html $(MANUAL_BUILDDIR)/interop/index.html $(MANUAL_BUILDDIR)/specs/index.html |
44 | val = 0; | 42 | +sphinxdocs: $(MANUAL_BUILDDIR)/devel/index.html \ |
45 | - startvec = offset - 0x300 + NVIC_FIRST_IRQ; /* vector # */ | 43 | + $(MANUAL_BUILDDIR)/interop/index.html \ |
46 | + startvec = 8 * (offset - 0x300) + NVIC_FIRST_IRQ; /* vector # */ | 44 | + $(MANUAL_BUILDDIR)/specs/index.html \ |
47 | 45 | + $(MANUAL_BUILDDIR)/system/index.html | |
48 | for (i = 0, end = size * 8; i < end && startvec + i < s->num_irq; i++) { | 46 | |
49 | if (s->vectors[startvec + i].active && | 47 | # Canned command to build a single manual |
50 | @@ -XXX,XX +XXX,XX @@ static MemTxResult nvic_sysreg_write(void *opaque, hwaddr addr, | 48 | # Arguments: $1 = manual name, $2 = Sphinx builder ('html' or 'man') |
51 | case 0x300 ... 0x33f: /* NVIC Active */ | 49 | @@ -XXX,XX +XXX,XX @@ $(MANUAL_BUILDDIR)/interop/index.html: $(call manual-deps,interop) |
52 | return MEMTX_OK; /* R/O */ | 50 | $(MANUAL_BUILDDIR)/specs/index.html: $(call manual-deps,specs) |
53 | case 0x400 ... 0x5ef: /* NVIC Priority */ | 51 | $(call build-manual,specs,html) |
54 | - startvec = 8 * (offset - 0x400) + NVIC_FIRST_IRQ; /* vector # */ | 52 | |
55 | + startvec = (offset - 0x400) + NVIC_FIRST_IRQ; /* vector # */ | 53 | +$(MANUAL_BUILDDIR)/system/index.html: $(call manual-deps,system) |
56 | 54 | + $(call build-manual,system,html) | |
57 | for (i = 0; i < size && startvec + i < s->num_irq; i++) { | 55 | + |
58 | if (attrs.secure || s->itns[startvec + i]) { | 56 | $(MANUAL_BUILDDIR)/interop/qemu-ga.8: $(call manual-deps,interop) |
57 | $(call build-manual,interop,man) | ||
58 | |||
59 | diff --git a/docs/index.html.in b/docs/index.html.in | ||
60 | index XXXXXXX..XXXXXXX 100644 | ||
61 | --- a/docs/index.html.in | ||
62 | +++ b/docs/index.html.in | ||
63 | @@ -XXX,XX +XXX,XX @@ | ||
64 | <li><a href="qemu-ga-ref.html">Guest Agent Protocol Reference</a></li> | ||
65 | <li><a href="interop/index.html">System Emulation Management and Interoperability Guide</a></li> | ||
66 | <li><a href="specs/index.html">System Emulation Guest Hardware Specifications</a></li> | ||
67 | + <li><a href="system/index.html">System Emulation User's Guide</a></li> | ||
68 | </ul> | ||
69 | </body> | ||
70 | </html> | ||
71 | diff --git a/docs/system/conf.py b/docs/system/conf.py | ||
72 | new file mode 100644 | ||
73 | index XXXXXXX..XXXXXXX | ||
74 | --- /dev/null | ||
75 | +++ b/docs/system/conf.py | ||
76 | @@ -XXX,XX +XXX,XX @@ | ||
77 | +# -*- coding: utf-8 -*- | ||
78 | +# | ||
79 | +# QEMU documentation build configuration file for the 'system' manual. | ||
80 | +# | ||
81 | +# This includes the top level conf file and then makes any necessary tweaks. | ||
82 | +import sys | ||
83 | +import os | ||
84 | + | ||
85 | +qemu_docdir = os.path.abspath("..") | ||
86 | +parent_config = os.path.join(qemu_docdir, "conf.py") | ||
87 | +exec(compile(open(parent_config, "rb").read(), parent_config, 'exec')) | ||
88 | + | ||
89 | +# This slightly misuses the 'description', but is the best way to get | ||
90 | +# the manual title to appear in the sidebar. | ||
91 | +html_theme_options['description'] = u'System Emulation User''s Guide' | ||
92 | diff --git a/docs/system/index.rst b/docs/system/index.rst | ||
93 | new file mode 100644 | ||
94 | index XXXXXXX..XXXXXXX | ||
95 | --- /dev/null | ||
96 | +++ b/docs/system/index.rst | ||
97 | @@ -XXX,XX +XXX,XX @@ | ||
98 | +.. This is the top level page for the 'system' manual. | ||
99 | + | ||
100 | + | ||
101 | +QEMU System Emulation User's Guide | ||
102 | +================================== | ||
103 | + | ||
104 | +This manual is the overall guide for users using QEMU | ||
105 | +for full system emulation (as opposed to user-mode emulation). | ||
106 | +This includes working with hypervisors such as KVM, Xen, Hax | ||
107 | +or Hypervisor.Framework. | ||
108 | + | ||
109 | +Contents: | ||
110 | + | ||
111 | +.. toctree:: | ||
112 | + :maxdepth: 2 | ||
113 | + | ||
59 | -- | 114 | -- |
60 | 2.16.1 | 115 | 2.20.1 |
61 | 116 | ||
62 | 117 | diff view generated by jsdifflib |
1 | We were previously making the system control register (SCR) | 1 | The qemu-block-drivers documentation is currently in |
---|---|---|---|
2 | just RAZ/WI. Although we don't implement the functionality | 2 | docs/qemu-block-drivers.texi in Texinfo format, which we present |
3 | this register controls, we should at least provide the state, | 3 | to the user as: |
4 | including the banked state for v8M. | 4 | * a qemu-block-drivers manpage |
5 | * a section of the main qemu-doc HTML documentation | ||
6 | |||
7 | Convert the documentation to rST format, and present it to | ||
8 | the user as: | ||
9 | * a qemu-block-drivers manpage | ||
10 | * part of the system/ Sphinx manual | ||
11 | |||
12 | This follows the same pattern we've done for qemu-ga and qemu-nbd. | ||
13 | |||
14 | We have to drop a cross-reference from the documentation of the | ||
15 | -cdrom option back to the qemu-block-drivers documentation, since | ||
16 | they're no longer within the same texinfo document. | ||
17 | |||
18 | As noted in a comment, the manpage output is slightly compromised | ||
19 | due to limitations in Sphinx. In an ideal world, the HTML output | ||
20 | would have the various headings like 'Disk image file formats' | ||
21 | as top-level section headings (which then appear in the overall | ||
22 | system manual's table-of-contents), and it would not have the | ||
23 | section headings which make sense only for the manpage like | ||
24 | 'synopsis', 'description', and 'see also'. Unfortunately, the | ||
25 | mechanism Sphinx provides for restricting pieces of documentation | ||
26 | is limited to the point of being flawed: the 'only::' directive | ||
27 | is implemented as a filter that is applied at a very late stage | ||
28 | in the document processing pipeline, rather than as an early | ||
29 | equivalent of an #ifdef. This means that Sphinx's process of | ||
30 | identifying which section heading markup styles are which levels | ||
31 | of heading gets confused if the 'only::' directive contains | ||
32 | section headings which would affect the heading-level of a | ||
33 | later heading. I have opted to prioritise making the HTML format | ||
34 | look better, with the compromise being that in the manpage | ||
35 | the 'Disk image file formats' &c headings are top-level headings | ||
36 | rather than being sub-headings under the traditional 'Description' | ||
37 | top-level section title. | ||
5 | 38 | ||
6 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 39 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
7 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | 40 | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> |
8 | Message-id: 20180209165810.6668-7-peter.maydell@linaro.org | 41 | Tested-by: Alex Bennée <alex.bennee@linaro.org> |
42 | Acked-by: Stefan Hajnoczi <stefanha@redhat.com> | ||
43 | Message-id: 20200116141511.16849-4-peter.maydell@linaro.org | ||
9 | --- | 44 | --- |
10 | target/arm/cpu.h | 7 +++++++ | 45 | Makefile | 11 +- |
11 | hw/intc/armv7m_nvic.c | 12 ++++++++---- | 46 | docs/qemu-block-drivers.texi | 889 -------------------------- |
12 | target/arm/machine.c | 12 ++++++++++++ | 47 | docs/system/conf.py | 7 + |
13 | 3 files changed, 27 insertions(+), 4 deletions(-) | 48 | docs/system/index.rst | 1 + |
49 | docs/system/qemu-block-drivers.rst | 985 +++++++++++++++++++++++++++++ | ||
50 | qemu-doc.texi | 12 - | ||
51 | qemu-options.hx | 2 +- | ||
52 | 7 files changed, 1000 insertions(+), 907 deletions(-) | ||
53 | delete mode 100644 docs/qemu-block-drivers.texi | ||
54 | create mode 100644 docs/system/qemu-block-drivers.rst | ||
14 | 55 | ||
15 | diff --git a/target/arm/cpu.h b/target/arm/cpu.h | 56 | diff --git a/Makefile b/Makefile |
16 | index XXXXXXX..XXXXXXX 100644 | 57 | index XXXXXXX..XXXXXXX 100644 |
17 | --- a/target/arm/cpu.h | 58 | --- a/Makefile |
18 | +++ b/target/arm/cpu.h | 59 | +++ b/Makefile |
19 | @@ -XXX,XX +XXX,XX @@ typedef struct CPUARMState { | 60 | @@ -XXX,XX +XXX,XX @@ ifdef BUILD_DOCS |
20 | uint32_t aircr; /* only holds r/w state if security extn implemented */ | 61 | DOCS=qemu-doc.html qemu-doc.txt qemu.1 qemu-img.1 |
21 | uint32_t secure; /* Is CPU in Secure state? (not guest visible) */ | 62 | DOCS+=$(MANUAL_BUILDDIR)/interop/qemu-nbd.8 |
22 | uint32_t csselr[M_REG_NUM_BANKS]; | 63 | DOCS+=$(MANUAL_BUILDDIR)/interop/qemu-ga.8 |
23 | + uint32_t scr[M_REG_NUM_BANKS]; | 64 | +DOCS+=$(MANUAL_BUILDDIR)/system/qemu-block-drivers.7 |
24 | } v7m; | 65 | DOCS+=docs/interop/qemu-qmp-ref.html docs/interop/qemu-qmp-ref.txt docs/interop/qemu-qmp-ref.7 |
25 | 66 | DOCS+=docs/interop/qemu-ga-ref.html docs/interop/qemu-ga-ref.txt docs/interop/qemu-ga-ref.7 | |
26 | /* Information associated with an exception about to be taken: | 67 | -DOCS+=docs/qemu-block-drivers.7 |
27 | @@ -XXX,XX +XXX,XX @@ FIELD(V7M_CCR, STKALIGN, 9, 1) | 68 | DOCS+=docs/qemu-cpu-models.7 |
28 | FIELD(V7M_CCR, DC, 16, 1) | 69 | DOCS+=$(MANUAL_BUILDDIR)/index.html |
29 | FIELD(V7M_CCR, IC, 17, 1) | 70 | ifdef CONFIG_VIRTFS |
30 | 71 | @@ -XXX,XX +XXX,XX @@ distclean: clean | |
31 | +/* V7M SCR bits */ | 72 | rm -f docs/interop/qemu-qmp-ref.txt docs/interop/qemu-ga-ref.txt |
32 | +FIELD(V7M_SCR, SLEEPONEXIT, 1, 1) | 73 | rm -f docs/interop/qemu-qmp-ref.pdf docs/interop/qemu-ga-ref.pdf |
33 | +FIELD(V7M_SCR, SLEEPDEEP, 2, 1) | 74 | rm -f docs/interop/qemu-qmp-ref.html docs/interop/qemu-ga-ref.html |
34 | +FIELD(V7M_SCR, SLEEPDEEPS, 3, 1) | 75 | - rm -f docs/qemu-block-drivers.7 |
35 | +FIELD(V7M_SCR, SEVONPEND, 4, 1) | 76 | rm -f docs/qemu-cpu-models.7 |
36 | + | 77 | rm -rf .doctrees |
37 | /* V7M AIRCR bits */ | 78 | $(call clean-manual,devel) |
38 | FIELD(V7M_AIRCR, VECTRESET, 0, 1) | 79 | @@ -XXX,XX +XXX,XX @@ ifdef CONFIG_POSIX |
39 | FIELD(V7M_AIRCR, VECTCLRACTIVE, 1, 1) | 80 | $(INSTALL_DATA) qemu.1 "$(DESTDIR)$(mandir)/man1" |
40 | diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c | 81 | $(INSTALL_DIR) "$(DESTDIR)$(mandir)/man7" |
82 | $(INSTALL_DATA) docs/interop/qemu-qmp-ref.7 "$(DESTDIR)$(mandir)/man7" | ||
83 | - $(INSTALL_DATA) docs/qemu-block-drivers.7 "$(DESTDIR)$(mandir)/man7" | ||
84 | + $(INSTALL_DATA) $(MANUAL_BUILDDIR)/system/qemu-block-drivers.7 "$(DESTDIR)$(mandir)/man7" | ||
85 | $(INSTALL_DATA) docs/qemu-cpu-models.7 "$(DESTDIR)$(mandir)/man7" | ||
86 | ifeq ($(CONFIG_TOOLS),y) | ||
87 | $(INSTALL_DATA) qemu-img.1 "$(DESTDIR)$(mandir)/man1" | ||
88 | @@ -XXX,XX +XXX,XX @@ $(MANUAL_BUILDDIR)/interop/qemu-ga.8: $(call manual-deps,interop) | ||
89 | $(MANUAL_BUILDDIR)/interop/qemu-nbd.8: $(call manual-deps,interop) | ||
90 | $(call build-manual,interop,man) | ||
91 | |||
92 | +$(MANUAL_BUILDDIR)/system/qemu-block-drivers.7: $(call manual-deps,system) | ||
93 | + $(call build-manual,system,man) | ||
94 | + | ||
95 | $(MANUAL_BUILDDIR)/index.html: $(SRC_PATH)/docs/index.html.in qemu-version.h | ||
96 | @mkdir -p "$(MANUAL_BUILDDIR)" | ||
97 | $(call quiet-command, sed "s|@@VERSION@@|${VERSION}|g" $< >$@, \ | ||
98 | @@ -XXX,XX +XXX,XX @@ qemu.1: qemu-doc.texi qemu-options.texi qemu-monitor.texi qemu-monitor-info.texi | ||
99 | qemu.1: qemu-option-trace.texi | ||
100 | qemu-img.1: qemu-img.texi qemu-option-trace.texi qemu-img-cmds.texi | ||
101 | fsdev/virtfs-proxy-helper.1: fsdev/virtfs-proxy-helper.texi | ||
102 | -docs/qemu-block-drivers.7: docs/qemu-block-drivers.texi | ||
103 | docs/qemu-cpu-models.7: docs/qemu-cpu-models.texi | ||
104 | scripts/qemu-trace-stap.1: scripts/qemu-trace-stap.texi | ||
105 | |||
106 | @@ -XXX,XX +XXX,XX @@ qemu-doc.html qemu-doc.info qemu-doc.pdf qemu-doc.txt: \ | ||
107 | qemu-img.texi qemu-options.texi \ | ||
108 | qemu-tech.texi qemu-option-trace.texi \ | ||
109 | qemu-deprecated.texi qemu-monitor.texi qemu-img-cmds.texi \ | ||
110 | - qemu-monitor-info.texi docs/qemu-block-drivers.texi \ | ||
111 | + qemu-monitor-info.texi \ | ||
112 | docs/qemu-cpu-models.texi docs/security.texi | ||
113 | |||
114 | docs/interop/qemu-ga-ref.dvi docs/interop/qemu-ga-ref.html \ | ||
115 | diff --git a/docs/qemu-block-drivers.texi b/docs/qemu-block-drivers.texi | ||
116 | deleted file mode 100644 | ||
117 | index XXXXXXX..XXXXXXX | ||
118 | --- a/docs/qemu-block-drivers.texi | ||
119 | +++ /dev/null | ||
120 | @@ -XXX,XX +XXX,XX @@ | ||
121 | -@c man begin SYNOPSIS | ||
122 | -QEMU block driver reference manual | ||
123 | -@c man end | ||
124 | - | ||
125 | -@set qemu_system qemu-system-x86_64 | ||
126 | - | ||
127 | -@c man begin DESCRIPTION | ||
128 | - | ||
129 | -@node disk_images_formats | ||
130 | -@subsection Disk image file formats | ||
131 | - | ||
132 | -QEMU supports many image file formats that can be used with VMs as well as with | ||
133 | -any of the tools (like @code{qemu-img}). This includes the preferred formats | ||
134 | -raw and qcow2 as well as formats that are supported for compatibility with | ||
135 | -older QEMU versions or other hypervisors. | ||
136 | - | ||
137 | -Depending on the image format, different options can be passed to | ||
138 | -@code{qemu-img create} and @code{qemu-img convert} using the @code{-o} option. | ||
139 | -This section describes each format and the options that are supported for it. | ||
140 | - | ||
141 | -@table @option | ||
142 | -@item raw | ||
143 | - | ||
144 | -Raw disk image format. This format has the advantage of | ||
145 | -being simple and easily exportable to all other emulators. If your | ||
146 | -file system supports @emph{holes} (for example in ext2 or ext3 on | ||
147 | -Linux or NTFS on Windows), then only the written sectors will reserve | ||
148 | -space. Use @code{qemu-img info} to know the real size used by the | ||
149 | -image or @code{ls -ls} on Unix/Linux. | ||
150 | - | ||
151 | -Supported options: | ||
152 | -@table @code | ||
153 | -@item preallocation | ||
154 | -Preallocation mode (allowed values: @code{off}, @code{falloc}, @code{full}). | ||
155 | -@code{falloc} mode preallocates space for image by calling posix_fallocate(). | ||
156 | -@code{full} mode preallocates space for image by writing data to underlying | ||
157 | -storage. This data may or may not be zero, depending on the storage location. | ||
158 | -@end table | ||
159 | - | ||
160 | -@item qcow2 | ||
161 | -QEMU image format, the most versatile format. Use it to have smaller | ||
162 | -images (useful if your filesystem does not supports holes, for example | ||
163 | -on Windows), zlib based compression and support of multiple VM | ||
164 | -snapshots. | ||
165 | - | ||
166 | -Supported options: | ||
167 | -@table @code | ||
168 | -@item compat | ||
169 | -Determines the qcow2 version to use. @code{compat=0.10} uses the | ||
170 | -traditional image format that can be read by any QEMU since 0.10. | ||
171 | -@code{compat=1.1} enables image format extensions that only QEMU 1.1 and | ||
172 | -newer understand (this is the default). Amongst others, this includes | ||
173 | -zero clusters, which allow efficient copy-on-read for sparse images. | ||
174 | - | ||
175 | -@item backing_file | ||
176 | -File name of a base image (see @option{create} subcommand) | ||
177 | -@item backing_fmt | ||
178 | -Image format of the base image | ||
179 | -@item encryption | ||
180 | -This option is deprecated and equivalent to @code{encrypt.format=aes} | ||
181 | - | ||
182 | -@item encrypt.format | ||
183 | - | ||
184 | -If this is set to @code{luks}, it requests that the qcow2 payload (not | ||
185 | -qcow2 header) be encrypted using the LUKS format. The passphrase to | ||
186 | -use to unlock the LUKS key slot is given by the @code{encrypt.key-secret} | ||
187 | -parameter. LUKS encryption parameters can be tuned with the other | ||
188 | -@code{encrypt.*} parameters. | ||
189 | - | ||
190 | -If this is set to @code{aes}, the image is encrypted with 128-bit AES-CBC. | ||
191 | -The encryption key is given by the @code{encrypt.key-secret} parameter. | ||
192 | -This encryption format is considered to be flawed by modern cryptography | ||
193 | -standards, suffering from a number of design problems: | ||
194 | - | ||
195 | -@itemize @minus | ||
196 | -@item The AES-CBC cipher is used with predictable initialization vectors based | ||
197 | -on the sector number. This makes it vulnerable to chosen plaintext attacks | ||
198 | -which can reveal the existence of encrypted data. | ||
199 | -@item The user passphrase is directly used as the encryption key. A poorly | ||
200 | -chosen or short passphrase will compromise the security of the encryption. | ||
201 | -@item In the event of the passphrase being compromised there is no way to | ||
202 | -change the passphrase to protect data in any qcow images. The files must | ||
203 | -be cloned, using a different encryption passphrase in the new file. The | ||
204 | -original file must then be securely erased using a program like shred, | ||
205 | -though even this is ineffective with many modern storage technologies. | ||
206 | -@end itemize | ||
207 | - | ||
208 | -The use of this is no longer supported in system emulators. Support only | ||
209 | -remains in the command line utilities, for the purposes of data liberation | ||
210 | -and interoperability with old versions of QEMU. The @code{luks} format | ||
211 | -should be used instead. | ||
212 | - | ||
213 | -@item encrypt.key-secret | ||
214 | - | ||
215 | -Provides the ID of a @code{secret} object that contains the passphrase | ||
216 | -(@code{encrypt.format=luks}) or encryption key (@code{encrypt.format=aes}). | ||
217 | - | ||
218 | -@item encrypt.cipher-alg | ||
219 | - | ||
220 | -Name of the cipher algorithm and key length. Currently defaults | ||
221 | -to @code{aes-256}. Only used when @code{encrypt.format=luks}. | ||
222 | - | ||
223 | -@item encrypt.cipher-mode | ||
224 | - | ||
225 | -Name of the encryption mode to use. Currently defaults to @code{xts}. | ||
226 | -Only used when @code{encrypt.format=luks}. | ||
227 | - | ||
228 | -@item encrypt.ivgen-alg | ||
229 | - | ||
230 | -Name of the initialization vector generator algorithm. Currently defaults | ||
231 | -to @code{plain64}. Only used when @code{encrypt.format=luks}. | ||
232 | - | ||
233 | -@item encrypt.ivgen-hash-alg | ||
234 | - | ||
235 | -Name of the hash algorithm to use with the initialization vector generator | ||
236 | -(if required). Defaults to @code{sha256}. Only used when @code{encrypt.format=luks}. | ||
237 | - | ||
238 | -@item encrypt.hash-alg | ||
239 | - | ||
240 | -Name of the hash algorithm to use for PBKDF algorithm | ||
241 | -Defaults to @code{sha256}. Only used when @code{encrypt.format=luks}. | ||
242 | - | ||
243 | -@item encrypt.iter-time | ||
244 | - | ||
245 | -Amount of time, in milliseconds, to use for PBKDF algorithm per key slot. | ||
246 | -Defaults to @code{2000}. Only used when @code{encrypt.format=luks}. | ||
247 | - | ||
248 | -@item cluster_size | ||
249 | -Changes the qcow2 cluster size (must be between 512 and 2M). Smaller cluster | ||
250 | -sizes can improve the image file size whereas larger cluster sizes generally | ||
251 | -provide better performance. | ||
252 | - | ||
253 | -@item preallocation | ||
254 | -Preallocation mode (allowed values: @code{off}, @code{metadata}, @code{falloc}, | ||
255 | -@code{full}). An image with preallocated metadata is initially larger but can | ||
256 | -improve performance when the image needs to grow. @code{falloc} and @code{full} | ||
257 | -preallocations are like the same options of @code{raw} format, but sets up | ||
258 | -metadata also. | ||
259 | - | ||
260 | -@item lazy_refcounts | ||
261 | -If this option is set to @code{on}, reference count updates are postponed with | ||
262 | -the goal of avoiding metadata I/O and improving performance. This is | ||
263 | -particularly interesting with @option{cache=writethrough} which doesn't batch | ||
264 | -metadata updates. The tradeoff is that after a host crash, the reference count | ||
265 | -tables must be rebuilt, i.e. on the next open an (automatic) @code{qemu-img | ||
266 | -check -r all} is required, which may take some time. | ||
267 | - | ||
268 | -This option can only be enabled if @code{compat=1.1} is specified. | ||
269 | - | ||
270 | -@item nocow | ||
271 | -If this option is set to @code{on}, it will turn off COW of the file. It's only | ||
272 | -valid on btrfs, no effect on other file systems. | ||
273 | - | ||
274 | -Btrfs has low performance when hosting a VM image file, even more when the guest | ||
275 | -on the VM also using btrfs as file system. Turning off COW is a way to mitigate | ||
276 | -this bad performance. Generally there are two ways to turn off COW on btrfs: | ||
277 | -a) Disable it by mounting with nodatacow, then all newly created files will be | ||
278 | -NOCOW. b) For an empty file, add the NOCOW file attribute. That's what this option | ||
279 | -does. | ||
280 | - | ||
281 | -Note: this option is only valid to new or empty files. If there is an existing | ||
282 | -file which is COW and has data blocks already, it couldn't be changed to NOCOW | ||
283 | -by setting @code{nocow=on}. One can issue @code{lsattr filename} to check if | ||
284 | -the NOCOW flag is set or not (Capital 'C' is NOCOW flag). | ||
285 | - | ||
286 | -@end table | ||
287 | - | ||
288 | -@item qed | ||
289 | -Old QEMU image format with support for backing files and compact image files | ||
290 | -(when your filesystem or transport medium does not support holes). | ||
291 | - | ||
292 | -When converting QED images to qcow2, you might want to consider using the | ||
293 | -@code{lazy_refcounts=on} option to get a more QED-like behaviour. | ||
294 | - | ||
295 | -Supported options: | ||
296 | -@table @code | ||
297 | -@item backing_file | ||
298 | -File name of a base image (see @option{create} subcommand). | ||
299 | -@item backing_fmt | ||
300 | -Image file format of backing file (optional). Useful if the format cannot be | ||
301 | -autodetected because it has no header, like some vhd/vpc files. | ||
302 | -@item cluster_size | ||
303 | -Changes the cluster size (must be power-of-2 between 4K and 64K). Smaller | ||
304 | -cluster sizes can improve the image file size whereas larger cluster sizes | ||
305 | -generally provide better performance. | ||
306 | -@item table_size | ||
307 | -Changes the number of clusters per L1/L2 table (must be power-of-2 between 1 | ||
308 | -and 16). There is normally no need to change this value but this option can be | ||
309 | -used for performance benchmarking. | ||
310 | -@end table | ||
311 | - | ||
312 | -@item qcow | ||
313 | -Old QEMU image format with support for backing files, compact image files, | ||
314 | -encryption and compression. | ||
315 | - | ||
316 | -Supported options: | ||
317 | -@table @code | ||
318 | -@item backing_file | ||
319 | -File name of a base image (see @option{create} subcommand) | ||
320 | -@item encryption | ||
321 | -This option is deprecated and equivalent to @code{encrypt.format=aes} | ||
322 | - | ||
323 | -@item encrypt.format | ||
324 | -If this is set to @code{aes}, the image is encrypted with 128-bit AES-CBC. | ||
325 | -The encryption key is given by the @code{encrypt.key-secret} parameter. | ||
326 | -This encryption format is considered to be flawed by modern cryptography | ||
327 | -standards, suffering from a number of design problems enumerated previously | ||
328 | -against the @code{qcow2} image format. | ||
329 | - | ||
330 | -The use of this is no longer supported in system emulators. Support only | ||
331 | -remains in the command line utilities, for the purposes of data liberation | ||
332 | -and interoperability with old versions of QEMU. | ||
333 | - | ||
334 | -Users requiring native encryption should use the @code{qcow2} format | ||
335 | -instead with @code{encrypt.format=luks}. | ||
336 | - | ||
337 | -@item encrypt.key-secret | ||
338 | - | ||
339 | -Provides the ID of a @code{secret} object that contains the encryption | ||
340 | -key (@code{encrypt.format=aes}). | ||
341 | - | ||
342 | -@end table | ||
343 | - | ||
344 | -@item luks | ||
345 | - | ||
346 | -LUKS v1 encryption format, compatible with Linux dm-crypt/cryptsetup | ||
347 | - | ||
348 | -Supported options: | ||
349 | -@table @code | ||
350 | - | ||
351 | -@item key-secret | ||
352 | - | ||
353 | -Provides the ID of a @code{secret} object that contains the passphrase. | ||
354 | - | ||
355 | -@item cipher-alg | ||
356 | - | ||
357 | -Name of the cipher algorithm and key length. Currently defaults | ||
358 | -to @code{aes-256}. | ||
359 | - | ||
360 | -@item cipher-mode | ||
361 | - | ||
362 | -Name of the encryption mode to use. Currently defaults to @code{xts}. | ||
363 | - | ||
364 | -@item ivgen-alg | ||
365 | - | ||
366 | -Name of the initialization vector generator algorithm. Currently defaults | ||
367 | -to @code{plain64}. | ||
368 | - | ||
369 | -@item ivgen-hash-alg | ||
370 | - | ||
371 | -Name of the hash algorithm to use with the initialization vector generator | ||
372 | -(if required). Defaults to @code{sha256}. | ||
373 | - | ||
374 | -@item hash-alg | ||
375 | - | ||
376 | -Name of the hash algorithm to use for PBKDF algorithm | ||
377 | -Defaults to @code{sha256}. | ||
378 | - | ||
379 | -@item iter-time | ||
380 | - | ||
381 | -Amount of time, in milliseconds, to use for PBKDF algorithm per key slot. | ||
382 | -Defaults to @code{2000}. | ||
383 | - | ||
384 | -@end table | ||
385 | - | ||
386 | -@item vdi | ||
387 | -VirtualBox 1.1 compatible image format. | ||
388 | -Supported options: | ||
389 | -@table @code | ||
390 | -@item static | ||
391 | -If this option is set to @code{on}, the image is created with metadata | ||
392 | -preallocation. | ||
393 | -@end table | ||
394 | - | ||
395 | -@item vmdk | ||
396 | -VMware 3 and 4 compatible image format. | ||
397 | - | ||
398 | -Supported options: | ||
399 | -@table @code | ||
400 | -@item backing_file | ||
401 | -File name of a base image (see @option{create} subcommand). | ||
402 | -@item compat6 | ||
403 | -Create a VMDK version 6 image (instead of version 4) | ||
404 | -@item hwversion | ||
405 | -Specify vmdk virtual hardware version. Compat6 flag cannot be enabled | ||
406 | -if hwversion is specified. | ||
407 | -@item subformat | ||
408 | -Specifies which VMDK subformat to use. Valid options are | ||
409 | -@code{monolithicSparse} (default), | ||
410 | -@code{monolithicFlat}, | ||
411 | -@code{twoGbMaxExtentSparse}, | ||
412 | -@code{twoGbMaxExtentFlat} and | ||
413 | -@code{streamOptimized}. | ||
414 | -@end table | ||
415 | - | ||
416 | -@item vpc | ||
417 | -VirtualPC compatible image format (VHD). | ||
418 | -Supported options: | ||
419 | -@table @code | ||
420 | -@item subformat | ||
421 | -Specifies which VHD subformat to use. Valid options are | ||
422 | -@code{dynamic} (default) and @code{fixed}. | ||
423 | -@end table | ||
424 | - | ||
425 | -@item VHDX | ||
426 | -Hyper-V compatible image format (VHDX). | ||
427 | -Supported options: | ||
428 | -@table @code | ||
429 | -@item subformat | ||
430 | -Specifies which VHDX subformat to use. Valid options are | ||
431 | -@code{dynamic} (default) and @code{fixed}. | ||
432 | -@item block_state_zero | ||
433 | -Force use of payload blocks of type 'ZERO'. Can be set to @code{on} (default) | ||
434 | -or @code{off}. When set to @code{off}, new blocks will be created as | ||
435 | -@code{PAYLOAD_BLOCK_NOT_PRESENT}, which means parsers are free to return | ||
436 | -arbitrary data for those blocks. Do not set to @code{off} when using | ||
437 | -@code{qemu-img convert} with @code{subformat=dynamic}. | ||
438 | -@item block_size | ||
439 | -Block size; min 1 MB, max 256 MB. 0 means auto-calculate based on image size. | ||
440 | -@item log_size | ||
441 | -Log size; min 1 MB. | ||
442 | -@end table | ||
443 | -@end table | ||
444 | - | ||
445 | -@subsubsection Read-only formats | ||
446 | -More disk image file formats are supported in a read-only mode. | ||
447 | -@table @option | ||
448 | -@item bochs | ||
449 | -Bochs images of @code{growing} type. | ||
450 | -@item cloop | ||
451 | -Linux Compressed Loop image, useful only to reuse directly compressed | ||
452 | -CD-ROM images present for example in the Knoppix CD-ROMs. | ||
453 | -@item dmg | ||
454 | -Apple disk image. | ||
455 | -@item parallels | ||
456 | -Parallels disk image format. | ||
457 | -@end table | ||
458 | - | ||
459 | - | ||
460 | -@node host_drives | ||
461 | -@subsection Using host drives | ||
462 | - | ||
463 | -In addition to disk image files, QEMU can directly access host | ||
464 | -devices. We describe here the usage for QEMU version >= 0.8.3. | ||
465 | - | ||
466 | -@subsubsection Linux | ||
467 | - | ||
468 | -On Linux, you can directly use the host device filename instead of a | ||
469 | -disk image filename provided you have enough privileges to access | ||
470 | -it. For example, use @file{/dev/cdrom} to access to the CDROM. | ||
471 | - | ||
472 | -@table @code | ||
473 | -@item CD | ||
474 | -You can specify a CDROM device even if no CDROM is loaded. QEMU has | ||
475 | -specific code to detect CDROM insertion or removal. CDROM ejection by | ||
476 | -the guest OS is supported. Currently only data CDs are supported. | ||
477 | -@item Floppy | ||
478 | -You can specify a floppy device even if no floppy is loaded. Floppy | ||
479 | -removal is currently not detected accurately (if you change floppy | ||
480 | -without doing floppy access while the floppy is not loaded, the guest | ||
481 | -OS will think that the same floppy is loaded). | ||
482 | -Use of the host's floppy device is deprecated, and support for it will | ||
483 | -be removed in a future release. | ||
484 | -@item Hard disks | ||
485 | -Hard disks can be used. Normally you must specify the whole disk | ||
486 | -(@file{/dev/hdb} instead of @file{/dev/hdb1}) so that the guest OS can | ||
487 | -see it as a partitioned disk. WARNING: unless you know what you do, it | ||
488 | -is better to only make READ-ONLY accesses to the hard disk otherwise | ||
489 | -you may corrupt your host data (use the @option{-snapshot} command | ||
490 | -line option or modify the device permissions accordingly). | ||
491 | -@end table | ||
492 | - | ||
493 | -@subsubsection Windows | ||
494 | - | ||
495 | -@table @code | ||
496 | -@item CD | ||
497 | -The preferred syntax is the drive letter (e.g. @file{d:}). The | ||
498 | -alternate syntax @file{\\.\d:} is supported. @file{/dev/cdrom} is | ||
499 | -supported as an alias to the first CDROM drive. | ||
500 | - | ||
501 | -Currently there is no specific code to handle removable media, so it | ||
502 | -is better to use the @code{change} or @code{eject} monitor commands to | ||
503 | -change or eject media. | ||
504 | -@item Hard disks | ||
505 | -Hard disks can be used with the syntax: @file{\\.\PhysicalDrive@var{N}} | ||
506 | -where @var{N} is the drive number (0 is the first hard disk). | ||
507 | - | ||
508 | -WARNING: unless you know what you do, it is better to only make | ||
509 | -READ-ONLY accesses to the hard disk otherwise you may corrupt your | ||
510 | -host data (use the @option{-snapshot} command line so that the | ||
511 | -modifications are written in a temporary file). | ||
512 | -@end table | ||
513 | - | ||
514 | - | ||
515 | -@subsubsection Mac OS X | ||
516 | - | ||
517 | -@file{/dev/cdrom} is an alias to the first CDROM. | ||
518 | - | ||
519 | -Currently there is no specific code to handle removable media, so it | ||
520 | -is better to use the @code{change} or @code{eject} monitor commands to | ||
521 | -change or eject media. | ||
522 | - | ||
523 | -@node disk_images_fat_images | ||
524 | -@subsection Virtual FAT disk images | ||
525 | - | ||
526 | -QEMU can automatically create a virtual FAT disk image from a | ||
527 | -directory tree. In order to use it, just type: | ||
528 | - | ||
529 | -@example | ||
530 | -@value{qemu_system} linux.img -hdb fat:/my_directory | ||
531 | -@end example | ||
532 | - | ||
533 | -Then you access access to all the files in the @file{/my_directory} | ||
534 | -directory without having to copy them in a disk image or to export | ||
535 | -them via SAMBA or NFS. The default access is @emph{read-only}. | ||
536 | - | ||
537 | -Floppies can be emulated with the @code{:floppy:} option: | ||
538 | - | ||
539 | -@example | ||
540 | -@value{qemu_system} linux.img -fda fat:floppy:/my_directory | ||
541 | -@end example | ||
542 | - | ||
543 | -A read/write support is available for testing (beta stage) with the | ||
544 | -@code{:rw:} option: | ||
545 | - | ||
546 | -@example | ||
547 | -@value{qemu_system} linux.img -fda fat:floppy:rw:/my_directory | ||
548 | -@end example | ||
549 | - | ||
550 | -What you should @emph{never} do: | ||
551 | -@itemize | ||
552 | -@item use non-ASCII filenames ; | ||
553 | -@item use "-snapshot" together with ":rw:" ; | ||
554 | -@item expect it to work when loadvm'ing ; | ||
555 | -@item write to the FAT directory on the host system while accessing it with the guest system. | ||
556 | -@end itemize | ||
557 | - | ||
558 | -@node disk_images_nbd | ||
559 | -@subsection NBD access | ||
560 | - | ||
561 | -QEMU can access directly to block device exported using the Network Block Device | ||
562 | -protocol. | ||
563 | - | ||
564 | -@example | ||
565 | -@value{qemu_system} linux.img -hdb nbd://my_nbd_server.mydomain.org:1024/ | ||
566 | -@end example | ||
567 | - | ||
568 | -If the NBD server is located on the same host, you can use an unix socket instead | ||
569 | -of an inet socket: | ||
570 | - | ||
571 | -@example | ||
572 | -@value{qemu_system} linux.img -hdb nbd+unix://?socket=/tmp/my_socket | ||
573 | -@end example | ||
574 | - | ||
575 | -In this case, the block device must be exported using qemu-nbd: | ||
576 | - | ||
577 | -@example | ||
578 | -qemu-nbd --socket=/tmp/my_socket my_disk.qcow2 | ||
579 | -@end example | ||
580 | - | ||
581 | -The use of qemu-nbd allows sharing of a disk between several guests: | ||
582 | -@example | ||
583 | -qemu-nbd --socket=/tmp/my_socket --share=2 my_disk.qcow2 | ||
584 | -@end example | ||
585 | - | ||
586 | -@noindent | ||
587 | -and then you can use it with two guests: | ||
588 | -@example | ||
589 | -@value{qemu_system} linux1.img -hdb nbd+unix://?socket=/tmp/my_socket | ||
590 | -@value{qemu_system} linux2.img -hdb nbd+unix://?socket=/tmp/my_socket | ||
591 | -@end example | ||
592 | - | ||
593 | -If the nbd-server uses named exports (supported since NBD 2.9.18, or with QEMU's | ||
594 | -own embedded NBD server), you must specify an export name in the URI: | ||
595 | -@example | ||
596 | -@value{qemu_system} -cdrom nbd://localhost/debian-500-ppc-netinst | ||
597 | -@value{qemu_system} -cdrom nbd://localhost/openSUSE-11.1-ppc-netinst | ||
598 | -@end example | ||
599 | - | ||
600 | -The URI syntax for NBD is supported since QEMU 1.3. An alternative syntax is | ||
601 | -also available. Here are some example of the older syntax: | ||
602 | -@example | ||
603 | -@value{qemu_system} linux.img -hdb nbd:my_nbd_server.mydomain.org:1024 | ||
604 | -@value{qemu_system} linux2.img -hdb nbd:unix:/tmp/my_socket | ||
605 | -@value{qemu_system} -cdrom nbd:localhost:10809:exportname=debian-500-ppc-netinst | ||
606 | -@end example | ||
607 | - | ||
608 | -@node disk_images_sheepdog | ||
609 | -@subsection Sheepdog disk images | ||
610 | - | ||
611 | -Sheepdog is a distributed storage system for QEMU. It provides highly | ||
612 | -available block level storage volumes that can be attached to | ||
613 | -QEMU-based virtual machines. | ||
614 | - | ||
615 | -You can create a Sheepdog disk image with the command: | ||
616 | -@example | ||
617 | -qemu-img create sheepdog:///@var{image} @var{size} | ||
618 | -@end example | ||
619 | -where @var{image} is the Sheepdog image name and @var{size} is its | ||
620 | -size. | ||
621 | - | ||
622 | -To import the existing @var{filename} to Sheepdog, you can use a | ||
623 | -convert command. | ||
624 | -@example | ||
625 | -qemu-img convert @var{filename} sheepdog:///@var{image} | ||
626 | -@end example | ||
627 | - | ||
628 | -You can boot from the Sheepdog disk image with the command: | ||
629 | -@example | ||
630 | -@value{qemu_system} sheepdog:///@var{image} | ||
631 | -@end example | ||
632 | - | ||
633 | -You can also create a snapshot of the Sheepdog image like qcow2. | ||
634 | -@example | ||
635 | -qemu-img snapshot -c @var{tag} sheepdog:///@var{image} | ||
636 | -@end example | ||
637 | -where @var{tag} is a tag name of the newly created snapshot. | ||
638 | - | ||
639 | -To boot from the Sheepdog snapshot, specify the tag name of the | ||
640 | -snapshot. | ||
641 | -@example | ||
642 | -@value{qemu_system} sheepdog:///@var{image}#@var{tag} | ||
643 | -@end example | ||
644 | - | ||
645 | -You can create a cloned image from the existing snapshot. | ||
646 | -@example | ||
647 | -qemu-img create -b sheepdog:///@var{base}#@var{tag} sheepdog:///@var{image} | ||
648 | -@end example | ||
649 | -where @var{base} is an image name of the source snapshot and @var{tag} | ||
650 | -is its tag name. | ||
651 | - | ||
652 | -You can use an unix socket instead of an inet socket: | ||
653 | - | ||
654 | -@example | ||
655 | -@value{qemu_system} sheepdog+unix:///@var{image}?socket=@var{path} | ||
656 | -@end example | ||
657 | - | ||
658 | -If the Sheepdog daemon doesn't run on the local host, you need to | ||
659 | -specify one of the Sheepdog servers to connect to. | ||
660 | -@example | ||
661 | -qemu-img create sheepdog://@var{hostname}:@var{port}/@var{image} @var{size} | ||
662 | -@value{qemu_system} sheepdog://@var{hostname}:@var{port}/@var{image} | ||
663 | -@end example | ||
664 | - | ||
665 | -@node disk_images_iscsi | ||
666 | -@subsection iSCSI LUNs | ||
667 | - | ||
668 | -iSCSI is a popular protocol used to access SCSI devices across a computer | ||
669 | -network. | ||
670 | - | ||
671 | -There are two different ways iSCSI devices can be used by QEMU. | ||
672 | - | ||
673 | -The first method is to mount the iSCSI LUN on the host, and make it appear as | ||
674 | -any other ordinary SCSI device on the host and then to access this device as a | ||
675 | -/dev/sd device from QEMU. How to do this differs between host OSes. | ||
676 | - | ||
677 | -The second method involves using the iSCSI initiator that is built into | ||
678 | -QEMU. This provides a mechanism that works the same way regardless of which | ||
679 | -host OS you are running QEMU on. This section will describe this second method | ||
680 | -of using iSCSI together with QEMU. | ||
681 | - | ||
682 | -In QEMU, iSCSI devices are described using special iSCSI URLs | ||
683 | - | ||
684 | -@example | ||
685 | -URL syntax: | ||
686 | -iscsi://[<username>[%<password>]@@]<host>[:<port>]/<target-iqn-name>/<lun> | ||
687 | -@end example | ||
688 | - | ||
689 | -Username and password are optional and only used if your target is set up | ||
690 | -using CHAP authentication for access control. | ||
691 | -Alternatively the username and password can also be set via environment | ||
692 | -variables to have these not show up in the process list | ||
693 | - | ||
694 | -@example | ||
695 | -export LIBISCSI_CHAP_USERNAME=<username> | ||
696 | -export LIBISCSI_CHAP_PASSWORD=<password> | ||
697 | -iscsi://<host>/<target-iqn-name>/<lun> | ||
698 | -@end example | ||
699 | - | ||
700 | -Various session related parameters can be set via special options, either | ||
701 | -in a configuration file provided via '-readconfig' or directly on the | ||
702 | -command line. | ||
703 | - | ||
704 | -If the initiator-name is not specified qemu will use a default name | ||
705 | -of 'iqn.2008-11.org.linux-kvm[:<uuid>'] where <uuid> is the UUID of the | ||
706 | -virtual machine. If the UUID is not specified qemu will use | ||
707 | -'iqn.2008-11.org.linux-kvm[:<name>'] where <name> is the name of the | ||
708 | -virtual machine. | ||
709 | - | ||
710 | -@example | ||
711 | -Setting a specific initiator name to use when logging in to the target | ||
712 | --iscsi initiator-name=iqn.qemu.test:my-initiator | ||
713 | -@end example | ||
714 | - | ||
715 | -@example | ||
716 | -Controlling which type of header digest to negotiate with the target | ||
717 | --iscsi header-digest=CRC32C|CRC32C-NONE|NONE-CRC32C|NONE | ||
718 | -@end example | ||
719 | - | ||
720 | -These can also be set via a configuration file | ||
721 | -@example | ||
722 | -[iscsi] | ||
723 | - user = "CHAP username" | ||
724 | - password = "CHAP password" | ||
725 | - initiator-name = "iqn.qemu.test:my-initiator" | ||
726 | - # header digest is one of CRC32C|CRC32C-NONE|NONE-CRC32C|NONE | ||
727 | - header-digest = "CRC32C" | ||
728 | -@end example | ||
729 | - | ||
730 | - | ||
731 | -Setting the target name allows different options for different targets | ||
732 | -@example | ||
733 | -[iscsi "iqn.target.name"] | ||
734 | - user = "CHAP username" | ||
735 | - password = "CHAP password" | ||
736 | - initiator-name = "iqn.qemu.test:my-initiator" | ||
737 | - # header digest is one of CRC32C|CRC32C-NONE|NONE-CRC32C|NONE | ||
738 | - header-digest = "CRC32C" | ||
739 | -@end example | ||
740 | - | ||
741 | - | ||
742 | -Howto use a configuration file to set iSCSI configuration options: | ||
743 | -@example | ||
744 | -cat >iscsi.conf <<EOF | ||
745 | -[iscsi] | ||
746 | - user = "me" | ||
747 | - password = "my password" | ||
748 | - initiator-name = "iqn.qemu.test:my-initiator" | ||
749 | - header-digest = "CRC32C" | ||
750 | -EOF | ||
751 | - | ||
752 | -@value{qemu_system} -drive file=iscsi://127.0.0.1/iqn.qemu.test/1 \ | ||
753 | - -readconfig iscsi.conf | ||
754 | -@end example | ||
755 | - | ||
756 | - | ||
757 | -How to set up a simple iSCSI target on loopback and access it via QEMU: | ||
758 | -@example | ||
759 | -This example shows how to set up an iSCSI target with one CDROM and one DISK | ||
760 | -using the Linux STGT software target. This target is available on Red Hat based | ||
761 | -systems as the package 'scsi-target-utils'. | ||
762 | - | ||
763 | -tgtd --iscsi portal=127.0.0.1:3260 | ||
764 | -tgtadm --lld iscsi --op new --mode target --tid 1 -T iqn.qemu.test | ||
765 | -tgtadm --lld iscsi --mode logicalunit --op new --tid 1 --lun 1 \ | ||
766 | - -b /IMAGES/disk.img --device-type=disk | ||
767 | -tgtadm --lld iscsi --mode logicalunit --op new --tid 1 --lun 2 \ | ||
768 | - -b /IMAGES/cd.iso --device-type=cd | ||
769 | -tgtadm --lld iscsi --op bind --mode target --tid 1 -I ALL | ||
770 | - | ||
771 | -@value{qemu_system} -iscsi initiator-name=iqn.qemu.test:my-initiator \ | ||
772 | - -boot d -drive file=iscsi://127.0.0.1/iqn.qemu.test/1 \ | ||
773 | - -cdrom iscsi://127.0.0.1/iqn.qemu.test/2 | ||
774 | -@end example | ||
775 | - | ||
776 | -@node disk_images_gluster | ||
777 | -@subsection GlusterFS disk images | ||
778 | - | ||
779 | -GlusterFS is a user space distributed file system. | ||
780 | - | ||
781 | -You can boot from the GlusterFS disk image with the command: | ||
782 | -@example | ||
783 | -URI: | ||
784 | -@value{qemu_system} -drive file=gluster[+@var{type}]://[@var{host}[:@var{port}]]/@var{volume}/@var{path} | ||
785 | - [?socket=...][,file.debug=9][,file.logfile=...] | ||
786 | - | ||
787 | -JSON: | ||
788 | -@value{qemu_system} 'json:@{"driver":"qcow2", | ||
789 | - "file":@{"driver":"gluster", | ||
790 | - "volume":"testvol","path":"a.img","debug":9,"logfile":"...", | ||
791 | - "server":[@{"type":"tcp","host":"...","port":"..."@}, | ||
792 | - @{"type":"unix","socket":"..."@}]@}@}' | ||
793 | -@end example | ||
794 | - | ||
795 | -@var{gluster} is the protocol. | ||
796 | - | ||
797 | -@var{type} specifies the transport type used to connect to gluster | ||
798 | -management daemon (glusterd). Valid transport types are | ||
799 | -tcp and unix. In the URI form, if a transport type isn't specified, | ||
800 | -then tcp type is assumed. | ||
801 | - | ||
802 | -@var{host} specifies the server where the volume file specification for | ||
803 | -the given volume resides. This can be either a hostname or an ipv4 address. | ||
804 | -If transport type is unix, then @var{host} field should not be specified. | ||
805 | -Instead @var{socket} field needs to be populated with the path to unix domain | ||
806 | -socket. | ||
807 | - | ||
808 | -@var{port} is the port number on which glusterd is listening. This is optional | ||
809 | -and if not specified, it defaults to port 24007. If the transport type is unix, | ||
810 | -then @var{port} should not be specified. | ||
811 | - | ||
812 | -@var{volume} is the name of the gluster volume which contains the disk image. | ||
813 | - | ||
814 | -@var{path} is the path to the actual disk image that resides on gluster volume. | ||
815 | - | ||
816 | -@var{debug} is the logging level of the gluster protocol driver. Debug levels | ||
817 | -are 0-9, with 9 being the most verbose, and 0 representing no debugging output. | ||
818 | -The default level is 4. The current logging levels defined in the gluster source | ||
819 | -are 0 - None, 1 - Emergency, 2 - Alert, 3 - Critical, 4 - Error, 5 - Warning, | ||
820 | -6 - Notice, 7 - Info, 8 - Debug, 9 - Trace | ||
821 | - | ||
822 | -@var{logfile} is a commandline option to mention log file path which helps in | ||
823 | -logging to the specified file and also help in persisting the gfapi logs. The | ||
824 | -default is stderr. | ||
825 | - | ||
826 | - | ||
827 | - | ||
828 | - | ||
829 | -You can create a GlusterFS disk image with the command: | ||
830 | -@example | ||
831 | -qemu-img create gluster://@var{host}/@var{volume}/@var{path} @var{size} | ||
832 | -@end example | ||
833 | - | ||
834 | -Examples | ||
835 | -@example | ||
836 | -@value{qemu_system} -drive file=gluster://1.2.3.4/testvol/a.img | ||
837 | -@value{qemu_system} -drive file=gluster+tcp://1.2.3.4/testvol/a.img | ||
838 | -@value{qemu_system} -drive file=gluster+tcp://1.2.3.4:24007/testvol/dir/a.img | ||
839 | -@value{qemu_system} -drive file=gluster+tcp://[1:2:3:4:5:6:7:8]/testvol/dir/a.img | ||
840 | -@value{qemu_system} -drive file=gluster+tcp://[1:2:3:4:5:6:7:8]:24007/testvol/dir/a.img | ||
841 | -@value{qemu_system} -drive file=gluster+tcp://server.domain.com:24007/testvol/dir/a.img | ||
842 | -@value{qemu_system} -drive file=gluster+unix:///testvol/dir/a.img?socket=/tmp/glusterd.socket | ||
843 | -@value{qemu_system} -drive file=gluster+rdma://1.2.3.4:24007/testvol/a.img | ||
844 | -@value{qemu_system} -drive file=gluster://1.2.3.4/testvol/a.img,file.debug=9,file.logfile=/var/log/qemu-gluster.log | ||
845 | -@value{qemu_system} 'json:@{"driver":"qcow2", | ||
846 | - "file":@{"driver":"gluster", | ||
847 | - "volume":"testvol","path":"a.img", | ||
848 | - "debug":9,"logfile":"/var/log/qemu-gluster.log", | ||
849 | - "server":[@{"type":"tcp","host":"1.2.3.4","port":24007@}, | ||
850 | - @{"type":"unix","socket":"/var/run/glusterd.socket"@}]@}@}' | ||
851 | -@value{qemu_system} -drive driver=qcow2,file.driver=gluster,file.volume=testvol,file.path=/path/a.img, | ||
852 | - file.debug=9,file.logfile=/var/log/qemu-gluster.log, | ||
853 | - file.server.0.type=tcp,file.server.0.host=1.2.3.4,file.server.0.port=24007, | ||
854 | - file.server.1.type=unix,file.server.1.socket=/var/run/glusterd.socket | ||
855 | -@end example | ||
856 | - | ||
857 | -@node disk_images_ssh | ||
858 | -@subsection Secure Shell (ssh) disk images | ||
859 | - | ||
860 | -You can access disk images located on a remote ssh server | ||
861 | -by using the ssh protocol: | ||
862 | - | ||
863 | -@example | ||
864 | -@value{qemu_system} -drive file=ssh://[@var{user}@@]@var{server}[:@var{port}]/@var{path}[?host_key_check=@var{host_key_check}] | ||
865 | -@end example | ||
866 | - | ||
867 | -Alternative syntax using properties: | ||
868 | - | ||
869 | -@example | ||
870 | -@value{qemu_system} -drive file.driver=ssh[,file.user=@var{user}],file.host=@var{server}[,file.port=@var{port}],file.path=@var{path}[,file.host_key_check=@var{host_key_check}] | ||
871 | -@end example | ||
872 | - | ||
873 | -@var{ssh} is the protocol. | ||
874 | - | ||
875 | -@var{user} is the remote user. If not specified, then the local | ||
876 | -username is tried. | ||
877 | - | ||
878 | -@var{server} specifies the remote ssh server. Any ssh server can be | ||
879 | -used, but it must implement the sftp-server protocol. Most Unix/Linux | ||
880 | -systems should work without requiring any extra configuration. | ||
881 | - | ||
882 | -@var{port} is the port number on which sshd is listening. By default | ||
883 | -the standard ssh port (22) is used. | ||
884 | - | ||
885 | -@var{path} is the path to the disk image. | ||
886 | - | ||
887 | -The optional @var{host_key_check} parameter controls how the remote | ||
888 | -host's key is checked. The default is @code{yes} which means to use | ||
889 | -the local @file{.ssh/known_hosts} file. Setting this to @code{no} | ||
890 | -turns off known-hosts checking. Or you can check that the host key | ||
891 | -matches a specific fingerprint: | ||
892 | -@code{host_key_check=md5:78:45:8e:14:57:4f:d5:45:83:0a:0e:f3:49:82:c9:c8} | ||
893 | -(@code{sha1:} can also be used as a prefix, but note that OpenSSH | ||
894 | -tools only use MD5 to print fingerprints). | ||
895 | - | ||
896 | -Currently authentication must be done using ssh-agent. Other | ||
897 | -authentication methods may be supported in future. | ||
898 | - | ||
899 | -Note: Many ssh servers do not support an @code{fsync}-style operation. | ||
900 | -The ssh driver cannot guarantee that disk flush requests are | ||
901 | -obeyed, and this causes a risk of disk corruption if the remote | ||
902 | -server or network goes down during writes. The driver will | ||
903 | -print a warning when @code{fsync} is not supported: | ||
904 | - | ||
905 | -warning: ssh server @code{ssh.example.com:22} does not support fsync | ||
906 | - | ||
907 | -With sufficiently new versions of libssh and OpenSSH, @code{fsync} is | ||
908 | -supported. | ||
909 | - | ||
910 | -@node disk_images_nvme | ||
911 | -@subsection NVMe disk images | ||
912 | - | ||
913 | -NVM Express (NVMe) storage controllers can be accessed directly by a userspace | ||
914 | -driver in QEMU. This bypasses the host kernel file system and block layers | ||
915 | -while retaining QEMU block layer functionalities, such as block jobs, I/O | ||
916 | -throttling, image formats, etc. Disk I/O performance is typically higher than | ||
917 | -with @code{-drive file=/dev/sda} using either thread pool or linux-aio. | ||
918 | - | ||
919 | -The controller will be exclusively used by the QEMU process once started. To be | ||
920 | -able to share storage between multiple VMs and other applications on the host, | ||
921 | -please use the file based protocols. | ||
922 | - | ||
923 | -Before starting QEMU, bind the host NVMe controller to the host vfio-pci | ||
924 | -driver. For example: | ||
925 | - | ||
926 | -@example | ||
927 | -# modprobe vfio-pci | ||
928 | -# lspci -n -s 0000:06:0d.0 | ||
929 | -06:0d.0 0401: 1102:0002 (rev 08) | ||
930 | -# echo 0000:06:0d.0 > /sys/bus/pci/devices/0000:06:0d.0/driver/unbind | ||
931 | -# echo 1102 0002 > /sys/bus/pci/drivers/vfio-pci/new_id | ||
932 | - | ||
933 | -# @value{qemu_system} -drive file=nvme://@var{host}:@var{bus}:@var{slot}.@var{func}/@var{namespace} | ||
934 | -@end example | ||
935 | - | ||
936 | -Alternative syntax using properties: | ||
937 | - | ||
938 | -@example | ||
939 | -@value{qemu_system} -drive file.driver=nvme,file.device=@var{host}:@var{bus}:@var{slot}.@var{func},file.namespace=@var{namespace} | ||
940 | -@end example | ||
941 | - | ||
942 | -@var{host}:@var{bus}:@var{slot}.@var{func} is the NVMe controller's PCI device | ||
943 | -address on the host. | ||
944 | - | ||
945 | -@var{namespace} is the NVMe namespace number, starting from 1. | ||
946 | - | ||
947 | -@node disk_image_locking | ||
948 | -@subsection Disk image file locking | ||
949 | - | ||
950 | -By default, QEMU tries to protect image files from unexpected concurrent | ||
951 | -access, as long as it's supported by the block protocol driver and host | ||
952 | -operating system. If multiple QEMU processes (including QEMU emulators and | ||
953 | -utilities) try to open the same image with conflicting accessing modes, all but | ||
954 | -the first one will get an error. | ||
955 | - | ||
956 | -This feature is currently supported by the file protocol on Linux with the Open | ||
957 | -File Descriptor (OFD) locking API, and can be configured to fall back to POSIX | ||
958 | -locking if the POSIX host doesn't support Linux OFD locking. | ||
959 | - | ||
960 | -To explicitly enable image locking, specify "locking=on" in the file protocol | ||
961 | -driver options. If OFD locking is not possible, a warning will be printed and | ||
962 | -the POSIX locking API will be used. In this case there is a risk that the lock | ||
963 | -will get silently lost when doing hot plugging and block jobs, due to the | ||
964 | -shortcomings of the POSIX locking API. | ||
965 | - | ||
966 | -QEMU transparently handles lock handover during shared storage migration. For | ||
967 | -shared virtual disk images between multiple VMs, the "share-rw" device option | ||
968 | -should be used. | ||
969 | - | ||
970 | -By default, the guest has exclusive write access to its disk image. If the | ||
971 | -guest can safely share the disk image with other writers the @code{-device | ||
972 | -...,share-rw=on} parameter can be used. This is only safe if the guest is | ||
973 | -running software, such as a cluster file system, that coordinates disk accesses | ||
974 | -to avoid corruption. | ||
975 | - | ||
976 | -Note that share-rw=on only declares the guest's ability to share the disk. | ||
977 | -Some QEMU features, such as image file formats, require exclusive write access | ||
978 | -to the disk image and this is unaffected by the share-rw=on option. | ||
979 | - | ||
980 | -Alternatively, locking can be fully disabled by "locking=off" block device | ||
981 | -option. In the command line, the option is usually in the form of | ||
982 | -"file.locking=off" as the protocol driver is normally placed as a "file" child | ||
983 | -under a format driver. For example: | ||
984 | - | ||
985 | -@code{-blockdev driver=qcow2,file.filename=/path/to/image,file.locking=off,file.driver=file} | ||
986 | - | ||
987 | -To check if image locking is active, check the output of the "lslocks" command | ||
988 | -on host and see if there are locks held by the QEMU process on the image file. | ||
989 | -More than one byte could be locked by the QEMU instance, each byte of which | ||
990 | -reflects a particular permission that is acquired or protected by the running | ||
991 | -block driver. | ||
992 | - | ||
993 | -@c man end | ||
994 | - | ||
995 | -@ignore | ||
996 | - | ||
997 | -@setfilename qemu-block-drivers | ||
998 | -@settitle QEMU block drivers reference | ||
999 | - | ||
1000 | -@c man begin SEEALSO | ||
1001 | -The HTML documentation of QEMU for more precise information and Linux | ||
1002 | -user mode emulator invocation. | ||
1003 | -@c man end | ||
1004 | - | ||
1005 | -@c man begin AUTHOR | ||
1006 | -Fabrice Bellard and the QEMU Project developers | ||
1007 | -@c man end | ||
1008 | - | ||
1009 | -@end ignore | ||
1010 | diff --git a/docs/system/conf.py b/docs/system/conf.py | ||
41 | index XXXXXXX..XXXXXXX 100644 | 1011 | index XXXXXXX..XXXXXXX 100644 |
42 | --- a/hw/intc/armv7m_nvic.c | 1012 | --- a/docs/system/conf.py |
43 | +++ b/hw/intc/armv7m_nvic.c | 1013 | +++ b/docs/system/conf.py |
44 | @@ -XXX,XX +XXX,XX @@ static uint32_t nvic_readl(NVICState *s, uint32_t offset, MemTxAttrs attrs) | 1014 | @@ -XXX,XX +XXX,XX @@ exec(compile(open(parent_config, "rb").read(), parent_config, 'exec')) |
45 | } | 1015 | # This slightly misuses the 'description', but is the best way to get |
46 | return val; | 1016 | # the manual title to appear in the sidebar. |
47 | case 0xd10: /* System Control. */ | 1017 | html_theme_options['description'] = u'System Emulation User''s Guide' |
48 | - /* TODO: Implement SLEEPONEXIT. */ | 1018 | +# One entry per manual page. List of tuples |
49 | - return 0; | 1019 | +# (source start file, name, description, authors, manual section). |
50 | + return cpu->env.v7m.scr[attrs.secure]; | 1020 | +man_pages = [ |
51 | case 0xd14: /* Configuration Control. */ | 1021 | + ('qemu-block-drivers', 'qemu-block-drivers', |
52 | /* The BFHFNMIGN bit is the only non-banked bit; we | 1022 | + u'QEMU block drivers reference', |
53 | * keep it in the non-secure copy of the register. | 1023 | + ['Fabrice Bellard and the QEMU Project developers'], 7) |
54 | @@ -XXX,XX +XXX,XX @@ static void nvic_writel(NVICState *s, uint32_t offset, uint32_t value, | 1024 | +] |
55 | } | 1025 | diff --git a/docs/system/index.rst b/docs/system/index.rst |
56 | break; | ||
57 | case 0xd10: /* System Control. */ | ||
58 | - /* TODO: Implement control registers. */ | ||
59 | - qemu_log_mask(LOG_UNIMP, "NVIC: SCR unimplemented\n"); | ||
60 | + /* We don't implement deep-sleep so these bits are RAZ/WI. | ||
61 | + * The other bits in the register are banked. | ||
62 | + * QEMU's implementation ignores SEVONPEND and SLEEPONEXIT, which | ||
63 | + * is architecturally permitted. | ||
64 | + */ | ||
65 | + value &= ~(R_V7M_SCR_SLEEPDEEP_MASK | R_V7M_SCR_SLEEPDEEPS_MASK); | ||
66 | + cpu->env.v7m.scr[attrs.secure] = value; | ||
67 | break; | ||
68 | case 0xd14: /* Configuration Control. */ | ||
69 | /* Enforce RAZ/WI on reserved and must-RAZ/WI bits */ | ||
70 | diff --git a/target/arm/machine.c b/target/arm/machine.c | ||
71 | index XXXXXXX..XXXXXXX 100644 | 1026 | index XXXXXXX..XXXXXXX 100644 |
72 | --- a/target/arm/machine.c | 1027 | --- a/docs/system/index.rst |
73 | +++ b/target/arm/machine.c | 1028 | +++ b/docs/system/index.rst |
74 | @@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_m_csselr = { | 1029 | @@ -XXX,XX +XXX,XX @@ Contents: |
75 | } | 1030 | .. toctree:: |
76 | }; | 1031 | :maxdepth: 2 |
77 | 1032 | ||
78 | +static const VMStateDescription vmstate_m_scr = { | 1033 | + qemu-block-drivers |
79 | + .name = "cpu/m/scr", | 1034 | diff --git a/docs/system/qemu-block-drivers.rst b/docs/system/qemu-block-drivers.rst |
80 | + .version_id = 1, | 1035 | new file mode 100644 |
81 | + .minimum_version_id = 1, | 1036 | index XXXXXXX..XXXXXXX |
82 | + .fields = (VMStateField[]) { | 1037 | --- /dev/null |
83 | + VMSTATE_UINT32(env.v7m.scr[M_REG_NS], ARMCPU), | 1038 | +++ b/docs/system/qemu-block-drivers.rst |
84 | + VMSTATE_END_OF_LIST() | 1039 | @@ -XXX,XX +XXX,XX @@ |
85 | + } | 1040 | +QEMU block drivers reference |
86 | +}; | 1041 | +============================ |
87 | + | 1042 | + |
88 | static const VMStateDescription vmstate_m = { | 1043 | +.. |qemu_system| replace:: qemu-system-x86_64 |
89 | .name = "cpu/m", | 1044 | + |
90 | .version_id = 4, | 1045 | +.. |
91 | @@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_m = { | 1046 | + We put the 'Synopsis' and 'See also' sections into the manpage, but not |
92 | .subsections = (const VMStateDescription*[]) { | 1047 | + the HTML. This makes the HTML docs read better and means the ToC in |
93 | &vmstate_m_faultmask_primask, | 1048 | + the index has a more useful set of entries. Ideally, the section |
94 | &vmstate_m_csselr, | 1049 | + headings 'Disk image file formats' would be top-level headings for |
95 | + &vmstate_m_scr, | 1050 | + the HTML, but sub-headings of the conventional manpage 'Description' |
96 | NULL | 1051 | + header for the manpage. Unfortunately, due to deficiencies in |
97 | } | 1052 | + the Sphinx 'only' directive, this isn't possible: they must be headers |
98 | }; | 1053 | + at the same level as 'Synopsis' and 'See also', otherwise Sphinx's |
99 | @@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_m_security = { | 1054 | + identification of which header underline style is which gets confused. |
100 | VMSTATE_UINT32(env.sau.rnr, ARMCPU), | 1055 | + |
101 | VMSTATE_VALIDATE("SAU_RNR is valid", sau_rnr_vmstate_validate), | 1056 | +.. only:: man |
102 | VMSTATE_UINT32(env.sau.ctrl, ARMCPU), | 1057 | + |
103 | + VMSTATE_UINT32(env.v7m.scr[M_REG_S], ARMCPU), | 1058 | + Synopsis |
104 | VMSTATE_END_OF_LIST() | 1059 | + -------- |
105 | } | 1060 | + |
106 | }; | 1061 | + QEMU block driver reference manual |
1062 | + | ||
1063 | +Disk image file formats | ||
1064 | +----------------------- | ||
1065 | + | ||
1066 | +QEMU supports many image file formats that can be used with VMs as well as with | ||
1067 | +any of the tools (like ``qemu-img``). This includes the preferred formats | ||
1068 | +raw and qcow2 as well as formats that are supported for compatibility with | ||
1069 | +older QEMU versions or other hypervisors. | ||
1070 | + | ||
1071 | +Depending on the image format, different options can be passed to | ||
1072 | +``qemu-img create`` and ``qemu-img convert`` using the ``-o`` option. | ||
1073 | +This section describes each format and the options that are supported for it. | ||
1074 | + | ||
1075 | +.. program:: image-formats | ||
1076 | +.. option:: raw | ||
1077 | + | ||
1078 | + Raw disk image format. This format has the advantage of | ||
1079 | + being simple and easily exportable to all other emulators. If your | ||
1080 | + file system supports *holes* (for example in ext2 or ext3 on | ||
1081 | + Linux or NTFS on Windows), then only the written sectors will reserve | ||
1082 | + space. Use ``qemu-img info`` to know the real size used by the | ||
1083 | + image or ``ls -ls`` on Unix/Linux. | ||
1084 | + | ||
1085 | + Supported options: | ||
1086 | + | ||
1087 | + .. program:: raw | ||
1088 | + .. option:: preallocation | ||
1089 | + | ||
1090 | + Preallocation mode (allowed values: ``off``, ``falloc``, | ||
1091 | + ``full``). ``falloc`` mode preallocates space for image by | ||
1092 | + calling ``posix_fallocate()``. ``full`` mode preallocates space | ||
1093 | + for image by writing data to underlying storage. This data may or | ||
1094 | + may not be zero, depending on the storage location. | ||
1095 | + | ||
1096 | +.. program:: image-formats | ||
1097 | +.. option:: qcow2 | ||
1098 | + | ||
1099 | + QEMU image format, the most versatile format. Use it to have smaller | ||
1100 | + images (useful if your filesystem does not supports holes, for example | ||
1101 | + on Windows), zlib based compression and support of multiple VM | ||
1102 | + snapshots. | ||
1103 | + | ||
1104 | + Supported options: | ||
1105 | + | ||
1106 | + .. program:: qcow2 | ||
1107 | + .. option:: compat | ||
1108 | + | ||
1109 | + Determines the qcow2 version to use. ``compat=0.10`` uses the | ||
1110 | + traditional image format that can be read by any QEMU since 0.10. | ||
1111 | + ``compat=1.1`` enables image format extensions that only QEMU 1.1 and | ||
1112 | + newer understand (this is the default). Amongst others, this includes | ||
1113 | + zero clusters, which allow efficient copy-on-read for sparse images. | ||
1114 | + | ||
1115 | + .. option:: backing_file | ||
1116 | + | ||
1117 | + File name of a base image (see ``create`` subcommand) | ||
1118 | + | ||
1119 | + .. option:: backing_fmt | ||
1120 | + | ||
1121 | + Image format of the base image | ||
1122 | + | ||
1123 | + .. option:: encryption | ||
1124 | + | ||
1125 | + This option is deprecated and equivalent to ``encrypt.format=aes`` | ||
1126 | + | ||
1127 | + .. option:: encrypt.format | ||
1128 | + | ||
1129 | + If this is set to ``luks``, it requests that the qcow2 payload (not | ||
1130 | + qcow2 header) be encrypted using the LUKS format. The passphrase to | ||
1131 | + use to unlock the LUKS key slot is given by the ``encrypt.key-secret`` | ||
1132 | + parameter. LUKS encryption parameters can be tuned with the other | ||
1133 | + ``encrypt.*`` parameters. | ||
1134 | + | ||
1135 | + If this is set to ``aes``, the image is encrypted with 128-bit AES-CBC. | ||
1136 | + The encryption key is given by the ``encrypt.key-secret`` parameter. | ||
1137 | + This encryption format is considered to be flawed by modern cryptography | ||
1138 | + standards, suffering from a number of design problems: | ||
1139 | + | ||
1140 | + - The AES-CBC cipher is used with predictable initialization vectors based | ||
1141 | + on the sector number. This makes it vulnerable to chosen plaintext attacks | ||
1142 | + which can reveal the existence of encrypted data. | ||
1143 | + - The user passphrase is directly used as the encryption key. A poorly | ||
1144 | + chosen or short passphrase will compromise the security of the encryption. | ||
1145 | + - In the event of the passphrase being compromised there is no way to | ||
1146 | + change the passphrase to protect data in any qcow images. The files must | ||
1147 | + be cloned, using a different encryption passphrase in the new file. The | ||
1148 | + original file must then be securely erased using a program like shred, | ||
1149 | + though even this is ineffective with many modern storage technologies. | ||
1150 | + | ||
1151 | + The use of this is no longer supported in system emulators. Support only | ||
1152 | + remains in the command line utilities, for the purposes of data liberation | ||
1153 | + and interoperability with old versions of QEMU. The ``luks`` format | ||
1154 | + should be used instead. | ||
1155 | + | ||
1156 | + .. option:: encrypt.key-secret | ||
1157 | + | ||
1158 | + Provides the ID of a ``secret`` object that contains the passphrase | ||
1159 | + (``encrypt.format=luks``) or encryption key (``encrypt.format=aes``). | ||
1160 | + | ||
1161 | + .. option:: encrypt.cipher-alg | ||
1162 | + | ||
1163 | + Name of the cipher algorithm and key length. Currently defaults | ||
1164 | + to ``aes-256``. Only used when ``encrypt.format=luks``. | ||
1165 | + | ||
1166 | + .. option:: encrypt.cipher-mode | ||
1167 | + | ||
1168 | + Name of the encryption mode to use. Currently defaults to ``xts``. | ||
1169 | + Only used when ``encrypt.format=luks``. | ||
1170 | + | ||
1171 | + .. option:: encrypt.ivgen-alg | ||
1172 | + | ||
1173 | + Name of the initialization vector generator algorithm. Currently defaults | ||
1174 | + to ``plain64``. Only used when ``encrypt.format=luks``. | ||
1175 | + | ||
1176 | + .. option:: encrypt.ivgen-hash-alg | ||
1177 | + | ||
1178 | + Name of the hash algorithm to use with the initialization vector generator | ||
1179 | + (if required). Defaults to ``sha256``. Only used when ``encrypt.format=luks``. | ||
1180 | + | ||
1181 | + .. option:: encrypt.hash-alg | ||
1182 | + | ||
1183 | + Name of the hash algorithm to use for PBKDF algorithm | ||
1184 | + Defaults to ``sha256``. Only used when ``encrypt.format=luks``. | ||
1185 | + | ||
1186 | + .. option:: encrypt.iter-time | ||
1187 | + | ||
1188 | + Amount of time, in milliseconds, to use for PBKDF algorithm per key slot. | ||
1189 | + Defaults to ``2000``. Only used when ``encrypt.format=luks``. | ||
1190 | + | ||
1191 | + .. option:: cluster_size | ||
1192 | + | ||
1193 | + Changes the qcow2 cluster size (must be between 512 and 2M). Smaller cluster | ||
1194 | + sizes can improve the image file size whereas larger cluster sizes generally | ||
1195 | + provide better performance. | ||
1196 | + | ||
1197 | + .. option:: preallocation | ||
1198 | + | ||
1199 | + Preallocation mode (allowed values: ``off``, ``metadata``, ``falloc``, | ||
1200 | + ``full``). An image with preallocated metadata is initially larger but can | ||
1201 | + improve performance when the image needs to grow. ``falloc`` and ``full`` | ||
1202 | + preallocations are like the same options of ``raw`` format, but sets up | ||
1203 | + metadata also. | ||
1204 | + | ||
1205 | + .. option:: lazy_refcounts | ||
1206 | + | ||
1207 | + If this option is set to ``on``, reference count updates are postponed with | ||
1208 | + the goal of avoiding metadata I/O and improving performance. This is | ||
1209 | + particularly interesting with :option:`cache=writethrough` which doesn't batch | ||
1210 | + metadata updates. The tradeoff is that after a host crash, the reference count | ||
1211 | + tables must be rebuilt, i.e. on the next open an (automatic) ``qemu-img | ||
1212 | + check -r all`` is required, which may take some time. | ||
1213 | + | ||
1214 | + This option can only be enabled if ``compat=1.1`` is specified. | ||
1215 | + | ||
1216 | + .. option:: nocow | ||
1217 | + | ||
1218 | + If this option is set to ``on``, it will turn off COW of the file. It's only | ||
1219 | + valid on btrfs, no effect on other file systems. | ||
1220 | + | ||
1221 | + Btrfs has low performance when hosting a VM image file, even more | ||
1222 | + when the guest on the VM also using btrfs as file system. Turning off | ||
1223 | + COW is a way to mitigate this bad performance. Generally there are two | ||
1224 | + ways to turn off COW on btrfs: | ||
1225 | + | ||
1226 | + - Disable it by mounting with nodatacow, then all newly created files | ||
1227 | + will be NOCOW. | ||
1228 | + - For an empty file, add the NOCOW file attribute. That's what this | ||
1229 | + option does. | ||
1230 | + | ||
1231 | + Note: this option is only valid to new or empty files. If there is | ||
1232 | + an existing file which is COW and has data blocks already, it couldn't | ||
1233 | + be changed to NOCOW by setting ``nocow=on``. One can issue ``lsattr | ||
1234 | + filename`` to check if the NOCOW flag is set or not (Capital 'C' is | ||
1235 | + NOCOW flag). | ||
1236 | + | ||
1237 | +.. program:: image-formats | ||
1238 | +.. option:: qed | ||
1239 | + | ||
1240 | + Old QEMU image format with support for backing files and compact image files | ||
1241 | + (when your filesystem or transport medium does not support holes). | ||
1242 | + | ||
1243 | + When converting QED images to qcow2, you might want to consider using the | ||
1244 | + ``lazy_refcounts=on`` option to get a more QED-like behaviour. | ||
1245 | + | ||
1246 | + Supported options: | ||
1247 | + | ||
1248 | + .. program:: qed | ||
1249 | + .. option:: backing_file | ||
1250 | + | ||
1251 | + File name of a base image (see ``create`` subcommand). | ||
1252 | + | ||
1253 | + .. option:: backing_fmt | ||
1254 | + | ||
1255 | + Image file format of backing file (optional). Useful if the format cannot be | ||
1256 | + autodetected because it has no header, like some vhd/vpc files. | ||
1257 | + | ||
1258 | + .. option:: cluster_size | ||
1259 | + | ||
1260 | + Changes the cluster size (must be power-of-2 between 4K and 64K). Smaller | ||
1261 | + cluster sizes can improve the image file size whereas larger cluster sizes | ||
1262 | + generally provide better performance. | ||
1263 | + | ||
1264 | + .. option:: table_size | ||
1265 | + | ||
1266 | + Changes the number of clusters per L1/L2 table (must be | ||
1267 | + power-of-2 between 1 and 16). There is normally no need to | ||
1268 | + change this value but this option can between used for | ||
1269 | + performance benchmarking. | ||
1270 | + | ||
1271 | +.. program:: image-formats | ||
1272 | +.. option:: qcow | ||
1273 | + | ||
1274 | + Old QEMU image format with support for backing files, compact image files, | ||
1275 | + encryption and compression. | ||
1276 | + | ||
1277 | + Supported options: | ||
1278 | + | ||
1279 | + .. program:: qcow | ||
1280 | + .. option:: backing_file | ||
1281 | + | ||
1282 | + File name of a base image (see ``create`` subcommand) | ||
1283 | + | ||
1284 | + .. option:: encryption | ||
1285 | + | ||
1286 | + This option is deprecated and equivalent to ``encrypt.format=aes`` | ||
1287 | + | ||
1288 | + .. option:: encrypt.format | ||
1289 | + | ||
1290 | + If this is set to ``aes``, the image is encrypted with 128-bit AES-CBC. | ||
1291 | + The encryption key is given by the ``encrypt.key-secret`` parameter. | ||
1292 | + This encryption format is considered to be flawed by modern cryptography | ||
1293 | + standards, suffering from a number of design problems enumerated previously | ||
1294 | + against the ``qcow2`` image format. | ||
1295 | + | ||
1296 | + The use of this is no longer supported in system emulators. Support only | ||
1297 | + remains in the command line utilities, for the purposes of data liberation | ||
1298 | + and interoperability with old versions of QEMU. | ||
1299 | + | ||
1300 | + Users requiring native encryption should use the ``qcow2`` format | ||
1301 | + instead with ``encrypt.format=luks``. | ||
1302 | + | ||
1303 | + .. option:: encrypt.key-secret | ||
1304 | + | ||
1305 | + Provides the ID of a ``secret`` object that contains the encryption | ||
1306 | + key (``encrypt.format=aes``). | ||
1307 | + | ||
1308 | +.. program:: image-formats | ||
1309 | +.. option:: luks | ||
1310 | + | ||
1311 | + LUKS v1 encryption format, compatible with Linux dm-crypt/cryptsetup | ||
1312 | + | ||
1313 | + Supported options: | ||
1314 | + | ||
1315 | + .. program:: luks | ||
1316 | + .. option:: key-secret | ||
1317 | + | ||
1318 | + Provides the ID of a ``secret`` object that contains the passphrase. | ||
1319 | + | ||
1320 | + .. option:: cipher-alg | ||
1321 | + | ||
1322 | + Name of the cipher algorithm and key length. Currently defaults | ||
1323 | + to ``aes-256``. | ||
1324 | + | ||
1325 | + .. option:: cipher-mode | ||
1326 | + | ||
1327 | + Name of the encryption mode to use. Currently defaults to ``xts``. | ||
1328 | + | ||
1329 | + .. option:: ivgen-alg | ||
1330 | + | ||
1331 | + Name of the initialization vector generator algorithm. Currently defaults | ||
1332 | + to ``plain64``. | ||
1333 | + | ||
1334 | + .. option:: ivgen-hash-alg | ||
1335 | + | ||
1336 | + Name of the hash algorithm to use with the initialization vector generator | ||
1337 | + (if required). Defaults to ``sha256``. | ||
1338 | + | ||
1339 | + .. option:: hash-alg | ||
1340 | + | ||
1341 | + Name of the hash algorithm to use for PBKDF algorithm | ||
1342 | + Defaults to ``sha256``. | ||
1343 | + | ||
1344 | + .. option:: iter-time | ||
1345 | + | ||
1346 | + Amount of time, in milliseconds, to use for PBKDF algorithm per key slot. | ||
1347 | + Defaults to ``2000``. | ||
1348 | + | ||
1349 | +.. program:: image-formats | ||
1350 | +.. option:: vdi | ||
1351 | + | ||
1352 | + VirtualBox 1.1 compatible image format. | ||
1353 | + | ||
1354 | + Supported options: | ||
1355 | + | ||
1356 | + .. program:: vdi | ||
1357 | + .. option:: static | ||
1358 | + | ||
1359 | + If this option is set to ``on``, the image is created with metadata | ||
1360 | + preallocation. | ||
1361 | + | ||
1362 | +.. program:: image-formats | ||
1363 | +.. option:: vmdk | ||
1364 | + | ||
1365 | + VMware 3 and 4 compatible image format. | ||
1366 | + | ||
1367 | + Supported options: | ||
1368 | + | ||
1369 | + .. program: vmdk | ||
1370 | + .. option:: backing_file | ||
1371 | + | ||
1372 | + File name of a base image (see ``create`` subcommand). | ||
1373 | + | ||
1374 | + .. option:: compat6 | ||
1375 | + | ||
1376 | + Create a VMDK version 6 image (instead of version 4) | ||
1377 | + | ||
1378 | + .. option:: hwversion | ||
1379 | + | ||
1380 | + Specify vmdk virtual hardware version. Compat6 flag cannot be enabled | ||
1381 | + if hwversion is specified. | ||
1382 | + | ||
1383 | + .. option:: subformat | ||
1384 | + | ||
1385 | + Specifies which VMDK subformat to use. Valid options are | ||
1386 | + ``monolithicSparse`` (default), | ||
1387 | + ``monolithicFlat``, | ||
1388 | + ``twoGbMaxExtentSparse``, | ||
1389 | + ``twoGbMaxExtentFlat`` and | ||
1390 | + ``streamOptimized``. | ||
1391 | + | ||
1392 | +.. program:: image-formats | ||
1393 | +.. option:: vpc | ||
1394 | + | ||
1395 | + VirtualPC compatible image format (VHD). | ||
1396 | + | ||
1397 | + Supported options: | ||
1398 | + | ||
1399 | + .. program:: vpc | ||
1400 | + .. option:: subformat | ||
1401 | + | ||
1402 | + Specifies which VHD subformat to use. Valid options are | ||
1403 | + ``dynamic`` (default) and ``fixed``. | ||
1404 | + | ||
1405 | +.. program:: image-formats | ||
1406 | +.. option:: VHDX | ||
1407 | + | ||
1408 | + Hyper-V compatible image format (VHDX). | ||
1409 | + | ||
1410 | + Supported options: | ||
1411 | + | ||
1412 | + .. program:: VHDX | ||
1413 | + .. option:: subformat | ||
1414 | + | ||
1415 | + Specifies which VHDX subformat to use. Valid options are | ||
1416 | + ``dynamic`` (default) and ``fixed``. | ||
1417 | + | ||
1418 | + .. option:: block_state_zero | ||
1419 | + | ||
1420 | + Force use of payload blocks of type 'ZERO'. Can be set to ``on`` (default) | ||
1421 | + or ``off``. When set to ``off``, new blocks will be created as | ||
1422 | + ``PAYLOAD_BLOCK_NOT_PRESENT``, which means parsers are free to return | ||
1423 | + arbitrary data for those blocks. Do not set to ``off`` when using | ||
1424 | + ``qemu-img convert`` with ``subformat=dynamic``. | ||
1425 | + | ||
1426 | + .. option:: block_size | ||
1427 | + | ||
1428 | + Block size; min 1 MB, max 256 MB. 0 means auto-calculate based on | ||
1429 | + image size. | ||
1430 | + | ||
1431 | + .. option:: log_size | ||
1432 | + | ||
1433 | + Log size; min 1 MB. | ||
1434 | + | ||
1435 | +Read-only formats | ||
1436 | +----------------- | ||
1437 | + | ||
1438 | +More disk image file formats are supported in a read-only mode. | ||
1439 | + | ||
1440 | +.. program:: image-formats | ||
1441 | +.. option:: bochs | ||
1442 | + | ||
1443 | + Bochs images of ``growing`` type. | ||
1444 | + | ||
1445 | +.. program:: image-formats | ||
1446 | +.. option:: cloop | ||
1447 | + | ||
1448 | + Linux Compressed Loop image, useful only to reuse directly compressed | ||
1449 | + CD-ROM images present for example in the Knoppix CD-ROMs. | ||
1450 | + | ||
1451 | +.. program:: image-formats | ||
1452 | +.. option:: dmg | ||
1453 | + | ||
1454 | + Apple disk image. | ||
1455 | + | ||
1456 | +.. program:: image-formats | ||
1457 | +.. option:: parallels | ||
1458 | + | ||
1459 | + Parallels disk image format. | ||
1460 | + | ||
1461 | +Using host drives | ||
1462 | +----------------- | ||
1463 | + | ||
1464 | +In addition to disk image files, QEMU can directly access host | ||
1465 | +devices. We describe here the usage for QEMU version >= 0.8.3. | ||
1466 | + | ||
1467 | +Linux | ||
1468 | +''''' | ||
1469 | + | ||
1470 | +On Linux, you can directly use the host device filename instead of a | ||
1471 | +disk image filename provided you have enough privileges to access | ||
1472 | +it. For example, use ``/dev/cdrom`` to access to the CDROM. | ||
1473 | + | ||
1474 | +CD | ||
1475 | + You can specify a CDROM device even if no CDROM is loaded. QEMU has | ||
1476 | + specific code to detect CDROM insertion or removal. CDROM ejection by | ||
1477 | + the guest OS is supported. Currently only data CDs are supported. | ||
1478 | + | ||
1479 | +Floppy | ||
1480 | + You can specify a floppy device even if no floppy is loaded. Floppy | ||
1481 | + removal is currently not detected accurately (if you change floppy | ||
1482 | + without doing floppy access while the floppy is not loaded, the guest | ||
1483 | + OS will think that the same floppy is loaded). | ||
1484 | + Use of the host's floppy device is deprecated, and support for it will | ||
1485 | + be removed in a future release. | ||
1486 | + | ||
1487 | +Hard disks | ||
1488 | + Hard disks can be used. Normally you must specify the whole disk | ||
1489 | + (``/dev/hdb`` instead of ``/dev/hdb1``) so that the guest OS can | ||
1490 | + see it as a partitioned disk. WARNING: unless you know what you do, it | ||
1491 | + is better to only make READ-ONLY accesses to the hard disk otherwise | ||
1492 | + you may corrupt your host data (use the ``-snapshot`` command | ||
1493 | + line option or modify the device permissions accordingly). | ||
1494 | + | ||
1495 | +Windows | ||
1496 | +''''''' | ||
1497 | + | ||
1498 | +CD | ||
1499 | + The preferred syntax is the drive letter (e.g. ``d:``). The | ||
1500 | + alternate syntax ``\\.\d:`` is supported. ``/dev/cdrom`` is | ||
1501 | + supported as an alias to the first CDROM drive. | ||
1502 | + | ||
1503 | + Currently there is no specific code to handle removable media, so it | ||
1504 | + is better to use the ``change`` or ``eject`` monitor commands to | ||
1505 | + change or eject media. | ||
1506 | + | ||
1507 | +Hard disks | ||
1508 | + Hard disks can be used with the syntax: ``\\.\PhysicalDriveN`` | ||
1509 | + where *N* is the drive number (0 is the first hard disk). | ||
1510 | + | ||
1511 | + WARNING: unless you know what you do, it is better to only make | ||
1512 | + READ-ONLY accesses to the hard disk otherwise you may corrupt your | ||
1513 | + host data (use the ``-snapshot`` command line so that the | ||
1514 | + modifications are written in a temporary file). | ||
1515 | + | ||
1516 | +Mac OS X | ||
1517 | +'''''''' | ||
1518 | + | ||
1519 | +``/dev/cdrom`` is an alias to the first CDROM. | ||
1520 | + | ||
1521 | +Currently there is no specific code to handle removable media, so it | ||
1522 | +is better to use the ``change`` or ``eject`` monitor commands to | ||
1523 | +change or eject media. | ||
1524 | + | ||
1525 | +Virtual FAT disk images | ||
1526 | +----------------------- | ||
1527 | + | ||
1528 | +QEMU can automatically create a virtual FAT disk image from a | ||
1529 | +directory tree. In order to use it, just type: | ||
1530 | + | ||
1531 | +.. parsed-literal:: | ||
1532 | + | ||
1533 | + |qemu_system| linux.img -hdb fat:/my_directory | ||
1534 | + | ||
1535 | +Then you access access to all the files in the ``/my_directory`` | ||
1536 | +directory without having to copy them in a disk image or to export | ||
1537 | +them via SAMBA or NFS. The default access is *read-only*. | ||
1538 | + | ||
1539 | +Floppies can be emulated with the ``:floppy:`` option: | ||
1540 | + | ||
1541 | +.. parsed-literal:: | ||
1542 | + | ||
1543 | + |qemu_system| linux.img -fda fat:floppy:/my_directory | ||
1544 | + | ||
1545 | +A read/write support is available for testing (beta stage) with the | ||
1546 | +``:rw:`` option: | ||
1547 | + | ||
1548 | +.. parsed-literal:: | ||
1549 | + | ||
1550 | + |qemu_system| linux.img -fda fat:floppy:rw:/my_directory | ||
1551 | + | ||
1552 | +What you should *never* do: | ||
1553 | + | ||
1554 | +- use non-ASCII filenames | ||
1555 | +- use "-snapshot" together with ":rw:" | ||
1556 | +- expect it to work when loadvm'ing | ||
1557 | +- write to the FAT directory on the host system while accessing it with the guest system | ||
1558 | + | ||
1559 | +NBD access | ||
1560 | +---------- | ||
1561 | + | ||
1562 | +QEMU can access directly to block device exported using the Network Block Device | ||
1563 | +protocol. | ||
1564 | + | ||
1565 | +.. parsed-literal:: | ||
1566 | + | ||
1567 | + |qemu_system| linux.img -hdb nbd://my_nbd_server.mydomain.org:1024/ | ||
1568 | + | ||
1569 | +If the NBD server is located on the same host, you can use an unix socket instead | ||
1570 | +of an inet socket: | ||
1571 | + | ||
1572 | +.. parsed-literal:: | ||
1573 | + | ||
1574 | + |qemu_system| linux.img -hdb nbd+unix://?socket=/tmp/my_socket | ||
1575 | + | ||
1576 | +In this case, the block device must be exported using qemu-nbd: | ||
1577 | + | ||
1578 | +.. parsed-literal:: | ||
1579 | + | ||
1580 | + qemu-nbd --socket=/tmp/my_socket my_disk.qcow2 | ||
1581 | + | ||
1582 | +The use of qemu-nbd allows sharing of a disk between several guests: | ||
1583 | + | ||
1584 | +.. parsed-literal:: | ||
1585 | + | ||
1586 | + qemu-nbd --socket=/tmp/my_socket --share=2 my_disk.qcow2 | ||
1587 | + | ||
1588 | +and then you can use it with two guests: | ||
1589 | + | ||
1590 | +.. parsed-literal:: | ||
1591 | + | ||
1592 | + |qemu_system| linux1.img -hdb nbd+unix://?socket=/tmp/my_socket | ||
1593 | + |qemu_system| linux2.img -hdb nbd+unix://?socket=/tmp/my_socket | ||
1594 | + | ||
1595 | +If the nbd-server uses named exports (supported since NBD 2.9.18, or with QEMU's | ||
1596 | +own embedded NBD server), you must specify an export name in the URI: | ||
1597 | + | ||
1598 | +.. parsed-literal:: | ||
1599 | + | ||
1600 | + |qemu_system| -cdrom nbd://localhost/debian-500-ppc-netinst | ||
1601 | + |qemu_system| -cdrom nbd://localhost/openSUSE-11.1-ppc-netinst | ||
1602 | + | ||
1603 | +The URI syntax for NBD is supported since QEMU 1.3. An alternative syntax is | ||
1604 | +also available. Here are some example of the older syntax: | ||
1605 | + | ||
1606 | +.. parsed-literal:: | ||
1607 | + | ||
1608 | + |qemu_system| linux.img -hdb nbd:my_nbd_server.mydomain.org:1024 | ||
1609 | + |qemu_system| linux2.img -hdb nbd:unix:/tmp/my_socket | ||
1610 | + |qemu_system| -cdrom nbd:localhost:10809:exportname=debian-500-ppc-netinst | ||
1611 | + | ||
1612 | + | ||
1613 | + | ||
1614 | +Sheepdog disk images | ||
1615 | +-------------------- | ||
1616 | + | ||
1617 | +Sheepdog is a distributed storage system for QEMU. It provides highly | ||
1618 | +available block level storage volumes that can be attached to | ||
1619 | +QEMU-based virtual machines. | ||
1620 | + | ||
1621 | +You can create a Sheepdog disk image with the command: | ||
1622 | + | ||
1623 | +.. parsed-literal:: | ||
1624 | + | ||
1625 | + qemu-img create sheepdog:///IMAGE SIZE | ||
1626 | + | ||
1627 | +where *IMAGE* is the Sheepdog image name and *SIZE* is its | ||
1628 | +size. | ||
1629 | + | ||
1630 | +To import the existing *FILENAME* to Sheepdog, you can use a | ||
1631 | +convert command. | ||
1632 | + | ||
1633 | +.. parsed-literal:: | ||
1634 | + | ||
1635 | + qemu-img convert FILENAME sheepdog:///IMAGE | ||
1636 | + | ||
1637 | +You can boot from the Sheepdog disk image with the command: | ||
1638 | + | ||
1639 | +.. parsed-literal:: | ||
1640 | + | ||
1641 | + |qemu_system| sheepdog:///IMAGE | ||
1642 | + | ||
1643 | +You can also create a snapshot of the Sheepdog image like qcow2. | ||
1644 | + | ||
1645 | +.. parsed-literal:: | ||
1646 | + | ||
1647 | + qemu-img snapshot -c TAG sheepdog:///IMAGE | ||
1648 | + | ||
1649 | +where *TAG* is a tag name of the newly created snapshot. | ||
1650 | + | ||
1651 | +To boot from the Sheepdog snapshot, specify the tag name of the | ||
1652 | +snapshot. | ||
1653 | + | ||
1654 | +.. parsed-literal:: | ||
1655 | + | ||
1656 | + |qemu_system| sheepdog:///IMAGE#TAG | ||
1657 | + | ||
1658 | +You can create a cloned image from the existing snapshot. | ||
1659 | + | ||
1660 | +.. parsed-literal:: | ||
1661 | + | ||
1662 | + qemu-img create -b sheepdog:///BASE#TAG sheepdog:///IMAGE | ||
1663 | + | ||
1664 | +where *BASE* is an image name of the source snapshot and *TAG* | ||
1665 | +is its tag name. | ||
1666 | + | ||
1667 | +You can use an unix socket instead of an inet socket: | ||
1668 | + | ||
1669 | +.. parsed-literal:: | ||
1670 | + | ||
1671 | + |qemu_system| sheepdog+unix:///IMAGE?socket=PATH | ||
1672 | + | ||
1673 | +If the Sheepdog daemon doesn't run on the local host, you need to | ||
1674 | +specify one of the Sheepdog servers to connect to. | ||
1675 | + | ||
1676 | +.. parsed-literal:: | ||
1677 | + | ||
1678 | + qemu-img create sheepdog://HOSTNAME:PORT/IMAGE SIZE | ||
1679 | + |qemu_system| sheepdog://HOSTNAME:PORT/IMAGE | ||
1680 | + | ||
1681 | +iSCSI LUNs | ||
1682 | +---------- | ||
1683 | + | ||
1684 | +iSCSI is a popular protocol used to access SCSI devices across a computer | ||
1685 | +network. | ||
1686 | + | ||
1687 | +There are two different ways iSCSI devices can be used by QEMU. | ||
1688 | + | ||
1689 | +The first method is to mount the iSCSI LUN on the host, and make it appear as | ||
1690 | +any other ordinary SCSI device on the host and then to access this device as a | ||
1691 | +/dev/sd device from QEMU. How to do this differs between host OSes. | ||
1692 | + | ||
1693 | +The second method involves using the iSCSI initiator that is built into | ||
1694 | +QEMU. This provides a mechanism that works the same way regardless of which | ||
1695 | +host OS you are running QEMU on. This section will describe this second method | ||
1696 | +of using iSCSI together with QEMU. | ||
1697 | + | ||
1698 | +In QEMU, iSCSI devices are described using special iSCSI URLs. URL syntax: | ||
1699 | + | ||
1700 | +:: | ||
1701 | + | ||
1702 | + iscsi://[<username>[%<password>]@]<host>[:<port>]/<target-iqn-name>/<lun> | ||
1703 | + | ||
1704 | +Username and password are optional and only used if your target is set up | ||
1705 | +using CHAP authentication for access control. | ||
1706 | +Alternatively the username and password can also be set via environment | ||
1707 | +variables to have these not show up in the process list: | ||
1708 | + | ||
1709 | +:: | ||
1710 | + | ||
1711 | + export LIBISCSI_CHAP_USERNAME=<username> | ||
1712 | + export LIBISCSI_CHAP_PASSWORD=<password> | ||
1713 | + iscsi://<host>/<target-iqn-name>/<lun> | ||
1714 | + | ||
1715 | +Various session related parameters can be set via special options, either | ||
1716 | +in a configuration file provided via '-readconfig' or directly on the | ||
1717 | +command line. | ||
1718 | + | ||
1719 | +If the initiator-name is not specified qemu will use a default name | ||
1720 | +of 'iqn.2008-11.org.linux-kvm[:<uuid>'] where <uuid> is the UUID of the | ||
1721 | +virtual machine. If the UUID is not specified qemu will use | ||
1722 | +'iqn.2008-11.org.linux-kvm[:<name>'] where <name> is the name of the | ||
1723 | +virtual machine. | ||
1724 | + | ||
1725 | +Setting a specific initiator name to use when logging in to the target: | ||
1726 | + | ||
1727 | +:: | ||
1728 | + | ||
1729 | + -iscsi initiator-name=iqn.qemu.test:my-initiator | ||
1730 | + | ||
1731 | +Controlling which type of header digest to negotiate with the target: | ||
1732 | + | ||
1733 | +:: | ||
1734 | + | ||
1735 | + -iscsi header-digest=CRC32C|CRC32C-NONE|NONE-CRC32C|NONE | ||
1736 | + | ||
1737 | +These can also be set via a configuration file: | ||
1738 | + | ||
1739 | +:: | ||
1740 | + | ||
1741 | + [iscsi] | ||
1742 | + user = "CHAP username" | ||
1743 | + password = "CHAP password" | ||
1744 | + initiator-name = "iqn.qemu.test:my-initiator" | ||
1745 | + # header digest is one of CRC32C|CRC32C-NONE|NONE-CRC32C|NONE | ||
1746 | + header-digest = "CRC32C" | ||
1747 | + | ||
1748 | +Setting the target name allows different options for different targets: | ||
1749 | + | ||
1750 | +:: | ||
1751 | + | ||
1752 | + [iscsi "iqn.target.name"] | ||
1753 | + user = "CHAP username" | ||
1754 | + password = "CHAP password" | ||
1755 | + initiator-name = "iqn.qemu.test:my-initiator" | ||
1756 | + # header digest is one of CRC32C|CRC32C-NONE|NONE-CRC32C|NONE | ||
1757 | + header-digest = "CRC32C" | ||
1758 | + | ||
1759 | +How to use a configuration file to set iSCSI configuration options: | ||
1760 | + | ||
1761 | +.. parsed-literal:: | ||
1762 | + | ||
1763 | + cat >iscsi.conf <<EOF | ||
1764 | + [iscsi] | ||
1765 | + user = "me" | ||
1766 | + password = "my password" | ||
1767 | + initiator-name = "iqn.qemu.test:my-initiator" | ||
1768 | + header-digest = "CRC32C" | ||
1769 | + EOF | ||
1770 | + | ||
1771 | + |qemu_system| -drive file=iscsi://127.0.0.1/iqn.qemu.test/1 \\ | ||
1772 | + -readconfig iscsi.conf | ||
1773 | + | ||
1774 | +How to set up a simple iSCSI target on loopback and access it via QEMU: | ||
1775 | +this example shows how to set up an iSCSI target with one CDROM and one DISK | ||
1776 | +using the Linux STGT software target. This target is available on Red Hat based | ||
1777 | +systems as the package 'scsi-target-utils'. | ||
1778 | + | ||
1779 | +.. parsed-literal:: | ||
1780 | + | ||
1781 | + tgtd --iscsi portal=127.0.0.1:3260 | ||
1782 | + tgtadm --lld iscsi --op new --mode target --tid 1 -T iqn.qemu.test | ||
1783 | + tgtadm --lld iscsi --mode logicalunit --op new --tid 1 --lun 1 \\ | ||
1784 | + -b /IMAGES/disk.img --device-type=disk | ||
1785 | + tgtadm --lld iscsi --mode logicalunit --op new --tid 1 --lun 2 \\ | ||
1786 | + -b /IMAGES/cd.iso --device-type=cd | ||
1787 | + tgtadm --lld iscsi --op bind --mode target --tid 1 -I ALL | ||
1788 | + | ||
1789 | + |qemu_system| -iscsi initiator-name=iqn.qemu.test:my-initiator \\ | ||
1790 | + -boot d -drive file=iscsi://127.0.0.1/iqn.qemu.test/1 \\ | ||
1791 | + -cdrom iscsi://127.0.0.1/iqn.qemu.test/2 | ||
1792 | + | ||
1793 | +GlusterFS disk images | ||
1794 | +--------------------- | ||
1795 | + | ||
1796 | +GlusterFS is a user space distributed file system. | ||
1797 | + | ||
1798 | +You can boot from the GlusterFS disk image with the command: | ||
1799 | + | ||
1800 | +URI: | ||
1801 | + | ||
1802 | +.. parsed-literal:: | ||
1803 | + | ||
1804 | + |qemu_system| -drive file=gluster[+TYPE]://[HOST}[:PORT]]/VOLUME/PATH | ||
1805 | + [?socket=...][,file.debug=9][,file.logfile=...] | ||
1806 | + | ||
1807 | +JSON: | ||
1808 | + | ||
1809 | +.. parsed-literal:: | ||
1810 | + | ||
1811 | + |qemu_system| 'json:{"driver":"qcow2", | ||
1812 | + "file":{"driver":"gluster", | ||
1813 | + "volume":"testvol","path":"a.img","debug":9,"logfile":"...", | ||
1814 | + "server":[{"type":"tcp","host":"...","port":"..."}, | ||
1815 | + {"type":"unix","socket":"..."}]}}' | ||
1816 | + | ||
1817 | +*gluster* is the protocol. | ||
1818 | + | ||
1819 | +*TYPE* specifies the transport type used to connect to gluster | ||
1820 | +management daemon (glusterd). Valid transport types are | ||
1821 | +tcp and unix. In the URI form, if a transport type isn't specified, | ||
1822 | +then tcp type is assumed. | ||
1823 | + | ||
1824 | +*HOST* specifies the server where the volume file specification for | ||
1825 | +the given volume resides. This can be either a hostname or an ipv4 address. | ||
1826 | +If transport type is unix, then *HOST* field should not be specified. | ||
1827 | +Instead *socket* field needs to be populated with the path to unix domain | ||
1828 | +socket. | ||
1829 | + | ||
1830 | +*PORT* is the port number on which glusterd is listening. This is optional | ||
1831 | +and if not specified, it defaults to port 24007. If the transport type is unix, | ||
1832 | +then *PORT* should not be specified. | ||
1833 | + | ||
1834 | +*VOLUME* is the name of the gluster volume which contains the disk image. | ||
1835 | + | ||
1836 | +*PATH* is the path to the actual disk image that resides on gluster volume. | ||
1837 | + | ||
1838 | +*debug* is the logging level of the gluster protocol driver. Debug levels | ||
1839 | +are 0-9, with 9 being the most verbose, and 0 representing no debugging output. | ||
1840 | +The default level is 4. The current logging levels defined in the gluster source | ||
1841 | +are 0 - None, 1 - Emergency, 2 - Alert, 3 - Critical, 4 - Error, 5 - Warning, | ||
1842 | +6 - Notice, 7 - Info, 8 - Debug, 9 - Trace | ||
1843 | + | ||
1844 | +*logfile* is a commandline option to mention log file path which helps in | ||
1845 | +logging to the specified file and also help in persisting the gfapi logs. The | ||
1846 | +default is stderr. | ||
1847 | + | ||
1848 | +You can create a GlusterFS disk image with the command: | ||
1849 | + | ||
1850 | +.. parsed-literal:: | ||
1851 | + | ||
1852 | + qemu-img create gluster://HOST/VOLUME/PATH SIZE | ||
1853 | + | ||
1854 | +Examples | ||
1855 | + | ||
1856 | +.. parsed-literal:: | ||
1857 | + | ||
1858 | + |qemu_system| -drive file=gluster://1.2.3.4/testvol/a.img | ||
1859 | + |qemu_system| -drive file=gluster+tcp://1.2.3.4/testvol/a.img | ||
1860 | + |qemu_system| -drive file=gluster+tcp://1.2.3.4:24007/testvol/dir/a.img | ||
1861 | + |qemu_system| -drive file=gluster+tcp://[1:2:3:4:5:6:7:8]/testvol/dir/a.img | ||
1862 | + |qemu_system| -drive file=gluster+tcp://[1:2:3:4:5:6:7:8]:24007/testvol/dir/a.img | ||
1863 | + |qemu_system| -drive file=gluster+tcp://server.domain.com:24007/testvol/dir/a.img | ||
1864 | + |qemu_system| -drive file=gluster+unix:///testvol/dir/a.img?socket=/tmp/glusterd.socket | ||
1865 | + |qemu_system| -drive file=gluster+rdma://1.2.3.4:24007/testvol/a.img | ||
1866 | + |qemu_system| -drive file=gluster://1.2.3.4/testvol/a.img,file.debug=9,file.logfile=/var/log/qemu-gluster.log | ||
1867 | + |qemu_system| 'json:{"driver":"qcow2", | ||
1868 | + "file":{"driver":"gluster", | ||
1869 | + "volume":"testvol","path":"a.img", | ||
1870 | + "debug":9,"logfile":"/var/log/qemu-gluster.log", | ||
1871 | + "server":[{"type":"tcp","host":"1.2.3.4","port":24007}, | ||
1872 | + {"type":"unix","socket":"/var/run/glusterd.socket"}]}}' | ||
1873 | + |qemu_system| -drive driver=qcow2,file.driver=gluster,file.volume=testvol,file.path=/path/a.img, | ||
1874 | + file.debug=9,file.logfile=/var/log/qemu-gluster.log, | ||
1875 | + file.server.0.type=tcp,file.server.0.host=1.2.3.4,file.server.0.port=24007, | ||
1876 | + file.server.1.type=unix,file.server.1.socket=/var/run/glusterd.socket | ||
1877 | + | ||
1878 | +Secure Shell (ssh) disk images | ||
1879 | +------------------------------ | ||
1880 | + | ||
1881 | +You can access disk images located on a remote ssh server | ||
1882 | +by using the ssh protocol: | ||
1883 | + | ||
1884 | +.. parsed-literal:: | ||
1885 | + | ||
1886 | + |qemu_system| -drive file=ssh://[USER@]SERVER[:PORT]/PATH[?host_key_check=HOST_KEY_CHECK] | ||
1887 | + | ||
1888 | +Alternative syntax using properties: | ||
1889 | + | ||
1890 | +.. parsed-literal:: | ||
1891 | + | ||
1892 | + |qemu_system| -drive file.driver=ssh[,file.user=USER],file.host=SERVER[,file.port=PORT],file.path=PATH[,file.host_key_check=HOST_KEY_CHECK] | ||
1893 | + | ||
1894 | +*ssh* is the protocol. | ||
1895 | + | ||
1896 | +*USER* is the remote user. If not specified, then the local | ||
1897 | +username is tried. | ||
1898 | + | ||
1899 | +*SERVER* specifies the remote ssh server. Any ssh server can be | ||
1900 | +used, but it must implement the sftp-server protocol. Most Unix/Linux | ||
1901 | +systems should work without requiring any extra configuration. | ||
1902 | + | ||
1903 | +*PORT* is the port number on which sshd is listening. By default | ||
1904 | +the standard ssh port (22) is used. | ||
1905 | + | ||
1906 | +*PATH* is the path to the disk image. | ||
1907 | + | ||
1908 | +The optional *HOST_KEY_CHECK* parameter controls how the remote | ||
1909 | +host's key is checked. The default is ``yes`` which means to use | ||
1910 | +the local ``.ssh/known_hosts`` file. Setting this to ``no`` | ||
1911 | +turns off known-hosts checking. Or you can check that the host key | ||
1912 | +matches a specific fingerprint: | ||
1913 | +``host_key_check=md5:78:45:8e:14:57:4f:d5:45:83:0a:0e:f3:49:82:c9:c8`` | ||
1914 | +(``sha1:`` can also be used as a prefix, but note that OpenSSH | ||
1915 | +tools only use MD5 to print fingerprints). | ||
1916 | + | ||
1917 | +Currently authentication must be done using ssh-agent. Other | ||
1918 | +authentication methods may be supported in future. | ||
1919 | + | ||
1920 | +Note: Many ssh servers do not support an ``fsync``-style operation. | ||
1921 | +The ssh driver cannot guarantee that disk flush requests are | ||
1922 | +obeyed, and this causes a risk of disk corruption if the remote | ||
1923 | +server or network goes down during writes. The driver will | ||
1924 | +print a warning when ``fsync`` is not supported: | ||
1925 | + | ||
1926 | +:: | ||
1927 | + | ||
1928 | + warning: ssh server ssh.example.com:22 does not support fsync | ||
1929 | + | ||
1930 | +With sufficiently new versions of libssh and OpenSSH, ``fsync`` is | ||
1931 | +supported. | ||
1932 | + | ||
1933 | +NVMe disk images | ||
1934 | +---------------- | ||
1935 | + | ||
1936 | +NVM Express (NVMe) storage controllers can be accessed directly by a userspace | ||
1937 | +driver in QEMU. This bypasses the host kernel file system and block layers | ||
1938 | +while retaining QEMU block layer functionalities, such as block jobs, I/O | ||
1939 | +throttling, image formats, etc. Disk I/O performance is typically higher than | ||
1940 | +with ``-drive file=/dev/sda`` using either thread pool or linux-aio. | ||
1941 | + | ||
1942 | +The controller will be exclusively used by the QEMU process once started. To be | ||
1943 | +able to share storage between multiple VMs and other applications on the host, | ||
1944 | +please use the file based protocols. | ||
1945 | + | ||
1946 | +Before starting QEMU, bind the host NVMe controller to the host vfio-pci | ||
1947 | +driver. For example: | ||
1948 | + | ||
1949 | +.. parsed-literal:: | ||
1950 | + | ||
1951 | + # modprobe vfio-pci | ||
1952 | + # lspci -n -s 0000:06:0d.0 | ||
1953 | + 06:0d.0 0401: 1102:0002 (rev 08) | ||
1954 | + # echo 0000:06:0d.0 > /sys/bus/pci/devices/0000:06:0d.0/driver/unbind | ||
1955 | + # echo 1102 0002 > /sys/bus/pci/drivers/vfio-pci/new_id | ||
1956 | + | ||
1957 | + # |qemu_system| -drive file=nvme://HOST:BUS:SLOT.FUNC/NAMESPACE | ||
1958 | + | ||
1959 | +Alternative syntax using properties: | ||
1960 | + | ||
1961 | +.. parsed-literal:: | ||
1962 | + | ||
1963 | + |qemu_system| -drive file.driver=nvme,file.device=HOST:BUS:SLOT.FUNC,file.namespace=NAMESPACE | ||
1964 | + | ||
1965 | +*HOST*:*BUS*:*SLOT*.\ *FUNC* is the NVMe controller's PCI device | ||
1966 | +address on the host. | ||
1967 | + | ||
1968 | +*NAMESPACE* is the NVMe namespace number, starting from 1. | ||
1969 | + | ||
1970 | +Disk image file locking | ||
1971 | +----------------------- | ||
1972 | + | ||
1973 | +By default, QEMU tries to protect image files from unexpected concurrent | ||
1974 | +access, as long as it's supported by the block protocol driver and host | ||
1975 | +operating system. If multiple QEMU processes (including QEMU emulators and | ||
1976 | +utilities) try to open the same image with conflicting accessing modes, all but | ||
1977 | +the first one will get an error. | ||
1978 | + | ||
1979 | +This feature is currently supported by the file protocol on Linux with the Open | ||
1980 | +File Descriptor (OFD) locking API, and can be configured to fall back to POSIX | ||
1981 | +locking if the POSIX host doesn't support Linux OFD locking. | ||
1982 | + | ||
1983 | +To explicitly enable image locking, specify "locking=on" in the file protocol | ||
1984 | +driver options. If OFD locking is not possible, a warning will be printed and | ||
1985 | +the POSIX locking API will be used. In this case there is a risk that the lock | ||
1986 | +will get silently lost when doing hot plugging and block jobs, due to the | ||
1987 | +shortcomings of the POSIX locking API. | ||
1988 | + | ||
1989 | +QEMU transparently handles lock handover during shared storage migration. For | ||
1990 | +shared virtual disk images between multiple VMs, the "share-rw" device option | ||
1991 | +should be used. | ||
1992 | + | ||
1993 | +By default, the guest has exclusive write access to its disk image. If the | ||
1994 | +guest can safely share the disk image with other writers the | ||
1995 | +``-device ...,share-rw=on`` parameter can be used. This is only safe if | ||
1996 | +the guest is running software, such as a cluster file system, that | ||
1997 | +coordinates disk accesses to avoid corruption. | ||
1998 | + | ||
1999 | +Note that share-rw=on only declares the guest's ability to share the disk. | ||
2000 | +Some QEMU features, such as image file formats, require exclusive write access | ||
2001 | +to the disk image and this is unaffected by the share-rw=on option. | ||
2002 | + | ||
2003 | +Alternatively, locking can be fully disabled by "locking=off" block device | ||
2004 | +option. In the command line, the option is usually in the form of | ||
2005 | +"file.locking=off" as the protocol driver is normally placed as a "file" child | ||
2006 | +under a format driver. For example: | ||
2007 | + | ||
2008 | +:: | ||
2009 | + | ||
2010 | + -blockdev driver=qcow2,file.filename=/path/to/image,file.locking=off,file.driver=file | ||
2011 | + | ||
2012 | +To check if image locking is active, check the output of the "lslocks" command | ||
2013 | +on host and see if there are locks held by the QEMU process on the image file. | ||
2014 | +More than one byte could be locked by the QEMU instance, each byte of which | ||
2015 | +reflects a particular permission that is acquired or protected by the running | ||
2016 | +block driver. | ||
2017 | + | ||
2018 | +.. only:: man | ||
2019 | + | ||
2020 | + See also | ||
2021 | + -------- | ||
2022 | + | ||
2023 | + The HTML documentation of QEMU for more precise information and Linux | ||
2024 | + user mode emulator invocation. | ||
2025 | diff --git a/qemu-doc.texi b/qemu-doc.texi | ||
2026 | index XXXXXXX..XXXXXXX 100644 | ||
2027 | --- a/qemu-doc.texi | ||
2028 | +++ b/qemu-doc.texi | ||
2029 | @@ -XXX,XX +XXX,XX @@ encrypted disk images. | ||
2030 | * disk_images_snapshot_mode:: Snapshot mode | ||
2031 | * vm_snapshots:: VM snapshots | ||
2032 | * qemu_img_invocation:: qemu-img Invocation | ||
2033 | -* disk_images_formats:: Disk image file formats | ||
2034 | -* host_drives:: Using host drives | ||
2035 | -* disk_images_fat_images:: Virtual FAT disk images | ||
2036 | -* disk_images_nbd:: NBD access | ||
2037 | -* disk_images_sheepdog:: Sheepdog disk images | ||
2038 | -* disk_images_iscsi:: iSCSI LUNs | ||
2039 | -* disk_images_gluster:: GlusterFS disk images | ||
2040 | -* disk_images_ssh:: Secure Shell (ssh) disk images | ||
2041 | -* disk_images_nvme:: NVMe userspace driver | ||
2042 | -* disk_image_locking:: Disk image file locking | ||
2043 | @end menu | ||
2044 | |||
2045 | @node disk_images_quickstart | ||
2046 | @@ -XXX,XX +XXX,XX @@ state is not saved or restored properly (in particular USB). | ||
2047 | |||
2048 | @include qemu-img.texi | ||
2049 | |||
2050 | -@include docs/qemu-block-drivers.texi | ||
2051 | - | ||
2052 | @node pcsys_network | ||
2053 | @section Network emulation | ||
2054 | |||
2055 | diff --git a/qemu-options.hx b/qemu-options.hx | ||
2056 | index XXXXXXX..XXXXXXX 100644 | ||
2057 | --- a/qemu-options.hx | ||
2058 | +++ b/qemu-options.hx | ||
2059 | @@ -XXX,XX +XXX,XX @@ STEXI | ||
2060 | @findex -cdrom | ||
2061 | Use @var{file} as CD-ROM image (you cannot use @option{-hdc} and | ||
2062 | @option{-cdrom} at the same time). You can use the host CD-ROM by | ||
2063 | -using @file{/dev/cdrom} as filename (@pxref{host_drives}). | ||
2064 | +using @file{/dev/cdrom} as filename. | ||
2065 | ETEXI | ||
2066 | |||
2067 | DEF("blockdev", HAS_ARG, QEMU_OPTION_blockdev, | ||
107 | -- | 2068 | -- |
108 | 2.16.1 | 2069 | 2.20.1 |
109 | 2070 | ||
110 | 2071 | diff view generated by jsdifflib |
1 | From: Richard Henderson <richard.henderson@linaro.org> | 1 | From: Andrew Jones <drjones@redhat.com> |
---|---|---|---|
2 | 2 | ||
3 | This also makes sure that we get the correct ordering of | 3 | When dumping a guest with dump-guest-memory also dump the SVE |
4 | SVE vs FP exceptions. | 4 | registers if they are in use. |
5 | 5 | ||
6 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | 6 | Signed-off-by: Andrew Jones <drjones@redhat.com> |
7 | Message-id: 20180211205848.4568-5-richard.henderson@linaro.org | 7 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> |
8 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | 8 | Message-id: 20200120101832.18781-1-drjones@redhat.com |
9 | [PMM: fixed checkpatch nits] | ||
9 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 10 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
10 | --- | 11 | --- |
11 | target/arm/cpu.h | 3 ++- | 12 | include/elf.h | 1 + |
12 | target/arm/internals.h | 6 ++++++ | 13 | target/arm/cpu.h | 25 +++++++++ |
13 | target/arm/helper.c | 22 ++++------------------ | 14 | target/arm/arch_dump.c | 124 ++++++++++++++++++++++++++++++++++++++++- |
14 | target/arm/translate-a64.c | 16 ++++++++++++++++ | 15 | target/arm/kvm64.c | 24 -------- |
15 | 4 files changed, 28 insertions(+), 19 deletions(-) | 16 | 4 files changed, 148 insertions(+), 26 deletions(-) |
16 | 17 | ||
18 | diff --git a/include/elf.h b/include/elf.h | ||
19 | index XXXXXXX..XXXXXXX 100644 | ||
20 | --- a/include/elf.h | ||
21 | +++ b/include/elf.h | ||
22 | @@ -XXX,XX +XXX,XX @@ typedef struct elf64_shdr { | ||
23 | #define NT_ARM_HW_BREAK 0x402 /* ARM hardware breakpoint registers */ | ||
24 | #define NT_ARM_HW_WATCH 0x403 /* ARM hardware watchpoint registers */ | ||
25 | #define NT_ARM_SYSTEM_CALL 0x404 /* ARM system call number */ | ||
26 | +#define NT_ARM_SVE 0x405 /* ARM Scalable Vector Extension regs */ | ||
27 | |||
28 | /* | ||
29 | * Physical entry point into the kernel. | ||
17 | diff --git a/target/arm/cpu.h b/target/arm/cpu.h | 30 | diff --git a/target/arm/cpu.h b/target/arm/cpu.h |
18 | index XXXXXXX..XXXXXXX 100644 | 31 | index XXXXXXX..XXXXXXX 100644 |
19 | --- a/target/arm/cpu.h | 32 | --- a/target/arm/cpu.h |
20 | +++ b/target/arm/cpu.h | 33 | +++ b/target/arm/cpu.h |
21 | @@ -XXX,XX +XXX,XX @@ static inline uint64_t cpreg_to_kvm_id(uint32_t cpregid) | 34 | @@ -XXX,XX +XXX,XX @@ void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq); |
22 | #define ARM_CP_DC_ZVA (ARM_CP_SPECIAL | 0x0500) | 35 | void aarch64_sve_change_el(CPUARMState *env, int old_el, |
23 | #define ARM_LAST_SPECIAL ARM_CP_DC_ZVA | 36 | int new_el, bool el0_a64); |
24 | #define ARM_CP_FPU 0x1000 | 37 | void aarch64_add_sve_properties(Object *obj); |
25 | +#define ARM_CP_SVE 0x2000 | 38 | + |
26 | /* Used only as a terminator for ARMCPRegInfo lists */ | 39 | +/* |
27 | #define ARM_CP_SENTINEL 0xffff | 40 | + * SVE registers are encoded in KVM's memory in an endianness-invariant format. |
28 | /* Mask of only the flag bits in a type field */ | 41 | + * The byte at offset i from the start of the in-memory representation contains |
29 | -#define ARM_CP_FLAG_MASK 0x10ff | 42 | + * the bits [(7 + 8 * i) : (8 * i)] of the register value. As this means the |
30 | +#define ARM_CP_FLAG_MASK 0x30ff | 43 | + * lowest offsets are stored in the lowest memory addresses, then that nearly |
31 | 44 | + * matches QEMU's representation, which is to use an array of host-endian | |
32 | /* Valid values for ARMCPRegInfo state field, indicating which of | 45 | + * uint64_t's, where the lower offsets are at the lower indices. To complete |
33 | * the AArch32 and AArch64 execution states this register is visible in. | 46 | + * the translation we just need to byte swap the uint64_t's on big-endian hosts. |
34 | diff --git a/target/arm/internals.h b/target/arm/internals.h | 47 | + */ |
35 | index XXXXXXX..XXXXXXX 100644 | 48 | +static inline uint64_t *sve_bswap64(uint64_t *dst, uint64_t *src, int nr) |
36 | --- a/target/arm/internals.h | 49 | +{ |
37 | +++ b/target/arm/internals.h | 50 | +#ifdef HOST_WORDS_BIGENDIAN |
38 | @@ -XXX,XX +XXX,XX @@ enum arm_exception_class { | 51 | + int i; |
39 | EC_AA64_HVC = 0x16, | 52 | + |
40 | EC_AA64_SMC = 0x17, | 53 | + for (i = 0; i < nr; ++i) { |
41 | EC_SYSTEMREGISTERTRAP = 0x18, | 54 | + dst[i] = bswap64(src[i]); |
42 | + EC_SVEACCESSTRAP = 0x19, | 55 | + } |
43 | EC_INSNABORT = 0x20, | 56 | + |
44 | EC_INSNABORT_SAME_EL = 0x21, | 57 | + return dst; |
45 | EC_PCALIGNMENT = 0x22, | 58 | +#else |
46 | @@ -XXX,XX +XXX,XX @@ static inline uint32_t syn_fp_access_trap(int cv, int cond, bool is_16bit) | 59 | + return src; |
47 | | (cv << 24) | (cond << 20); | 60 | +#endif |
48 | } | 61 | +} |
49 | 62 | + | |
50 | +static inline uint32_t syn_sve_access_trap(void) | 63 | #else |
51 | +{ | 64 | static inline void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq) { } |
52 | + return EC_SVEACCESSTRAP << ARM_EL_EC_SHIFT; | 65 | static inline void aarch64_sve_change_el(CPUARMState *env, int o, |
53 | +} | 66 | diff --git a/target/arm/arch_dump.c b/target/arm/arch_dump.c |
54 | + | 67 | index XXXXXXX..XXXXXXX 100644 |
55 | static inline uint32_t syn_insn_abort(int same_el, int ea, int s1ptw, int fsc) | 68 | --- a/target/arm/arch_dump.c |
56 | { | 69 | +++ b/target/arm/arch_dump.c |
57 | return (EC_INSNABORT << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT) | 70 | @@ -XXX,XX +XXX,XX @@ struct aarch64_user_vfp_state { |
58 | diff --git a/target/arm/helper.c b/target/arm/helper.c | 71 | |
59 | index XXXXXXX..XXXXXXX 100644 | 72 | QEMU_BUILD_BUG_ON(sizeof(struct aarch64_user_vfp_state) != 528); |
60 | --- a/target/arm/helper.c | 73 | |
61 | +++ b/target/arm/helper.c | 74 | +/* struct user_sve_header from arch/arm64/include/uapi/asm/ptrace.h */ |
62 | @@ -XXX,XX +XXX,XX @@ static int sve_exception_el(CPUARMState *env) | 75 | +struct aarch64_user_sve_header { |
76 | + uint32_t size; | ||
77 | + uint32_t max_size; | ||
78 | + uint16_t vl; | ||
79 | + uint16_t max_vl; | ||
80 | + uint16_t flags; | ||
81 | + uint16_t reserved; | ||
82 | +} QEMU_PACKED; | ||
83 | + | ||
84 | struct aarch64_note { | ||
85 | Elf64_Nhdr hdr; | ||
86 | char name[8]; /* align_up(sizeof("CORE"), 4) */ | ||
87 | union { | ||
88 | struct aarch64_elf_prstatus prstatus; | ||
89 | struct aarch64_user_vfp_state vfp; | ||
90 | + struct aarch64_user_sve_header sve; | ||
91 | }; | ||
92 | } QEMU_PACKED; | ||
93 | |||
94 | @@ -XXX,XX +XXX,XX @@ struct aarch64_note { | ||
95 | (AARCH64_NOTE_HEADER_SIZE + sizeof(struct aarch64_elf_prstatus)) | ||
96 | #define AARCH64_PRFPREG_NOTE_SIZE \ | ||
97 | (AARCH64_NOTE_HEADER_SIZE + sizeof(struct aarch64_user_vfp_state)) | ||
98 | +#define AARCH64_SVE_NOTE_SIZE(env) \ | ||
99 | + (AARCH64_NOTE_HEADER_SIZE + sve_size(env)) | ||
100 | |||
101 | static void aarch64_note_init(struct aarch64_note *note, DumpState *s, | ||
102 | const char *name, Elf64_Word namesz, | ||
103 | @@ -XXX,XX +XXX,XX @@ static int aarch64_write_elf64_prfpreg(WriteCoreDumpFunction f, | ||
63 | return 0; | 104 | return 0; |
64 | } | 105 | } |
65 | 106 | ||
66 | -static CPAccessResult zcr_access(CPUARMState *env, const ARMCPRegInfo *ri, | 107 | +#ifdef TARGET_AARCH64 |
67 | - bool isread) | 108 | +static off_t sve_zreg_offset(uint32_t vq, int n) |
109 | +{ | ||
110 | + off_t off = sizeof(struct aarch64_user_sve_header); | ||
111 | + return ROUND_UP(off, 16) + vq * 16 * n; | ||
112 | +} | ||
113 | + | ||
114 | +static off_t sve_preg_offset(uint32_t vq, int n) | ||
115 | +{ | ||
116 | + return sve_zreg_offset(vq, 32) + vq * 16 / 8 * n; | ||
117 | +} | ||
118 | + | ||
119 | +static off_t sve_fpsr_offset(uint32_t vq) | ||
120 | +{ | ||
121 | + off_t off = sve_preg_offset(vq, 17); | ||
122 | + return ROUND_UP(off, 16); | ||
123 | +} | ||
124 | + | ||
125 | +static off_t sve_fpcr_offset(uint32_t vq) | ||
126 | +{ | ||
127 | + return sve_fpsr_offset(vq) + sizeof(uint32_t); | ||
128 | +} | ||
129 | + | ||
130 | +static uint32_t sve_current_vq(CPUARMState *env) | ||
131 | +{ | ||
132 | + return sve_zcr_len_for_el(env, arm_current_el(env)) + 1; | ||
133 | +} | ||
134 | + | ||
135 | +static size_t sve_size_vq(uint32_t vq) | ||
136 | +{ | ||
137 | + off_t off = sve_fpcr_offset(vq) + sizeof(uint32_t); | ||
138 | + return ROUND_UP(off, 16); | ||
139 | +} | ||
140 | + | ||
141 | +static size_t sve_size(CPUARMState *env) | ||
142 | +{ | ||
143 | + return sve_size_vq(sve_current_vq(env)); | ||
144 | +} | ||
145 | + | ||
146 | +static int aarch64_write_elf64_sve(WriteCoreDumpFunction f, | ||
147 | + CPUARMState *env, int cpuid, | ||
148 | + DumpState *s) | ||
149 | +{ | ||
150 | + struct aarch64_note *note; | ||
151 | + ARMCPU *cpu = env_archcpu(env); | ||
152 | + uint32_t vq = sve_current_vq(env); | ||
153 | + uint64_t tmp[ARM_MAX_VQ * 2], *r; | ||
154 | + uint32_t fpr; | ||
155 | + uint8_t *buf; | ||
156 | + int ret, i; | ||
157 | + | ||
158 | + note = g_malloc0(AARCH64_SVE_NOTE_SIZE(env)); | ||
159 | + buf = (uint8_t *)¬e->sve; | ||
160 | + | ||
161 | + aarch64_note_init(note, s, "LINUX", 6, NT_ARM_SVE, sve_size_vq(vq)); | ||
162 | + | ||
163 | + note->sve.size = cpu_to_dump32(s, sve_size_vq(vq)); | ||
164 | + note->sve.max_size = cpu_to_dump32(s, sve_size_vq(cpu->sve_max_vq)); | ||
165 | + note->sve.vl = cpu_to_dump16(s, vq * 16); | ||
166 | + note->sve.max_vl = cpu_to_dump16(s, cpu->sve_max_vq * 16); | ||
167 | + note->sve.flags = cpu_to_dump16(s, 1); | ||
168 | + | ||
169 | + for (i = 0; i < 32; ++i) { | ||
170 | + r = sve_bswap64(tmp, &env->vfp.zregs[i].d[0], vq * 2); | ||
171 | + memcpy(&buf[sve_zreg_offset(vq, i)], r, vq * 16); | ||
172 | + } | ||
173 | + | ||
174 | + for (i = 0; i < 17; ++i) { | ||
175 | + r = sve_bswap64(tmp, r = &env->vfp.pregs[i].p[0], | ||
176 | + DIV_ROUND_UP(vq * 2, 8)); | ||
177 | + memcpy(&buf[sve_preg_offset(vq, i)], r, vq * 16 / 8); | ||
178 | + } | ||
179 | + | ||
180 | + fpr = cpu_to_dump32(s, vfp_get_fpsr(env)); | ||
181 | + memcpy(&buf[sve_fpsr_offset(vq)], &fpr, sizeof(uint32_t)); | ||
182 | + | ||
183 | + fpr = cpu_to_dump32(s, vfp_get_fpcr(env)); | ||
184 | + memcpy(&buf[sve_fpcr_offset(vq)], &fpr, sizeof(uint32_t)); | ||
185 | + | ||
186 | + ret = f(note, AARCH64_SVE_NOTE_SIZE(env), s); | ||
187 | + g_free(note); | ||
188 | + | ||
189 | + if (ret < 0) { | ||
190 | + return -1; | ||
191 | + } | ||
192 | + | ||
193 | + return 0; | ||
194 | +} | ||
195 | +#endif | ||
196 | + | ||
197 | int arm_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs, | ||
198 | int cpuid, void *opaque) | ||
199 | { | ||
200 | struct aarch64_note note; | ||
201 | - CPUARMState *env = &ARM_CPU(cs)->env; | ||
202 | + ARMCPU *cpu = ARM_CPU(cs); | ||
203 | + CPUARMState *env = &cpu->env; | ||
204 | DumpState *s = opaque; | ||
205 | uint64_t pstate, sp; | ||
206 | int ret, i; | ||
207 | @@ -XXX,XX +XXX,XX @@ int arm_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs, | ||
208 | return -1; | ||
209 | } | ||
210 | |||
211 | - return aarch64_write_elf64_prfpreg(f, env, cpuid, s); | ||
212 | + ret = aarch64_write_elf64_prfpreg(f, env, cpuid, s); | ||
213 | + if (ret) { | ||
214 | + return ret; | ||
215 | + } | ||
216 | + | ||
217 | +#ifdef TARGET_AARCH64 | ||
218 | + if (cpu_isar_feature(aa64_sve, cpu)) { | ||
219 | + ret = aarch64_write_elf64_sve(f, env, cpuid, s); | ||
220 | + } | ||
221 | +#endif | ||
222 | + | ||
223 | + return ret; | ||
224 | } | ||
225 | |||
226 | /* struct pt_regs from arch/arm/include/asm/ptrace.h */ | ||
227 | @@ -XXX,XX +XXX,XX @@ ssize_t cpu_get_note_size(int class, int machine, int nr_cpus) | ||
228 | if (class == ELFCLASS64) { | ||
229 | note_size = AARCH64_PRSTATUS_NOTE_SIZE; | ||
230 | note_size += AARCH64_PRFPREG_NOTE_SIZE; | ||
231 | +#ifdef TARGET_AARCH64 | ||
232 | + if (cpu_isar_feature(aa64_sve, cpu)) { | ||
233 | + note_size += AARCH64_SVE_NOTE_SIZE(env); | ||
234 | + } | ||
235 | +#endif | ||
236 | } else { | ||
237 | note_size = ARM_PRSTATUS_NOTE_SIZE; | ||
238 | if (arm_feature(env, ARM_FEATURE_VFP)) { | ||
239 | diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c | ||
240 | index XXXXXXX..XXXXXXX 100644 | ||
241 | --- a/target/arm/kvm64.c | ||
242 | +++ b/target/arm/kvm64.c | ||
243 | @@ -XXX,XX +XXX,XX @@ static int kvm_arch_put_fpsimd(CPUState *cs) | ||
244 | return 0; | ||
245 | } | ||
246 | |||
247 | -/* | ||
248 | - * SVE registers are encoded in KVM's memory in an endianness-invariant format. | ||
249 | - * The byte at offset i from the start of the in-memory representation contains | ||
250 | - * the bits [(7 + 8 * i) : (8 * i)] of the register value. As this means the | ||
251 | - * lowest offsets are stored in the lowest memory addresses, then that nearly | ||
252 | - * matches QEMU's representation, which is to use an array of host-endian | ||
253 | - * uint64_t's, where the lower offsets are at the lower indices. To complete | ||
254 | - * the translation we just need to byte swap the uint64_t's on big-endian hosts. | ||
255 | - */ | ||
256 | -static uint64_t *sve_bswap64(uint64_t *dst, uint64_t *src, int nr) | ||
68 | -{ | 257 | -{ |
69 | - switch (sve_exception_el(env)) { | 258 | -#ifdef HOST_WORDS_BIGENDIAN |
70 | - case 3: | 259 | - int i; |
71 | - return CP_ACCESS_TRAP_EL3; | 260 | - |
72 | - case 2: | 261 | - for (i = 0; i < nr; ++i) { |
73 | - return CP_ACCESS_TRAP_EL2; | 262 | - dst[i] = bswap64(src[i]); |
74 | - case 1: | ||
75 | - return CP_ACCESS_TRAP; | ||
76 | - } | 263 | - } |
77 | - return CP_ACCESS_OK; | 264 | - |
265 | - return dst; | ||
266 | -#else | ||
267 | - return src; | ||
268 | -#endif | ||
78 | -} | 269 | -} |
79 | - | 270 | - |
80 | static void zcr_write(CPUARMState *env, const ARMCPRegInfo *ri, | ||
81 | uint64_t value) | ||
82 | { | ||
83 | @@ -XXX,XX +XXX,XX @@ static void zcr_write(CPUARMState *env, const ARMCPRegInfo *ri, | ||
84 | static const ARMCPRegInfo zcr_el1_reginfo = { | ||
85 | .name = "ZCR_EL1", .state = ARM_CP_STATE_AA64, | ||
86 | .opc0 = 3, .opc1 = 0, .crn = 1, .crm = 2, .opc2 = 0, | ||
87 | - .access = PL1_RW, .accessfn = zcr_access, | ||
88 | + .access = PL1_RW, .type = ARM_CP_SVE | ARM_CP_FPU, | ||
89 | .fieldoffset = offsetof(CPUARMState, vfp.zcr_el[1]), | ||
90 | .writefn = zcr_write, .raw_writefn = raw_write | ||
91 | }; | ||
92 | @@ -XXX,XX +XXX,XX @@ static const ARMCPRegInfo zcr_el1_reginfo = { | ||
93 | static const ARMCPRegInfo zcr_el2_reginfo = { | ||
94 | .name = "ZCR_EL2", .state = ARM_CP_STATE_AA64, | ||
95 | .opc0 = 3, .opc1 = 4, .crn = 1, .crm = 2, .opc2 = 0, | ||
96 | - .access = PL2_RW, .accessfn = zcr_access, | ||
97 | + .access = PL2_RW, .type = ARM_CP_SVE | ARM_CP_FPU, | ||
98 | .fieldoffset = offsetof(CPUARMState, vfp.zcr_el[2]), | ||
99 | .writefn = zcr_write, .raw_writefn = raw_write | ||
100 | }; | ||
101 | @@ -XXX,XX +XXX,XX @@ static const ARMCPRegInfo zcr_el2_reginfo = { | ||
102 | static const ARMCPRegInfo zcr_no_el2_reginfo = { | ||
103 | .name = "ZCR_EL2", .state = ARM_CP_STATE_AA64, | ||
104 | .opc0 = 3, .opc1 = 4, .crn = 1, .crm = 2, .opc2 = 0, | ||
105 | - .access = PL2_RW, | ||
106 | + .access = PL2_RW, .type = ARM_CP_SVE | ARM_CP_FPU, | ||
107 | .readfn = arm_cp_read_zero, .writefn = arm_cp_write_ignore | ||
108 | }; | ||
109 | |||
110 | static const ARMCPRegInfo zcr_el3_reginfo = { | ||
111 | .name = "ZCR_EL3", .state = ARM_CP_STATE_AA64, | ||
112 | .opc0 = 3, .opc1 = 6, .crn = 1, .crm = 2, .opc2 = 0, | ||
113 | - .access = PL3_RW, .accessfn = zcr_access, | ||
114 | + .access = PL3_RW, .type = ARM_CP_SVE | ARM_CP_FPU, | ||
115 | .fieldoffset = offsetof(CPUARMState, vfp.zcr_el[3]), | ||
116 | .writefn = zcr_write, .raw_writefn = raw_write | ||
117 | }; | ||
118 | diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c | ||
119 | index XXXXXXX..XXXXXXX 100644 | ||
120 | --- a/target/arm/translate-a64.c | ||
121 | +++ b/target/arm/translate-a64.c | ||
122 | @@ -XXX,XX +XXX,XX @@ static inline bool fp_access_check(DisasContext *s) | ||
123 | return false; | ||
124 | } | ||
125 | |||
126 | +/* Check that SVE access is enabled. If it is, return true. | ||
127 | + * If not, emit code to generate an appropriate exception and return false. | ||
128 | + */ | ||
129 | +static inline bool sve_access_check(DisasContext *s) | ||
130 | +{ | ||
131 | + if (s->sve_excp_el) { | ||
132 | + gen_exception_insn(s, 4, EXCP_UDEF, syn_sve_access_trap(), | ||
133 | + s->sve_excp_el); | ||
134 | + return false; | ||
135 | + } | ||
136 | + return true; | ||
137 | +} | ||
138 | + | ||
139 | /* | 271 | /* |
140 | * This utility function is for doing register extension with an | 272 | * KVM SVE registers come in slices where ZREGs have a slice size of 2048 bits |
141 | * optional shift. You will likely want to pass a temporary for the | 273 | * and PREGS and the FFR have a slice size of 256 bits. However we simply hard |
142 | @@ -XXX,XX +XXX,XX @@ static void handle_sys(DisasContext *s, uint32_t insn, bool isread, | ||
143 | default: | ||
144 | break; | ||
145 | } | ||
146 | + if ((ri->type & ARM_CP_SVE) && !sve_access_check(s)) { | ||
147 | + return; | ||
148 | + } | ||
149 | if ((ri->type & ARM_CP_FPU) && !fp_access_check(s)) { | ||
150 | return; | ||
151 | } | ||
152 | -- | 274 | -- |
153 | 2.16.1 | 275 | 2.20.1 |
154 | 276 | ||
155 | 277 | diff view generated by jsdifflib |
1 | From: Philippe Mathieu-Daudé <f4bug@amsat.org> | 1 | From: Philippe Mathieu-Daudé <f4bug@amsat.org> |
---|---|---|---|
2 | 2 | ||
3 | (qemu) info mtree | 3 | Missed in 870c034da0b, hopefully reported by Coverity. |
4 | address-space: cpu-memory-0 | ||
5 | 0000000000000000-ffffffffffffffff (prio 0, i/o): system | ||
6 | 0000000000000000-0000000007ffffff (prio 0, rom): aspeed.boot_rom | ||
7 | 000000001e600000-000000001e7fffff (prio -1, i/o): aspeed_soc.io | ||
8 | - 000000001e784000-000000001e78401f (prio 0, i/o): serial | ||
9 | 000000001e620000-000000001e6200ff (prio 0, i/o): aspeed.smc.ast2500-fmc | ||
10 | 000000001e630000-000000001e6300ff (prio 0, i/o): aspeed.smc.ast2500-spi1 | ||
11 | [...] | ||
12 | 000000001e720000-000000001e728fff (prio 0, ram): aspeed.sram | ||
13 | 000000001e782000-000000001e782fff (prio 0, i/o): aspeed.timer | ||
14 | + 000000001e784000-000000001e78401f (prio 0, i/o): serial | ||
15 | 000000001e785000-000000001e78501f (prio 0, i/o): aspeed.wdt | ||
16 | 000000001e785020-000000001e78503f (prio 0, i/o): aspeed.wdt | ||
17 | 4 | ||
5 | Fixes: Coverity CID 1412793 (Incorrect expression) | ||
18 | Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> | 6 | Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> |
19 | Reviewed-by: Cédric Le Goater <clg@kaod.org> | 7 | Reviewed-by: Alistair Francis <alistair.francis@wdc.com> |
20 | Reviewed-by: Andrew Jeffery <andrew@aj.id.au> | 8 | Reviewed-by: Thomas Huth <thuth@redhat.com> |
21 | Message-id: 20180209085755.30414-2-f4bug@amsat.org | 9 | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> |
10 | Message-id: 20200121213853.9601-1-f4bug@amsat.org | ||
22 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 11 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
23 | --- | 12 | --- |
24 | hw/arm/aspeed_soc.c | 3 ++- | 13 | hw/misc/stm32f4xx_syscfg.c | 2 +- |
25 | 1 file changed, 2 insertions(+), 1 deletion(-) | 14 | 1 file changed, 1 insertion(+), 1 deletion(-) |
26 | 15 | ||
27 | diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c | 16 | diff --git a/hw/misc/stm32f4xx_syscfg.c b/hw/misc/stm32f4xx_syscfg.c |
28 | index XXXXXXX..XXXXXXX 100644 | 17 | index XXXXXXX..XXXXXXX 100644 |
29 | --- a/hw/arm/aspeed_soc.c | 18 | --- a/hw/misc/stm32f4xx_syscfg.c |
30 | +++ b/hw/arm/aspeed_soc.c | 19 | +++ b/hw/misc/stm32f4xx_syscfg.c |
31 | @@ -XXX,XX +XXX,XX @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) | 20 | @@ -XXX,XX +XXX,XX @@ static void stm32f4xx_syscfg_set_irq(void *opaque, int irq, int level) |
32 | /* UART - attach an 8250 to the IO space as our UART5 */ | 21 | STM32F4xxSyscfgState *s = opaque; |
33 | if (serial_hds[0]) { | 22 | int icrreg = irq / 4; |
34 | qemu_irq uart5 = qdev_get_gpio_in(DEVICE(&s->vic), uart_irqs[4]); | 23 | int startbit = (irq & 3) * 4; |
35 | - serial_mm_init(&s->iomem, ASPEED_SOC_UART_5_BASE, 2, | 24 | - uint8_t config = config = irq / 16; |
36 | + serial_mm_init(get_system_memory(), | 25 | + uint8_t config = irq / 16; |
37 | + ASPEED_SOC_IOMEM_BASE + ASPEED_SOC_UART_5_BASE, 2, | 26 | |
38 | uart5, 38400, serial_hds[0], DEVICE_LITTLE_ENDIAN); | 27 | trace_stm32f4xx_syscfg_set_irq(irq / 16, irq % 16, level); |
39 | } | ||
40 | 28 | ||
41 | -- | 29 | -- |
42 | 2.16.1 | 30 | 2.20.1 |
43 | 31 | ||
44 | 32 | diff view generated by jsdifflib |
1 | The v8M architecture includes hardware support for enforcing | 1 | From: Guenter Roeck <linux@roeck-us.net> |
---|---|---|---|
2 | stack pointer limits. We don't implement this behaviour yet, | 2 | |
3 | but provide the MSPLIM and PSPLIM stack pointer limit registers | 3 | Replace debug logging code with tracing. |
4 | as reads-as-written, so that when we do implement the checks | 4 | |
5 | in future this won't break guest migration. | 5 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> |
6 | 6 | Signed-off-by: Guenter Roeck <linux@roeck-us.net> | |
7 | Message-id: 20200123052540.6132-2-linux@roeck-us.net | ||
7 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 8 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
8 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | ||
9 | Message-id: 20180209165810.6668-12-peter.maydell@linaro.org | ||
10 | --- | 9 | --- |
11 | target/arm/cpu.h | 2 ++ | 10 | hw/dma/pl330.c | 88 ++++++++++++++++++++++++--------------------- |
12 | target/arm/helper.c | 46 ++++++++++++++++++++++++++++++++++++++++++++++ | 11 | hw/dma/trace-events | 24 +++++++++++++ |
13 | target/arm/machine.c | 21 +++++++++++++++++++++ | 12 | 2 files changed, 72 insertions(+), 40 deletions(-) |
14 | 3 files changed, 69 insertions(+) | 13 | |
15 | 14 | diff --git a/hw/dma/pl330.c b/hw/dma/pl330.c | |
16 | diff --git a/target/arm/cpu.h b/target/arm/cpu.h | ||
17 | index XXXXXXX..XXXXXXX 100644 | 15 | index XXXXXXX..XXXXXXX 100644 |
18 | --- a/target/arm/cpu.h | 16 | --- a/hw/dma/pl330.c |
19 | +++ b/target/arm/cpu.h | 17 | +++ b/hw/dma/pl330.c |
20 | @@ -XXX,XX +XXX,XX @@ typedef struct CPUARMState { | 18 | @@ -XXX,XX +XXX,XX @@ |
21 | uint32_t secure; /* Is CPU in Secure state? (not guest visible) */ | 19 | #include "sysemu/dma.h" |
22 | uint32_t csselr[M_REG_NUM_BANKS]; | 20 | #include "qemu/log.h" |
23 | uint32_t scr[M_REG_NUM_BANKS]; | 21 | #include "qemu/module.h" |
24 | + uint32_t msplim[M_REG_NUM_BANKS]; | 22 | +#include "trace.h" |
25 | + uint32_t psplim[M_REG_NUM_BANKS]; | 23 | |
26 | } v7m; | 24 | #ifndef PL330_ERR_DEBUG |
27 | 25 | #define PL330_ERR_DEBUG 0 | |
28 | /* Information associated with an exception about to be taken: | 26 | #endif |
29 | diff --git a/target/arm/helper.c b/target/arm/helper.c | 27 | |
30 | index XXXXXXX..XXXXXXX 100644 | 28 | -#define DB_PRINT_L(lvl, fmt, args...) do {\ |
31 | --- a/target/arm/helper.c | 29 | - if (PL330_ERR_DEBUG >= lvl) {\ |
32 | +++ b/target/arm/helper.c | 30 | - fprintf(stderr, "PL330: %s:" fmt, __func__, ## args);\ |
33 | @@ -XXX,XX +XXX,XX @@ uint32_t HELPER(v7m_mrs)(CPUARMState *env, uint32_t reg) | 31 | - } \ |
34 | return 0; | 32 | -} while (0) |
33 | - | ||
34 | -#define DB_PRINT(fmt, args...) DB_PRINT_L(1, fmt, ## args) | ||
35 | - | ||
36 | #define PL330_PERIPH_NUM 32 | ||
37 | #define PL330_MAX_BURST_LEN 128 | ||
38 | #define PL330_INSN_MAXSIZE 6 | ||
39 | @@ -XXX,XX +XXX,XX @@ typedef struct PL330InsnDesc { | ||
40 | void (*exec)(PL330Chan *, uint8_t opcode, uint8_t *args, int len); | ||
41 | } PL330InsnDesc; | ||
42 | |||
43 | +static void pl330_hexdump(uint8_t *buf, size_t size) | ||
44 | +{ | ||
45 | + unsigned int b, i, len; | ||
46 | + char tmpbuf[80]; | ||
47 | + | ||
48 | + for (b = 0; b < size; b += 16) { | ||
49 | + len = size - b; | ||
50 | + if (len > 16) { | ||
51 | + len = 16; | ||
52 | + } | ||
53 | + tmpbuf[0] = '\0'; | ||
54 | + for (i = 0; i < len; i++) { | ||
55 | + if ((i % 4) == 0) { | ||
56 | + strcat(tmpbuf, " "); | ||
57 | + } | ||
58 | + sprintf(tmpbuf + strlen(tmpbuf), " %02x", buf[b + i]); | ||
59 | + } | ||
60 | + trace_pl330_hexdump(b, tmpbuf); | ||
61 | + } | ||
62 | +} | ||
63 | |||
64 | /* MFIFO Implementation | ||
65 | * | ||
66 | @@ -XXX,XX +XXX,XX @@ static inline void pl330_queue_remove_tagged(PL330Queue *s, uint8_t tag) | ||
67 | |||
68 | static inline void pl330_fault(PL330Chan *ch, uint32_t flags) | ||
69 | { | ||
70 | - DB_PRINT("ch: %p, flags: %" PRIx32 "\n", ch, flags); | ||
71 | + trace_pl330_fault(ch, flags); | ||
72 | ch->fault_type |= flags; | ||
73 | if (ch->state == pl330_chan_fault) { | ||
74 | return; | ||
75 | @@ -XXX,XX +XXX,XX @@ static inline void pl330_fault(PL330Chan *ch, uint32_t flags) | ||
76 | ch->state = pl330_chan_fault; | ||
77 | ch->parent->num_faulting++; | ||
78 | if (ch->parent->num_faulting == 1) { | ||
79 | - DB_PRINT("abort interrupt raised\n"); | ||
80 | + trace_pl330_fault_abort(); | ||
81 | qemu_irq_raise(ch->parent->irq_abort); | ||
82 | } | ||
83 | } | ||
84 | @@ -XXX,XX +XXX,XX @@ static void pl330_dmaend(PL330Chan *ch, uint8_t opcode, | ||
85 | return; | ||
86 | } | ||
87 | } | ||
88 | - DB_PRINT("DMA ending!\n"); | ||
89 | + trace_pl330_dmaend(); | ||
90 | pl330_fifo_tagged_remove(&s->fifo, ch->tag); | ||
91 | pl330_queue_remove_tagged(&s->read_queue, ch->tag); | ||
92 | pl330_queue_remove_tagged(&s->write_queue, ch->tag); | ||
93 | @@ -XXX,XX +XXX,XX @@ static void pl330_dmago(PL330Chan *ch, uint8_t opcode, uint8_t *args, int len) | ||
94 | uint32_t pc; | ||
95 | PL330Chan *s; | ||
96 | |||
97 | - DB_PRINT("\n"); | ||
98 | + trace_pl330_dmago(); | ||
99 | |||
100 | if (!ch->is_manager) { | ||
101 | pl330_fault(ch, PL330_FAULT_UNDEF_INSTR); | ||
102 | @@ -XXX,XX +XXX,XX @@ static void pl330_dmald(PL330Chan *ch, uint8_t opcode, uint8_t *args, int len) | ||
103 | ch->stall = pl330_queue_put_insn(&ch->parent->read_queue, ch->src, | ||
104 | size, num, inc, 0, ch->tag); | ||
105 | if (!ch->stall) { | ||
106 | - DB_PRINT("channel:%" PRId8 " address:%08" PRIx32 " size:%" PRIx32 | ||
107 | - " num:%" PRId32 " %c\n", | ||
108 | - ch->tag, ch->src, size, num, inc ? 'Y' : 'N'); | ||
109 | + trace_pl330_dmald(ch->tag, ch->src, size, num, inc ? 'Y' : 'N'); | ||
110 | ch->src += inc ? size * num - (ch->src & (size - 1)) : 0; | ||
111 | } | ||
112 | } | ||
113 | @@ -XXX,XX +XXX,XX @@ static void pl330_dmakill(PL330Chan *ch, uint8_t opcode, uint8_t *args, int len) | ||
114 | ch->fault_type = 0; | ||
115 | ch->parent->num_faulting--; | ||
116 | if (ch->parent->num_faulting == 0) { | ||
117 | - DB_PRINT("abort interrupt lowered\n"); | ||
118 | + trace_pl330_dmakill(); | ||
119 | qemu_irq_lower(ch->parent->irq_abort); | ||
120 | } | ||
121 | } | ||
122 | @@ -XXX,XX +XXX,XX @@ static void pl330_dmalpend(PL330Chan *ch, uint8_t opcode, | ||
123 | uint8_t bs = opcode & 3; | ||
124 | uint8_t lc = (opcode & 4) >> 2; | ||
125 | |||
126 | + trace_pl330_dmalpend(nf, bs, lc, ch->lc[lc], ch->request_flag); | ||
127 | + | ||
128 | if (bs == 2) { | ||
129 | pl330_fault(ch, PL330_FAULT_OPERAND_INVALID); | ||
130 | return; | ||
131 | @@ -XXX,XX +XXX,XX @@ static void pl330_dmalpend(PL330Chan *ch, uint8_t opcode, | ||
132 | if (nf) { | ||
133 | ch->lc[lc]--; | ||
134 | } | ||
135 | - DB_PRINT("loop reiteration\n"); | ||
136 | + trace_pl330_dmalpiter(); | ||
137 | ch->pc -= args[0]; | ||
138 | ch->pc -= len + 1; | ||
139 | /* "ch->pc -= args[0] + len + 1" is incorrect when args[0] == 256 */ | ||
140 | } else { | ||
141 | - DB_PRINT("loop fallthrough\n"); | ||
142 | + trace_pl330_dmalpfallthrough(); | ||
143 | } | ||
144 | } | ||
145 | |||
146 | @@ -XXX,XX +XXX,XX @@ static void pl330_dmasev(PL330Chan *ch, uint8_t opcode, uint8_t *args, int len) | ||
147 | } | ||
148 | if (ch->parent->inten & (1 << ev_id)) { | ||
149 | ch->parent->int_status |= (1 << ev_id); | ||
150 | - DB_PRINT("event interrupt raised %" PRId8 "\n", ev_id); | ||
151 | + trace_pl330_dmasev_evirq(ev_id); | ||
152 | qemu_irq_raise(ch->parent->irq[ev_id]); | ||
153 | } | ||
154 | - DB_PRINT("event raised %" PRId8 "\n", ev_id); | ||
155 | + trace_pl330_dmasev_event(ev_id); | ||
156 | ch->parent->ev_status |= (1 << ev_id); | ||
157 | } | ||
158 | |||
159 | @@ -XXX,XX +XXX,XX @@ static void pl330_dmast(PL330Chan *ch, uint8_t opcode, uint8_t *args, int len) | ||
160 | ch->stall = pl330_queue_put_insn(&ch->parent->write_queue, ch->dst, | ||
161 | size, num, inc, 0, ch->tag); | ||
162 | if (!ch->stall) { | ||
163 | - DB_PRINT("channel:%" PRId8 " address:%08" PRIx32 " size:%" PRIx32 | ||
164 | - " num:%" PRId32 " %c\n", | ||
165 | - ch->tag, ch->dst, size, num, inc ? 'Y' : 'N'); | ||
166 | + trace_pl330_dmast(ch->tag, ch->dst, size, num, inc ? 'Y' : 'N'); | ||
167 | ch->dst += inc ? size * num - (ch->dst & (size - 1)) : 0; | ||
168 | } | ||
169 | } | ||
170 | @@ -XXX,XX +XXX,XX @@ static void pl330_dmawfe(PL330Chan *ch, uint8_t opcode, | ||
35 | } | 171 | } |
36 | return env->v7m.other_ss_psp; | 172 | } |
37 | + case 0x8a: /* MSPLIM_NS */ | 173 | ch->parent->ev_status &= ~(1 << ev_id); |
38 | + if (!env->v7m.secure) { | 174 | - DB_PRINT("event lowered %" PRIx8 "\n", ev_id); |
39 | + return 0; | 175 | + trace_pl330_dmawfe(ev_id); |
40 | + } | 176 | } else { |
41 | + return env->v7m.msplim[M_REG_NS]; | 177 | ch->stall = 1; |
42 | + case 0x8b: /* PSPLIM_NS */ | 178 | } |
43 | + if (!env->v7m.secure) { | 179 | @@ -XXX,XX +XXX,XX @@ static int pl330_chan_exec(PL330Chan *ch) |
44 | + return 0; | 180 | ch->stall = 0; |
45 | + } | 181 | insn = pl330_fetch_insn(ch); |
46 | + return env->v7m.psplim[M_REG_NS]; | 182 | if (!insn) { |
47 | case 0x90: /* PRIMASK_NS */ | 183 | - DB_PRINT("pl330 undefined instruction\n"); |
48 | if (!env->v7m.secure) { | 184 | + trace_pl330_chan_exec_undef(); |
49 | return 0; | 185 | pl330_fault(ch, PL330_FAULT_UNDEF_INSTR); |
50 | @@ -XXX,XX +XXX,XX @@ uint32_t HELPER(v7m_mrs)(CPUARMState *env, uint32_t reg) | ||
51 | return v7m_using_psp(env) ? env->v7m.other_sp : env->regs[13]; | ||
52 | case 9: /* PSP */ | ||
53 | return v7m_using_psp(env) ? env->regs[13] : env->v7m.other_sp; | ||
54 | + case 10: /* MSPLIM */ | ||
55 | + if (!arm_feature(env, ARM_FEATURE_V8)) { | ||
56 | + goto bad_reg; | ||
57 | + } | ||
58 | + return env->v7m.msplim[env->v7m.secure]; | ||
59 | + case 11: /* PSPLIM */ | ||
60 | + if (!arm_feature(env, ARM_FEATURE_V8)) { | ||
61 | + goto bad_reg; | ||
62 | + } | ||
63 | + return env->v7m.psplim[env->v7m.secure]; | ||
64 | case 16: /* PRIMASK */ | ||
65 | return env->v7m.primask[env->v7m.secure]; | ||
66 | case 17: /* BASEPRI */ | ||
67 | @@ -XXX,XX +XXX,XX @@ uint32_t HELPER(v7m_mrs)(CPUARMState *env, uint32_t reg) | ||
68 | case 19: /* FAULTMASK */ | ||
69 | return env->v7m.faultmask[env->v7m.secure]; | ||
70 | default: | ||
71 | + bad_reg: | ||
72 | qemu_log_mask(LOG_GUEST_ERROR, "Attempt to read unknown special" | ||
73 | " register %d\n", reg); | ||
74 | return 0; | 186 | return 0; |
75 | @@ -XXX,XX +XXX,XX @@ void HELPER(v7m_msr)(CPUARMState *env, uint32_t maskreg, uint32_t val) | 187 | } |
188 | @@ -XXX,XX +XXX,XX @@ static int pl330_exec_cycle(PL330Chan *channel) | ||
189 | int len = q->len - (q->addr & (q->len - 1)); | ||
190 | |||
191 | dma_memory_read(&address_space_memory, q->addr, buf, len); | ||
192 | - if (PL330_ERR_DEBUG > 1) { | ||
193 | - DB_PRINT("PL330 read from memory @%08" PRIx32 " (size = %08x):\n", | ||
194 | - q->addr, len); | ||
195 | - qemu_hexdump((char *)buf, stderr, "", len); | ||
196 | + trace_pl330_exec_cycle(q->addr, len); | ||
197 | + if (trace_event_get_state_backends(TRACE_PL330_HEXDUMP)) { | ||
198 | + pl330_hexdump(buf, len); | ||
199 | } | ||
200 | fifo_res = pl330_fifo_push(&s->fifo, buf, len, q->tag); | ||
201 | if (fifo_res == PL330_FIFO_OK) { | ||
202 | @@ -XXX,XX +XXX,XX @@ static int pl330_exec_cycle(PL330Chan *channel) | ||
203 | } | ||
204 | if (fifo_res == PL330_FIFO_OK || q->z) { | ||
205 | dma_memory_write(&address_space_memory, q->addr, buf, len); | ||
206 | - if (PL330_ERR_DEBUG > 1) { | ||
207 | - DB_PRINT("PL330 read from memory @%08" PRIx32 | ||
208 | - " (size = %08x):\n", q->addr, len); | ||
209 | - qemu_hexdump((char *)buf, stderr, "", len); | ||
210 | + trace_pl330_exec_cycle(q->addr, len); | ||
211 | + if (trace_event_get_state_backends(TRACE_PL330_HEXDUMP)) { | ||
212 | + pl330_hexdump(buf, len); | ||
76 | } | 213 | } |
77 | env->v7m.other_ss_psp = val; | 214 | if (q->inc) { |
78 | return; | 215 | q->addr += len; |
79 | + case 0x8a: /* MSPLIM_NS */ | 216 | @@ -XXX,XX +XXX,XX @@ static int pl330_exec_channel(PL330Chan *channel) |
80 | + if (!env->v7m.secure) { | 217 | |
81 | + return; | 218 | static inline void pl330_exec(PL330State *s) |
82 | + } | 219 | { |
83 | + env->v7m.msplim[M_REG_NS] = val & ~7; | 220 | - DB_PRINT("\n"); |
84 | + return; | 221 | int i, insr_exec; |
85 | + case 0x8b: /* PSPLIM_NS */ | 222 | + trace_pl330_exec(); |
86 | + if (!env->v7m.secure) { | 223 | do { |
87 | + return; | 224 | insr_exec = pl330_exec_channel(&s->manager); |
88 | + } | 225 | |
89 | + env->v7m.psplim[M_REG_NS] = val & ~7; | 226 | @@ -XXX,XX +XXX,XX @@ static void pl330_debug_exec(PL330State *s) |
90 | + return; | 227 | args[2] = (s->dbg[1] >> 8) & 0xff; |
91 | case 0x90: /* PRIMASK_NS */ | 228 | args[3] = (s->dbg[1] >> 16) & 0xff; |
92 | if (!env->v7m.secure) { | 229 | args[4] = (s->dbg[1] >> 24) & 0xff; |
93 | return; | 230 | - DB_PRINT("chan id: %" PRIx8 "\n", chan_id); |
94 | @@ -XXX,XX +XXX,XX @@ void HELPER(v7m_msr)(CPUARMState *env, uint32_t maskreg, uint32_t val) | 231 | + trace_pl330_debug_exec(chan_id); |
95 | env->v7m.other_sp = val; | 232 | if (s->dbg[0] & 1) { |
233 | ch = &s->chan[chan_id]; | ||
234 | } else { | ||
235 | @@ -XXX,XX +XXX,XX @@ static void pl330_debug_exec(PL330State *s) | ||
236 | ch->fault_type |= PL330_FAULT_DBG_INSTR; | ||
237 | } | ||
238 | if (ch->stall) { | ||
239 | + trace_pl330_debug_exec_stall(); | ||
240 | qemu_log_mask(LOG_UNIMP, "pl330: stall of debug instruction not " | ||
241 | "implemented\n"); | ||
242 | } | ||
243 | @@ -XXX,XX +XXX,XX @@ static void pl330_iomem_write(void *opaque, hwaddr offset, | ||
244 | PL330State *s = (PL330State *) opaque; | ||
245 | int i; | ||
246 | |||
247 | - DB_PRINT("addr: %08x data: %08x\n", (unsigned)offset, (unsigned)value); | ||
248 | + trace_pl330_iomem_write((unsigned)offset, (unsigned)value); | ||
249 | |||
250 | switch (offset) { | ||
251 | case PL330_REG_INTEN: | ||
252 | @@ -XXX,XX +XXX,XX @@ static void pl330_iomem_write(void *opaque, hwaddr offset, | ||
253 | case PL330_REG_INTCLR: | ||
254 | for (i = 0; i < s->num_events; i++) { | ||
255 | if (s->int_status & s->inten & value & (1 << i)) { | ||
256 | - DB_PRINT("event interrupt lowered %d\n", i); | ||
257 | + trace_pl330_iomem_write_clr(i); | ||
258 | qemu_irq_lower(s->irq[i]); | ||
259 | } | ||
260 | } | ||
261 | @@ -XXX,XX +XXX,XX @@ static void pl330_iomem_write(void *opaque, hwaddr offset, | ||
96 | } | 262 | } |
97 | break; | 263 | break; |
98 | + case 10: /* MSPLIM */ | 264 | case PL330_REG_DBGINST0: |
99 | + if (!arm_feature(env, ARM_FEATURE_V8)) { | 265 | - DB_PRINT("s->dbg[0] = %08x\n", (unsigned)value); |
100 | + goto bad_reg; | 266 | s->dbg[0] = value; |
101 | + } | ||
102 | + env->v7m.msplim[env->v7m.secure] = val & ~7; | ||
103 | + break; | ||
104 | + case 11: /* PSPLIM */ | ||
105 | + if (!arm_feature(env, ARM_FEATURE_V8)) { | ||
106 | + goto bad_reg; | ||
107 | + } | ||
108 | + env->v7m.psplim[env->v7m.secure] = val & ~7; | ||
109 | + break; | ||
110 | case 16: /* PRIMASK */ | ||
111 | env->v7m.primask[env->v7m.secure] = val & 1; | ||
112 | break; | 267 | break; |
113 | @@ -XXX,XX +XXX,XX @@ void HELPER(v7m_msr)(CPUARMState *env, uint32_t maskreg, uint32_t val) | 268 | case PL330_REG_DBGINST1: |
114 | env->v7m.control[env->v7m.secure] |= val & R_V7M_CONTROL_NPRIV_MASK; | 269 | - DB_PRINT("s->dbg[1] = %08x\n", (unsigned)value); |
270 | s->dbg[1] = value; | ||
115 | break; | 271 | break; |
116 | default: | 272 | default: |
117 | + bad_reg: | 273 | @@ -XXX,XX +XXX,XX @@ static uint64_t pl330_iomem_read(void *opaque, hwaddr offset, |
118 | qemu_log_mask(LOG_GUEST_ERROR, "Attempt to write unknown special" | 274 | unsigned size) |
119 | " register %d\n", reg); | 275 | { |
120 | return; | 276 | uint32_t ret = pl330_iomem_read_imp(opaque, offset); |
121 | diff --git a/target/arm/machine.c b/target/arm/machine.c | 277 | - DB_PRINT("addr: %08" HWADDR_PRIx " data: %08" PRIx32 "\n", offset, ret); |
278 | + trace_pl330_iomem_read((uint32_t)offset, ret); | ||
279 | return ret; | ||
280 | } | ||
281 | |||
282 | diff --git a/hw/dma/trace-events b/hw/dma/trace-events | ||
122 | index XXXXXXX..XXXXXXX 100644 | 283 | index XXXXXXX..XXXXXXX 100644 |
123 | --- a/target/arm/machine.c | 284 | --- a/hw/dma/trace-events |
124 | +++ b/target/arm/machine.c | 285 | +++ b/hw/dma/trace-events |
125 | @@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_m_other_sp = { | 286 | @@ -XXX,XX +XXX,XX @@ sparc32_dma_enable_lower(void) "Lower DMA enable" |
126 | } | 287 | |
127 | }; | 288 | # i8257.c |
128 | 289 | i8257_unregistered_dma(int nchan, int dma_pos, int dma_len) "unregistered DMA channel used nchan=%d dma_pos=%d dma_len=%d" | |
129 | +static bool m_v8m_needed(void *opaque) | ||
130 | +{ | ||
131 | + ARMCPU *cpu = opaque; | ||
132 | + CPUARMState *env = &cpu->env; | ||
133 | + | 290 | + |
134 | + return arm_feature(env, ARM_FEATURE_M) && arm_feature(env, ARM_FEATURE_V8); | 291 | +# pl330.c |
135 | +} | 292 | +pl330_fault(void *ptr, uint32_t flags) "ch: %p, flags: 0x%"PRIx32 |
136 | + | 293 | +pl330_fault_abort(void) "abort interrupt raised" |
137 | +static const VMStateDescription vmstate_m_v8m = { | 294 | +pl330_dmaend(void) "DMA ending" |
138 | + .name = "cpu/m/v8m", | 295 | +pl330_dmago(void) "DMA run" |
139 | + .version_id = 1, | 296 | +pl330_dmald(uint32_t chan, uint32_t addr, uint32_t size, uint32_t num, uint32_t ch) "channel:%"PRId8" address:0x%08"PRIx32" size:0x%"PRIx32" num:%"PRId32"%c" |
140 | + .minimum_version_id = 1, | 297 | +pl330_dmakill(void) "abort interrupt lowered" |
141 | + .needed = m_v8m_needed, | 298 | +pl330_dmalpend(uint8_t nf, uint8_t bs, uint8_t lc, uint8_t ch, uint8_t flag) "nf=0x%02x bs=0x%02x lc=0x%02x ch=0x%02x flag=0x%02x" |
142 | + .fields = (VMStateField[]) { | 299 | +pl330_dmalpiter(void) "loop reiteration" |
143 | + VMSTATE_UINT32_ARRAY(env.v7m.msplim, ARMCPU, M_REG_NUM_BANKS), | 300 | +pl330_dmalpfallthrough(void) "loop fallthrough" |
144 | + VMSTATE_UINT32_ARRAY(env.v7m.psplim, ARMCPU, M_REG_NUM_BANKS), | 301 | +pl330_dmasev_evirq(uint8_t ev_id) "event interrupt raised %"PRId8 |
145 | + VMSTATE_END_OF_LIST() | 302 | +pl330_dmasev_event(uint8_t ev_id) "event raised %"PRId8 |
146 | + } | 303 | +pl330_dmast(uint32_t chn, uint32_t addr, uint32_t sz, uint32_t num, uint32_t c) "channel:%"PRId8" address:0x%08"PRIx32" size:0x%"PRIx32" num:%"PRId32" %c" |
147 | +}; | 304 | +pl330_dmawfe(uint8_t ev_id) "event lowered 0x%"PRIx8 |
148 | + | 305 | +pl330_chan_exec_undef(void) "undefined instruction" |
149 | static const VMStateDescription vmstate_m = { | 306 | +pl330_exec_cycle(uint32_t addr, uint32_t size) "PL330 read from memory @0x%08"PRIx32" (size = 0x%08"PRIx32")" |
150 | .name = "cpu/m", | 307 | +pl330_hexdump(uint32_t offset, char *str) " 0x%04"PRIx32":%s" |
151 | .version_id = 4, | 308 | +pl330_exec(void) "pl330_exec" |
152 | @@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_m = { | 309 | +pl330_debug_exec(uint8_t ch) "chan id: 0x%"PRIx8 |
153 | &vmstate_m_csselr, | 310 | +pl330_debug_exec_stall(void) "stall of debug instruction not implemented" |
154 | &vmstate_m_scr, | 311 | +pl330_iomem_write(uint32_t offset, uint32_t value) "addr: 0x%08"PRIx32" data: 0x%08"PRIx32 |
155 | &vmstate_m_other_sp, | 312 | +pl330_iomem_write_clr(int i) "event interrupt lowered %d" |
156 | + &vmstate_m_v8m, | 313 | +pl330_iomem_read(uint32_t addr, uint32_t data) "addr: 0x%08"PRIx32" data: 0x%08"PRIx32 |
157 | NULL | ||
158 | } | ||
159 | }; | ||
160 | -- | 314 | -- |
161 | 2.16.1 | 315 | 2.20.1 |
162 | 316 | ||
163 | 317 | diff view generated by jsdifflib |
1 | The Coprocessor Power Control Register (CPPWR) is new in v8M. | 1 | From: Guenter Roeck <linux@roeck-us.net> |
---|---|---|---|
2 | It allows software to control whether coprocessors are allowed | ||
3 | to power down and lose their state. QEMU doesn't have any | ||
4 | notion of power control, so we choose the IMPDEF option of | ||
5 | making the whole register RAZ/WI (indicating that no coprocessors | ||
6 | can ever power down and lose state). | ||
7 | 2 | ||
3 | Exynos DMA requires up to 33 interrupt lines (32 event interrupts | ||
4 | plus abort interrupt), which all need to be wired together. Increase | ||
5 | the maximum number of or-irq lines to 48 to support this configuration. | ||
6 | |||
7 | Signed-off-by: Guenter Roeck <linux@roeck-us.net> | ||
8 | Message-id: 20200123052540.6132-3-linux@roeck-us.net | ||
8 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 9 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
9 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | 10 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> |
10 | Message-id: 20180209165810.6668-5-peter.maydell@linaro.org | ||
11 | --- | 11 | --- |
12 | hw/intc/armv7m_nvic.c | 14 ++++++++++++++ | 12 | include/hw/or-irq.h | 2 +- |
13 | 1 file changed, 14 insertions(+) | 13 | 1 file changed, 1 insertion(+), 1 deletion(-) |
14 | 14 | ||
15 | diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c | 15 | diff --git a/include/hw/or-irq.h b/include/hw/or-irq.h |
16 | index XXXXXXX..XXXXXXX 100644 | 16 | index XXXXXXX..XXXXXXX 100644 |
17 | --- a/hw/intc/armv7m_nvic.c | 17 | --- a/include/hw/or-irq.h |
18 | +++ b/hw/intc/armv7m_nvic.c | 18 | +++ b/include/hw/or-irq.h |
19 | @@ -XXX,XX +XXX,XX @@ static uint32_t nvic_readl(NVICState *s, uint32_t offset, MemTxAttrs attrs) | 19 | @@ -XXX,XX +XXX,XX @@ |
20 | switch (offset) { | 20 | /* This can safely be increased if necessary without breaking |
21 | case 4: /* Interrupt Control Type. */ | 21 | * migration compatibility (as long as it remains greater than 15). |
22 | return ((s->num_irq - NVIC_FIRST_IRQ) / 32) - 1; | 22 | */ |
23 | + case 0xc: /* CPPWR */ | 23 | -#define MAX_OR_LINES 32 |
24 | + if (!arm_feature(&cpu->env, ARM_FEATURE_V8)) { | 24 | +#define MAX_OR_LINES 48 |
25 | + goto bad_offset; | 25 | |
26 | + } | 26 | typedef struct OrIRQState qemu_or_irq; |
27 | + /* We make the IMPDEF choice that nothing can ever go into a | 27 | |
28 | + * non-retentive power state, which allows us to RAZ/WI this. | ||
29 | + */ | ||
30 | + return 0; | ||
31 | case 0x380 ... 0x3bf: /* NVIC_ITNS<n> */ | ||
32 | { | ||
33 | int startvec = 8 * (offset - 0x380) + NVIC_FIRST_IRQ; | ||
34 | @@ -XXX,XX +XXX,XX @@ static void nvic_writel(NVICState *s, uint32_t offset, uint32_t value, | ||
35 | ARMCPU *cpu = s->cpu; | ||
36 | |||
37 | switch (offset) { | ||
38 | + case 0xc: /* CPPWR */ | ||
39 | + if (!arm_feature(&cpu->env, ARM_FEATURE_V8)) { | ||
40 | + goto bad_offset; | ||
41 | + } | ||
42 | + /* Make the IMPDEF choice to RAZ/WI this. */ | ||
43 | + break; | ||
44 | case 0x380 ... 0x3bf: /* NVIC_ITNS<n> */ | ||
45 | { | ||
46 | int startvec = 8 * (offset - 0x380) + NVIC_FIRST_IRQ; | ||
47 | -- | 28 | -- |
48 | 2.16.1 | 29 | 2.20.1 |
49 | 30 | ||
50 | 31 | diff view generated by jsdifflib |
1 | From: Pekka Enberg <penberg@iki.fi> | 1 | From: Guenter Roeck <linux@roeck-us.net> |
---|---|---|---|
2 | 2 | ||
3 | This patch adds Raspberry Pi 3 support to hw/arm/raspi.c. The | 3 | First parameter to exynos4210_get_irq() is not the SPI port number, |
4 | differences to Pi 2 are: | 4 | but the interrupt group number. Interrupt groups are 20 for mdma |
5 | and 21 for pdma. Interrupts are not inverted. Controllers support 32 | ||
6 | events (pdma) or 31 events (mdma). Events must all be routed to a single | ||
7 | interrupt line. Set other parameters as documented in Exynos4210 datasheet, | ||
8 | section 8 (DMA controller). | ||
5 | 9 | ||
6 | - Firmware address | 10 | Fixes: 59520dc65e ("hw/arm/exynos4210: Add DMA support for the Exynos4210") |
7 | - Board ID | ||
8 | - Board revision | ||
9 | |||
10 | The CPU is different too, but that's going to be configured as part of | ||
11 | the machine default CPU when we introduce a new machine type. | ||
12 | |||
13 | The patch was written from scratch by me but the logic is similar to | ||
14 | Zoltán Baldaszti's previous work, which I used as a reference (with | ||
15 | permission from the author): | ||
16 | |||
17 | https://github.com/bztsrc/qemu-raspi3 | ||
18 | |||
19 | Signed-off-by: Pekka Enberg <penberg@iki.fi> | ||
20 | [PMM: fixed trailing whitespace on one line] | ||
21 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | 11 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> |
12 | Signed-off-by: Guenter Roeck <linux@roeck-us.net> | ||
13 | Message-id: 20200123052540.6132-4-linux@roeck-us.net | ||
22 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 14 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
23 | --- | 15 | --- |
24 | hw/arm/raspi.c | 31 +++++++++++++++++++++---------- | 16 | include/hw/arm/exynos4210.h | 4 +++ |
25 | 1 file changed, 21 insertions(+), 10 deletions(-) | 17 | hw/arm/exynos4210.c | 51 +++++++++++++++++++++++++++++++------ |
18 | 2 files changed, 47 insertions(+), 8 deletions(-) | ||
26 | 19 | ||
27 | diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c | 20 | diff --git a/include/hw/arm/exynos4210.h b/include/hw/arm/exynos4210.h |
28 | index XXXXXXX..XXXXXXX 100644 | 21 | index XXXXXXX..XXXXXXX 100644 |
29 | --- a/hw/arm/raspi.c | 22 | --- a/include/hw/arm/exynos4210.h |
30 | +++ b/hw/arm/raspi.c | 23 | +++ b/include/hw/arm/exynos4210.h |
31 | @@ -XXX,XX +XXX,XX @@ | 24 | @@ -XXX,XX +XXX,XX @@ |
32 | * Rasperry Pi 2 emulation Copyright (c) 2015, Microsoft | 25 | #ifndef EXYNOS4210_H |
33 | * Written by Andrew Baumann | 26 | #define EXYNOS4210_H |
34 | * | 27 | |
35 | + * Raspberry Pi 3 emulation Copyright (c) 2018 Zoltán Baldaszti | 28 | +#include "hw/or-irq.h" |
36 | + * Upstream code cleanup (c) 2018 Pekka Enberg | 29 | #include "hw/sysbus.h" |
37 | + * | 30 | #include "target/arm/cpu-qom.h" |
38 | * This code is licensed under the GNU GPLv2 and later. | ||
39 | */ | ||
40 | 31 | ||
41 | @@ -XXX,XX +XXX,XX @@ | 32 | @@ -XXX,XX +XXX,XX @@ |
42 | #define SMPBOOT_ADDR 0x300 /* this should leave enough space for ATAGS */ | 33 | |
43 | #define MVBAR_ADDR 0x400 /* secure vectors */ | 34 | #define EXYNOS4210_I2C_NUMBER 9 |
44 | #define BOARDSETUP_ADDR (MVBAR_ADDR + 0x20) /* board setup code */ | 35 | |
45 | -#define FIRMWARE_ADDR 0x8000 /* Pi loads kernel.img here by default */ | 36 | +#define EXYNOS4210_NUM_DMA 3 |
46 | +#define FIRMWARE_ADDR_2 0x8000 /* Pi 2 loads kernel.img here by default */ | 37 | + |
47 | +#define FIRMWARE_ADDR_3 0x80000 /* Pi 3 loads kernel.img here by default */ | 38 | typedef struct Exynos4210Irq { |
48 | 39 | qemu_irq int_combiner_irq[EXYNOS4210_MAX_INT_COMBINER_IN_IRQ]; | |
49 | /* Table of Linux board IDs for different Pi versions */ | 40 | qemu_irq ext_combiner_irq[EXYNOS4210_MAX_EXT_COMBINER_IN_IRQ]; |
50 | -static const int raspi_boardid[] = {[1] = 0xc42, [2] = 0xc43}; | 41 | @@ -XXX,XX +XXX,XX @@ typedef struct Exynos4210State { |
51 | +static const int raspi_boardid[] = {[1] = 0xc42, [2] = 0xc43, [3] = 0xc44}; | 42 | MemoryRegion boot_secondary; |
52 | 43 | MemoryRegion bootreg_mem; | |
53 | typedef struct RasPiState { | 44 | I2CBus *i2c_if[EXYNOS4210_I2C_NUMBER]; |
54 | BCM2836State soc; | 45 | + qemu_or_irq pl330_irq_orgate[EXYNOS4210_NUM_DMA]; |
55 | @@ -XXX,XX +XXX,XX @@ static void setup_boot(MachineState *machine, int version, size_t ram_size) | 46 | } Exynos4210State; |
56 | binfo.secure_board_setup = true; | 47 | |
57 | binfo.secure_boot = true; | 48 | #define TYPE_EXYNOS4210_SOC "exynos4210" |
58 | 49 | diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c | |
59 | - /* Pi2 requires SMP setup */ | 50 | index XXXXXXX..XXXXXXX 100644 |
60 | - if (version == 2) { | 51 | --- a/hw/arm/exynos4210.c |
61 | + /* Pi2 and Pi3 requires SMP setup */ | 52 | +++ b/hw/arm/exynos4210.c |
62 | + if (version >= 2) { | 53 | @@ -XXX,XX +XXX,XX @@ static uint64_t exynos4210_calc_affinity(int cpu) |
63 | binfo.smp_loader_start = SMPBOOT_ADDR; | 54 | return (0x9 << ARM_AFF1_SHIFT) | cpu; |
64 | binfo.write_secondary_boot = write_smpboot; | ||
65 | binfo.secondary_cpu_reset_hook = reset_secondary; | ||
66 | @@ -XXX,XX +XXX,XX @@ static void setup_boot(MachineState *machine, int version, size_t ram_size) | ||
67 | * the normal Linux boot process | ||
68 | */ | ||
69 | if (machine->firmware) { | ||
70 | + hwaddr firmware_addr = version == 3 ? FIRMWARE_ADDR_3 : FIRMWARE_ADDR_2; | ||
71 | /* load the firmware image (typically kernel.img) */ | ||
72 | - r = load_image_targphys(machine->firmware, FIRMWARE_ADDR, | ||
73 | - ram_size - FIRMWARE_ADDR); | ||
74 | + r = load_image_targphys(machine->firmware, firmware_addr, | ||
75 | + ram_size - firmware_addr); | ||
76 | if (r < 0) { | ||
77 | error_report("Failed to load firmware from %s", machine->firmware); | ||
78 | exit(1); | ||
79 | } | ||
80 | |||
81 | - binfo.entry = FIRMWARE_ADDR; | ||
82 | + binfo.entry = firmware_addr; | ||
83 | binfo.firmware_loaded = true; | ||
84 | } else { | ||
85 | binfo.kernel_filename = machine->kernel_filename; | ||
86 | @@ -XXX,XX +XXX,XX @@ static void setup_boot(MachineState *machine, int version, size_t ram_size) | ||
87 | arm_load_kernel(ARM_CPU(first_cpu), &binfo); | ||
88 | } | 55 | } |
89 | 56 | ||
90 | -static void raspi2_init(MachineState *machine) | 57 | -static void pl330_create(uint32_t base, qemu_irq irq, int nreq) |
91 | +static void raspi_init(MachineState *machine, int version) | 58 | +static void pl330_create(uint32_t base, qemu_or_irq *orgate, qemu_irq irq, |
59 | + int nreq, int nevents, int width) | ||
92 | { | 60 | { |
93 | RasPiState *s = g_new0(RasPiState, 1); | 61 | SysBusDevice *busdev; |
94 | uint32_t vcram_size; | 62 | DeviceState *dev; |
95 | @@ -XXX,XX +XXX,XX @@ static void raspi2_init(MachineState *machine) | 63 | + int i; |
96 | &error_abort); | 64 | |
97 | object_property_set_int(OBJECT(&s->soc), smp_cpus, "enabled-cpus", | 65 | dev = qdev_create(NULL, "pl330"); |
98 | &error_abort); | 66 | + qdev_prop_set_uint8(dev, "num_events", nevents); |
99 | - object_property_set_int(OBJECT(&s->soc), 0xa21041, "board-rev", | 67 | + qdev_prop_set_uint8(dev, "num_chnls", 8); |
100 | + int board_rev = version == 3 ? 0xa02082 : 0xa21041; | 68 | qdev_prop_set_uint8(dev, "num_periph_req", nreq); |
101 | + object_property_set_int(OBJECT(&s->soc), board_rev, "board-rev", | 69 | + |
102 | &error_abort); | 70 | + qdev_prop_set_uint8(dev, "wr_cap", 4); |
103 | object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_abort); | 71 | + qdev_prop_set_uint8(dev, "wr_q_dep", 8); |
104 | 72 | + qdev_prop_set_uint8(dev, "rd_cap", 4); | |
105 | @@ -XXX,XX +XXX,XX @@ static void raspi2_init(MachineState *machine) | 73 | + qdev_prop_set_uint8(dev, "rd_q_dep", 8); |
106 | 74 | + qdev_prop_set_uint8(dev, "data_width", width); | |
107 | vcram_size = object_property_get_uint(OBJECT(&s->soc), "vcram-size", | 75 | + qdev_prop_set_uint16(dev, "data_buffer_dep", width); |
108 | &error_abort); | 76 | qdev_init_nofail(dev); |
109 | - setup_boot(machine, 2, machine->ram_size - vcram_size); | 77 | busdev = SYS_BUS_DEVICE(dev); |
110 | + setup_boot(machine, version, machine->ram_size - vcram_size); | 78 | sysbus_mmio_map(busdev, 0, base); |
79 | - sysbus_connect_irq(busdev, 0, irq); | ||
80 | + | ||
81 | + object_property_set_int(OBJECT(orgate), nevents + 1, "num-lines", | ||
82 | + &error_abort); | ||
83 | + object_property_set_bool(OBJECT(orgate), true, "realized", &error_abort); | ||
84 | + | ||
85 | + for (i = 0; i < nevents + 1; i++) { | ||
86 | + sysbus_connect_irq(busdev, i, qdev_get_gpio_in(DEVICE(orgate), i)); | ||
87 | + } | ||
88 | + qdev_connect_gpio_out(DEVICE(orgate), 0, irq); | ||
89 | } | ||
90 | |||
91 | static void exynos4210_realize(DeviceState *socdev, Error **errp) | ||
92 | @@ -XXX,XX +XXX,XX @@ static void exynos4210_realize(DeviceState *socdev, Error **errp) | ||
93 | s->irq_table[exynos4210_get_irq(28, 3)]); | ||
94 | |||
95 | /*** DMA controllers ***/ | ||
96 | - pl330_create(EXYNOS4210_PL330_BASE0_ADDR, | ||
97 | - qemu_irq_invert(s->irq_table[exynos4210_get_irq(35, 1)]), 32); | ||
98 | - pl330_create(EXYNOS4210_PL330_BASE1_ADDR, | ||
99 | - qemu_irq_invert(s->irq_table[exynos4210_get_irq(36, 1)]), 32); | ||
100 | - pl330_create(EXYNOS4210_PL330_BASE2_ADDR, | ||
101 | - qemu_irq_invert(s->irq_table[exynos4210_get_irq(34, 1)]), 1); | ||
102 | + pl330_create(EXYNOS4210_PL330_BASE0_ADDR, &s->pl330_irq_orgate[0], | ||
103 | + s->irq_table[exynos4210_get_irq(21, 0)], 32, 32, 32); | ||
104 | + pl330_create(EXYNOS4210_PL330_BASE1_ADDR, &s->pl330_irq_orgate[1], | ||
105 | + s->irq_table[exynos4210_get_irq(21, 1)], 32, 32, 32); | ||
106 | + pl330_create(EXYNOS4210_PL330_BASE2_ADDR, &s->pl330_irq_orgate[2], | ||
107 | + s->irq_table[exynos4210_get_irq(20, 1)], 1, 31, 64); | ||
111 | +} | 108 | +} |
112 | + | 109 | + |
113 | +static void raspi2_init(MachineState *machine) | 110 | +static void exynos4210_init(Object *obj) |
114 | +{ | 111 | +{ |
115 | + raspi_init(machine, 2); | 112 | + Exynos4210State *s = EXYNOS4210_SOC(obj); |
113 | + int i; | ||
114 | + | ||
115 | + for (i = 0; i < ARRAY_SIZE(s->pl330_irq_orgate); i++) { | ||
116 | + char *name = g_strdup_printf("pl330-irq-orgate%d", i); | ||
117 | + qemu_or_irq *orgate = &s->pl330_irq_orgate[i]; | ||
118 | + | ||
119 | + object_initialize_child(obj, name, orgate, sizeof(*orgate), | ||
120 | + TYPE_OR_IRQ, &error_abort, NULL); | ||
121 | + g_free(name); | ||
122 | + } | ||
116 | } | 123 | } |
117 | 124 | ||
118 | static void raspi2_machine_init(MachineClass *mc) | 125 | static void exynos4210_class_init(ObjectClass *klass, void *data) |
126 | @@ -XXX,XX +XXX,XX @@ static const TypeInfo exynos4210_info = { | ||
127 | .name = TYPE_EXYNOS4210_SOC, | ||
128 | .parent = TYPE_SYS_BUS_DEVICE, | ||
129 | .instance_size = sizeof(Exynos4210State), | ||
130 | + .instance_init = exynos4210_init, | ||
131 | .class_init = exynos4210_class_init, | ||
132 | }; | ||
133 | |||
119 | -- | 134 | -- |
120 | 2.16.1 | 135 | 2.20.1 |
121 | 136 | ||
122 | 137 | diff view generated by jsdifflib |
1 | For M profile cores, cache maintenance operations are done by | 1 | From: Guenter Roeck <linux@roeck-us.net> |
---|---|---|---|
2 | writing to special registers in the system register space. | 2 | |
3 | For QEMU, cache operations are always NOPs, since we don't | 3 | Replace debug code with tracing to aid debugging. |
4 | implement the cache. Implementing these explicitly avoids | 4 | |
5 | a spurious LOG_GUEST_ERROR when the guest uses them. | 5 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> |
6 | 6 | Signed-off-by: Guenter Roeck <linux@roeck-us.net> | |
7 | Message-id: 20200123052540.6132-5-linux@roeck-us.net | ||
7 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 8 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
8 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | ||
9 | Message-id: 20180209165810.6668-4-peter.maydell@linaro.org | ||
10 | --- | 9 | --- |
11 | hw/intc/armv7m_nvic.c | 12 ++++++++++++ | 10 | hw/char/exynos4210_uart.c | 96 ++++++++++++--------------------------- |
12 | 1 file changed, 12 insertions(+) | 11 | hw/char/trace-events | 17 +++++++ |
13 | 12 | 2 files changed, 47 insertions(+), 66 deletions(-) | |
14 | diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c | 13 | |
14 | diff --git a/hw/char/exynos4210_uart.c b/hw/char/exynos4210_uart.c | ||
15 | index XXXXXXX..XXXXXXX 100644 | 15 | index XXXXXXX..XXXXXXX 100644 |
16 | --- a/hw/intc/armv7m_nvic.c | 16 | --- a/hw/char/exynos4210_uart.c |
17 | +++ b/hw/intc/armv7m_nvic.c | 17 | +++ b/hw/char/exynos4210_uart.c |
18 | @@ -XXX,XX +XXX,XX @@ static void nvic_writel(NVICState *s, uint32_t offset, uint32_t value, | 18 | @@ -XXX,XX +XXX,XX @@ |
19 | } | 19 | #include "hw/irq.h" |
20 | break; | 20 | #include "hw/qdev-properties.h" |
21 | |||
22 | -#undef DEBUG_UART | ||
23 | -#undef DEBUG_UART_EXTEND | ||
24 | -#undef DEBUG_IRQ | ||
25 | -#undef DEBUG_Rx_DATA | ||
26 | -#undef DEBUG_Tx_DATA | ||
27 | - | ||
28 | -#define DEBUG_UART 0 | ||
29 | -#define DEBUG_UART_EXTEND 0 | ||
30 | -#define DEBUG_IRQ 0 | ||
31 | -#define DEBUG_Rx_DATA 0 | ||
32 | -#define DEBUG_Tx_DATA 0 | ||
33 | - | ||
34 | -#if DEBUG_UART | ||
35 | -#define PRINT_DEBUG(fmt, args...) \ | ||
36 | - do { \ | ||
37 | - fprintf(stderr, " [%s:%d] "fmt, __func__, __LINE__, ##args); \ | ||
38 | - } while (0) | ||
39 | - | ||
40 | -#if DEBUG_UART_EXTEND | ||
41 | -#define PRINT_DEBUG_EXTEND(fmt, args...) \ | ||
42 | - do { \ | ||
43 | - fprintf(stderr, " [%s:%d] "fmt, __func__, __LINE__, ##args); \ | ||
44 | - } while (0) | ||
45 | -#else | ||
46 | -#define PRINT_DEBUG_EXTEND(fmt, args...) \ | ||
47 | - do {} while (0) | ||
48 | -#endif /* EXTEND */ | ||
49 | - | ||
50 | -#else | ||
51 | -#define PRINT_DEBUG(fmt, args...) \ | ||
52 | - do {} while (0) | ||
53 | -#define PRINT_DEBUG_EXTEND(fmt, args...) \ | ||
54 | - do {} while (0) | ||
55 | -#endif | ||
56 | - | ||
57 | -#define PRINT_ERROR(fmt, args...) \ | ||
58 | - do { \ | ||
59 | - fprintf(stderr, " [%s:%d] "fmt, __func__, __LINE__, ##args); \ | ||
60 | - } while (0) | ||
61 | +#include "trace.h" | ||
62 | |||
63 | /* | ||
64 | * Offsets for UART registers relative to SFR base address | ||
65 | @@ -XXX,XX +XXX,XX @@ typedef struct Exynos4210UartState { | ||
66 | } Exynos4210UartState; | ||
67 | |||
68 | |||
69 | -#if DEBUG_UART | ||
70 | -/* Used only for debugging inside PRINT_DEBUG_... macros */ | ||
71 | +/* Used only for tracing */ | ||
72 | static const char *exynos4210_uart_regname(hwaddr offset) | ||
73 | { | ||
74 | |||
75 | @@ -XXX,XX +XXX,XX @@ static const char *exynos4210_uart_regname(hwaddr offset) | ||
76 | |||
77 | return NULL; | ||
78 | } | ||
79 | -#endif | ||
80 | |||
81 | |||
82 | static void fifo_store(Exynos4210UartFIFO *q, uint8_t ch) | ||
83 | @@ -XXX,XX +XXX,XX @@ static uint32_t exynos4210_uart_Tx_FIFO_trigger_level(const Exynos4210UartState | ||
84 | break; | ||
85 | default: | ||
86 | level = 0; | ||
87 | - PRINT_ERROR("Wrong UART channel number: %d\n", s->channel); | ||
88 | + trace_exynos_uart_channel_error(s->channel); | ||
21 | } | 89 | } |
22 | + case 0xf50: /* ICIALLU */ | 90 | |
23 | + case 0xf58: /* ICIMVAU */ | 91 | return level; |
24 | + case 0xf5c: /* DCIMVAC */ | 92 | @@ -XXX,XX +XXX,XX @@ static void exynos4210_uart_update_irq(Exynos4210UartState *s) |
25 | + case 0xf60: /* DCISW */ | 93 | |
26 | + case 0xf64: /* DCCMVAU */ | 94 | if (s->reg[I_(UINTP)]) { |
27 | + case 0xf68: /* DCCMVAC */ | 95 | qemu_irq_raise(s->irq); |
28 | + case 0xf6c: /* DCCSW */ | 96 | - |
29 | + case 0xf70: /* DCCIMVAC */ | 97 | -#if DEBUG_IRQ |
30 | + case 0xf74: /* DCCISW */ | 98 | - fprintf(stderr, "UART%d: IRQ has been raised: %08x\n", |
31 | + case 0xf78: /* BPIALL */ | 99 | - s->channel, s->reg[I_(UINTP)]); |
32 | + /* Cache and branch predictor maintenance: for QEMU these always NOP */ | 100 | -#endif |
33 | + break; | 101 | - |
102 | + trace_exynos_uart_irq_raised(s->channel, s->reg[I_(UINTP)]); | ||
103 | } else { | ||
104 | qemu_irq_lower(s->irq); | ||
105 | + trace_exynos_uart_irq_lowered(s->channel); | ||
106 | } | ||
107 | } | ||
108 | |||
109 | @@ -XXX,XX +XXX,XX @@ static void exynos4210_uart_update_parameters(Exynos4210UartState *s) | ||
110 | |||
111 | qemu_chr_fe_ioctl(&s->chr, CHR_IOCTL_SERIAL_SET_PARAMS, &ssp); | ||
112 | |||
113 | - PRINT_DEBUG("UART%d: speed: %d, parity: %c, data: %d, stop: %d\n", | ||
114 | + trace_exynos_uart_update_params( | ||
115 | s->channel, speed, parity, data_bits, stop_bits); | ||
116 | } | ||
117 | |||
118 | @@ -XXX,XX +XXX,XX @@ static void exynos4210_uart_write(void *opaque, hwaddr offset, | ||
119 | Exynos4210UartState *s = (Exynos4210UartState *)opaque; | ||
120 | uint8_t ch; | ||
121 | |||
122 | - PRINT_DEBUG_EXTEND("UART%d: <0x%04x> %s <- 0x%08llx\n", s->channel, | ||
123 | - offset, exynos4210_uart_regname(offset), (long long unsigned int)val); | ||
124 | + trace_exynos_uart_write(s->channel, offset, | ||
125 | + exynos4210_uart_regname(offset), val); | ||
126 | |||
127 | switch (offset) { | ||
128 | case ULCON: | ||
129 | @@ -XXX,XX +XXX,XX @@ static void exynos4210_uart_write(void *opaque, hwaddr offset, | ||
130 | if (val & UFCON_Rx_FIFO_RESET) { | ||
131 | fifo_reset(&s->rx); | ||
132 | s->reg[I_(UFCON)] &= ~UFCON_Rx_FIFO_RESET; | ||
133 | - PRINT_DEBUG("UART%d: Rx FIFO Reset\n", s->channel); | ||
134 | + trace_exynos_uart_rx_fifo_reset(s->channel); | ||
135 | } | ||
136 | if (val & UFCON_Tx_FIFO_RESET) { | ||
137 | fifo_reset(&s->tx); | ||
138 | s->reg[I_(UFCON)] &= ~UFCON_Tx_FIFO_RESET; | ||
139 | - PRINT_DEBUG("UART%d: Tx FIFO Reset\n", s->channel); | ||
140 | + trace_exynos_uart_tx_fifo_reset(s->channel); | ||
141 | } | ||
142 | break; | ||
143 | |||
144 | @@ -XXX,XX +XXX,XX @@ static void exynos4210_uart_write(void *opaque, hwaddr offset, | ||
145 | /* XXX this blocks entire thread. Rewrite to use | ||
146 | * qemu_chr_fe_write and background I/O callbacks */ | ||
147 | qemu_chr_fe_write_all(&s->chr, &ch, 1); | ||
148 | -#if DEBUG_Tx_DATA | ||
149 | - fprintf(stderr, "%c", ch); | ||
150 | -#endif | ||
151 | + trace_exynos_uart_tx(s->channel, ch); | ||
152 | s->reg[I_(UTRSTAT)] |= UTRSTAT_TRANSMITTER_EMPTY | | ||
153 | UTRSTAT_Tx_BUFFER_EMPTY; | ||
154 | s->reg[I_(UINTSP)] |= UINTSP_TXD; | ||
155 | @@ -XXX,XX +XXX,XX @@ static void exynos4210_uart_write(void *opaque, hwaddr offset, | ||
156 | case UINTP: | ||
157 | s->reg[I_(UINTP)] &= ~val; | ||
158 | s->reg[I_(UINTSP)] &= ~val; | ||
159 | - PRINT_DEBUG("UART%d: UINTP [%04x] have been cleared: %08x\n", | ||
160 | - s->channel, offset, s->reg[I_(UINTP)]); | ||
161 | + trace_exynos_uart_intclr(s->channel, s->reg[I_(UINTP)]); | ||
162 | exynos4210_uart_update_irq(s); | ||
163 | break; | ||
164 | case UTRSTAT: | ||
165 | @@ -XXX,XX +XXX,XX @@ static void exynos4210_uart_write(void *opaque, hwaddr offset, | ||
166 | case UFSTAT: | ||
167 | case UMSTAT: | ||
168 | case URXH: | ||
169 | - PRINT_DEBUG("UART%d: Trying to write into RO register: %s [%04x]\n", | ||
170 | + trace_exynos_uart_ro_write( | ||
171 | s->channel, exynos4210_uart_regname(offset), offset); | ||
172 | break; | ||
173 | case UINTSP: | ||
174 | @@ -XXX,XX +XXX,XX @@ static uint64_t exynos4210_uart_read(void *opaque, hwaddr offset, | ||
175 | case UERSTAT: /* Read Only */ | ||
176 | res = s->reg[I_(UERSTAT)]; | ||
177 | s->reg[I_(UERSTAT)] = 0; | ||
178 | + trace_exynos_uart_read(s->channel, offset, | ||
179 | + exynos4210_uart_regname(offset), res); | ||
180 | return res; | ||
181 | case UFSTAT: /* Read Only */ | ||
182 | s->reg[I_(UFSTAT)] = fifo_elements_number(&s->rx) & 0xff; | ||
183 | @@ -XXX,XX +XXX,XX @@ static uint64_t exynos4210_uart_read(void *opaque, hwaddr offset, | ||
184 | s->reg[I_(UFSTAT)] |= UFSTAT_Rx_FIFO_FULL; | ||
185 | s->reg[I_(UFSTAT)] &= ~0xff; | ||
186 | } | ||
187 | + trace_exynos_uart_read(s->channel, offset, | ||
188 | + exynos4210_uart_regname(offset), | ||
189 | + s->reg[I_(UFSTAT)]); | ||
190 | return s->reg[I_(UFSTAT)]; | ||
191 | case URXH: | ||
192 | if (s->reg[I_(UFCON)] & UFCON_FIFO_ENABLE) { | ||
193 | if (fifo_elements_number(&s->rx)) { | ||
194 | res = fifo_retrieve(&s->rx); | ||
195 | -#if DEBUG_Rx_DATA | ||
196 | - fprintf(stderr, "%c", res); | ||
197 | -#endif | ||
198 | + trace_exynos_uart_rx(s->channel, res); | ||
199 | if (!fifo_elements_number(&s->rx)) { | ||
200 | s->reg[I_(UTRSTAT)] &= ~UTRSTAT_Rx_BUFFER_DATA_READY; | ||
201 | } else { | ||
202 | s->reg[I_(UTRSTAT)] |= UTRSTAT_Rx_BUFFER_DATA_READY; | ||
203 | } | ||
204 | } else { | ||
205 | + trace_exynos_uart_rx_error(s->channel); | ||
206 | s->reg[I_(UINTSP)] |= UINTSP_ERROR; | ||
207 | exynos4210_uart_update_irq(s); | ||
208 | res = 0; | ||
209 | @@ -XXX,XX +XXX,XX @@ static uint64_t exynos4210_uart_read(void *opaque, hwaddr offset, | ||
210 | s->reg[I_(UTRSTAT)] &= ~UTRSTAT_Rx_BUFFER_DATA_READY; | ||
211 | res = s->reg[I_(URXH)]; | ||
212 | } | ||
213 | + trace_exynos_uart_read(s->channel, offset, | ||
214 | + exynos4210_uart_regname(offset), res); | ||
215 | return res; | ||
216 | case UTXH: | ||
217 | - PRINT_DEBUG("UART%d: Trying to read from WO register: %s [%04x]\n", | ||
218 | - s->channel, exynos4210_uart_regname(offset), offset); | ||
219 | + trace_exynos_uart_wo_read(s->channel, exynos4210_uart_regname(offset), | ||
220 | + offset); | ||
221 | break; | ||
34 | default: | 222 | default: |
35 | bad_offset: | 223 | + trace_exynos_uart_read(s->channel, offset, |
36 | qemu_log_mask(LOG_GUEST_ERROR, | 224 | + exynos4210_uart_regname(offset), |
225 | + s->reg[I_(offset)]); | ||
226 | return s->reg[I_(offset)]; | ||
227 | } | ||
228 | |||
229 | + trace_exynos_uart_read(s->channel, offset, exynos4210_uart_regname(offset), | ||
230 | + 0); | ||
231 | return 0; | ||
232 | } | ||
233 | |||
234 | @@ -XXX,XX +XXX,XX @@ static void exynos4210_uart_reset(DeviceState *dev) | ||
235 | fifo_reset(&s->rx); | ||
236 | fifo_reset(&s->tx); | ||
237 | |||
238 | - PRINT_DEBUG("UART%d: Rx FIFO size: %d\n", s->channel, s->rx.size); | ||
239 | + trace_exynos_uart_rxsize(s->channel, s->rx.size); | ||
240 | } | ||
241 | |||
242 | static const VMStateDescription vmstate_exynos4210_uart_fifo = { | ||
243 | diff --git a/hw/char/trace-events b/hw/char/trace-events | ||
244 | index XXXXXXX..XXXXXXX 100644 | ||
245 | --- a/hw/char/trace-events | ||
246 | +++ b/hw/char/trace-events | ||
247 | @@ -XXX,XX +XXX,XX @@ cmsdk_apb_uart_set_params(int speed) "CMSDK APB UART: params set to %d 8N1" | ||
248 | # nrf51_uart.c | ||
249 | nrf51_uart_read(uint64_t addr, uint64_t r, unsigned int size) "addr 0x%" PRIx64 " value 0x%" PRIx64 " size %u" | ||
250 | nrf51_uart_write(uint64_t addr, uint64_t value, unsigned int size) "addr 0x%" PRIx64 " value 0x%" PRIx64 " size %u" | ||
251 | + | ||
252 | +# exynos4210_uart.c | ||
253 | +exynos_uart_irq_raised(uint32_t channel, uint32_t reg) "UART%d: IRQ raised: 0x%08"PRIx32 | ||
254 | +exynos_uart_irq_lowered(uint32_t channel) "UART%d: IRQ lowered" | ||
255 | +exynos_uart_update_params(uint32_t channel, int speed, uint8_t parity, int data, int stop) "UART%d: speed: %d, parity: %c, data bits: %d, stop bits: %d" | ||
256 | +exynos_uart_write(uint32_t channel, uint32_t offset, const char *name, uint64_t val) "UART%d: <0x%04x> %s <- 0x%" PRIx64 | ||
257 | +exynos_uart_read(uint32_t channel, uint32_t offset, const char *name, uint64_t val) "UART%d: <0x%04x> %s -> 0x%" PRIx64 | ||
258 | +exynos_uart_rx_fifo_reset(uint32_t channel) "UART%d: Rx FIFO Reset" | ||
259 | +exynos_uart_tx_fifo_reset(uint32_t channel) "UART%d: Tx FIFO Reset" | ||
260 | +exynos_uart_tx(uint32_t channel, uint8_t ch) "UART%d: Tx 0x%02"PRIx32 | ||
261 | +exynos_uart_intclr(uint32_t channel, uint32_t reg) "UART%d: interrupts cleared: 0x%08"PRIx32 | ||
262 | +exynos_uart_ro_write(uint32_t channel, const char *name, uint32_t reg) "UART%d: Trying to write into RO register: %s [0x%04"PRIx32"]" | ||
263 | +exynos_uart_rx(uint32_t channel, uint8_t ch) "UART%d: Rx 0x%02"PRIx32 | ||
264 | +exynos_uart_rx_error(uint32_t channel) "UART%d: Rx error" | ||
265 | +exynos_uart_wo_read(uint32_t channel, const char *name, uint32_t reg) "UART%d: Trying to read from WO register: %s [0x%04"PRIx32"]" | ||
266 | +exynos_uart_rxsize(uint32_t channel, uint32_t size) "UART%d: Rx FIFO size: %d" | ||
267 | +exynos_uart_channel_error(uint32_t channel) "Wrong UART channel number: %d" | ||
37 | -- | 268 | -- |
38 | 2.16.1 | 269 | 2.20.1 |
39 | 270 | ||
40 | 271 | diff view generated by jsdifflib |
1 | In commit 50f11062d4c896 we added support for MSR/MRS access | 1 | From: Guenter Roeck <linux@roeck-us.net> |
---|---|---|---|
2 | to the NS banked special registers, but we forgot to implement | ||
3 | the support for writing to CONTROL_NS. Correct the omission. | ||
4 | 2 | ||
3 | After restoring a VM, serial parameters need to be updated to reflect | ||
4 | restored register values. Implement a post_load function to handle this | ||
5 | situation. | ||
6 | |||
7 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | ||
8 | Signed-off-by: Guenter Roeck <linux@roeck-us.net> | ||
9 | Message-id: 20200123052540.6132-6-linux@roeck-us.net | ||
5 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 10 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
6 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | ||
7 | Message-id: 20180209165810.6668-8-peter.maydell@linaro.org | ||
8 | --- | 11 | --- |
9 | target/arm/helper.c | 10 ++++++++++ | 12 | hw/char/exynos4210_uart.c | 10 ++++++++++ |
10 | 1 file changed, 10 insertions(+) | 13 | 1 file changed, 10 insertions(+) |
11 | 14 | ||
12 | diff --git a/target/arm/helper.c b/target/arm/helper.c | 15 | diff --git a/hw/char/exynos4210_uart.c b/hw/char/exynos4210_uart.c |
13 | index XXXXXXX..XXXXXXX 100644 | 16 | index XXXXXXX..XXXXXXX 100644 |
14 | --- a/target/arm/helper.c | 17 | --- a/hw/char/exynos4210_uart.c |
15 | +++ b/target/arm/helper.c | 18 | +++ b/hw/char/exynos4210_uart.c |
16 | @@ -XXX,XX +XXX,XX @@ void HELPER(v7m_msr)(CPUARMState *env, uint32_t maskreg, uint32_t val) | 19 | @@ -XXX,XX +XXX,XX @@ static void exynos4210_uart_reset(DeviceState *dev) |
17 | } | 20 | trace_exynos_uart_rxsize(s->channel, s->rx.size); |
18 | env->v7m.faultmask[M_REG_NS] = val & 1; | 21 | } |
19 | return; | 22 | |
20 | + case 0x94: /* CONTROL_NS */ | 23 | +static int exynos4210_uart_post_load(void *opaque, int version_id) |
21 | + if (!env->v7m.secure) { | 24 | +{ |
22 | + return; | 25 | + Exynos4210UartState *s = (Exynos4210UartState *)opaque; |
23 | + } | 26 | + |
24 | + write_v7m_control_spsel_for_secstate(env, | 27 | + exynos4210_uart_update_parameters(s); |
25 | + val & R_V7M_CONTROL_SPSEL_MASK, | 28 | + |
26 | + M_REG_NS); | 29 | + return 0; |
27 | + env->v7m.control[M_REG_NS] &= ~R_V7M_CONTROL_NPRIV_MASK; | 30 | +} |
28 | + env->v7m.control[M_REG_NS] |= val & R_V7M_CONTROL_NPRIV_MASK; | 31 | + |
29 | + return; | 32 | static const VMStateDescription vmstate_exynos4210_uart_fifo = { |
30 | case 0x98: /* SP_NS */ | 33 | .name = "exynos4210.uart.fifo", |
31 | { | 34 | .version_id = 1, |
32 | /* This gives the non-secure SP selected based on whether we're | 35 | .minimum_version_id = 1, |
36 | + .post_load = exynos4210_uart_post_load, | ||
37 | .fields = (VMStateField[]) { | ||
38 | VMSTATE_UINT32(sp, Exynos4210UartFIFO), | ||
39 | VMSTATE_UINT32(rp, Exynos4210UartFIFO), | ||
33 | -- | 40 | -- |
34 | 2.16.1 | 41 | 2.20.1 |
35 | 42 | ||
36 | 43 | diff view generated by jsdifflib |
1 | M profile cores have a similar setup for cache ID registers | 1 | From: Guenter Roeck <linux@roeck-us.net> |
---|---|---|---|
2 | to A profile: | 2 | |
3 | * Cache Level ID Register (CLIDR) is a fixed value | 3 | The driver already implements a receive FIFO, but it does not |
4 | * Cache Type Register (CTR) is a fixed value | 4 | handle receive FIFO trigger levels and timeout. Implement the |
5 | * Cache Size ID Registers (CCSIDR) are a bank of registers; | 5 | missing functionality. |
6 | which one you see is selected by the Cache Size Selection | 6 | |
7 | Register (CSSELR) | 7 | Signed-off-by: Guenter Roeck <linux@roeck-us.net> |
8 | 8 | Message-id: 20200123052540.6132-7-linux@roeck-us.net | |
9 | The only difference is that they're in the NVIC memory mapped | ||
10 | register space rather than being coprocessor registers. | ||
11 | Implement the M profile view of them. | ||
12 | |||
13 | Since neither Cortex-M3 nor Cortex-M4 implement caches, | ||
14 | we don't need to update their init functions and can leave | ||
15 | the ctr/clidr/ccsidr[] fields in their ARMCPU structs at zero. | ||
16 | Newer cores (like the Cortex-M33) will want to be able to | ||
17 | set these ID registers to non-zero values, though. | ||
18 | |||
19 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 9 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
20 | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> | 10 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> |
21 | Message-id: 20180209165810.6668-6-peter.maydell@linaro.org | ||
22 | --- | 11 | --- |
23 | target/arm/cpu.h | 26 ++++++++++++++++++++++++++ | 12 | hw/char/exynos4210_uart.c | 117 ++++++++++++++++++++++++++++++-------- |
24 | hw/intc/armv7m_nvic.c | 16 ++++++++++++++++ | 13 | hw/char/trace-events | 3 +- |
25 | target/arm/machine.c | 36 ++++++++++++++++++++++++++++++++++++ | 14 | 2 files changed, 94 insertions(+), 26 deletions(-) |
26 | 3 files changed, 78 insertions(+) | 15 | |
27 | 16 | diff --git a/hw/char/exynos4210_uart.c b/hw/char/exynos4210_uart.c | |
28 | diff --git a/target/arm/cpu.h b/target/arm/cpu.h | ||
29 | index XXXXXXX..XXXXXXX 100644 | 17 | index XXXXXXX..XXXXXXX 100644 |
30 | --- a/target/arm/cpu.h | 18 | --- a/hw/char/exynos4210_uart.c |
31 | +++ b/target/arm/cpu.h | 19 | +++ b/hw/char/exynos4210_uart.c |
32 | @@ -XXX,XX +XXX,XX @@ typedef struct CPUARMState { | 20 | @@ -XXX,XX +XXX,XX @@ |
33 | uint32_t faultmask[M_REG_NUM_BANKS]; | 21 | #include "migration/vmstate.h" |
34 | uint32_t aircr; /* only holds r/w state if security extn implemented */ | 22 | #include "qemu/error-report.h" |
35 | uint32_t secure; /* Is CPU in Secure state? (not guest visible) */ | 23 | #include "qemu/module.h" |
36 | + uint32_t csselr[M_REG_NUM_BANKS]; | 24 | +#include "qemu/timer.h" |
37 | } v7m; | 25 | #include "chardev/char-fe.h" |
38 | 26 | #include "chardev/char-serial.h" | |
39 | /* Information associated with an exception about to be taken: | 27 | |
40 | @@ -XXX,XX +XXX,XX @@ FIELD(V7M_MPU_CTRL, ENABLE, 0, 1) | 28 | @@ -XXX,XX +XXX,XX @@ static const Exynos4210UartReg exynos4210_uart_regs[] = { |
41 | FIELD(V7M_MPU_CTRL, HFNMIENA, 1, 1) | 29 | #define ULCON_STOP_BIT_SHIFT 1 |
42 | FIELD(V7M_MPU_CTRL, PRIVDEFENA, 2, 1) | 30 | |
43 | 31 | /* UART Tx/Rx Status */ | |
44 | +/* v7M CLIDR bits */ | 32 | +#define UTRSTAT_Rx_TIMEOUT 0x8 |
45 | +FIELD(V7M_CLIDR, CTYPE_ALL, 0, 21) | 33 | #define UTRSTAT_TRANSMITTER_EMPTY 0x4 |
46 | +FIELD(V7M_CLIDR, LOUIS, 21, 3) | 34 | #define UTRSTAT_Tx_BUFFER_EMPTY 0x2 |
47 | +FIELD(V7M_CLIDR, LOC, 24, 3) | 35 | #define UTRSTAT_Rx_BUFFER_DATA_READY 0x1 |
48 | +FIELD(V7M_CLIDR, LOUU, 27, 3) | 36 | @@ -XXX,XX +XXX,XX @@ typedef struct Exynos4210UartState { |
49 | +FIELD(V7M_CLIDR, ICB, 30, 2) | 37 | Exynos4210UartFIFO rx; |
50 | + | 38 | Exynos4210UartFIFO tx; |
51 | +FIELD(V7M_CSSELR, IND, 0, 1) | 39 | |
52 | +FIELD(V7M_CSSELR, LEVEL, 1, 3) | 40 | + QEMUTimer *fifo_timeout_timer; |
53 | +/* We use the combination of InD and Level to index into cpu->ccsidr[]; | 41 | + uint64_t wordtime; /* word time in ns */ |
54 | + * define a mask for this and check that it doesn't permit running off | 42 | + |
55 | + * the end of the array. | 43 | CharBackend chr; |
56 | + */ | 44 | qemu_irq irq; |
57 | +FIELD(V7M_CSSELR, INDEX, 0, 4) | 45 | |
58 | + | 46 | @@ -XXX,XX +XXX,XX @@ static void fifo_reset(Exynos4210UartFIFO *q) |
59 | +QEMU_BUILD_BUG_ON(ARRAY_SIZE(((ARMCPU *)0)->ccsidr) <= R_V7M_CSSELR_INDEX_MASK); | 47 | q->rp = 0; |
60 | + | 48 | } |
61 | /* If adding a feature bit which corresponds to a Linux ELF | 49 | |
62 | * HWCAP bit, remember to update the feature-bit-to-hwcap | 50 | -static uint32_t exynos4210_uart_Tx_FIFO_trigger_level(const Exynos4210UartState *s) |
63 | * mapping in linux-user/elfload.c:get_elf_hwcap(). | 51 | +static uint32_t exynos4210_uart_FIFO_trigger_level(uint32_t channel, |
64 | @@ -XXX,XX +XXX,XX @@ static inline int arm_debug_target_el(CPUARMState *env) | 52 | + uint32_t reg) |
65 | } | 53 | { |
66 | } | 54 | - uint32_t level = 0; |
67 | 55 | - uint32_t reg; | |
68 | +static inline bool arm_v7m_csselr_razwi(ARMCPU *cpu) | 56 | + uint32_t level; |
69 | +{ | 57 | |
70 | + /* If all the CLIDR.Ctypem bits are 0 there are no caches, and | 58 | - reg = (s->reg[I_(UFCON)] & UFCON_Tx_FIFO_TRIGGER_LEVEL) >> |
71 | + * CSSELR is RAZ/WI. | 59 | - UFCON_Tx_FIFO_TRIGGER_LEVEL_SHIFT; |
72 | + */ | 60 | - |
73 | + return (cpu->clidr & R_V7M_CLIDR_CTYPE_ALL_MASK) != 0; | 61 | - switch (s->channel) { |
74 | +} | 62 | + switch (channel) { |
75 | + | 63 | case 0: |
76 | static inline bool aa64_generate_debug_exceptions(CPUARMState *env) | 64 | level = reg * 32; |
77 | { | 65 | break; |
78 | if (arm_is_secure(env)) { | 66 | @@ -XXX,XX +XXX,XX @@ static uint32_t exynos4210_uart_Tx_FIFO_trigger_level(const Exynos4210UartState |
79 | diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c | 67 | break; |
80 | index XXXXXXX..XXXXXXX 100644 | 68 | default: |
81 | --- a/hw/intc/armv7m_nvic.c | 69 | level = 0; |
82 | +++ b/hw/intc/armv7m_nvic.c | 70 | - trace_exynos_uart_channel_error(s->channel); |
83 | @@ -XXX,XX +XXX,XX @@ static uint32_t nvic_readl(NVICState *s, uint32_t offset, MemTxAttrs attrs) | 71 | + trace_exynos_uart_channel_error(channel); |
84 | return cpu->id_isar4; | 72 | + break; |
85 | case 0xd74: /* ISAR5. */ | 73 | } |
86 | return cpu->id_isar5; | 74 | - |
87 | + case 0xd78: /* CLIDR */ | 75 | return level; |
88 | + return cpu->clidr; | 76 | } |
89 | + case 0xd7c: /* CTR */ | 77 | |
90 | + return cpu->ctr; | 78 | +static uint32_t |
91 | + case 0xd80: /* CSSIDR */ | 79 | +exynos4210_uart_Tx_FIFO_trigger_level(const Exynos4210UartState *s) |
92 | + { | 80 | +{ |
93 | + int idx = cpu->env.v7m.csselr[attrs.secure] & R_V7M_CSSELR_INDEX_MASK; | 81 | + uint32_t reg; |
94 | + return cpu->ccsidr[idx]; | 82 | + |
83 | + reg = (s->reg[I_(UFCON)] & UFCON_Tx_FIFO_TRIGGER_LEVEL) >> | ||
84 | + UFCON_Tx_FIFO_TRIGGER_LEVEL_SHIFT; | ||
85 | + | ||
86 | + return exynos4210_uart_FIFO_trigger_level(s->channel, reg); | ||
87 | +} | ||
88 | + | ||
89 | +static uint32_t | ||
90 | +exynos4210_uart_Rx_FIFO_trigger_level(const Exynos4210UartState *s) | ||
91 | +{ | ||
92 | + uint32_t reg; | ||
93 | + | ||
94 | + reg = ((s->reg[I_(UFCON)] & UFCON_Rx_FIFO_TRIGGER_LEVEL) >> | ||
95 | + UFCON_Rx_FIFO_TRIGGER_LEVEL_SHIFT) + 1; | ||
96 | + | ||
97 | + return exynos4210_uart_FIFO_trigger_level(s->channel, reg); | ||
98 | +} | ||
99 | + | ||
100 | static void exynos4210_uart_update_irq(Exynos4210UartState *s) | ||
101 | { | ||
102 | /* | ||
103 | @@ -XXX,XX +XXX,XX @@ static void exynos4210_uart_update_irq(Exynos4210UartState *s) | ||
104 | * transmit FIFO is smaller than the trigger level. | ||
105 | */ | ||
106 | if (s->reg[I_(UFCON)] & UFCON_FIFO_ENABLE) { | ||
107 | - | ||
108 | uint32_t count = (s->reg[I_(UFSTAT)] & UFSTAT_Tx_FIFO_COUNT) >> | ||
109 | UFSTAT_Tx_FIFO_COUNT_SHIFT; | ||
110 | |||
111 | if (count <= exynos4210_uart_Tx_FIFO_trigger_level(s)) { | ||
112 | s->reg[I_(UINTSP)] |= UINTSP_TXD; | ||
113 | } | ||
114 | + | ||
115 | + /* | ||
116 | + * Rx interrupt if trigger level is reached or if rx timeout | ||
117 | + * interrupt is disabled and there is data in the receive buffer | ||
118 | + */ | ||
119 | + count = fifo_elements_number(&s->rx); | ||
120 | + if ((count && !(s->reg[I_(UCON)] & 0x80)) || | ||
121 | + count >= exynos4210_uart_Rx_FIFO_trigger_level(s)) { | ||
122 | + s->reg[I_(UINTSP)] |= UINTSP_RXD; | ||
123 | + timer_del(s->fifo_timeout_timer); | ||
124 | + } | ||
125 | + } else if (s->reg[I_(UTRSTAT)] & UTRSTAT_Rx_BUFFER_DATA_READY) { | ||
126 | + s->reg[I_(UINTSP)] |= UINTSP_RXD; | ||
127 | } | ||
128 | |||
129 | s->reg[I_(UINTP)] = s->reg[I_(UINTSP)] & ~s->reg[I_(UINTM)]; | ||
130 | @@ -XXX,XX +XXX,XX @@ static void exynos4210_uart_update_irq(Exynos4210UartState *s) | ||
131 | } | ||
132 | } | ||
133 | |||
134 | +static void exynos4210_uart_timeout_int(void *opaque) | ||
135 | +{ | ||
136 | + Exynos4210UartState *s = opaque; | ||
137 | + | ||
138 | + trace_exynos_uart_rx_timeout(s->channel, s->reg[I_(UTRSTAT)], | ||
139 | + s->reg[I_(UINTSP)]); | ||
140 | + | ||
141 | + if ((s->reg[I_(UTRSTAT)] & UTRSTAT_Rx_BUFFER_DATA_READY) || | ||
142 | + (s->reg[I_(UCON)] & (1 << 11))) { | ||
143 | + s->reg[I_(UINTSP)] |= UINTSP_RXD; | ||
144 | + s->reg[I_(UTRSTAT)] |= UTRSTAT_Rx_TIMEOUT; | ||
145 | + exynos4210_uart_update_irq(s); | ||
95 | + } | 146 | + } |
96 | + case 0xd84: /* CSSELR */ | 147 | +} |
97 | + return cpu->env.v7m.csselr[attrs.secure]; | 148 | + |
98 | /* TODO: Implement debug registers. */ | 149 | static void exynos4210_uart_update_parameters(Exynos4210UartState *s) |
99 | case 0xd90: /* MPU_TYPE */ | 150 | { |
100 | /* Unified MPU; if the MPU is not present this value is zero */ | 151 | int speed, parity, data_bits, stop_bits; |
101 | @@ -XXX,XX +XXX,XX @@ static void nvic_writel(NVICState *s, uint32_t offset, uint32_t value, | 152 | @@ -XXX,XX +XXX,XX @@ static void exynos4210_uart_update_parameters(Exynos4210UartState *s) |
102 | qemu_log_mask(LOG_UNIMP, | 153 | ssp.data_bits = data_bits; |
103 | "NVIC: Aux fault status registers unimplemented\n"); | 154 | ssp.stop_bits = stop_bits; |
104 | break; | 155 | |
105 | + case 0xd84: /* CSSELR */ | 156 | + s->wordtime = NANOSECONDS_PER_SECOND * (data_bits + stop_bits + 1) / speed; |
106 | + if (!arm_v7m_csselr_razwi(cpu)) { | 157 | + |
107 | + cpu->env.v7m.csselr[attrs.secure] = value & R_V7M_CSSELR_INDEX_MASK; | 158 | qemu_chr_fe_ioctl(&s->chr, CHR_IOCTL_SERIAL_SET_PARAMS, &ssp); |
159 | |||
160 | trace_exynos_uart_update_params( | ||
161 | - s->channel, speed, parity, data_bits, stop_bits); | ||
162 | + s->channel, speed, parity, data_bits, stop_bits, s->wordtime); | ||
163 | +} | ||
164 | + | ||
165 | +static void exynos4210_uart_rx_timeout_set(Exynos4210UartState *s) | ||
166 | +{ | ||
167 | + if (s->reg[I_(UCON)] & 0x80) { | ||
168 | + uint32_t timeout = ((s->reg[I_(UCON)] >> 12) & 0x0f) * s->wordtime; | ||
169 | + | ||
170 | + timer_mod(s->fifo_timeout_timer, | ||
171 | + qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + timeout); | ||
172 | + } else { | ||
173 | + timer_del(s->fifo_timeout_timer); | ||
174 | + } | ||
175 | } | ||
176 | |||
177 | static void exynos4210_uart_write(void *opaque, hwaddr offset, | ||
178 | @@ -XXX,XX +XXX,XX @@ static void exynos4210_uart_write(void *opaque, hwaddr offset, | ||
179 | exynos4210_uart_update_irq(s); | ||
180 | break; | ||
181 | case UTRSTAT: | ||
182 | + if (val & UTRSTAT_Rx_TIMEOUT) { | ||
183 | + s->reg[I_(UTRSTAT)] &= ~UTRSTAT_Rx_TIMEOUT; | ||
108 | + } | 184 | + } |
109 | + break; | 185 | + break; |
110 | case 0xd90: /* MPU_TYPE */ | 186 | case UERSTAT: |
111 | return; /* RO */ | 187 | case UFSTAT: |
112 | case 0xd94: /* MPU_CTRL */ | 188 | case UMSTAT: |
113 | diff --git a/target/arm/machine.c b/target/arm/machine.c | 189 | @@ -XXX,XX +XXX,XX @@ static void exynos4210_uart_write(void *opaque, hwaddr offset, |
190 | break; | ||
191 | } | ||
192 | } | ||
193 | + | ||
194 | static uint64_t exynos4210_uart_read(void *opaque, hwaddr offset, | ||
195 | unsigned size) | ||
196 | { | ||
197 | @@ -XXX,XX +XXX,XX @@ static int exynos4210_uart_can_receive(void *opaque) | ||
198 | return fifo_empty_elements_number(&s->rx); | ||
199 | } | ||
200 | |||
201 | - | ||
202 | static void exynos4210_uart_receive(void *opaque, const uint8_t *buf, int size) | ||
203 | { | ||
204 | Exynos4210UartState *s = (Exynos4210UartState *)opaque; | ||
205 | @@ -XXX,XX +XXX,XX @@ static void exynos4210_uart_receive(void *opaque, const uint8_t *buf, int size) | ||
206 | |||
207 | if (s->reg[I_(UFCON)] & UFCON_FIFO_ENABLE) { | ||
208 | if (fifo_empty_elements_number(&s->rx) < size) { | ||
209 | - for (i = 0; i < fifo_empty_elements_number(&s->rx); i++) { | ||
210 | - fifo_store(&s->rx, buf[i]); | ||
211 | - } | ||
212 | + size = fifo_empty_elements_number(&s->rx); | ||
213 | s->reg[I_(UINTSP)] |= UINTSP_ERROR; | ||
214 | - s->reg[I_(UTRSTAT)] |= UTRSTAT_Rx_BUFFER_DATA_READY; | ||
215 | - } else { | ||
216 | - for (i = 0; i < size; i++) { | ||
217 | - fifo_store(&s->rx, buf[i]); | ||
218 | - } | ||
219 | - s->reg[I_(UTRSTAT)] |= UTRSTAT_Rx_BUFFER_DATA_READY; | ||
220 | } | ||
221 | - /* XXX: Around here we maybe should check Rx trigger level */ | ||
222 | - s->reg[I_(UINTSP)] |= UINTSP_RXD; | ||
223 | + for (i = 0; i < size; i++) { | ||
224 | + fifo_store(&s->rx, buf[i]); | ||
225 | + } | ||
226 | + exynos4210_uart_rx_timeout_set(s); | ||
227 | } else { | ||
228 | s->reg[I_(URXH)] = buf[0]; | ||
229 | - s->reg[I_(UINTSP)] |= UINTSP_RXD; | ||
230 | - s->reg[I_(UTRSTAT)] |= UTRSTAT_Rx_BUFFER_DATA_READY; | ||
231 | } | ||
232 | + s->reg[I_(UTRSTAT)] |= UTRSTAT_Rx_BUFFER_DATA_READY; | ||
233 | |||
234 | exynos4210_uart_update_irq(s); | ||
235 | } | ||
236 | @@ -XXX,XX +XXX,XX @@ static int exynos4210_uart_post_load(void *opaque, int version_id) | ||
237 | Exynos4210UartState *s = (Exynos4210UartState *)opaque; | ||
238 | |||
239 | exynos4210_uart_update_parameters(s); | ||
240 | + exynos4210_uart_rx_timeout_set(s); | ||
241 | |||
242 | return 0; | ||
243 | } | ||
244 | @@ -XXX,XX +XXX,XX @@ static void exynos4210_uart_init(Object *obj) | ||
245 | SysBusDevice *dev = SYS_BUS_DEVICE(obj); | ||
246 | Exynos4210UartState *s = EXYNOS4210_UART(dev); | ||
247 | |||
248 | + s->fifo_timeout_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, | ||
249 | + exynos4210_uart_timeout_int, s); | ||
250 | + s->wordtime = NANOSECONDS_PER_SECOND * 10 / 9600; | ||
251 | + | ||
252 | /* memory mapping */ | ||
253 | memory_region_init_io(&s->iomem, obj, &exynos4210_uart_ops, s, | ||
254 | "exynos4210.uart", EXYNOS4210_UART_REGS_MEM_SIZE); | ||
255 | diff --git a/hw/char/trace-events b/hw/char/trace-events | ||
114 | index XXXXXXX..XXXXXXX 100644 | 256 | index XXXXXXX..XXXXXXX 100644 |
115 | --- a/target/arm/machine.c | 257 | --- a/hw/char/trace-events |
116 | +++ b/target/arm/machine.c | 258 | +++ b/hw/char/trace-events |
117 | @@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_m_faultmask_primask = { | 259 | @@ -XXX,XX +XXX,XX @@ nrf51_uart_write(uint64_t addr, uint64_t value, unsigned int size) "addr 0x%" PR |
118 | } | 260 | # exynos4210_uart.c |
119 | }; | 261 | exynos_uart_irq_raised(uint32_t channel, uint32_t reg) "UART%d: IRQ raised: 0x%08"PRIx32 |
120 | 262 | exynos_uart_irq_lowered(uint32_t channel) "UART%d: IRQ lowered" | |
121 | +/* CSSELR is in a subsection because we didn't implement it previously. | 263 | -exynos_uart_update_params(uint32_t channel, int speed, uint8_t parity, int data, int stop) "UART%d: speed: %d, parity: %c, data bits: %d, stop bits: %d" |
122 | + * Migration from an old implementation will leave it at zero, which | 264 | +exynos_uart_update_params(uint32_t channel, int speed, uint8_t parity, int data, int stop, uint64_t wordtime) "UART%d: speed: %d, parity: %c, data bits: %d, stop bits: %d wordtime: %"PRId64"ns" |
123 | + * is OK since the only CPUs in the old implementation make the | 265 | exynos_uart_write(uint32_t channel, uint32_t offset, const char *name, uint64_t val) "UART%d: <0x%04x> %s <- 0x%" PRIx64 |
124 | + * register RAZ/WI. | 266 | exynos_uart_read(uint32_t channel, uint32_t offset, const char *name, uint64_t val) "UART%d: <0x%04x> %s -> 0x%" PRIx64 |
125 | + * Since there was no version of QEMU which implemented the CSSELR for | 267 | exynos_uart_rx_fifo_reset(uint32_t channel) "UART%d: Rx FIFO Reset" |
126 | + * just non-secure, we transfer both banks here rather than putting | 268 | @@ -XXX,XX +XXX,XX @@ exynos_uart_rx_error(uint32_t channel) "UART%d: Rx error" |
127 | + * the secure banked version in the m-security subsection. | 269 | exynos_uart_wo_read(uint32_t channel, const char *name, uint32_t reg) "UART%d: Trying to read from WO register: %s [0x%04"PRIx32"]" |
128 | + */ | 270 | exynos_uart_rxsize(uint32_t channel, uint32_t size) "UART%d: Rx FIFO size: %d" |
129 | +static bool csselr_vmstate_validate(void *opaque, int version_id) | 271 | exynos_uart_channel_error(uint32_t channel) "Wrong UART channel number: %d" |
130 | +{ | 272 | +exynos_uart_rx_timeout(uint32_t channel, uint32_t stat, uint32_t intsp) "UART%d: Rx timeout stat=0x%x intsp=0x%x" |
131 | + ARMCPU *cpu = opaque; | ||
132 | + | ||
133 | + return cpu->env.v7m.csselr[M_REG_NS] <= R_V7M_CSSELR_INDEX_MASK | ||
134 | + && cpu->env.v7m.csselr[M_REG_S] <= R_V7M_CSSELR_INDEX_MASK; | ||
135 | +} | ||
136 | + | ||
137 | +static bool m_csselr_needed(void *opaque) | ||
138 | +{ | ||
139 | + ARMCPU *cpu = opaque; | ||
140 | + | ||
141 | + return !arm_v7m_csselr_razwi(cpu); | ||
142 | +} | ||
143 | + | ||
144 | +static const VMStateDescription vmstate_m_csselr = { | ||
145 | + .name = "cpu/m/csselr", | ||
146 | + .version_id = 1, | ||
147 | + .minimum_version_id = 1, | ||
148 | + .needed = m_csselr_needed, | ||
149 | + .fields = (VMStateField[]) { | ||
150 | + VMSTATE_UINT32_ARRAY(env.v7m.csselr, ARMCPU, M_REG_NUM_BANKS), | ||
151 | + VMSTATE_VALIDATE("CSSELR is valid", csselr_vmstate_validate), | ||
152 | + VMSTATE_END_OF_LIST() | ||
153 | + } | ||
154 | +}; | ||
155 | + | ||
156 | static const VMStateDescription vmstate_m = { | ||
157 | .name = "cpu/m", | ||
158 | .version_id = 4, | ||
159 | @@ -XXX,XX +XXX,XX @@ static const VMStateDescription vmstate_m = { | ||
160 | }, | ||
161 | .subsections = (const VMStateDescription*[]) { | ||
162 | &vmstate_m_faultmask_primask, | ||
163 | + &vmstate_m_csselr, | ||
164 | NULL | ||
165 | } | ||
166 | }; | ||
167 | -- | 273 | -- |
168 | 2.16.1 | 274 | 2.20.1 |
169 | 275 | ||
170 | 276 | diff view generated by jsdifflib |
1 | From: Richard Henderson <richard.henderson@linaro.org> | 1 | From: Guenter Roeck <linux@roeck-us.net> |
---|---|---|---|
2 | 2 | ||
3 | When storing to an AdvSIMD FP register, all of the high | 3 | To support receive DMA, we need to inform the DMA controller if receive data |
4 | bits of the SVE register are zeroed. Therefore, call it | 4 | is available. Otherwise the DMA controller keeps requesting data, causing |
5 | more often with is_q as a parameter. | 5 | receive errors. |
6 | 6 | ||
7 | Signed-off-by: Richard Henderson <richard.henderson@linaro.org> | 7 | Implement this using an interrupt line. The instantiating code then needs |
8 | Message-id: 20180211205848.4568-6-richard.henderson@linaro.org | 8 | to connect the interrupt with the matching DMA controller GPIO pin. |
9 | |||
9 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | 10 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> |
11 | Signed-off-by: Guenter Roeck <linux@roeck-us.net> | ||
12 | Message-id: 20200123052540.6132-8-linux@roeck-us.net | ||
10 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 13 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
11 | --- | 14 | --- |
12 | target/arm/translate-a64.c | 162 +++++++++++++++++---------------------------- | 15 | hw/char/exynos4210_uart.c | 24 ++++++++++++++++++++++++ |
13 | 1 file changed, 62 insertions(+), 100 deletions(-) | 16 | hw/char/trace-events | 2 ++ |
17 | 2 files changed, 26 insertions(+) | ||
14 | 18 | ||
15 | diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c | 19 | diff --git a/hw/char/exynos4210_uart.c b/hw/char/exynos4210_uart.c |
16 | index XXXXXXX..XXXXXXX 100644 | 20 | index XXXXXXX..XXXXXXX 100644 |
17 | --- a/target/arm/translate-a64.c | 21 | --- a/hw/char/exynos4210_uart.c |
18 | +++ b/target/arm/translate-a64.c | 22 | +++ b/hw/char/exynos4210_uart.c |
19 | @@ -XXX,XX +XXX,XX @@ static TCGv_i32 read_fp_sreg(DisasContext *s, int reg) | 23 | @@ -XXX,XX +XXX,XX @@ typedef struct Exynos4210UartState { |
20 | return v; | 24 | |
25 | CharBackend chr; | ||
26 | qemu_irq irq; | ||
27 | + qemu_irq dmairq; | ||
28 | |||
29 | uint32_t channel; | ||
30 | |||
31 | @@ -XXX,XX +XXX,XX @@ exynos4210_uart_Rx_FIFO_trigger_level(const Exynos4210UartState *s) | ||
32 | return exynos4210_uart_FIFO_trigger_level(s->channel, reg); | ||
21 | } | 33 | } |
22 | 34 | ||
23 | +/* Clear the bits above an N-bit vector, for N = (is_q ? 128 : 64). | 35 | +/* |
24 | + * If SVE is not enabled, then there are only 128 bits in the vector. | 36 | + * Update Rx DMA busy signal if Rx DMA is enabled. For simplicity, |
37 | + * mark DMA as busy if DMA is enabled and the receive buffer is empty. | ||
25 | + */ | 38 | + */ |
26 | +static void clear_vec_high(DisasContext *s, bool is_q, int rd) | 39 | +static void exynos4210_uart_update_dmabusy(Exynos4210UartState *s) |
27 | +{ | 40 | +{ |
28 | + unsigned ofs = fp_reg_offset(s, rd, MO_64); | 41 | + bool rx_dma_enabled = (s->reg[I_(UCON)] & 0x03) == 0x02; |
29 | + unsigned vsz = vec_full_reg_size(s); | 42 | + uint32_t count = fifo_elements_number(&s->rx); |
30 | + | 43 | + |
31 | + if (!is_q) { | 44 | + if (rx_dma_enabled && !count) { |
32 | + TCGv_i64 tcg_zero = tcg_const_i64(0); | 45 | + qemu_irq_raise(s->dmairq); |
33 | + tcg_gen_st_i64(tcg_zero, cpu_env, ofs + 8); | 46 | + trace_exynos_uart_dmabusy(s->channel); |
34 | + tcg_temp_free_i64(tcg_zero); | 47 | + } else { |
35 | + } | 48 | + qemu_irq_lower(s->dmairq); |
36 | + if (vsz > 16) { | 49 | + trace_exynos_uart_dmaready(s->channel); |
37 | + tcg_gen_gvec_dup8i(ofs + 16, vsz - 16, vsz - 16, 0); | ||
38 | + } | 50 | + } |
39 | +} | 51 | +} |
40 | + | 52 | + |
41 | static void write_fp_dreg(DisasContext *s, int reg, TCGv_i64 v) | 53 | static void exynos4210_uart_update_irq(Exynos4210UartState *s) |
42 | { | 54 | { |
43 | - TCGv_i64 tcg_zero = tcg_const_i64(0); | 55 | /* |
44 | + unsigned ofs = fp_reg_offset(s, reg, MO_64); | 56 | @@ -XXX,XX +XXX,XX @@ static void exynos4210_uart_update_irq(Exynos4210UartState *s) |
45 | 57 | count = fifo_elements_number(&s->rx); | |
46 | - tcg_gen_st_i64(v, cpu_env, fp_reg_offset(s, reg, MO_64)); | 58 | if ((count && !(s->reg[I_(UCON)] & 0x80)) || |
47 | - tcg_gen_st_i64(tcg_zero, cpu_env, fp_reg_hi_offset(s, reg)); | 59 | count >= exynos4210_uart_Rx_FIFO_trigger_level(s)) { |
48 | - tcg_temp_free_i64(tcg_zero); | 60 | + exynos4210_uart_update_dmabusy(s); |
49 | + tcg_gen_st_i64(v, cpu_env, ofs); | 61 | s->reg[I_(UINTSP)] |= UINTSP_RXD; |
50 | + clear_vec_high(s, false, reg); | 62 | timer_del(s->fifo_timeout_timer); |
51 | } | 63 | } |
52 | 64 | } else if (s->reg[I_(UTRSTAT)] & UTRSTAT_Rx_BUFFER_DATA_READY) { | |
53 | static void write_fp_sreg(DisasContext *s, int reg, TCGv_i32 v) | 65 | + exynos4210_uart_update_dmabusy(s); |
54 | @@ -XXX,XX +XXX,XX @@ static void do_fp_ld(DisasContext *s, int destidx, TCGv_i64 tcg_addr, int size) | 66 | s->reg[I_(UINTSP)] |= UINTSP_RXD; |
55 | 67 | } | |
56 | tcg_temp_free_i64(tmplo); | 68 | |
57 | tcg_temp_free_i64(tmphi); | 69 | @@ -XXX,XX +XXX,XX @@ static void exynos4210_uart_timeout_int(void *opaque) |
58 | + | 70 | (s->reg[I_(UCON)] & (1 << 11))) { |
59 | + clear_vec_high(s, true, destidx); | 71 | s->reg[I_(UINTSP)] |= UINTSP_RXD; |
60 | } | 72 | s->reg[I_(UTRSTAT)] |= UTRSTAT_Rx_TIMEOUT; |
61 | 73 | + exynos4210_uart_update_dmabusy(s); | |
62 | /* | 74 | exynos4210_uart_update_irq(s); |
63 | @@ -XXX,XX +XXX,XX @@ static void write_vec_element_i32(DisasContext *s, TCGv_i32 tcg_src, | ||
64 | } | 75 | } |
65 | } | 76 | } |
66 | 77 | @@ -XXX,XX +XXX,XX @@ static uint64_t exynos4210_uart_read(void *opaque, hwaddr offset, | |
67 | -/* Clear the high 64 bits of a 128 bit vector (in general non-quad | 78 | s->reg[I_(UTRSTAT)] &= ~UTRSTAT_Rx_BUFFER_DATA_READY; |
68 | - * vector ops all need to do this). | 79 | res = s->reg[I_(URXH)]; |
69 | - */ | 80 | } |
70 | -static void clear_vec_high(DisasContext *s, int rd) | 81 | + exynos4210_uart_update_dmabusy(s); |
71 | -{ | 82 | trace_exynos_uart_read(s->channel, offset, |
72 | - TCGv_i64 tcg_zero = tcg_const_i64(0); | 83 | exynos4210_uart_regname(offset), res); |
73 | - | 84 | return res; |
74 | - write_vec_element(s, tcg_zero, rd, 1, MO_64); | 85 | @@ -XXX,XX +XXX,XX @@ static void exynos4210_uart_init(Object *obj) |
75 | - tcg_temp_free_i64(tcg_zero); | 86 | sysbus_init_mmio(dev, &s->iomem); |
76 | -} | 87 | |
77 | - | 88 | sysbus_init_irq(dev, &s->irq); |
78 | /* Store from vector register to memory */ | 89 | + sysbus_init_irq(dev, &s->dmairq); |
79 | static void do_vec_st(DisasContext *s, int srcidx, int element, | ||
80 | TCGv_i64 tcg_addr, int size) | ||
81 | @@ -XXX,XX +XXX,XX @@ static void disas_ldst_multiple_struct(DisasContext *s, uint32_t insn) | ||
82 | /* For non-quad operations, setting a slice of the low | ||
83 | * 64 bits of the register clears the high 64 bits (in | ||
84 | * the ARM ARM pseudocode this is implicit in the fact | ||
85 | - * that 'rval' is a 64 bit wide variable). We optimize | ||
86 | - * by noticing that we only need to do this the first | ||
87 | - * time we touch a register. | ||
88 | + * that 'rval' is a 64 bit wide variable). | ||
89 | + * For quad operations, we might still need to zero the | ||
90 | + * high bits of SVE. We optimize by noticing that we only | ||
91 | + * need to do this the first time we touch a register. | ||
92 | */ | ||
93 | - if (!is_q && e == 0 && (r == 0 || xs == selem - 1)) { | ||
94 | - clear_vec_high(s, tt); | ||
95 | + if (e == 0 && (r == 0 || xs == selem - 1)) { | ||
96 | + clear_vec_high(s, is_q, tt); | ||
97 | } | ||
98 | } | ||
99 | tcg_gen_addi_i64(tcg_addr, tcg_addr, ebytes); | ||
100 | @@ -XXX,XX +XXX,XX @@ static void disas_ldst_single_struct(DisasContext *s, uint32_t insn) | ||
101 | write_vec_element(s, tcg_tmp, rt, 0, MO_64); | ||
102 | if (is_q) { | ||
103 | write_vec_element(s, tcg_tmp, rt, 1, MO_64); | ||
104 | - } else { | ||
105 | - clear_vec_high(s, rt); | ||
106 | } | ||
107 | tcg_temp_free_i64(tcg_tmp); | ||
108 | + clear_vec_high(s, is_q, rt); | ||
109 | } else { | ||
110 | /* Load/store one element per register */ | ||
111 | if (is_load) { | ||
112 | @@ -XXX,XX +XXX,XX @@ static void handle_vec_simd_sqshrn(DisasContext *s, bool is_scalar, bool is_q, | ||
113 | } | ||
114 | |||
115 | if (!is_q) { | ||
116 | - clear_vec_high(s, rd); | ||
117 | write_vec_element(s, tcg_final, rd, 0, MO_64); | ||
118 | } else { | ||
119 | write_vec_element(s, tcg_final, rd, 1, MO_64); | ||
120 | @@ -XXX,XX +XXX,XX @@ static void handle_vec_simd_sqshrn(DisasContext *s, bool is_scalar, bool is_q, | ||
121 | tcg_temp_free_i64(tcg_rd); | ||
122 | tcg_temp_free_i32(tcg_rd_narrowed); | ||
123 | tcg_temp_free_i64(tcg_final); | ||
124 | - return; | ||
125 | + | ||
126 | + clear_vec_high(s, is_q, rd); | ||
127 | } | 90 | } |
128 | 91 | ||
129 | /* SQSHLU, UQSHL, SQSHL: saturating left shifts */ | 92 | static void exynos4210_uart_realize(DeviceState *dev, Error **errp) |
130 | @@ -XXX,XX +XXX,XX @@ static void handle_simd_qshl(DisasContext *s, bool scalar, bool is_q, | 93 | diff --git a/hw/char/trace-events b/hw/char/trace-events |
131 | tcg_temp_free_i64(tcg_op); | 94 | index XXXXXXX..XXXXXXX 100644 |
132 | } | 95 | --- a/hw/char/trace-events |
133 | tcg_temp_free_i64(tcg_shift); | 96 | +++ b/hw/char/trace-events |
134 | - | 97 | @@ -XXX,XX +XXX,XX @@ nrf51_uart_read(uint64_t addr, uint64_t r, unsigned int size) "addr 0x%" PRIx64 |
135 | - if (!is_q) { | 98 | nrf51_uart_write(uint64_t addr, uint64_t value, unsigned int size) "addr 0x%" PRIx64 " value 0x%" PRIx64 " size %u" |
136 | - clear_vec_high(s, rd); | 99 | |
137 | - } | 100 | # exynos4210_uart.c |
138 | + clear_vec_high(s, is_q, rd); | 101 | +exynos_uart_dmabusy(uint32_t channel) "UART%d: DMA busy (Rx buffer empty)" |
139 | } else { | 102 | +exynos_uart_dmaready(uint32_t channel) "UART%d: DMA ready" |
140 | TCGv_i32 tcg_shift = tcg_const_i32(shift); | 103 | exynos_uart_irq_raised(uint32_t channel, uint32_t reg) "UART%d: IRQ raised: 0x%08"PRIx32 |
141 | static NeonGenTwoOpEnvFn * const fns[2][2][3] = { | 104 | exynos_uart_irq_lowered(uint32_t channel) "UART%d: IRQ lowered" |
142 | @@ -XXX,XX +XXX,XX @@ static void handle_simd_qshl(DisasContext *s, bool scalar, bool is_q, | 105 | exynos_uart_update_params(uint32_t channel, int speed, uint8_t parity, int data, int stop, uint64_t wordtime) "UART%d: speed: %d, parity: %c, data bits: %d, stop bits: %d wordtime: %"PRId64"ns" |
143 | } | ||
144 | tcg_temp_free_i32(tcg_shift); | ||
145 | |||
146 | - if (!is_q && !scalar) { | ||
147 | - clear_vec_high(s, rd); | ||
148 | + if (!scalar) { | ||
149 | + clear_vec_high(s, is_q, rd); | ||
150 | } | ||
151 | } | ||
152 | } | ||
153 | @@ -XXX,XX +XXX,XX @@ static void handle_simd_intfp_conv(DisasContext *s, int rd, int rn, | ||
154 | } | ||
155 | } | ||
156 | |||
157 | - if (!is_double && elements == 2) { | ||
158 | - clear_vec_high(s, rd); | ||
159 | - } | ||
160 | - | ||
161 | tcg_temp_free_i64(tcg_int); | ||
162 | tcg_temp_free_ptr(tcg_fpst); | ||
163 | tcg_temp_free_i32(tcg_shift); | ||
164 | + | ||
165 | + clear_vec_high(s, elements << size == 16, rd); | ||
166 | } | ||
167 | |||
168 | /* UCVTF/SCVTF - Integer to FP conversion */ | ||
169 | @@ -XXX,XX +XXX,XX @@ static void handle_simd_shift_fpint_conv(DisasContext *s, bool is_scalar, | ||
170 | write_vec_element(s, tcg_op, rd, pass, MO_64); | ||
171 | tcg_temp_free_i64(tcg_op); | ||
172 | } | ||
173 | - if (!is_q) { | ||
174 | - clear_vec_high(s, rd); | ||
175 | - } | ||
176 | + clear_vec_high(s, is_q, rd); | ||
177 | } else { | ||
178 | int maxpass = is_scalar ? 1 : is_q ? 4 : 2; | ||
179 | for (pass = 0; pass < maxpass; pass++) { | ||
180 | @@ -XXX,XX +XXX,XX @@ static void handle_simd_shift_fpint_conv(DisasContext *s, bool is_scalar, | ||
181 | } | ||
182 | tcg_temp_free_i32(tcg_op); | ||
183 | } | ||
184 | - if (!is_q && !is_scalar) { | ||
185 | - clear_vec_high(s, rd); | ||
186 | + if (!is_scalar) { | ||
187 | + clear_vec_high(s, is_q, rd); | ||
188 | } | ||
189 | } | ||
190 | |||
191 | @@ -XXX,XX +XXX,XX @@ static void handle_3same_float(DisasContext *s, int size, int elements, | ||
192 | |||
193 | tcg_temp_free_ptr(fpst); | ||
194 | |||
195 | - if ((elements << size) < 4) { | ||
196 | - /* scalar, or non-quad vector op */ | ||
197 | - clear_vec_high(s, rd); | ||
198 | - } | ||
199 | + clear_vec_high(s, elements * (size ? 8 : 4) > 8, rd); | ||
200 | } | ||
201 | |||
202 | /* AdvSIMD scalar three same | ||
203 | @@ -XXX,XX +XXX,XX @@ static void handle_2misc_fcmp_zero(DisasContext *s, int opcode, | ||
204 | } | ||
205 | write_vec_element(s, tcg_res, rd, pass, MO_64); | ||
206 | } | ||
207 | - if (is_scalar) { | ||
208 | - clear_vec_high(s, rd); | ||
209 | - } | ||
210 | - | ||
211 | tcg_temp_free_i64(tcg_res); | ||
212 | tcg_temp_free_i64(tcg_zero); | ||
213 | tcg_temp_free_i64(tcg_op); | ||
214 | + | ||
215 | + clear_vec_high(s, !is_scalar, rd); | ||
216 | } else { | ||
217 | TCGv_i32 tcg_op = tcg_temp_new_i32(); | ||
218 | TCGv_i32 tcg_zero = tcg_const_i32(0); | ||
219 | @@ -XXX,XX +XXX,XX @@ static void handle_2misc_fcmp_zero(DisasContext *s, int opcode, | ||
220 | tcg_temp_free_i32(tcg_res); | ||
221 | tcg_temp_free_i32(tcg_zero); | ||
222 | tcg_temp_free_i32(tcg_op); | ||
223 | - if (!is_q && !is_scalar) { | ||
224 | - clear_vec_high(s, rd); | ||
225 | + if (!is_scalar) { | ||
226 | + clear_vec_high(s, is_q, rd); | ||
227 | } | ||
228 | } | ||
229 | |||
230 | @@ -XXX,XX +XXX,XX @@ static void handle_2misc_reciprocal(DisasContext *s, int opcode, | ||
231 | } | ||
232 | write_vec_element(s, tcg_res, rd, pass, MO_64); | ||
233 | } | ||
234 | - if (is_scalar) { | ||
235 | - clear_vec_high(s, rd); | ||
236 | - } | ||
237 | - | ||
238 | tcg_temp_free_i64(tcg_res); | ||
239 | tcg_temp_free_i64(tcg_op); | ||
240 | + clear_vec_high(s, !is_scalar, rd); | ||
241 | } else { | ||
242 | TCGv_i32 tcg_op = tcg_temp_new_i32(); | ||
243 | TCGv_i32 tcg_res = tcg_temp_new_i32(); | ||
244 | @@ -XXX,XX +XXX,XX @@ static void handle_2misc_reciprocal(DisasContext *s, int opcode, | ||
245 | } | ||
246 | tcg_temp_free_i32(tcg_res); | ||
247 | tcg_temp_free_i32(tcg_op); | ||
248 | - if (!is_q && !is_scalar) { | ||
249 | - clear_vec_high(s, rd); | ||
250 | + if (!is_scalar) { | ||
251 | + clear_vec_high(s, is_q, rd); | ||
252 | } | ||
253 | } | ||
254 | tcg_temp_free_ptr(fpst); | ||
255 | @@ -XXX,XX +XXX,XX @@ static void handle_2misc_narrow(DisasContext *s, bool scalar, | ||
256 | write_vec_element_i32(s, tcg_res[pass], rd, destelt + pass, MO_32); | ||
257 | tcg_temp_free_i32(tcg_res[pass]); | ||
258 | } | ||
259 | - if (!is_q) { | ||
260 | - clear_vec_high(s, rd); | ||
261 | - } | ||
262 | + clear_vec_high(s, is_q, rd); | ||
263 | } | ||
264 | |||
265 | /* Remaining saturating accumulating ops */ | ||
266 | @@ -XXX,XX +XXX,XX @@ static void handle_2misc_satacc(DisasContext *s, bool is_scalar, bool is_u, | ||
267 | } | ||
268 | write_vec_element(s, tcg_rd, rd, pass, MO_64); | ||
269 | } | ||
270 | - if (is_scalar) { | ||
271 | - clear_vec_high(s, rd); | ||
272 | - } | ||
273 | - | ||
274 | tcg_temp_free_i64(tcg_rd); | ||
275 | tcg_temp_free_i64(tcg_rn); | ||
276 | + clear_vec_high(s, !is_scalar, rd); | ||
277 | } else { | ||
278 | TCGv_i32 tcg_rn = tcg_temp_new_i32(); | ||
279 | TCGv_i32 tcg_rd = tcg_temp_new_i32(); | ||
280 | @@ -XXX,XX +XXX,XX @@ static void handle_2misc_satacc(DisasContext *s, bool is_scalar, bool is_u, | ||
281 | } | ||
282 | write_vec_element_i32(s, tcg_rd, rd, pass, MO_32); | ||
283 | } | ||
284 | - | ||
285 | - if (!is_q) { | ||
286 | - clear_vec_high(s, rd); | ||
287 | - } | ||
288 | - | ||
289 | tcg_temp_free_i32(tcg_rd); | ||
290 | tcg_temp_free_i32(tcg_rn); | ||
291 | + clear_vec_high(s, is_q, rd); | ||
292 | } | ||
293 | } | ||
294 | |||
295 | @@ -XXX,XX +XXX,XX @@ static void handle_vec_simd_shri(DisasContext *s, bool is_q, bool is_u, | ||
296 | tcg_temp_free_i64(tcg_round); | ||
297 | |||
298 | done: | ||
299 | - if (!is_q) { | ||
300 | - clear_vec_high(s, rd); | ||
301 | - } | ||
302 | + clear_vec_high(s, is_q, rd); | ||
303 | } | ||
304 | |||
305 | static void gen_shl8_ins_i64(TCGv_i64 d, TCGv_i64 a, int64_t shift) | ||
306 | @@ -XXX,XX +XXX,XX @@ static void handle_vec_simd_shrn(DisasContext *s, bool is_q, | ||
307 | } | ||
308 | |||
309 | if (!is_q) { | ||
310 | - clear_vec_high(s, rd); | ||
311 | write_vec_element(s, tcg_final, rd, 0, MO_64); | ||
312 | } else { | ||
313 | write_vec_element(s, tcg_final, rd, 1, MO_64); | ||
314 | } | ||
315 | - | ||
316 | if (round) { | ||
317 | tcg_temp_free_i64(tcg_round); | ||
318 | } | ||
319 | tcg_temp_free_i64(tcg_rn); | ||
320 | tcg_temp_free_i64(tcg_rd); | ||
321 | tcg_temp_free_i64(tcg_final); | ||
322 | - return; | ||
323 | + | ||
324 | + clear_vec_high(s, is_q, rd); | ||
325 | } | ||
326 | |||
327 | |||
328 | @@ -XXX,XX +XXX,XX @@ static void handle_3rd_narrowing(DisasContext *s, int is_q, int is_u, int size, | ||
329 | write_vec_element_i32(s, tcg_res[pass], rd, pass + part, MO_32); | ||
330 | tcg_temp_free_i32(tcg_res[pass]); | ||
331 | } | ||
332 | - if (!is_q) { | ||
333 | - clear_vec_high(s, rd); | ||
334 | - } | ||
335 | + clear_vec_high(s, is_q, rd); | ||
336 | } | ||
337 | |||
338 | static void handle_pmull_64(DisasContext *s, int is_q, int rd, int rn, int rm) | ||
339 | @@ -XXX,XX +XXX,XX @@ static void handle_simd_3same_pair(DisasContext *s, int is_q, int u, int opcode, | ||
340 | write_vec_element_i32(s, tcg_res[pass], rd, pass, MO_32); | ||
341 | tcg_temp_free_i32(tcg_res[pass]); | ||
342 | } | ||
343 | - if (!is_q) { | ||
344 | - clear_vec_high(s, rd); | ||
345 | - } | ||
346 | + clear_vec_high(s, is_q, rd); | ||
347 | } | ||
348 | |||
349 | if (fpst) { | ||
350 | @@ -XXX,XX +XXX,XX @@ static void disas_simd_3same_int(DisasContext *s, uint32_t insn) | ||
351 | tcg_temp_free_i32(tcg_op2); | ||
352 | } | ||
353 | } | ||
354 | - | ||
355 | - if (!is_q) { | ||
356 | - clear_vec_high(s, rd); | ||
357 | - } | ||
358 | + clear_vec_high(s, is_q, rd); | ||
359 | } | ||
360 | |||
361 | /* AdvSIMD three same | ||
362 | @@ -XXX,XX +XXX,XX @@ static void handle_rev(DisasContext *s, int opcode, bool u, | ||
363 | write_vec_element(s, tcg_tmp, rd, i, grp_size); | ||
364 | tcg_temp_free_i64(tcg_tmp); | ||
365 | } | ||
366 | - if (!is_q) { | ||
367 | - clear_vec_high(s, rd); | ||
368 | - } | ||
369 | + clear_vec_high(s, is_q, rd); | ||
370 | } else { | ||
371 | int revmask = (1 << grp_size) - 1; | ||
372 | int esize = 8 << size; | ||
373 | @@ -XXX,XX +XXX,XX @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn) | ||
374 | tcg_temp_free_i32(tcg_op); | ||
375 | } | ||
376 | } | ||
377 | - if (!is_q) { | ||
378 | - clear_vec_high(s, rd); | ||
379 | - } | ||
380 | + clear_vec_high(s, is_q, rd); | ||
381 | |||
382 | if (need_rmode) { | ||
383 | gen_helper_set_rmode(tcg_rmode, tcg_rmode, cpu_env); | ||
384 | @@ -XXX,XX +XXX,XX @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn) | ||
385 | tcg_temp_free_i64(tcg_res); | ||
386 | } | ||
387 | |||
388 | - if (is_scalar) { | ||
389 | - clear_vec_high(s, rd); | ||
390 | - } | ||
391 | - | ||
392 | tcg_temp_free_i64(tcg_idx); | ||
393 | + clear_vec_high(s, !is_scalar, rd); | ||
394 | } else if (!is_long) { | ||
395 | /* 32 bit floating point, or 16 or 32 bit integer. | ||
396 | * For the 16 bit scalar case we use the usual Neon helpers and | ||
397 | @@ -XXX,XX +XXX,XX @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn) | ||
398 | } | ||
399 | |||
400 | tcg_temp_free_i32(tcg_idx); | ||
401 | - | ||
402 | - if (!is_q) { | ||
403 | - clear_vec_high(s, rd); | ||
404 | - } | ||
405 | + clear_vec_high(s, is_q, rd); | ||
406 | } else { | ||
407 | /* long ops: 16x16->32 or 32x32->64 */ | ||
408 | TCGv_i64 tcg_res[2]; | ||
409 | @@ -XXX,XX +XXX,XX @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn) | ||
410 | } | ||
411 | tcg_temp_free_i64(tcg_idx); | ||
412 | |||
413 | - if (is_scalar) { | ||
414 | - clear_vec_high(s, rd); | ||
415 | - } | ||
416 | + clear_vec_high(s, !is_scalar, rd); | ||
417 | } else { | ||
418 | TCGv_i32 tcg_idx = tcg_temp_new_i32(); | ||
419 | |||
420 | -- | 106 | -- |
421 | 2.16.1 | 107 | 2.20.1 |
422 | 108 | ||
423 | 109 | diff view generated by jsdifflib |
1 | From: Pekka Enberg <penberg@iki.fi> | 1 | From: Guenter Roeck <linux@roeck-us.net> |
---|---|---|---|
2 | 2 | ||
3 | This patch adds a "cpu-type" property to BCM2836 SoC in preparation for | 3 | The Exynos4210 serial driver uses an interrupt line to signal if receive |
4 | reusing the code for the Raspberry Pi 3, which has a different processor | 4 | data is available. Connect that interrupt with the DMA controller's |
5 | model. | 5 | 'peripheral busy' gpio pin to stop the DMA if there is no more receive |
6 | data available. Without this patch, receive DMA runs wild and fills the | ||
7 | entire receive DMA buffer with invalid data. | ||
6 | 8 | ||
7 | Signed-off-by: Pekka Enberg <penberg@iki.fi> | ||
8 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> | 9 | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> |
10 | Signed-off-by: Guenter Roeck <linux@roeck-us.net> | ||
11 | Message-id: 20200123052540.6132-9-linux@roeck-us.net | ||
9 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | 12 | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
10 | --- | 13 | --- |
11 | include/hw/arm/bcm2836.h | 1 + | 14 | hw/arm/exynos4210.c | 42 +++++++++++++++++++++++++++++------------- |
12 | hw/arm/bcm2836.c | 17 +++++++++-------- | 15 | 1 file changed, 29 insertions(+), 13 deletions(-) |
13 | hw/arm/raspi.c | 3 +++ | ||
14 | 3 files changed, 13 insertions(+), 8 deletions(-) | ||
15 | 16 | ||
16 | diff --git a/include/hw/arm/bcm2836.h b/include/hw/arm/bcm2836.h | 17 | diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c |
17 | index XXXXXXX..XXXXXXX 100644 | 18 | index XXXXXXX..XXXXXXX 100644 |
18 | --- a/include/hw/arm/bcm2836.h | 19 | --- a/hw/arm/exynos4210.c |
19 | +++ b/include/hw/arm/bcm2836.h | 20 | +++ b/hw/arm/exynos4210.c |
20 | @@ -XXX,XX +XXX,XX @@ typedef struct BCM2836State { | 21 | @@ -XXX,XX +XXX,XX @@ static uint64_t exynos4210_calc_affinity(int cpu) |
21 | DeviceState parent_obj; | 22 | return (0x9 << ARM_AFF1_SHIFT) | cpu; |
22 | /*< public >*/ | 23 | } |
23 | 24 | ||
24 | + char *cpu_type; | 25 | -static void pl330_create(uint32_t base, qemu_or_irq *orgate, qemu_irq irq, |
25 | uint32_t enabled_cpus; | 26 | - int nreq, int nevents, int width) |
26 | 27 | +static DeviceState *pl330_create(uint32_t base, qemu_or_irq *orgate, | |
27 | ARMCPU cpus[BCM2836_NCPUS]; | 28 | + qemu_irq irq, int nreq, int nevents, int width) |
28 | diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c | ||
29 | index XXXXXXX..XXXXXXX 100644 | ||
30 | --- a/hw/arm/bcm2836.c | ||
31 | +++ b/hw/arm/bcm2836.c | ||
32 | @@ -XXX,XX +XXX,XX @@ | ||
33 | static void bcm2836_init(Object *obj) | ||
34 | { | 29 | { |
35 | BCM2836State *s = BCM2836(obj); | 30 | SysBusDevice *busdev; |
36 | - int n; | 31 | DeviceState *dev; |
37 | - | 32 | @@ -XXX,XX +XXX,XX @@ static void pl330_create(uint32_t base, qemu_or_irq *orgate, qemu_irq irq, |
38 | - for (n = 0; n < BCM2836_NCPUS; n++) { | 33 | sysbus_connect_irq(busdev, i, qdev_get_gpio_in(DEVICE(orgate), i)); |
39 | - object_initialize(&s->cpus[n], sizeof(s->cpus[n]), | 34 | } |
40 | - "cortex-a15-" TYPE_ARM_CPU); | 35 | qdev_connect_gpio_out(DEVICE(orgate), 0, irq); |
41 | - object_property_add_child(obj, "cpu[*]", OBJECT(&s->cpus[n]), | 36 | + return dev; |
42 | - &error_abort); | 37 | } |
43 | - } | 38 | |
44 | 39 | static void exynos4210_realize(DeviceState *socdev, Error **errp) | |
45 | object_initialize(&s->control, sizeof(s->control), TYPE_BCM2836_CONTROL); | 40 | @@ -XXX,XX +XXX,XX @@ static void exynos4210_realize(DeviceState *socdev, Error **errp) |
46 | object_property_add_child(obj, "control", OBJECT(&s->control), NULL); | 41 | MemoryRegion *system_mem = get_system_memory(); |
47 | @@ -XXX,XX +XXX,XX @@ static void bcm2836_realize(DeviceState *dev, Error **errp) | 42 | qemu_irq gate_irq[EXYNOS4210_NCPUS][EXYNOS4210_IRQ_GATE_NINPUTS]; |
48 | 43 | SysBusDevice *busdev; | |
49 | /* common peripherals from bcm2835 */ | 44 | - DeviceState *dev; |
50 | 45 | + DeviceState *dev, *uart[4], *pl330[3]; | |
51 | + obj = OBJECT(dev); | 46 | int i, n; |
52 | + for (n = 0; n < BCM2836_NCPUS; n++) { | 47 | |
53 | + object_initialize(&s->cpus[n], sizeof(s->cpus[n]), | 48 | for (n = 0; n < EXYNOS4210_NCPUS; n++) { |
54 | + s->cpu_type); | 49 | @@ -XXX,XX +XXX,XX @@ static void exynos4210_realize(DeviceState *socdev, Error **errp) |
55 | + object_property_add_child(obj, "cpu[*]", OBJECT(&s->cpus[n]), | 50 | |
56 | + &error_abort); | 51 | |
57 | + } | 52 | /*** UARTs ***/ |
53 | - exynos4210_uart_create(EXYNOS4210_UART0_BASE_ADDR, | ||
54 | + uart[0] = exynos4210_uart_create(EXYNOS4210_UART0_BASE_ADDR, | ||
55 | EXYNOS4210_UART0_FIFO_SIZE, 0, serial_hd(0), | ||
56 | s->irq_table[exynos4210_get_irq(EXYNOS4210_UART_INT_GRP, 0)]); | ||
57 | |||
58 | - exynos4210_uart_create(EXYNOS4210_UART1_BASE_ADDR, | ||
59 | + uart[1] = exynos4210_uart_create(EXYNOS4210_UART1_BASE_ADDR, | ||
60 | EXYNOS4210_UART1_FIFO_SIZE, 1, serial_hd(1), | ||
61 | s->irq_table[exynos4210_get_irq(EXYNOS4210_UART_INT_GRP, 1)]); | ||
62 | |||
63 | - exynos4210_uart_create(EXYNOS4210_UART2_BASE_ADDR, | ||
64 | + uart[2] = exynos4210_uart_create(EXYNOS4210_UART2_BASE_ADDR, | ||
65 | EXYNOS4210_UART2_FIFO_SIZE, 2, serial_hd(2), | ||
66 | s->irq_table[exynos4210_get_irq(EXYNOS4210_UART_INT_GRP, 2)]); | ||
67 | |||
68 | - exynos4210_uart_create(EXYNOS4210_UART3_BASE_ADDR, | ||
69 | + uart[3] = exynos4210_uart_create(EXYNOS4210_UART3_BASE_ADDR, | ||
70 | EXYNOS4210_UART3_FIFO_SIZE, 3, serial_hd(3), | ||
71 | s->irq_table[exynos4210_get_irq(EXYNOS4210_UART_INT_GRP, 3)]); | ||
72 | |||
73 | @@ -XXX,XX +XXX,XX @@ static void exynos4210_realize(DeviceState *socdev, Error **errp) | ||
74 | s->irq_table[exynos4210_get_irq(28, 3)]); | ||
75 | |||
76 | /*** DMA controllers ***/ | ||
77 | - pl330_create(EXYNOS4210_PL330_BASE0_ADDR, &s->pl330_irq_orgate[0], | ||
78 | - s->irq_table[exynos4210_get_irq(21, 0)], 32, 32, 32); | ||
79 | - pl330_create(EXYNOS4210_PL330_BASE1_ADDR, &s->pl330_irq_orgate[1], | ||
80 | - s->irq_table[exynos4210_get_irq(21, 1)], 32, 32, 32); | ||
81 | - pl330_create(EXYNOS4210_PL330_BASE2_ADDR, &s->pl330_irq_orgate[2], | ||
82 | - s->irq_table[exynos4210_get_irq(20, 1)], 1, 31, 64); | ||
83 | + pl330[0] = pl330_create(EXYNOS4210_PL330_BASE0_ADDR, | ||
84 | + &s->pl330_irq_orgate[0], | ||
85 | + s->irq_table[exynos4210_get_irq(21, 0)], | ||
86 | + 32, 32, 32); | ||
87 | + pl330[1] = pl330_create(EXYNOS4210_PL330_BASE1_ADDR, | ||
88 | + &s->pl330_irq_orgate[1], | ||
89 | + s->irq_table[exynos4210_get_irq(21, 1)], | ||
90 | + 32, 32, 32); | ||
91 | + pl330[2] = pl330_create(EXYNOS4210_PL330_BASE2_ADDR, | ||
92 | + &s->pl330_irq_orgate[2], | ||
93 | + s->irq_table[exynos4210_get_irq(20, 1)], | ||
94 | + 1, 31, 64); | ||
58 | + | 95 | + |
59 | obj = object_property_get_link(OBJECT(dev), "ram", &err); | 96 | + sysbus_connect_irq(SYS_BUS_DEVICE(uart[0]), 1, |
60 | if (obj == NULL) { | 97 | + qdev_get_gpio_in(pl330[0], 15)); |
61 | error_setg(errp, "%s: required ram link not found: %s", | 98 | + sysbus_connect_irq(SYS_BUS_DEVICE(uart[1]), 1, |
62 | @@ -XXX,XX +XXX,XX @@ static void bcm2836_realize(DeviceState *dev, Error **errp) | 99 | + qdev_get_gpio_in(pl330[1], 15)); |
100 | + sysbus_connect_irq(SYS_BUS_DEVICE(uart[2]), 1, | ||
101 | + qdev_get_gpio_in(pl330[0], 17)); | ||
102 | + sysbus_connect_irq(SYS_BUS_DEVICE(uart[3]), 1, | ||
103 | + qdev_get_gpio_in(pl330[1], 17)); | ||
63 | } | 104 | } |
64 | 105 | ||
65 | static Property bcm2836_props[] = { | 106 | static void exynos4210_init(Object *obj) |
66 | + DEFINE_PROP_STRING("cpu-type", BCM2836State, cpu_type), | ||
67 | DEFINE_PROP_UINT32("enabled-cpus", BCM2836State, enabled_cpus, BCM2836_NCPUS), | ||
68 | DEFINE_PROP_END_OF_LIST() | ||
69 | }; | ||
70 | diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c | ||
71 | index XXXXXXX..XXXXXXX 100644 | ||
72 | --- a/hw/arm/raspi.c | ||
73 | +++ b/hw/arm/raspi.c | ||
74 | @@ -XXX,XX +XXX,XX @@ static void raspi2_init(MachineState *machine) | ||
75 | /* Setup the SOC */ | ||
76 | object_property_add_const_link(OBJECT(&s->soc), "ram", OBJECT(&s->ram), | ||
77 | &error_abort); | ||
78 | + object_property_set_str(OBJECT(&s->soc), machine->cpu_type, "cpu-type", | ||
79 | + &error_abort); | ||
80 | object_property_set_int(OBJECT(&s->soc), smp_cpus, "enabled-cpus", | ||
81 | &error_abort); | ||
82 | object_property_set_int(OBJECT(&s->soc), 0xa21041, "board-rev", | ||
83 | @@ -XXX,XX +XXX,XX @@ static void raspi2_machine_init(MachineClass *mc) | ||
84 | mc->no_parallel = 1; | ||
85 | mc->no_floppy = 1; | ||
86 | mc->no_cdrom = 1; | ||
87 | + mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a15"); | ||
88 | mc->max_cpus = BCM2836_NCPUS; | ||
89 | mc->min_cpus = BCM2836_NCPUS; | ||
90 | mc->default_cpus = BCM2836_NCPUS; | ||
91 | -- | 107 | -- |
92 | 2.16.1 | 108 | 2.20.1 |
93 | 109 | ||
94 | 110 | diff view generated by jsdifflib |