target/arm/translate.c: Fix missing 'break' for TT insns

[Qemu-devel] [PATCH] target/arm/translate.c: Fix missing 'break' for TT insns

Peter Maydell posted 1 patch 6 years, 2 months ago

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git fetch https://github.com/patchew-project/qemu tags/patchew/20180206103941.13985-1-peter.maydell@linaro.org

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target/arm/translate.c | 1 +
1 file changed, 1 insertion(+)

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[Qemu-devel] [PATCH] target/arm/translate.c: Fix missing 'break' for TT insns

Posted by Peter Maydell 6 years, 2 months ago

The code where we added the TT instruction was accidentally
missing a 'break', which meant that after generating the code
to execute the TT we would fall through to 'goto illegal_op'
and generate code to take an UNDEF insn.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
Doh...

 target/arm/translate.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/arm/translate.c b/target/arm/translate.c
index 55826b7e5a..572c4d1cb6 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -9926,6 +9926,7 @@ static void disas_thumb2_insn(DisasContext *s, uint32_t insn)
                         tcg_temp_free_i32(addr);
                         tcg_temp_free_i32(op);
                         store_reg(s, rd, ttresp);
+                        break;
                     }
                     goto illegal_op;
                 }
-- 
2.16.1

Re: [Qemu-devel] [Qemu-arm] [PATCH] target/arm/translate.c: Fix missing 'break' for TT insns

Posted by Philippe Mathieu-Daudé 6 years, 2 months ago

On 02/06/2018 07:39 AM, Peter Maydell wrote:
> The code where we added the TT instruction was accidentally

"In 5158de241b0 ..."

> missing a 'break', which meant that after generating the code
> to execute the TT we would fall through to 'goto illegal_op'
> and generate code to take an UNDEF insn.>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

> ---
> Doh...
> 
>  target/arm/translate.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/target/arm/translate.c b/target/arm/translate.c
> index 55826b7e5a..572c4d1cb6 100644
> --- a/target/arm/translate.c
> +++ b/target/arm/translate.c
> @@ -9926,6 +9926,7 @@ static void disas_thumb2_insn(DisasContext *s, uint32_t insn)
>                          tcg_temp_free_i32(addr);
>                          tcg_temp_free_i32(op);
>                          store_reg(s, rd, ttresp);
> +                        break;
>                      }
>                      goto illegal_op;
>                  }
>