[Qemu-devel] [PATCH v2 08/20] fpu/softfloat: improve comments on ARM NaN propagation

Alex Bennée posted 20 patches 8 years, 1 month ago
There is a newer version of this series
[Qemu-devel] [PATCH v2 08/20] fpu/softfloat: improve comments on ARM NaN propagation
Posted by Alex Bennée 8 years, 1 month ago
Mention the pseudo-code fragment from which this is based and correct
the spelling of signalling.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 fpu/softfloat-specialize.h | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h
index de2c5d5702..3d507d8c77 100644
--- a/fpu/softfloat-specialize.h
+++ b/fpu/softfloat-specialize.h
@@ -445,14 +445,15 @@ static float32 commonNaNToFloat32(commonNaNT a, float_status *status)
 
 #if defined(TARGET_ARM)
 static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
-                    flag aIsLargerSignificand)
+                   flag aIsLargerSignificand)
 {
-    /* ARM mandated NaN propagation rules: take the first of:
-     *  1. A if it is signaling
-     *  2. B if it is signaling
+    /* ARM mandated NaN propagation rules (see FPProcessNaNs()), take
+     * the first of:
+     *  1. A if it is signalling
+     *  2. B if it is signalling
      *  3. A (quiet)
      *  4. B (quiet)
-     * A signaling NaN is always quietened before returning it.
+     * A signalling NaN is always quietened before returning it.
      */
     if (aIsSNaN) {
         return 0;
-- 
2.15.1


Re: [Qemu-devel] [PATCH v2 08/20] fpu/softfloat: improve comments on ARM NaN propagation
Posted by Peter Maydell 8 years ago
On 9 January 2018 at 12:22, Alex Bennée <alex.bennee@linaro.org> wrote:
> Mention the pseudo-code fragment from which this is based and correct
> the spelling of signalling.
>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>  fpu/softfloat-specialize.h | 11 ++++++-----
>  1 file changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h
> index de2c5d5702..3d507d8c77 100644
> --- a/fpu/softfloat-specialize.h
> +++ b/fpu/softfloat-specialize.h
> @@ -445,14 +445,15 @@ static float32 commonNaNToFloat32(commonNaNT a, float_status *status)
>
>  #if defined(TARGET_ARM)
>  static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
> -                    flag aIsLargerSignificand)
> +                   flag aIsLargerSignificand)
>  {
> -    /* ARM mandated NaN propagation rules: take the first of:
> -     *  1. A if it is signaling
> -     *  2. B if it is signaling
> +    /* ARM mandated NaN propagation rules (see FPProcessNaNs()), take
> +     * the first of:
> +     *  1. A if it is signalling
> +     *  2. B if it is signalling
>       *  3. A (quiet)
>       *  4. B (quiet)
> -     * A signaling NaN is always quietened before returning it.
> +     * A signalling NaN is always quietened before returning it.
>       */
>      if (aIsSNaN) {
>          return 0;

The correct spelling here is "signaling" with one "l". The IEEE spec
uses that, and the Arm ARM follows it. (I think I mentioned this last
time around too.)

thanks
-- PMM