Hi Peter,

My RISU patch queue was running a little long so I thought I should
push up stuff that was ready. The first few patches are simply
clean-ups to the aarch64.risu file, mostly removing duplicate blocks
that have crept in.

There is a prerequisite clean-up patch which moves the filtering into
the common risugen code and passes an array of keys to the backend.

Then I add support for @GroupName annotations which allow for a nicer
selection of groups of instructions. This works across all
architectures now.

Finally a big (but mechanical) update of the aarch64.risu file. I've
aligned the names of the major groups to what the ASL/ARM ARM uses and
added some example @Groups for the gross sections. I expect to add
more fine-grained groups later as we add the new half-precision and
SVE instructions.

Alex Bennée (7):
  aarch64.risu: document naming conventions
  aarch64.risu: remove duplicate AdvSIMD Scalar 3 same block
  aarch64.risu: remove duplicate AdvSIMD scalar 2 reg misc block
  aarch64.risu: update AdvancedSIMD across lanes
  risugen/risugen_$arch: factor out instruction selection
  risugen: support @GroupName in risu files
  aarch64.risu: clean-up and annotate with groups

 README           |  10 ++
 aarch64.risu     | 423 +++++++++++++++++++++++++++++--------------------------
 risugen          |  49 ++++++-
 risugen_arm.pm   |  18 +--
 risugen_m68k.pm  |  18 +--
 risugen_ppc64.pm |  18 +--
 6 files changed, 285 insertions(+), 251 deletions(-)

-- 
2.14.2

On 31 October 2017 at 14:54, Alex Bennée <alex.bennee@linaro.org> wrote:
> Hi Peter,
>
> My RISU patch queue was running a little long so I thought I should
> push up stuff that was ready. The first few patches are simply
> clean-ups to the aarch64.risu file, mostly removing duplicate blocks
> that have crept in.
>
> There is a prerequisite clean-up patch which moves the filtering into
> the common risugen code and passes an array of keys to the backend.
>
> Then I add support for @GroupName annotations which allow for a nicer
> selection of groups of instructions. This works across all
> architectures now.
>
> Finally a big (but mechanical) update of the aarch64.risu file. I've
> aligned the names of the major groups to what the ASL/ARM ARM uses and
> added some example @Groups for the gross sections. I expect to add
> more fine-grained groups later as we add the new half-precision and
> SVE instructions.
>
> Alex Bennée (7):
>   aarch64.risu: document naming conventions
>   aarch64.risu: remove duplicate AdvSIMD Scalar 3 same block
>   aarch64.risu: remove duplicate AdvSIMD scalar 2 reg misc block
>   aarch64.risu: update AdvancedSIMD across lanes
>   risugen/risugen_$arch: factor out instruction selection
>   risugen: support @GroupName in risu files
>   aarch64.risu: clean-up and annotate with groups

I've pushed patches 1-5 to risu master, and provided comments
on patch 6. I'm going to just assume 7 is ok.

thanks
-- PMM