[v3] Relax code buffer size limitation on aarch64 hosts

[Qemu-devel] [PATCH v3 0/3] Relax code buffer size limitation on aarch64 hosts

Pranith Kumar posted 3 patches 6 years, 10 months ago

Diff against v2
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git fetch https://github.com/patchew-project/qemu tags/patchew/20170630004059.25619-1-bobby.prani@gmail.com

Test FreeBSD passed

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Test s390x passed

accel/tcg/translate-all.c    |  2 +-
tcg/aarch64/tcg-target.inc.c | 77 ++++++++++++++++++++++++++++++++++++--------
2 files changed, 64 insertions(+), 15 deletions(-)

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[Qemu-devel] [PATCH v3 0/3] Relax code buffer size limitation on aarch64 hosts

Posted by Pranith Kumar 6 years, 10 months ago

Hello,

The following patches enable us to relax the 128MB code buffer size
limitation on ARM64 hosts.

Patch 2 increases this limitation to 3GB, even though ADRP+ADD can
address 4GB of pc-relative addresses to give us some slack.

Patch 3 uses LDR (literal) to load the address, allowing us to remove
the code buffer size limitation altogether. However, I feel that 3GB
should be sufficient for now and hence did not change it ;). It
however enables the !USE_DIRECT_JUMP path on aarch64 hosts.

Thanks,

v3:
* Update with comments and reviews by Richard

Pranith Kumar (3):
  tcg/aarch64: Introduce and use long branch to register
  tcg/aarch64: Use ADRP+ADD to compute target address
  tcg/aarch64: Enable indirect jump path using LDR (literal)

 accel/tcg/translate-all.c    |  2 +-
 tcg/aarch64/tcg-target.inc.c | 77 ++++++++++++++++++++++++++++++++++++--------
 2 files changed, 64 insertions(+), 15 deletions(-)

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2.13.0