Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target/s390x/cpu_models.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c
index c3a4ce6..703feca 100644
--- a/target/s390x/cpu_models.c
+++ b/target/s390x/cpu_models.c
@@ -683,8 +683,11 @@ static void add_qemu_cpu_model_features(S390FeatBitmap fbm)
         S390_FEAT_ETF2_ENH,
         S390_FEAT_STORE_CLOCK_FAST,
         S390_FEAT_MOVE_WITH_OPTIONAL_SPEC,
+        S390_FEAT_COMPARE_AND_SWAP_AND_STORE,
+        S390_FEAT_COMPARE_AND_SWAP_AND_STORE_2,
         S390_FEAT_GENERAL_INSTRUCTIONS_EXT,
         S390_FEAT_EXECUTE_EXT,
+        S390_FEAT_FLOATING_POINT_SUPPPORT_ENH,
         S390_FEAT_STFLE_45,
     };
     int i;
-- 
2.9.4

On 15.06.2017 07:53, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <rth@twiddle.net>
> ---
>  target/s390x/cpu_models.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c
> index c3a4ce6..703feca 100644
> --- a/target/s390x/cpu_models.c
> +++ b/target/s390x/cpu_models.c
> @@ -683,8 +683,11 @@ static void add_qemu_cpu_model_features(S390FeatBitmap fbm)
>          S390_FEAT_ETF2_ENH,
>          S390_FEAT_STORE_CLOCK_FAST,
>          S390_FEAT_MOVE_WITH_OPTIONAL_SPEC,
> +        S390_FEAT_COMPARE_AND_SWAP_AND_STORE,
> +        S390_FEAT_COMPARE_AND_SWAP_AND_STORE_2,

Do we really support the CSST instruction in TCG already (Opcode
0xc802)? I did not spot it in the source code yet...?

 Thomas

On 06/15/2017 02:02 AM, Thomas Huth wrote:
> On 15.06.2017 07:53, Richard Henderson wrote:
>> Signed-off-by: Richard Henderson <rth@twiddle.net>
>> ---
>>   target/s390x/cpu_models.c | 3 +++
>>   1 file changed, 3 insertions(+)
>>
>> diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c
>> index c3a4ce6..703feca 100644
>> --- a/target/s390x/cpu_models.c
>> +++ b/target/s390x/cpu_models.c
>> @@ -683,8 +683,11 @@ static void add_qemu_cpu_model_features(S390FeatBitmap fbm)
>>           S390_FEAT_ETF2_ENH,
>>           S390_FEAT_STORE_CLOCK_FAST,
>>           S390_FEAT_MOVE_WITH_OPTIONAL_SPEC,
>> +        S390_FEAT_COMPARE_AND_SWAP_AND_STORE,
>> +        S390_FEAT_COMPARE_AND_SWAP_AND_STORE_2,
> 
> Do we really support the CSST instruction in TCG already (Opcode
> 0xc802)? I did not spot it in the source code yet...?

Whoops.  No indeed.  I claim late-ness of the hour.

On the other hand, it shouldn't be difficult to implement...


r~

On 2017-06-14 22:53, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <rth@twiddle.net>
> ---
>  target/s390x/cpu_models.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c
> index c3a4ce6..703feca 100644
> --- a/target/s390x/cpu_models.c
> +++ b/target/s390x/cpu_models.c
> @@ -683,8 +683,11 @@ static void add_qemu_cpu_model_features(S390FeatBitmap fbm)
>          S390_FEAT_ETF2_ENH,
>          S390_FEAT_STORE_CLOCK_FAST,
>          S390_FEAT_MOVE_WITH_OPTIONAL_SPEC,
> +        S390_FEAT_COMPARE_AND_SWAP_AND_STORE,
> +        S390_FEAT_COMPARE_AND_SWAP_AND_STORE_2,
>          S390_FEAT_GENERAL_INSTRUCTIONS_EXT,
>          S390_FEAT_EXECUTE_EXT,
> +        S390_FEAT_FLOATING_POINT_SUPPPORT_ENH,

Theoretically the floating-point-support-enhancement facilities include
the DFP rounding facility. Given We don't implement the DFP facility I
guess this can be ignored.

-- 
Aurelien Jarno                          GPG: 4096R/1DDD8C9B
aurelien@aurel32.net                 http://www.aurel32.net

On 06/15/2017 01:49 PM, Aurelien Jarno wrote:
>> +        S390_FEAT_FLOATING_POINT_SUPPPORT_ENH,
> 
> Theoretically the floating-point-support-enhancement facilities include
> the DFP rounding facility. Given We don't implement the DFP facility I
> guess this can be ignored.

We *do* implement the one instruction in DFP-rounding-facility: SRNMT.


r~

On 2017-06-15 14:10, Richard Henderson wrote:
> On 06/15/2017 01:49 PM, Aurelien Jarno wrote:
> > > +        S390_FEAT_FLOATING_POINT_SUPPPORT_ENH,
> > 
> > Theoretically the floating-point-support-enhancement facilities include
> > the DFP rounding facility. Given We don't implement the DFP facility I
> > guess this can be ignored.
> 
> We *do* implement the one instruction in DFP-rounding-facility: SRNMT.
> 

Ah ok, nevermind then. The DFP support is in better state than I
thought ;-).

-- 
Aurelien Jarno                          GPG: 4096R/1DDD8C9B
aurelien@aurel32.net                 http://www.aurel32.net