[Qemu-devel] [PATCH 3/5] target-mips: log bad coprocessor0 register accesses with LOG_UNIMP

Philippe Mathieu-Daudé posted 5 patches 8 years, 11 months ago
[Qemu-devel] [PATCH 3/5] target-mips: log bad coprocessor0 register accesses with LOG_UNIMP
Posted by Philippe Mathieu-Daudé 8 years, 11 months ago
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/mips/translate.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/target/mips/translate.c b/target/mips/translate.c
index 1fe0ff39f2..5c030a90cd 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -4872,7 +4872,7 @@ static void gen_mfhc0(DisasContext *ctx, TCGv arg, int reg, int sel)
     return;
 
 cp0_unimplemented:
-    LOG_DISAS("mfhc0 %s (reg %d sel %d)\n", rn, reg, sel);
+    qemu_log_mask(LOG_UNIMP, "mfhc0 %s (reg %d sel %d)\n", rn, reg, sel);
     tcg_gen_movi_tl(arg, 0);
 }
 
@@ -4944,7 +4944,7 @@ static void gen_mthc0(DisasContext *ctx, TCGv arg, int reg, int sel)
 
     (void)rn; /* avoid a compiler warning */
 cp0_unimplemented:
-    LOG_DISAS("mthc0 %s (reg %d sel %d)\n", rn, reg, sel);
+    qemu_log_mask(LOG_UNIMP, "mthc0 %s (reg %d sel %d)\n", rn, reg, sel);
 }
 
 static inline void gen_mfc0_unimplemented(DisasContext *ctx, TCGv arg)
@@ -5627,7 +5627,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
     return;
 
 cp0_unimplemented:
-    LOG_DISAS("mfc0 %s (reg %d sel %d)\n", rn, reg, sel);
+    qemu_log_mask(LOG_UNIMP, "mfc0 %s (reg %d sel %d)\n", rn, reg, sel);
     gen_mfc0_unimplemented(ctx, arg);
 }
 
@@ -6294,7 +6294,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
     return;
 
 cp0_unimplemented:
-    LOG_DISAS("mtc0 %s (reg %d sel %d)\n", rn, reg, sel);
+    qemu_log_mask(LOG_UNIMP, "mtc0 %s (reg %d sel %d)\n", rn, reg, sel);
 }
 
 #if defined(TARGET_MIPS64)
@@ -6928,7 +6928,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
     return;
 
 cp0_unimplemented:
-    LOG_DISAS("dmfc0 %s (reg %d sel %d)\n", rn, reg, sel);
+    qemu_log_mask(LOG_UNIMP, "dmfc0 %s (reg %d sel %d)\n", rn, reg, sel);
     gen_mfc0_unimplemented(ctx, arg);
 }
 
@@ -7593,7 +7593,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
     return;
 
 cp0_unimplemented:
-    LOG_DISAS("dmtc0 %s (reg %d sel %d)\n", rn, reg, sel);
+    qemu_log_mask(LOG_UNIMP, "dmtc0 %s (reg %d sel %d)\n", rn, reg, sel);
 }
 #endif /* TARGET_MIPS64 */
 
-- 
2.11.0


Re: [Qemu-devel] [PATCH 3/5] target-mips: log bad coprocessor0 register accesses with LOG_UNIMP
Posted by Yongbok Kim 8 years, 11 months ago

On 04/03/2017 18:56, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>  target/mips/translate.c | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/target/mips/translate.c b/target/mips/translate.c
> index 1fe0ff39f2..5c030a90cd 100644
> --- a/target/mips/translate.c
> +++ b/target/mips/translate.c
> @@ -4872,7 +4872,7 @@ static void gen_mfhc0(DisasContext *ctx, TCGv arg, int reg, int sel)
>      return;
>  
>  cp0_unimplemented:
> -    LOG_DISAS("mfhc0 %s (reg %d sel %d)\n", rn, reg, sel);
> +    qemu_log_mask(LOG_UNIMP, "mfhc0 %s (reg %d sel %d)\n", rn, reg, sel);
>      tcg_gen_movi_tl(arg, 0);
>  }
>  
> @@ -4944,7 +4944,7 @@ static void gen_mthc0(DisasContext *ctx, TCGv arg, int reg, int sel)
>  
>      (void)rn; /* avoid a compiler warning */
>  cp0_unimplemented:
> -    LOG_DISAS("mthc0 %s (reg %d sel %d)\n", rn, reg, sel);
> +    qemu_log_mask(LOG_UNIMP, "mthc0 %s (reg %d sel %d)\n", rn, reg, sel);
>  }
>  
>  static inline void gen_mfc0_unimplemented(DisasContext *ctx, TCGv arg)
> @@ -5627,7 +5627,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
>      return;
>  
>  cp0_unimplemented:
> -    LOG_DISAS("mfc0 %s (reg %d sel %d)\n", rn, reg, sel);
> +    qemu_log_mask(LOG_UNIMP, "mfc0 %s (reg %d sel %d)\n", rn, reg, sel);
>      gen_mfc0_unimplemented(ctx, arg);
>  }
>  
> @@ -6294,7 +6294,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
>      return;
>  
>  cp0_unimplemented:
> -    LOG_DISAS("mtc0 %s (reg %d sel %d)\n", rn, reg, sel);
> +    qemu_log_mask(LOG_UNIMP, "mtc0 %s (reg %d sel %d)\n", rn, reg, sel);
>  }
>  
>  #if defined(TARGET_MIPS64)
> @@ -6928,7 +6928,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
>      return;
>  
>  cp0_unimplemented:
> -    LOG_DISAS("dmfc0 %s (reg %d sel %d)\n", rn, reg, sel);
> +    qemu_log_mask(LOG_UNIMP, "dmfc0 %s (reg %d sel %d)\n", rn, reg, sel);
>      gen_mfc0_unimplemented(ctx, arg);
>  }
>  
> @@ -7593,7 +7593,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
>      return;
>  
>  cp0_unimplemented:
> -    LOG_DISAS("dmtc0 %s (reg %d sel %d)\n", rn, reg, sel);
> +    qemu_log_mask(LOG_UNIMP, "dmtc0 %s (reg %d sel %d)\n", rn, reg, sel);
>  }
>  #endif /* TARGET_MIPS64 */
>  
> 

Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com>