1. Patchew
  2. QEMU
  3. View series

[PATCH] target/riscv: fix ACPI MCFG table

X512 via posted 1 patch 1 year, 11 months ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/180d236d-c8e4-411a-b4d2-632eb82092fa@list.ru
Maintainers: Sunil V L <sunilvl@ventanamicro.com>, Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <alistair.francis@wdc.com>, Bin Meng <bin.meng@windriver.com>, Weiwei Li <liwei1518@gmail.com>, Daniel Henrique Barboza <dbarboza@ventanamicro.com>, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
hw/riscv/virt-acpi-build.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
[PATCH] target/riscv: fix ACPI MCFG table
Posted by X512 via 1 year, 11 months ago 
MCFG segments should point to PCI configuration range, not BAR MMIO.

Signed-off-by: Ilya Chugin <danger_mail@list.ru>
---
  hw/riscv/virt-acpi-build.c | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c
index fb8baf64f6..fe01b626ea 100644
--- a/hw/riscv/virt-acpi-build.c
+++ b/hw/riscv/virt-acpi-build.c
@@ -558,8 +558,8 @@ static void virt_acpi_build(RISCVVirtState *s, 
AcpiBuildTables *tables)
      acpi_add_table(table_offsets, tables_blob);
      {
          AcpiMcfgInfo mcfg = {
-           .base = s->memmap[VIRT_PCIE_MMIO].base,
-           .size = s->memmap[VIRT_PCIE_MMIO].size,
+           .base = s->memmap[VIRT_PCIE_ECAM].base,
+           .size = s->memmap[VIRT_PCIE_ECAM].size,
          };
          build_mcfg(tables_blob, tables->linker, &mcfg, s->oem_id,
                     s->oem_table_id);
-- 
2.42.1
Re: [PATCH] target/riscv: fix ACPI MCFG table
Posted by Alistair Francis 1 year, 11 months ago 
On Tue, Feb 20, 2024 at 2:10 AM X512 via <qemu-devel@nongnu.org> wrote:
>
> MCFG segments should point to PCI configuration range, not BAR MMIO.
>
> Signed-off-by: Ilya Chugin <danger_mail@list.ru>

Thanks!

Applied to riscv-to-apply.next

Alistair

> ---
>   hw/riscv/virt-acpi-build.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c
> index fb8baf64f6..fe01b626ea 100644
> --- a/hw/riscv/virt-acpi-build.c
> +++ b/hw/riscv/virt-acpi-build.c
> @@ -558,8 +558,8 @@ static void virt_acpi_build(RISCVVirtState *s,
> AcpiBuildTables *tables)
>       acpi_add_table(table_offsets, tables_blob);
>       {
>           AcpiMcfgInfo mcfg = {
> -           .base = s->memmap[VIRT_PCIE_MMIO].base,
> -           .size = s->memmap[VIRT_PCIE_MMIO].size,
> +           .base = s->memmap[VIRT_PCIE_ECAM].base,
> +           .size = s->memmap[VIRT_PCIE_ECAM].size,
>           };
>           build_mcfg(tables_blob, tables->linker, &mcfg, s->oem_id,
>                      s->oem_table_id);
> --
> 2.42.1
>
>
Re: [PATCH] target/riscv: fix ACPI MCFG table
Posted by Philippe Mathieu-Daudé 1 year, 11 months ago 
On 19/2/24 17:09, X512 via wrote:
> MCFG segments should point to PCI configuration range, not BAR MMIO.
> 

Fixes: 55ecd83b36 ("hw/riscv/virt-acpi-build.c: Add IO controllers and 
devices")
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>

> Signed-off-by: Ilya Chugin <danger_mail@list.ru>
> ---
>   hw/riscv/virt-acpi-build.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c
> index fb8baf64f6..fe01b626ea 100644
> --- a/hw/riscv/virt-acpi-build.c
> +++ b/hw/riscv/virt-acpi-build.c
> @@ -558,8 +558,8 @@ static void virt_acpi_build(RISCVVirtState *s, 
> AcpiBuildTables *tables)
>       acpi_add_table(table_offsets, tables_blob);
>       {
>           AcpiMcfgInfo mcfg = {
> -           .base = s->memmap[VIRT_PCIE_MMIO].base,
> -           .size = s->memmap[VIRT_PCIE_MMIO].size,
> +           .base = s->memmap[VIRT_PCIE_ECAM].base,
> +           .size = s->memmap[VIRT_PCIE_ECAM].size,
>           };
>           build_mcfg(tables_blob, tables->linker, &mcfg, s->oem_id,
>                      s->oem_table_id);
Re: [PATCH] target/riscv: fix ACPI MCFG table
Posted by Sunil V L 1 year, 11 months ago 
On Mon, Feb 19, 2024 at 05:43:56PM +0100, Philippe Mathieu-Daudé wrote:
> On 19/2/24 17:09, X512 via wrote:
> > MCFG segments should point to PCI configuration range, not BAR MMIO.
> > 
> 
> Fixes: 55ecd83b36 ("hw/riscv/virt-acpi-build.c: Add IO controllers and
> devices")
> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> 
> > Signed-off-by: Ilya Chugin <danger_mail@list.ru>
> > ---
> >   hw/riscv/virt-acpi-build.c | 4 ++--
> >   1 file changed, 2 insertions(+), 2 deletions(-)
> > 
> > diff --git a/hw/riscv/virt-acpi-build.c b/hw/riscv/virt-acpi-build.c
> > index fb8baf64f6..fe01b626ea 100644
> > --- a/hw/riscv/virt-acpi-build.c
> > +++ b/hw/riscv/virt-acpi-build.c
> > @@ -558,8 +558,8 @@ static void virt_acpi_build(RISCVVirtState *s,
> > AcpiBuildTables *tables)
> >       acpi_add_table(table_offsets, tables_blob);
> >       {
> >           AcpiMcfgInfo mcfg = {
> > -           .base = s->memmap[VIRT_PCIE_MMIO].base,
> > -           .size = s->memmap[VIRT_PCIE_MMIO].size,
> > +           .base = s->memmap[VIRT_PCIE_ECAM].base,
> > +           .size = s->memmap[VIRT_PCIE_ECAM].size,
Thanks!.

Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>

> >           };
> >           build_mcfg(tables_blob, tables->linker, &mcfg, s->oem_id,
> >                      s->oem_table_id);
>

Patchew 2.1-devel-b67e4c2

© 2016 - 2026 Red Hat, Inc.