The Exynos 4210 UART FIFO implementation suffers from an overflow that
can occur when large buffers are sent into it. Specifically, this
overflow is caused by the underlying circular buffer implementation
making use of a store and retrieve pointer. When implemented this way, a
circular buffer's capacity is 1 less than the size of the buffer, but
the code as written assumes the entire buffer is available for storing
data.

If a large amount of data is sent into the UART when FIFO mode is
enabled, the FIFO may overflow before the guest has time to receive the
data, resulting in the first part of the message being lost.

This patch series includes a qtest that demonstrates the current
implementation suffers from an overflow that results in data truncation,
and a fix that switches the Exynos UART FIFO implementation for fifo8,
which does not suffer from this problem. After applying the suggested
fix, the test passes.

jprx (2):
  tests/qtest: add test for exynos4210 uart fifo overflow bug
  hw/char/exynos4210_uart: fix fifo overflow

 hw/char/exynos4210_uart.c               | 107 ++++++------------------
 tests/qtest/exynos4210_uart_fifo-test.c |  86 +++++++++++++++++++
 tests/qtest/meson.build                 |   4 +
 3 files changed, 117 insertions(+), 80 deletions(-)
 create mode 100644 tests/qtest/exynos4210_uart_fifo-test.c

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2.49.1