[PATCH RFC v3 0/2] hw/arm: Add minimal support for the B-L475E-IOT01A board

~inesvarhol posted 2 patches 1 year ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/170049810484.22920.612074576971878323-0@git.sr.ht
Maintainers: Paolo Bonzini <pbonzini@redhat.com>, Peter Maydell <peter.maydell@linaro.org>, Alistair Francis <alistair@alistair23.me>
configs/devices/arm-softmmu/default.mak |   1 +
hw/arm/Kconfig                          |  11 +
hw/arm/b-l475e-iot01a.c                 |  77 +++++++
hw/arm/meson.build                      |   2 +
hw/arm/stm32l4x5_soc.c                  | 275 ++++++++++++++++++++++++
include/hw/arm/stm32l4x5_soc.h          |  63 ++++++
6 files changed, 429 insertions(+)
create mode 100644 hw/arm/b-l475e-iot01a.c
create mode 100644 hw/arm/stm32l4x5_soc.c
create mode 100644 include/hw/arm/stm32l4x5_soc.h
[PATCH RFC v3 0/2] hw/arm: Add minimal support for the B-L475E-IOT01A board
Posted by ~inesvarhol 1 year ago
This patch allows to emulate the B-L475E-IOT01A ARM Cortex-M4 board.
This is RFC since the implementation isn't complete yet, there are no
implemented
peripherals, and it's a first contribution to QEMU.
The changes from v1 follow the reviews from Philippe Mathieu-Daudé.
We additionally changed the parent of the stm32l4x5 SoC from Device to
SysBusDevice.

Details of v2 to v3 changes :
- moved the initialization of armv7m from the SoC initfn method to the
SoC realize method
- embedded the flash sizes of different SoC types in the class_init
methods (removing macros)

Details of v1 to v2 changes :
- replaced 'stm32l475vg' by 'stm32l4x5'

In the *_soc.c file :
- added support for the stm32l4x5xe and stm32l4x5xc
- used ERRP_GUARD() instead of propagating err to errp
- renamed memory regions
- hard-coded the cpu type in the realize method
- used DEFINE_TYPES() is preferred over type_init()
- added a SPDX tag

In the *_soc.h file :
- included "hw/qdev-core.h" and "exec/memory.h"
- removed <private/public> lines
- exported the different flash sizes
- moved the SRAM and flash addresses, SRAM sizes to the *_soc.c
- added a SPDX tag

In the board file  :
- enforced the CPU type (using 'valid_cpu_types' instead of
'default_cpu_type')
- added a SPDX tag

Inès Varhol (2):
  hw/arm: Add minimal support for the STM32L4x5 SoC
  hw/arm: Add minimal support for the B-L475E-IOT01A board

 configs/devices/arm-softmmu/default.mak |   1 +
 hw/arm/Kconfig                          |  11 +
 hw/arm/b-l475e-iot01a.c                 |  77 +++++++
 hw/arm/meson.build                      |   2 +
 hw/arm/stm32l4x5_soc.c                  | 275 ++++++++++++++++++++++++
 include/hw/arm/stm32l4x5_soc.h          |  63 ++++++
 6 files changed, 429 insertions(+)
 create mode 100644 hw/arm/b-l475e-iot01a.c
 create mode 100644 hw/arm/stm32l4x5_soc.c
 create mode 100644 include/hw/arm/stm32l4x5_soc.h

-- 
2.38.5
Re: [PATCH RFC v3 0/2] hw/arm: Add minimal support for the B-L475E-IOT01A board
Posted by Philippe Mathieu-Daudé 1 year ago
On 20/11/23 17:35, ~inesvarhol wrote:
> This patch allows to emulate the B-L475E-IOT01A ARM Cortex-M4 board.
> This is RFC since the implementation isn't complete yet, there are no
> implemented
> peripherals, and it's a first contribution to QEMU.
> The changes from v1 follow the reviews from Philippe Mathieu-Daudé.
> We additionally changed the parent of the stm32l4x5 SoC from Device to
> SysBusDevice.
> 
> Details of v2 to v3 changes :
> - moved the initialization of armv7m from the SoC initfn method to the
> SoC realize method
> - embedded the flash sizes of different SoC types in the class_init
> methods (removing macros)
> 
> Details of v1 to v2 changes :
> - replaced 'stm32l475vg' by 'stm32l4x5'

Thanks Inès for the requested changes. This patch set LGTM now!

Looking forward to see device added and firmware running as test :)

Regards,

Phil.

> Inès Varhol (2):
>    hw/arm: Add minimal support for the STM32L4x5 SoC
>    hw/arm: Add minimal support for the B-L475E-IOT01A board