在 2022/3/23 上午11:58, ~eopxd 写道:
> According to v-spec, tail agnostic behavior can be either kept as
> undisturbed or set elements' bits to all 1s. To distinguish the
> difference of tail policies, QEMU should be able to simulate the tail
> agnostic behavior as "set tail elements' bits to all 1s". An option
> 'rvv_ta_all_1s' is added to enable the behavior, it is default as
> disabled.
>
> There are multiple possibility for agnostic elements according to
> v-spec. The main intent of this patch-set tries to add option that
> can distinguish between tail policies. Setting agnostic elements to
> all 1s makes things simple and allow QEMU to express this.
>
> We may explore other possibility of agnostic behavior by adding
> other options in the future. Please understand that this patch-set
> is limited.
>
> v2 updates:
> - Addressed comments from Weiwei Li
> - Added commit tail agnostic on load / store instructions (which
> I forgot to include into the patch-set)
>
> v3 updates:
> - Missed the very 1st commit, adding it back
I find some trans_* function for vector instructions are optimized to
use tcg_gen_gvec_*
directly when vl = vlmax (vl_eq_vlmax is true). However, as discussed
before,
tail elements may pass vlmax when lmul < 0.
So additional tail elements may also need to overwrite here.
Regards,
Weiwei Li
>
> eopXD (14):
> target/riscv: rvv: Prune redundant ESZ, DSZ parameter passed
> target/riscv: rvv: Rename ambiguous esz
> target/riscv: rvv: Early exit when vstart >= vl
> target/riscv: rvv: Add tail agnostic for vv instructions
> target/riscv: rvv: Add tail agnostic for vector load / store
> instructions
> target/riscv: rvv: Add tail agnostic for vx, vvm, vxm instructions
> target/riscv: rvv: Add tail agnostic for vector integer shift
> instructions
> target/riscv: rvv: Add tail agnostic for vector integer comparison
> instructions
> target/riscv: rvv: Add tail agnostic for vector integer merge and move
> instructions
> target/riscv: rvv: Add tail agnostic for vector fix-point arithmetic
> instructions
> target/riscv: rvv: Add tail agnostic for vector floating-point
> instructions
> target/riscv: rvv: Add tail agnostic for vector reduction instructions
> target/riscv: rvv: Add tail agnostic for vector mask instructions
> target/riscv: rvv: Add tail agnostic for vector permutation
> instructions
>
> target/riscv/cpu.c | 1 +
> target/riscv/cpu.h | 2 +
> target/riscv/cpu_helper.c | 2 +
> target/riscv/insn_trans/trans_rvv.c.inc | 66 +
> target/riscv/internals.h | 5 +-
> target/riscv/translate.c | 2 +
> target/riscv/vector_helper.c | 1571 ++++++++++++++---------
> 7 files changed, 1026 insertions(+), 623 deletions(-)
>