[v13] Add Versal usb model

[PATCH v13 0/4] Add Versal usb model

Posted by Sai Pavan Boddu 3 years, 5 months ago

This patch series attempts to make 'hcd-xhci' an independent model so it can be used by both pci and system-bus interface.

Changes for V2:
    Make XHCIState non-qom
    Use container_of functions for retriving pci device instance
    Initialize the AddressSpace pointer in PATCH 1/3 itself Changes for V3:
    Convert XHCIState to TYPE_DEVICE and register as a child of XHCIPciState.
Changes for V4:
    Add DWC3 usb controller
    Add versal, usb2-reg module
    Connect sysbus xhci to versal virt board Changes for V5:
    Add extra info about dwc3 and usb2_regs devices in commit messages
    Use only one irq for versal usb controller
    Mark the unimplemented registers in dwc3 controller
    Rebase the patches over master.
    Move few mispalced contents from patch 2/7 to 3/7.
    Fix the author names in the header.
    Move the inclusion of "sysemu/dma.h" from patch 1/7 to 3/7 Changes for V6:
    Fixed style issue in patch 7/7
    Renamed usb2_reg model to VersalUsb2CtrlReg
    Fixed author in headers
Changes for V7:
    Create a usb structure to keep things clean
    Remove the repeated patch in the series i.e 5/7 Changes for V8:
    Fix vmstate sturcts to support cross version migration.
Changes for V9:
    Added recommended changes to fix vmstate migration.
    Fixed commit message on 3/7.
Changes for V10:
    use vmstate_post_load avaialble in VMStateDescription
    tested vmstate cross migration.
Changes for V11:
    Removed the patches which got accepted
    Changed object name "USB2Reg" -> "ctrl"
    Updated Subject line on cover letter.
Changes for V12:
    Use reset class for usb2-ctrl-regs module
    Move the few register update to realize
    Marked registers which are unimplemented in regapi model
Changs for V13:
    Add usb subsystem for xilinx devices,
    Memory Map xhci internally to dwc3 device,
    Add respective changes to connect VersalUsb2 subsystem to xilinx-versal.



Sai Pavan Boddu (2):
  usb: Add versal-usb2-ctrl-regs module
  usb: xlnx-usb-subsystem: Add xilinx usb subsystem

Vikram Garhwal (2):
  usb: Add DWC3 model
  arm: xlnx-versal: Connect usb to virt-versal

 hw/arm/xlnx-versal-virt.c                   |  58 +++
 hw/arm/xlnx-versal.c                        |  26 ++
 hw/usb/Kconfig                              |   6 +
 hw/usb/hcd-dwc3.c                           | 677 ++++++++++++++++++++++++++++
 hw/usb/meson.build                          |   3 +
 hw/usb/xlnx-usb-subsystem.c                 |  94 ++++
 hw/usb/xlnx-versal-usb2-ctrl-regs.c         | 229 ++++++++++
 include/hw/arm/xlnx-versal.h                |   9 +
 include/hw/usb/hcd-dwc3.h                   |  56 +++
 include/hw/usb/xlnx-usb-subsystem.h         |  45 ++
 include/hw/usb/xlnx-versal-usb2-ctrl-regs.h |  45 ++
 11 files changed, 1248 insertions(+)
 create mode 100644 hw/usb/hcd-dwc3.c
 create mode 100644 hw/usb/xlnx-usb-subsystem.c
 create mode 100644 hw/usb/xlnx-versal-usb2-ctrl-regs.c
 create mode 100644 include/hw/usb/hcd-dwc3.h
 create mode 100644 include/hw/usb/xlnx-usb-subsystem.h
 create mode 100644 include/hw/usb/xlnx-versal-usb2-ctrl-regs.h

-- 
2.7.4

Re: [PATCH v13 0/4] Add Versal usb model

Posted by Peter Maydell 3 years, 4 months ago

On Tue, 10 Nov 2020 at 06:48, Sai Pavan Boddu
<sai.pavan.boddu@xilinx.com> wrote:
>
> This patch series attempts to make 'hcd-xhci' an independent model so it can be used by both pci and system-bus interface.

This fails "make check":

[...]
MALLOC_PERTURB_=${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))}
QTEST_QEMU_IMG=./qemu-img
G_TEST_DBUS_DAEMON=/home/petmay01/linaro/qemu-from-laptop/qemu/tests/dbus-vmstate-daemon.sh
QTEST_QEMU_BINARY=./qemu-system-aarch64
tests/qtest/device-introspect-test --tap -k
PASS 1 qtest-aarch64/device-introspect-test /aarch64/device/introspect/list
PASS 2 qtest-aarch64/device-introspect-test
/aarch64/device/introspect/list-fields
PASS 3 qtest-aarch64/device-introspect-test /aarch64/device/introspect/none
PASS 4 qtest-aarch64/device-introspect-test /aarch64/device/introspect/abstract
PASS 5 qtest-aarch64/device-introspect-test
/aarch64/device/introspect/abstract-interfaces
missing object type 'usb_dwc3'
Broken pipe
../../tests/qtest/libqtest.c:181: kill_qemu() detected QEMU death from
signal 6 (Aborted) (core dumped)
ERROR qtest-aarch64/device-introspect-test - too few tests run
(expected 6, got 5)

Probably an error in meson.build or Kconfig handling of that new device.

thanks
-- PMM

RE: [PATCH v13 0/4] Add Versal usb model

Posted by Sai Pavan Boddu 3 years, 4 months ago

Hi Peter,
> -----Original Message-----
> From: Peter Maydell <peter.maydell@linaro.org>
> Sent: Monday, November 30, 2020 5:18 PM
> To: Sai Pavan Boddu <saipava@xilinx.com>
> Cc: Markus Armbruster <armbru@redhat.com>; Marc-André Lureau
> <marcandre.lureau@redhat.com>; Paolo Bonzini <pbonzini@redhat.com>;
> Gerd Hoffmann <kraxel@redhat.com>; Edgar Iglesias <edgari@xilinx.com>;
> Francisco Eduardo Iglesias <figlesia@xilinx.com>; Alistair Francis
> <alistair.francis@wdc.com>; Eduardo Habkost <ehabkost@redhat.com>; Ying
> Fang <fangying1@huawei.com>; Philippe Mathieu-Daudé
> <philmd@redhat.com>; Vikram Garhwal <fnuv@xilinx.com>; Paul Zimmerman
> <pauldzim@gmail.com>; Sai Pavan Boddu <saipava@xilinx.com>; QEMU
> Developers <qemu-devel@nongnu.org>
> Subject: Re: [PATCH v13 0/4] Add Versal usb model
> 
> On Tue, 10 Nov 2020 at 06:48, Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
> wrote:
> >
> > This patch series attempts to make 'hcd-xhci' an independent model so it can
> be used by both pci and system-bus interface.
> 
> This fails "make check":
[Sai Pavan Boddu] I also observe this after rebase. Will be sending out v14 with a fix.

Regards,
Sai Pavan
> 
> [...]
> MALLOC_PERTURB_=${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))}
> QTEST_QEMU_IMG=./qemu-img
> G_TEST_DBUS_DAEMON=/home/petmay01/linaro/qemu-from-
> laptop/qemu/tests/dbus-vmstate-daemon.sh
> QTEST_QEMU_BINARY=./qemu-system-aarch64
> tests/qtest/device-introspect-test --tap -k PASS 1 qtest-aarch64/device-
> introspect-test /aarch64/device/introspect/list PASS 2 qtest-aarch64/device-
> introspect-test
> /aarch64/device/introspect/list-fields
> PASS 3 qtest-aarch64/device-introspect-test /aarch64/device/introspect/none
> PASS 4 qtest-aarch64/device-introspect-test
> /aarch64/device/introspect/abstract
> PASS 5 qtest-aarch64/device-introspect-test
> /aarch64/device/introspect/abstract-interfaces
> missing object type 'usb_dwc3'
> Broken pipe
> ../../tests/qtest/libqtest.c:181: kill_qemu() detected QEMU death from signal 6
> (Aborted) (core dumped) ERROR qtest-aarch64/device-introspect-test - too
> few tests run (expected 6, got 5)
> 
> Probably an error in meson.build or Kconfig handling of that new device.
> 
> thanks
> -- PMM

Re: [PATCH v13 0/4] Add Versal usb model

Posted by Philippe Mathieu-Daudé 3 years, 5 months ago

On 11/10/20 7:52 AM, Sai Pavan Boddu wrote:
> This patch series attempts to make 'hcd-xhci' an independent model so it can be used by both pci and system-bus interface.

This part got merged already...

RE: [PATCH v13 0/4] Add Versal usb model

Posted by Sai Pavan Boddu 3 years, 5 months ago

Hi Philippe

> -----Original Message-----
> From: Philippe Mathieu-Daudé <philmd@redhat.com>
> Sent: Tuesday, November 10, 2020 1:27 PM
> To: Sai Pavan Boddu <saipava@xilinx.com>; Peter Maydell
> <peter.maydell@linaro.org>; Markus Armbruster <armbru@redhat.com>;
> Marc-André Lureau <marcandre.lureau@redhat.com>; Paolo Bonzini
> <pbonzini@redhat.com>; Gerd Hoffmann <kraxel@redhat.com>; Edgar Iglesias
> <edgari@xilinx.com>; Francisco Eduardo Iglesias <figlesia@xilinx.com>; Alistair
> Francis <alistair.francis@wdc.com>; Eduardo Habkost
> <ehabkost@redhat.com>; Ying Fang <fangying1@huawei.com>; Vikram
> Garhwal <fnuv@xilinx.com>; Paul Zimmerman <pauldzim@gmail.com>; Sai
> Pavan Boddu <saipava@xilinx.com>
> Cc: QEMU Developers <qemu-devel@nongnu.org>
> Subject: Re: [PATCH v13 0/4] Add Versal usb model
> 
> On 11/10/20 7:52 AM, Sai Pavan Boddu wrote:
> > This patch series attempts to make 'hcd-xhci' an independent model so it can
> be used by both pci and system-bus interface.
> 
> This part got merged already...
[Sai Pavan Boddu] Yeah, this line needs to be removed cover.

Regards,
Sai Pavan

RE: [PATCH v13 0/4] Add Versal usb model

Posted by Sai Pavan Boddu 3 years, 5 months ago

Hi Peter,

> -----Original Message-----
> From: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
> Sent: Tuesday, November 10, 2020 12:22 PM
> To: Peter Maydell <peter.maydell@linaro.org>; Markus Armbruster
> <armbru@redhat.com>; Marc-André Lureau <marcandre.lureau@redhat.com>;
> Paolo Bonzini <pbonzini@redhat.com>; Gerd Hoffmann <kraxel@redhat.com>;
> Edgar Iglesias <edgari@xilinx.com>; Francisco Eduardo Iglesias
> <figlesia@xilinx.com>; Alistair Francis <alistair.francis@wdc.com>; Eduardo
> Habkost <ehabkost@redhat.com>; Ying Fang <fangying1@huawei.com>;
> Philippe Mathieu-Daudé <philmd@redhat.com>; Vikram Garhwal
> <fnuv@xilinx.com>; Paul Zimmerman <pauldzim@gmail.com>; Sai Pavan Boddu
> <saipava@xilinx.com>
> Cc: QEMU Developers <qemu-devel@nongnu.org>
> Subject: [PATCH v13 0/4] Add Versal usb model
> 
> This patch series attempts to make 'hcd-xhci' an independent model so it can
> be used by both pci and system-bus interface.
> 
> Changes for V2:
>     Make XHCIState non-qom
>     Use container_of functions for retriving pci device instance
>     Initialize the AddressSpace pointer in PATCH 1/3 itself Changes for V3:
>     Convert XHCIState to TYPE_DEVICE and register as a child of XHCIPciState.
> Changes for V4:
>     Add DWC3 usb controller
>     Add versal, usb2-reg module
>     Connect sysbus xhci to versal virt board Changes for V5:
>     Add extra info about dwc3 and usb2_regs devices in commit messages
>     Use only one irq for versal usb controller
>     Mark the unimplemented registers in dwc3 controller
>     Rebase the patches over master.
>     Move few mispalced contents from patch 2/7 to 3/7.
>     Fix the author names in the header.
>     Move the inclusion of "sysemu/dma.h" from patch 1/7 to 3/7 Changes for
> V6:
>     Fixed style issue in patch 7/7
>     Renamed usb2_reg model to VersalUsb2CtrlReg
>     Fixed author in headers
> Changes for V7:
>     Create a usb structure to keep things clean
>     Remove the repeated patch in the series i.e 5/7 Changes for V8:
>     Fix vmstate sturcts to support cross version migration.
> Changes for V9:
>     Added recommended changes to fix vmstate migration.
>     Fixed commit message on 3/7.
> Changes for V10:
>     use vmstate_post_load avaialble in VMStateDescription
>     tested vmstate cross migration.
> Changes for V11:
>     Removed the patches which got accepted
>     Changed object name "USB2Reg" -> "ctrl"
>     Updated Subject line on cover letter.
> Changes for V12:
>     Use reset class for usb2-ctrl-regs module
>     Move the few register update to realize
>     Marked registers which are unimplemented in regapi model 
>     Changs for V13:
>     Add usb subsystem for xilinx devices,
>     Memory Map xhci internally to dwc3 device,
>     Add respective changes to connect VersalUsb2 subsystem to xilinx-versal.
[Sai Pavan Boddu] 
Does these changes looks good ?

Regards,
Sai Pavan
> 
> 
> 
> Sai Pavan Boddu (2):
>   usb: Add versal-usb2-ctrl-regs module
>   usb: xlnx-usb-subsystem: Add xilinx usb subsystem
> 
> Vikram Garhwal (2):
>   usb: Add DWC3 model
>   arm: xlnx-versal: Connect usb to virt-versal
> 
>  hw/arm/xlnx-versal-virt.c                   |  58 +++
>  hw/arm/xlnx-versal.c                        |  26 ++
>  hw/usb/Kconfig                              |   6 +
>  hw/usb/hcd-dwc3.c                           | 677 ++++++++++++++++++++++++++++
>  hw/usb/meson.build                          |   3 +
>  hw/usb/xlnx-usb-subsystem.c                 |  94 ++++
>  hw/usb/xlnx-versal-usb2-ctrl-regs.c         | 229 ++++++++++
>  include/hw/arm/xlnx-versal.h                |   9 +
>  include/hw/usb/hcd-dwc3.h                   |  56 +++
>  include/hw/usb/xlnx-usb-subsystem.h         |  45 ++
>  include/hw/usb/xlnx-versal-usb2-ctrl-regs.h |  45 ++
>  11 files changed, 1248 insertions(+)
>  create mode 100644 hw/usb/hcd-dwc3.c
>  create mode 100644 hw/usb/xlnx-usb-subsystem.c  create mode 100644
> hw/usb/xlnx-versal-usb2-ctrl-regs.c
>  create mode 100644 include/hw/usb/hcd-dwc3.h  create mode 100644
> include/hw/usb/xlnx-usb-subsystem.h
>  create mode 100644 include/hw/usb/xlnx-versal-usb2-ctrl-regs.h
> 
> --
> 2.7.4

Re: [PATCH v13 0/4] Add Versal usb model

Posted by Peter Maydell 3 years, 5 months ago

On Mon, 16 Nov 2020 at 08:10, Sai Pavan Boddu <saipava@xilinx.com> wrote:
>
> Hi Peter,
>

> Does these changes looks good ?

Hi; this is on my to-review queue, but I'm currently
prioritizing work that will go into the 5.2 release.

thanks
-- PMM

RE: [PATCH v13 0/4] Add Versal usb model

Posted by Sai Pavan Boddu 3 years, 5 months ago

Hi Peter
> -----Original Message-----
> From: Peter Maydell <peter.maydell@linaro.org>
> Sent: Monday, November 16, 2020 3:49 PM
> To: Sai Pavan Boddu <saipava@xilinx.com>
> Cc: QEMU Developers <qemu-devel@nongnu.org>; Markus Armbruster
> <armbru@redhat.com>; Marc-André Lureau <marcandre.lureau@redhat.com>;
> Paolo Bonzini <pbonzini@redhat.com>; Gerd Hoffmann <kraxel@redhat.com>;
> Edgar Iglesias <edgari@xilinx.com>; Francisco Eduardo Iglesias
> <figlesia@xilinx.com>; Alistair Francis <alistair.francis@wdc.com>; Eduardo
> Habkost <ehabkost@redhat.com>; Ying Fang <fangying1@huawei.com>;
> Philippe Mathieu-Daudé <philmd@redhat.com>; Vikram Garhwal
> <fnuv@xilinx.com>; Paul Zimmerman <pauldzim@gmail.com>
> Subject: Re: [PATCH v13 0/4] Add Versal usb model
> 
> On Mon, 16 Nov 2020 at 08:10, Sai Pavan Boddu <saipava@xilinx.com> wrote:
> >
> > Hi Peter,
> >
> 
> > Does these changes looks good ?
> 
> Hi; this is on my to-review queue, but I'm currently prioritizing work that will
> go into the 5.2 release.
[Sai Pavan Boddu] Thanks, no issues. I would wait for the review.

Regards,
Sai Pavan
> 
> thanks
> -- PMM