[v3] Cadence GEM Fixes

[PATCH v3 00/11] Cadence GEM Fixes

Sai Pavan Boddu posted 11 patches 4 years ago

Diff against v1 v2 v4 v5
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Maintainers: Alistair Francis <alistair@alistair23.me>, Peter Maydell <peter.maydell@linaro.org>, Jason Wang <jasowang@redhat.com>, "Edgar E. Iglesias" <edgar.iglesias@gmail.com>

There is a newer version of this series

hw/net/cadence_gem.c         | 236 ++++++++++++++++++++++++++-----------------
include/hw/net/cadence_gem.h |   3 +
2 files changed, 145 insertions(+), 94 deletions(-)

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[PATCH v3 00/11] Cadence GEM Fixes

Posted by Sai Pavan Boddu 4 years ago

Hi,

Following patch series fixes issues with priority queues,
Adds JUMBO Frame support,
Makes Debug statements compilable &
Fixes related to multicast frames.

Changes for V2:
	Fixed build failure on fedora docker machine
	Fix buggy debug print to use sized integer casting
Changes for V3:
	1/11: Fixed debug statments to use %u and %zd
	      Remove rxoffset for buffer address
	2/11: Add inline functions to get tx/rx queue base address.
	4/11: fix read only mask
	5/11: Move packet buffers to CadenceGEMState
	6/11: Add JUMBO MAX LEN register

Sai Pavan Boddu (10):
  net: cadence_gem: Fix debug statements
  net: cadence_gem: Fix the queue address update during wrap around
  net: cadence_gem: Fix irq update w.r.t queue
  net: cadence_gem: Define access permission for interrupt registers
  net: cadence_gem: Set ISR according to queue in use
  net: cadence_gem: Move tx/rx packet buffert to CadenceGEMState
  net: cadence_gem: Add support for jumbo frames
  net: cadnece_gem: Update irq_read_clear field of designcfg_debug1 reg
  net: cadence_gem: Update the reset value for interrupt mask register
  net: cadence_gem: TX_LAST bit should be set by guest

Tong Ho (1):
  net: cadence_gem: Fix RX address filtering

 hw/net/cadence_gem.c         | 236 ++++++++++++++++++++++++++-----------------
 include/hw/net/cadence_gem.h |   3 +
 2 files changed, 145 insertions(+), 94 deletions(-)

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2.7.4