MAINTAINERS | 5 + configure | 2 +- default-configs/mips64el-softmmu.mak | 1 + hw/core/Makefile.objs | 2 +- hw/core/null-machine.c | 4 + hw/mips/Kconfig | 10 + hw/mips/Makefile.objs | 3 +- hw/mips/common.c | 29 ++ hw/mips/mips_int.c | 6 +- hw/mips/mips_loongson3.c | 886 +++++++++++++++++++++++++++++++++++ include/hw/mips/mips.h | 3 + target/mips/cpu.h | 28 ++ target/mips/internal.h | 2 + target/mips/kvm.c | 212 +++++++++ target/mips/machine.c | 6 +- target/mips/mips-defs.h | 7 +- target/mips/translate.c | 2 + target/mips/translate_init.inc.c | 84 ++++ 18 files changed, 1281 insertions(+), 11 deletions(-) create mode 100644 hw/mips/common.c create mode 100644 hw/mips/mips_loongson3.c
Loongson-3 CPU family include Loongson-3A R1/R2/R3/R4 and Loongson-3B
R1/R2. Loongson-3A R1 is the oldest and its ISA is the smallest, while
Loongson-3A R4 is the newest and its ISA is almost the superset of all
others. To reduce complexity, in QEMU we just define two CPU types:
1, "Loongson-3A1000" CPU which is corresponding to Loongson-3A R1. It is
suitable for TCG because Loongson-3A R1 has fewest ASE.
2, "Loongson-3A4000" CPU which is corresponding to Loongson-3A R4. It is
suitable for KVM because Loongson-3A R4 has the VZ ASE.
Loongson-3 lacks English documents. I've tried to translated them with
translate.google.com, and the machine translated documents (together
with their original Chinese versions) are available here.
Loongson-3A R1 (Loongson-3A1000)
User Manual Part 1:
http://ftp.godson.ac.cn/lemote/3A1000_p1.pdf
http://ftp.godson.ac.cn/lemote/Loongson3A1000_processor_user_manual_P1.pdf (Chinese Version)
User Manual Part 2:
http://ftp.godson.ac.cn/lemote/3A1000_p2.pdf
http://ftp.godson.ac.cn/lemote/Loongson3A1000_processor_user_manual_P2.pdf (Chinese Version)
Loongson-3A R2 (Loongson-3A2000)
User Manual Part 1:
http://ftp.godson.ac.cn/lemote/3A2000_p1.pdf
http://ftp.godson.ac.cn/lemote/Loongson3A2000_user1.pdf (Chinese Version)
User Manual Part 2:
http://ftp.godson.ac.cn/lemote/3A2000_p2.pdf
http://ftp.godson.ac.cn/lemote/Loongson3A2000_user2.pdf (Chinese Version)
Loongson-3A R3 (Loongson-3A3000)
User Manual Part 1:
http://ftp.godson.ac.cn/lemote/3A3000_p1.pdf
http://ftp.godson.ac.cn/lemote/Loongson3A3000_3B3000usermanual1.pdf (Chinese Version)
User Manual Part 2:
http://ftp.godson.ac.cn/lemote/3A3000_p2.pdf
http://ftp.godson.ac.cn/lemote/Loongson3A3000_3B3000usermanual2.pdf (Chinese Version)
Loongson-3A R4 (Loongson-3A4000)
User Manual Part 1:
http://ftp.godson.ac.cn/lemote/3A4000_p1.pdf
http://ftp.godson.ac.cn/lemote/3A4000user.pdf (Chinese Version)
User Manual Part 2:
I'm sorry that it is unavailable now.
We are preparing to add QEMU's Loongson-3 support. MIPS VZ extension is
fully supported in Loongson-3A R4+, so we at first add QEMU/KVM support
in this series. And the next series will add QEMU/TCG support (it will
emulate Loongson-3A R1).
We already have a full functional Linux kernel (based on Linux-5.4.x LTS
but not upstream yet) here:
https://github.com/chenhuacai/linux
How to use QEMU/Loongson-3?
1, Download kernel source from the above URL;
2, Build a kernel with arch/mips/configs/loongson3_{def,hpc}config;
3, Boot a Loongson-3A4000 host with this kernel;
4, Build QEMU-5.0.0 with this patchset;
5, modprobe kvm;
6, Use QEMU with TCG (available in future):
qemu-system-mips64el -M loongson3,accel=tcg -cpu Loongson-3A1000 -kernel <path_to_kernel> -append ...
Use QEMU with KVM (available at present):
qemu-system-mips64el -M loongson3,accel=kvm -cpu Loongson-3A4000 -kernel <path_to_kernel> -append ...
The "-cpu" parameter can be omitted here and QEMU will use the correct type for TCG/KVM automatically.
Huacai Chen(7):
configure: Add KVM target support for MIPS64
hw/mips: Implement the kvm_type() hook in MachineClass
hw/mips: Add CPU IRQ3 delivery for KVM
target/mips: Add Loongson-3 CPU definition
target/mips: Add more CP0 register for save/restor
hw/mips: Add Loongson-3 machine support (with KVM)
MAINTAINERS: Add myself as Loongson-3 maintainer
Signed-off-by: Huacai Chen <chenhc@lemote.com>
---
MAINTAINERS | 5 +
configure | 2 +-
default-configs/mips64el-softmmu.mak | 1 +
hw/core/Makefile.objs | 2 +-
hw/core/null-machine.c | 4 +
hw/mips/Kconfig | 10 +
hw/mips/Makefile.objs | 3 +-
hw/mips/common.c | 29 ++
hw/mips/mips_int.c | 6 +-
hw/mips/mips_loongson3.c | 886 +++++++++++++++++++++++++++++++++++
include/hw/mips/mips.h | 3 +
target/mips/cpu.h | 28 ++
target/mips/internal.h | 2 +
target/mips/kvm.c | 212 +++++++++
target/mips/machine.c | 6 +-
target/mips/mips-defs.h | 7 +-
target/mips/translate.c | 2 +
target/mips/translate_init.inc.c | 84 ++++
18 files changed, 1281 insertions(+), 11 deletions(-)
create mode 100644 hw/mips/common.c
create mode 100644 hw/mips/mips_loongson3.c
--
2.7.0
Patchew URL: https://patchew.org/QEMU/1588242155-23924-1-git-send-email-chenhc@lemote.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 1588242155-23924-1-git-send-email-chenhc@lemote.com
Subject: [PATCH for-5.1 V2 0/7] mips: Add Loongson-3 machine support (with KVM)
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Switched to a new branch 'test'
7b568a8 MAINTAINERS: Add myself as Loongson-3 maintainer
e188b58 hw/mips: Add Loongson-3 machine support (with KVM)
cd58c7b target/mips: Add more CP0 register for save/restore
febf0f7 target/mips: Add Loongson-3 CPU definition
811cf86 hw/mips: Add CPU IRQ3 delivery for KVM
b1c4913 hw/mips: Implement the kvm_type() hook in MachineClass
d5fd437 configure: Add KVM target support for MIPS64
=== OUTPUT BEGIN ===
1/7 Checking commit d5fd4379e217 (configure: Add KVM target support for MIPS64)
2/7 Checking commit b1c4913d34d3 (hw/mips: Implement the kvm_type() hook in MachineClass)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#66:
new file mode 100644
ERROR: superfluous trailing semicolon
#88: FILE: hw/mips/common.c:18:
+ KVMState *s = KVM_STATE(machine->accelerator);;
ERROR: braces {} are necessary for all arms of this statement
#91: FILE: hw/mips/common.c:21:
+ if (r > 0)
[...]
ERROR: braces {} are necessary for all arms of this statement
#95: FILE: hw/mips/common.c:25:
+ if (r > 0)
[...]
total: 3 errors, 1 warnings, 68 lines checked
Patch 2/7 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
3/7 Checking commit 811cf860565a (hw/mips: Add CPU IRQ3 delivery for KVM)
ERROR: braces {} are necessary for all arms of this statement
#24: FILE: hw/mips/mips_int.c:51:
+ if (kvm_enabled() && (irq == 2 || irq == 3))
[...]
total: 1 errors, 0 warnings, 18 lines checked
Patch 3/7 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
4/7 Checking commit febf0f756c77 (target/mips: Add Loongson-3 CPU definition)
ERROR: code indent should never use tabs
#133: FILE: target/mips/translate_init.inc.c:815:
+^I^I (3 << CP0C2_SA),$
ERROR: code indent should never use tabs
#162: FILE: target/mips/translate_init.inc.c:844:
+^I^I (15 << CP0C2_SA),$
WARNING: line over 80 characters
#173: FILE: target/mips/translate_init.inc.c:855:
+ .CP0_Config6 = (1 << CP0C6_VCLRU) | (1 << CP0C6_DCLRU) | (1 << CP0C6_SFBEN) |
ERROR: line over 90 characters
#174: FILE: target/mips/translate_init.inc.c:856:
+ (1 << CP0C6_FLTINT) | (1 << CP0C6_INSTPREF) | (1 << CP0C6_DATAPREF),
ERROR: line over 90 characters
#176: FILE: target/mips/translate_init.inc.c:858:
+ (1 << CP0C6_KE) | (1 << CP0C6_VTLBONLY) | (1 << CP0C6_LASX) |
WARNING: line over 80 characters
#181: FILE: target/mips/translate_init.inc.c:863:
+ (1 << CP0C6_PIXUEN) | (1 << CP0C6_DISBLKLYEN) |
WARNING: line over 80 characters
#187: FILE: target/mips/translate_init.inc.c:869:
+ .CP0_Config7_rw_bitmask = (1 << CP0C7_NAPCGEN) | (1 << CP0C7_UNIMUEN) | \
total: 4 errors, 3 warnings, 162 lines checked
Patch 4/7 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
5/7 Checking commit cd58c7be6558 (target/mips: Add more CP0 register for save/restore)
6/7 Checking commit e188b58a2e06 (hw/mips: Add Loongson-3 machine support (with KVM))
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#78:
new file mode 100644
ERROR: code indent should never use tabs
#126: FILE: hw/mips/mips_loongson3.c:44:
+#define INITRD_OFFSET^I^I0x04000000$
ERROR: code indent should never use tabs
#127: FILE: hw/mips/mips_loongson3.c:45:
+#define BOOTPARAM_ADDR^I^I0x8ff00000$
ERROR: code indent should never use tabs
#128: FILE: hw/mips/mips_loongson3.c:46:
+#define BOOTPARAM_PHYADDR^I0x0ff00000$
ERROR: code indent should never use tabs
#129: FILE: hw/mips/mips_loongson3.c:47:
+#define CFG_ADDR ^I^I0x0f100000$
ERROR: code indent should never use tabs
#130: FILE: hw/mips/mips_loongson3.c:48:
+#define FW_CONF_ADDR^I^I0x0fff0000$
ERROR: code indent should never use tabs
#131: FILE: hw/mips/mips_loongson3.c:49:
+#define PM_MMIO_ADDR^I^I0x10080000$
ERROR: code indent should never use tabs
#132: FILE: hw/mips/mips_loongson3.c:50:
+#define PM_MMIO_SIZE^I^I0x100$
ERROR: code indent should never use tabs
#133: FILE: hw/mips/mips_loongson3.c:51:
+#define PM_CNTL_MODE^I^I0x10$
ERROR: code indent should never use tabs
#143: FILE: hw/mips/mips_loongson3.c:61:
+#define PCIE_IRQ_BASE^I 3$
ERROR: missing space after struct definition
#158: FILE: hw/mips/mips_loongson3.c:76:
+ struct mem_map{
WARNING: line over 80 characters
#217: FILE: hw/mips/mips_loongson3.c:135:
+ uint32_t fan_policy; /* see arch/mips/include/asm/mach-loongson/loongson_hwmon.h */
WARNING: line over 80 characters
#352: FILE: hw/mips/mips_loongson3.c:270:
+ 0x40086000, /* mfc0 t0, CP0_STATUS */
WARNING: line over 80 characters
#353: FILE: hw/mips/mips_loongson3.c:271:
+ 0x240900E2, /* li t1, 0x00e2 #{cu3,cu2,cu1,cu0,status_fr}<={0111} */
WARNING: line over 80 characters
#354: FILE: hw/mips/mips_loongson3.c:272:
+ 0x01094025, /* or t0, t0, t1 */
WARNING: line over 80 characters
#355: FILE: hw/mips/mips_loongson3.c:273:
+ 0x40886000, /* mtc0 t0, CP0_STATUS */
WARNING: line over 80 characters
#357: FILE: hw/mips/mips_loongson3.c:275:
+ 0x40086000, /* mfc0 t0, CP0_STATUS */
WARNING: line over 80 characters
#358: FILE: hw/mips/mips_loongson3.c:276:
+ 0x3C090040, /* lui t1, 0x40 #bev */
WARNING: line over 80 characters
#359: FILE: hw/mips/mips_loongson3.c:277:
+ 0x01094025, /* or t0, t0, t1 */
WARNING: line over 80 characters
#360: FILE: hw/mips/mips_loongson3.c:278:
+ 0x40886000, /* mtc0 t0, CP0_STATUS */
WARNING: line over 80 characters
#362: FILE: hw/mips/mips_loongson3.c:280:
+ 0x40806800, /* mtc0 zero, CP0_CAUSE */
WARNING: line over 80 characters
#364: FILE: hw/mips/mips_loongson3.c:282:
+ 0x400A7801, /* mfc0 t2, $15, 1 */
WARNING: line over 80 characters
#365: FILE: hw/mips/mips_loongson3.c:283:
+ 0x314A00FF, /* andi t2, 0x0ff */
WARNING: line over 80 characters
#366: FILE: hw/mips/mips_loongson3.c:284:
+ 0x3C089000, /* dli t0, 0x900000003ff01000 */
WARNING: line over 80 characters
#371: FILE: hw/mips/mips_loongson3.c:289:
+ 0x314B0003, /* andi t3, t2, 0x3 #local cpuid */
WARNING: line over 80 characters
#372: FILE: hw/mips/mips_loongson3.c:290:
+ 0x000B5A00, /* sll t3, 8 */
WARNING: line over 80 characters
#373: FILE: hw/mips/mips_loongson3.c:291:
+ 0x010B4025, /* or t0, t0, t3 */
WARNING: line over 80 characters
#374: FILE: hw/mips/mips_loongson3.c:292:
+ 0x314C000C, /* andi t4, t2, 0xc #node id */
WARNING: line over 80 characters
#375: FILE: hw/mips/mips_loongson3.c:293:
+ 0x000C62BC, /* dsll t4, 42 */
WARNING: line over 80 characters
#376: FILE: hw/mips/mips_loongson3.c:294:
+ 0x010C4025, /* or t0, t0, t4 */
WARNING: line over 80 characters
#377: FILE: hw/mips/mips_loongson3.c:295:
+ /* waitforinit: */
WARNING: line over 80 characters
#378: FILE: hw/mips/mips_loongson3.c:296:
+ 0xDD020020, /* ld v0, FN_OFF(t0) #FN_OFF 0x020 */
WARNING: line over 80 characters
#379: FILE: hw/mips/mips_loongson3.c:297:
+ 0x1040FFFE, /* beqz v0, waitforinit */
WARNING: line over 80 characters
#380: FILE: hw/mips/mips_loongson3.c:298:
+ 0x00000000, /* nop */
WARNING: line over 80 characters
#381: FILE: hw/mips/mips_loongson3.c:299:
+ 0xDD1D0028, /* ld sp, SP_OFF(t0) #FN_OFF 0x028 */
WARNING: line over 80 characters
#382: FILE: hw/mips/mips_loongson3.c:300:
+ 0xDD1C0030, /* ld gp, GP_OFF(t0) #FN_OFF 0x030 */
WARNING: line over 80 characters
#383: FILE: hw/mips/mips_loongson3.c:301:
+ 0xDD050038, /* ld a1, A1_OFF(t0) #FN_OFF 0x038 */
WARNING: line over 80 characters
#384: FILE: hw/mips/mips_loongson3.c:302:
+ 0x00400008, /* jr v0 #byebye */
WARNING: line over 80 characters
#385: FILE: hw/mips/mips_loongson3.c:303:
+ 0x00000000, /* nop */
WARNING: line over 80 characters
#386: FILE: hw/mips/mips_loongson3.c:304:
+ 0x1000FFFF, /* 1: b 1b */
WARNING: line over 80 characters
#387: FILE: hw/mips/mips_loongson3.c:305:
+ 0x00000000, /* nop */
WARNING: line over 80 characters
#389: FILE: hw/mips/mips_loongson3.c:307:
+ /* Reset */
WARNING: line over 80 characters
#390: FILE: hw/mips/mips_loongson3.c:308:
+ 0x3C0C9000, /* dli t0, 0x9000000010080010 */
WARNING: line over 80 characters
#396: FILE: hw/mips/mips_loongson3.c:314:
+ 0x240D0000, /* li t1, 0x00 */
WARNING: line over 80 characters
#397: FILE: hw/mips/mips_loongson3.c:315:
+ 0xA18D0000, /* sb t1, (t0) */
WARNING: line over 80 characters
#398: FILE: hw/mips/mips_loongson3.c:316:
+ 0x1000FFFF, /* 1: b 1b */
WARNING: line over 80 characters
#399: FILE: hw/mips/mips_loongson3.c:317:
+ 0x00000000, /* nop */
WARNING: line over 80 characters
#401: FILE: hw/mips/mips_loongson3.c:319:
+ /* Shutdown */
WARNING: line over 80 characters
#402: FILE: hw/mips/mips_loongson3.c:320:
+ 0x3C0C9000, /* dli t0, 0x9000000010080010 */
WARNING: line over 80 characters
#408: FILE: hw/mips/mips_loongson3.c:326:
+ 0x240D00FF, /* li t1, 0xff */
WARNING: line over 80 characters
#409: FILE: hw/mips/mips_loongson3.c:327:
+ 0xA18D0000, /* sb t1, (t0) */
WARNING: line over 80 characters
#410: FILE: hw/mips/mips_loongson3.c:328:
+ 0x1000FFFF, /* 1: b 1b */
WARNING: line over 80 characters
#411: FILE: hw/mips/mips_loongson3.c:329:
+ 0x00000000 /* nop */
WARNING: line over 80 characters
#419: FILE: hw/mips/mips_loongson3.c:337:
+static void loongson3_pm_write(void *opaque, hwaddr addr, uint64_t val,unsigned size)
ERROR: space required after that ',' (ctx:VxV)
#419: FILE: hw/mips/mips_loongson3.c:337:
+static void loongson3_pm_write(void *opaque, hwaddr addr, uint64_t val,unsigned size)
^
ERROR: braces {} are necessary for all arms of this statement
#421: FILE: hw/mips/mips_loongson3.c:339:
+ if (addr != PM_CNTL_MODE)
[...]
ERROR: do not use assignment in if condition
#469: FILE: hw/mips/mips_loongson3.c:387:
+ if ((fd = open("/proc/cpuinfo", O_RDONLY)) == -1) {
ERROR: trailing statements should be on next line
#482: FILE: hw/mips/mips_loongson3.c:400:
+ while (*buf_p != '@') buf_p++;
ERROR: braces {} are necessary for all arms of this statement
#482: FILE: hw/mips/mips_loongson3.c:400:
+ while (*buf_p != '@') buf_p++;
[...]
ERROR: trailing statements should be on next line
#487: FILE: hw/mips/mips_loongson3.c:405:
+ while ((*buf_p >= '0') && (*buf_p <= '9')) buf_p++;
ERROR: braces {} are necessary for all arms of this statement
#487: FILE: hw/mips/mips_loongson3.c:405:
+ while ((*buf_p >= '0') && (*buf_p <= '9')) buf_p++;
[...]
ERROR: braces {} are necessary for all arms of this statement
#502: FILE: hw/mips/mips_loongson3.c:420:
+ if (!c->cpu_clock_freq)
[...]
ERROR: spaces required around that '+=' (ctx:VxW)
#595: FILE: hw/mips/mips_loongson3.c:513:
+ p+= align(sizeof(struct board_devices));
^
ERROR: spaces required around that '+=' (ctx:VxW)
#599: FILE: hw/mips/mips_loongson3.c:517:
+ p+= align(sizeof(struct loongson_special_attribute));
^
WARNING: line over 80 characters
#642: FILE: hw/mips/mips_loongson3.c:560:
+ fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)current_machine->smp.max_cpus);
ERROR: spaces required around that '+' (ctx:VxV)
#684: FILE: hw/mips/mips_loongson3.c:602:
+ ret += (1 + snprintf(params_buf+ret, 256 - ret, "%s",
^
ERROR: spaces required around that '*' (ctx:VxV)
#688: FILE: hw/mips/mips_loongson3.c:606:
+ *parg_env++ = BOOTPARAM_ADDR + 4*ret;
^
WARNING: line over 80 characters
#791: FILE: hw/mips/mips_loongson3.c:709:
+ isa_bus = isa_bus_new(NULL, get_system_memory(), get_system_io(), &error_abort);
WARNING: line over 80 characters
#821: FILE: hw/mips/mips_loongson3.c:739:
+ memory_region_add_subregion(get_system_memory(), VIRT_PCI_ECAM_BASE, ecam_alias);
WARNING: line over 80 characters
#827: FILE: hw/mips/mips_loongson3.c:745:
+ memory_region_add_subregion(get_system_memory(), VIRT_PCI_MEM_BASE, mmio_alias);
WARNING: line over 80 characters
#832: FILE: hw/mips/mips_loongson3.c:750:
+ memory_region_add_subregion(get_system_memory(), VIRT_PCI_IO_BASE, pio_alias);
ERROR: space required before the open parenthesis '('
#843: FILE: hw/mips/mips_loongson3.c:761:
+ for(i = 0; i < nb_nics; i++) {
ERROR: braces {} are necessary for all arms of this statement
#846: FILE: hw/mips/mips_loongson3.c:764:
+ if (!nd->model)
[...]
ERROR: braces {} are necessary for all arms of this statement
#870: FILE: hw/mips/mips_loongson3.c:788:
+ if (!machine->cpu_type)
[...]
ERROR: Error messages should not contain newlines
#874: FILE: hw/mips/mips_loongson3.c:792:
+ error_report("Loongson-3/TCG need cpu type Loongson-3A1000\n");
ERROR: braces {} are necessary for all arms of this statement
#878: FILE: hw/mips/mips_loongson3.c:796:
+ if (!machine->cpu_type)
[...]
ERROR: Error messages should not contain newlines
#882: FILE: hw/mips/mips_loongson3.c:800:
+ error_report("Loongson-3/KVM need cpu type Loongson-3A4000\n");
WARNING: line over 80 characters
#903: FILE: hw/mips/mips_loongson3.c:821:
+ /* Allocate RAM/BIOS, 0x00000000~0x10000000 is alias of 0x80000000~0x90000000 */
WARNING: line over 80 characters
#904: FILE: hw/mips/mips_loongson3.c:822:
+ memory_region_init_rom(bios, NULL, "loongson3.bios", BIOS_SIZE, &error_fatal);
ERROR: line over 90 characters
#905: FILE: hw/mips/mips_loongson3.c:823:
+ memory_region_init_alias(ram, NULL, "loongson3.lowram", machine->ram, 0, 256 * 0x100000);
ERROR: line over 90 characters
#906: FILE: hw/mips/mips_loongson3.c:824:
+ memory_region_init_io(iomem, NULL, &loongson3_pm_ops, NULL, "loongson3_pm", PM_MMIO_SIZE);
WARNING: line over 80 characters
#924: FILE: hw/mips/mips_loongson3.c:842:
+ rom_add_blob_fixed("bios", bios_boot_code, sizeof(bios_boot_code), 0x1fc00000LL);
WARNING: line over 80 characters
#945: FILE: hw/mips/mips_loongson3.c:863:
+ rom_add_blob_fixed("fw_conf", (void*)&fw_config, sizeof(fw_config), FW_CONF_ADDR);
ERROR: "(foo*)" should be "(foo *)"
#945: FILE: hw/mips/mips_loongson3.c:863:
+ rom_add_blob_fixed("fw_conf", (void*)&fw_config, sizeof(fw_config), FW_CONF_ADDR);
ERROR: braces {} are necessary for all arms of this statement
#952: FILE: hw/mips/mips_loongson3.c:870:
+ if (serial_hd(0))
[...]
ERROR: line over 90 characters
#953: FILE: hw/mips/mips_loongson3.c:871:
+ serial_mm_init(address_space_mem, 0x1fe001e0, 0, env->irq[2], 115200, serial_hd(0), DEVICE_NATIVE_ENDIAN);
total: 33 errors, 53 warnings, 915 lines checked
Patch 6/7 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
7/7 Checking commit 7b568a8bbbe2 (MAINTAINERS: Add myself as Loongson-3 maintainer)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/1588242155-23924-1-git-send-email-chenhc@lemote.com/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
© 2016 - 2026 Red Hat, Inc.