arch/mips/Kconfig | 1 + arch/mips/include/asm/cpu-features.h | 3 + arch/mips/include/asm/kvm_host.h | 50 +++- arch/mips/include/asm/mipsregs.h | 7 + arch/mips/include/asm/pgtable-64.h | 4 +- arch/mips/include/uapi/asm/inst.h | 11 + arch/mips/kernel/cpu-probe.c | 2 + arch/mips/kvm/Kconfig | 1 + arch/mips/kvm/Makefile | 5 +- arch/mips/kvm/emulate.c | 461 ++++++++++++++++++++++++++++++++++- arch/mips/kvm/entry.c | 19 +- arch/mips/kvm/interrupt.c | 93 +------ arch/mips/kvm/interrupt.h | 14 +- arch/mips/kvm/loongson_ipi.c | 215 ++++++++++++++++ arch/mips/kvm/mips.c | 49 +++- arch/mips/kvm/tlb.c | 39 +++ arch/mips/kvm/trap_emul.c | 3 + arch/mips/kvm/vz.c | 204 +++++++++++----- 18 files changed, 1013 insertions(+), 168 deletions(-) create mode 100644 arch/mips/kvm/loongson_ipi.c
We are preparing to add KVM support for Loongson-3. VZ extension is fully supported in Loongson-3A R4+, and we will not care about old CPUs (at least now). We already have a full functional Linux kernel (based on Linux-5.4.x LTS) and QEMU (based on 5.0.0-rc2) and their git repositories are here: QEMU: https://github.com/chenhuacai/qemu Kernel: https://github.com/chenhuacai/linux Of course these two repositories need to be rework and not suitable for upstream (especially the commits need to be splitted). We show them here is just to tell others what we have done, and how KVM/Loongson will look like. Our plan is make the KVM host side be upstream first, and after that, we will make the KVM guest side and QEMU emulator be upstream. Mike Rapoport(1): mips: define pud_index() regardless of page table folding Xing Li(2): KVM: MIPS: Define KVM_ENTRYHI_ASID to cpu_asid_mask(&boot_cpu_data) KVM: MIPS: Fix VPN2_MASK definition for variable cpu_vmbits Huacai Chen(12): KVM: MIPS: Increase KVM_MAX_VCPUS and KVM_USER_MEM_SLOTS to 16 KVM: MIPS: Add EVENTFD support which is needed by VHOST KVM: MIPS: Use lddir/ldpte instructions to lookup gpa_mm.pgd KVM: MIPS: Introduce and use cpu_guest_has_ldpte KVM: MIPS: Use root tlb to control guest's CCA for Loongson-3 KVM: MIPS: Let indexed cacheops cause guest exit on Loongson-3 KVM: MIPS: Add more types of virtual interrupts KVM: MIPS: Add Loongson-3 Virtual IPI interrupt support KVM: MIPS: Add CPUCFG emulation for Loongson-3 KVM: MIPS: Add CONFIG6 and DIAG registers emulation KVM: MIPS: Add more MMIO load/store instructions emulation KVM: MIPS: Enable KVM support for Loongson-3 Signed-off-by: Huacai Chen <chenhc@lemote.com> --- arch/mips/Kconfig | 1 + arch/mips/include/asm/cpu-features.h | 3 + arch/mips/include/asm/kvm_host.h | 50 +++- arch/mips/include/asm/mipsregs.h | 7 + arch/mips/include/asm/pgtable-64.h | 4 +- arch/mips/include/uapi/asm/inst.h | 11 + arch/mips/kernel/cpu-probe.c | 2 + arch/mips/kvm/Kconfig | 1 + arch/mips/kvm/Makefile | 5 +- arch/mips/kvm/emulate.c | 461 ++++++++++++++++++++++++++++++++++- arch/mips/kvm/entry.c | 19 +- arch/mips/kvm/interrupt.c | 93 +------ arch/mips/kvm/interrupt.h | 14 +- arch/mips/kvm/loongson_ipi.c | 215 ++++++++++++++++ arch/mips/kvm/mips.c | 49 +++- arch/mips/kvm/tlb.c | 39 +++ arch/mips/kvm/trap_emul.c | 3 + arch/mips/kvm/vz.c | 204 +++++++++++----- 18 files changed, 1013 insertions(+), 168 deletions(-) create mode 100644 arch/mips/kvm/loongson_ipi.c -- 2.7.0
On Mon, 13 Apr 2020 15:30:09 +0800 Huacai Chen <chenhc@lemote.com> wrote: > We are preparing to add KVM support for Loongson-3. VZ extension is > fully supported in Loongson-3A R4+, and we will not care about old > CPUs (at least now). We already have a full functional Linux kernel > (based on Linux-5.4.x LTS) and QEMU (based on 5.0.0-rc2) and their git > repositories are here: > > QEMU: https://github.com/chenhuacai/qemu > Kernel: https://github.com/chenhuacai/linux > > Of course these two repositories need to be rework and not suitable > for upstream (especially the commits need to be splitted). We show > them here is just to tell others what we have done, and how > KVM/Loongson will look like. > > Our plan is make the KVM host side be upstream first, and after that, > we will make the KVM guest side and QEMU emulator be upstream. + Aleksandar as QEMU/MIPS mainatiner I was involved in KVM/Loongson development a bit and also intend to help with mainline these works. After dealing with basic LS7A PCH kernel support, I'm going to cooperate with Huacai and anyone who interested in to deal with following stuff: - Basic QEMU/TCG support for Loongson64 instructions. Well, it seems unrelated with KVM, but that would make development easier with cross ISA emulation. I'm not going to implement all the features like Loongson's page table fast walk extension and binary translation extension but I'll ensure any binary compiled with march=loongson3a can run flawlessly on TCG. - Design of Loongson-VIRT QEMU machine It is nearly impossible to bring a real Loongson system into QEMU. Both RS780E and LS7A PCH have tons of unreasonable design that would make the emulation extremely complex, Loongson company's KVM implementation[1] has already proofed that, thay're now in the hell. So we all agreed that we should build a machine from draft. I think we should reuse existing infra as far as possible to reduce our work load. I'm planing to use pci-host-cam-generic together with VIRTIO PCI devices and a a strip down version of loongson,liointc-1.0a to build a pure PCI based system. But if any one have better idea please just tell us, I'm still considering how to implement SMP-IPI and ACPI stuff. - BIOS in VM This has a lower priority. But BIOS is required to make a emulated machine looks like a real machine. Loongson have their open-sourced PMON and close-sourced UEFI(Based on tianocore). I'd really with Loongson or Lemote will open-source their UEFI but PMON is also a option. Any kind of feedback is appreciated. Thanks. Wish you good health :-) [1]: http://cgit.loongnix.org/cgit/linux-3.10/ & http://cgit.loongnix.org/cgit/qemu-2.7.0/ Btw: I think Cc qemu-devel for the whole series is a little bit disturb, probably we should only Cc qemu-devel for the cover letter. > > Mike Rapoport(1): > mips: define pud_index() regardless of page table folding > > Xing Li(2): > KVM: MIPS: Define KVM_ENTRYHI_ASID to cpu_asid_mask(&boot_cpu_data) > KVM: MIPS: Fix VPN2_MASK definition for variable cpu_vmbits > > Huacai Chen(12): > KVM: MIPS: Increase KVM_MAX_VCPUS and KVM_USER_MEM_SLOTS to 16 > KVM: MIPS: Add EVENTFD support which is needed by VHOST > KVM: MIPS: Use lddir/ldpte instructions to lookup gpa_mm.pgd > KVM: MIPS: Introduce and use cpu_guest_has_ldpte > KVM: MIPS: Use root tlb to control guest's CCA for Loongson-3 > KVM: MIPS: Let indexed cacheops cause guest exit on Loongson-3 > KVM: MIPS: Add more types of virtual interrupts > KVM: MIPS: Add Loongson-3 Virtual IPI interrupt support > KVM: MIPS: Add CPUCFG emulation for Loongson-3 > KVM: MIPS: Add CONFIG6 and DIAG registers emulation > KVM: MIPS: Add more MMIO load/store instructions emulation > KVM: MIPS: Enable KVM support for Loongson-3 > > Signed-off-by: Huacai Chen <chenhc@lemote.com> > --- > arch/mips/Kconfig | 1 + > arch/mips/include/asm/cpu-features.h | 3 + > arch/mips/include/asm/kvm_host.h | 50 +++- > arch/mips/include/asm/mipsregs.h | 7 + > arch/mips/include/asm/pgtable-64.h | 4 +- > arch/mips/include/uapi/asm/inst.h | 11 + > arch/mips/kernel/cpu-probe.c | 2 + > arch/mips/kvm/Kconfig | 1 + > arch/mips/kvm/Makefile | 5 +- > arch/mips/kvm/emulate.c | 461 > ++++++++++++++++++++++++++++++++++- arch/mips/kvm/entry.c > | 19 +- arch/mips/kvm/interrupt.c | 93 +------ > arch/mips/kvm/interrupt.h | 14 +- > arch/mips/kvm/loongson_ipi.c | 215 ++++++++++++++++ > arch/mips/kvm/mips.c | 49 +++- > arch/mips/kvm/tlb.c | 39 +++ > arch/mips/kvm/trap_emul.c | 3 + > arch/mips/kvm/vz.c | 204 +++++++++++----- > 18 files changed, 1013 insertions(+), 168 deletions(-) > create mode 100644 arch/mips/kvm/loongson_ipi.c > -- > 2.7.0
Hi, Jiaxun, On Mon, Apr 13, 2020 at 4:19 PM Jiaxun Yang <jiaxun.yang@flygoat.com> wrote: > > On Mon, 13 Apr 2020 15:30:09 +0800 > Huacai Chen <chenhc@lemote.com> wrote: > > > We are preparing to add KVM support for Loongson-3. VZ extension is > > fully supported in Loongson-3A R4+, and we will not care about old > > CPUs (at least now). We already have a full functional Linux kernel > > (based on Linux-5.4.x LTS) and QEMU (based on 5.0.0-rc2) and their git > > repositories are here: > > > > QEMU: https://github.com/chenhuacai/qemu > > Kernel: https://github.com/chenhuacai/linux > > > > Of course these two repositories need to be rework and not suitable > > for upstream (especially the commits need to be splitted). We show > > them here is just to tell others what we have done, and how > > KVM/Loongson will look like. > > > > Our plan is make the KVM host side be upstream first, and after that, > > we will make the KVM guest side and QEMU emulator be upstream. > > + Aleksandar as QEMU/MIPS mainatiner > > I was involved in KVM/Loongson development a bit and also intend to > help with mainline these works. > > After dealing with basic LS7A PCH kernel support, I'm going to > cooperate with Huacai and anyone who interested in to deal with > following stuff: > > - Basic QEMU/TCG support for Loongson64 instructions. > Well, it seems unrelated with KVM, but that would make > development easier with cross ISA emulation. I'm not going to > implement all the features like Loongson's page table fast walk > extension and binary translation extension but I'll ensure any > binary compiled with march=loongson3a can run flawlessly on > TCG. > > - Design of Loongson-VIRT QEMU machine > It is nearly impossible to bring a real Loongson system into > QEMU. Both RS780E and LS7A PCH have tons of unreasonable design > that would make the emulation extremely complex, Loongson > company's KVM implementation[1] has already proofed that, > thay're now in the hell. So we all agreed that we should build > a machine from draft. I think we should reuse existing infra as > far as possible to reduce our work load. I'm planing to use > pci-host-cam-generic together with VIRTIO PCI devices and a > a strip down version of loongson,liointc-1.0a to build a pure > PCI based system. But if any one have better idea please just > tell us, I'm still considering how to implement SMP-IPI and ACPI > stuff. > > - BIOS in VM > This has a lower priority. But BIOS is required to make a > emulated machine looks like a real machine. Loongson have their > open-sourced PMON and close-sourced UEFI(Based on tianocore). > I'd really with Loongson or Lemote will open-source their UEFI > but PMON is also a option. There will be an open source BIOS, we have completed 98%. > > Any kind of feedback is appreciated. > > Thanks. > > Wish you good health :-) > > > [1]: http://cgit.loongnix.org/cgit/linux-3.10/ & > http://cgit.loongnix.org/cgit/qemu-2.7.0/ > > Btw: I think Cc qemu-devel for the whole series is a little bit > disturb, probably we should only Cc qemu-devel for the cover letter. Sorrry, its my mistake. > > > > > Mike Rapoport(1): > > mips: define pud_index() regardless of page table folding > > > > Xing Li(2): > > KVM: MIPS: Define KVM_ENTRYHI_ASID to cpu_asid_mask(&boot_cpu_data) > > KVM: MIPS: Fix VPN2_MASK definition for variable cpu_vmbits > > > > Huacai Chen(12): > > KVM: MIPS: Increase KVM_MAX_VCPUS and KVM_USER_MEM_SLOTS to 16 > > KVM: MIPS: Add EVENTFD support which is needed by VHOST > > KVM: MIPS: Use lddir/ldpte instructions to lookup gpa_mm.pgd > > KVM: MIPS: Introduce and use cpu_guest_has_ldpte > > KVM: MIPS: Use root tlb to control guest's CCA for Loongson-3 > > KVM: MIPS: Let indexed cacheops cause guest exit on Loongson-3 > > KVM: MIPS: Add more types of virtual interrupts > > KVM: MIPS: Add Loongson-3 Virtual IPI interrupt support > > KVM: MIPS: Add CPUCFG emulation for Loongson-3 > > KVM: MIPS: Add CONFIG6 and DIAG registers emulation > > KVM: MIPS: Add more MMIO load/store instructions emulation > > KVM: MIPS: Enable KVM support for Loongson-3 > > > > Signed-off-by: Huacai Chen <chenhc@lemote.com> > > --- > > arch/mips/Kconfig | 1 + > > arch/mips/include/asm/cpu-features.h | 3 + > > arch/mips/include/asm/kvm_host.h | 50 +++- > > arch/mips/include/asm/mipsregs.h | 7 + > > arch/mips/include/asm/pgtable-64.h | 4 +- > > arch/mips/include/uapi/asm/inst.h | 11 + > > arch/mips/kernel/cpu-probe.c | 2 + > > arch/mips/kvm/Kconfig | 1 + > > arch/mips/kvm/Makefile | 5 +- > > arch/mips/kvm/emulate.c | 461 > > ++++++++++++++++++++++++++++++++++- arch/mips/kvm/entry.c > > | 19 +- arch/mips/kvm/interrupt.c | 93 +------ > > arch/mips/kvm/interrupt.h | 14 +- > > arch/mips/kvm/loongson_ipi.c | 215 ++++++++++++++++ > > arch/mips/kvm/mips.c | 49 +++- > > arch/mips/kvm/tlb.c | 39 +++ > > arch/mips/kvm/trap_emul.c | 3 + > > arch/mips/kvm/vz.c | 204 +++++++++++----- > > 18 files changed, 1013 insertions(+), 168 deletions(-) > > create mode 100644 arch/mips/kvm/loongson_ipi.c > > -- > > 2.7.0 > Huacai
On 04/13/2020 04:18 PM, Jiaxun Yang wrote: > On Mon, 13 Apr 2020 15:30:09 +0800 > Huacai Chen <chenhc@lemote.com> wrote: > >> We are preparing to add KVM support for Loongson-3. VZ extension is >> fully supported in Loongson-3A R4+, and we will not care about old >> CPUs (at least now). We already have a full functional Linux kernel >> (based on Linux-5.4.x LTS) and QEMU (based on 5.0.0-rc2) and their git >> repositories are here: >> >> QEMU: https://github.com/chenhuacai/qemu >> Kernel: https://github.com/chenhuacai/linux >> >> Of course these two repositories need to be rework and not suitable >> for upstream (especially the commits need to be splitted). We show >> them here is just to tell others what we have done, and how >> KVM/Loongson will look like. >> >> Our plan is make the KVM host side be upstream first, and after that, >> we will make the KVM guest side and QEMU emulator be upstream. > > + Aleksandar as QEMU/MIPS mainatiner > > I was involved in KVM/Loongson development a bit and also intend to > help with mainline these works. > > After dealing with basic LS7A PCH kernel support, I'm going to > cooperate with Huacai and anyone who interested in to deal with > following stuff: > > - Basic QEMU/TCG support for Loongson64 instructions. > Well, it seems unrelated with KVM, but that would make > development easier with cross ISA emulation. I'm not going to > implement all the features like Loongson's page table fast walk > extension and binary translation extension but I'll ensure any > binary compiled with march=loongson3a can run flawlessly on > TCG. > > - Design of Loongson-VIRT QEMU machine > It is nearly impossible to bring a real Loongson system into > QEMU. Both RS780E and LS7A PCH have tons of unreasonable design > that would make the emulation extremely complex, Loongson > company's KVM implementation[1] has already proofed that, > thay're now in the hell. So we all agreed that we should build > a machine from draft. I think we should reuse existing infra as > far as possible to reduce our work load. I'm planing to use > pci-host-cam-generic together with VIRTIO PCI devices and a > a strip down version of loongson,liointc-1.0a to build a pure > PCI based system. But if any one have better idea please just > tell us, I'm still considering how to implement SMP-IPI and ACPI > stuff. It is a good job to add kvm virtualization support on loongson64 platform. I agree that we should define common virt machine hardware system, however the compiled kernel binary should be the same with host system, else it will bring out trouble for customers to differentiate them between guest system and host system. For pci host bridge emulation, I suggest that gpex pcie host bridge should be used, since it supports pcie hotplug and arm/riscv uses this pcie host bridge. For virtual interrupt controller, it should support MSI/MSIX interrupt, irqchip in kernel, IRQFD, vhost/vfio etc. I have no idea how to define virtual interrupt controller now. regards bibo,mao > > - BIOS in VM > This has a lower priority. But BIOS is required to make a > emulated machine looks like a real machine. Loongson have their > open-sourced PMON and close-sourced UEFI(Based on tianocore). > I'd really with Loongson or Lemote will open-source their UEFI > but PMON is also a option. > > Any kind of feedback is appreciated. > > Thanks. > > Wish you good health :-) > > > [1]: http://cgit.loongnix.org/cgit/linux-3.10/ & > http://cgit.loongnix.org/cgit/qemu-2.7.0/ > > Btw: I think Cc qemu-devel for the whole series is a little bit > disturb, probably we should only Cc qemu-devel for the cover letter. > >> >> Mike Rapoport(1): >> mips: define pud_index() regardless of page table folding >> >> Xing Li(2): >> KVM: MIPS: Define KVM_ENTRYHI_ASID to cpu_asid_mask(&boot_cpu_data) >> KVM: MIPS: Fix VPN2_MASK definition for variable cpu_vmbits >> >> Huacai Chen(12): >> KVM: MIPS: Increase KVM_MAX_VCPUS and KVM_USER_MEM_SLOTS to 16 >> KVM: MIPS: Add EVENTFD support which is needed by VHOST >> KVM: MIPS: Use lddir/ldpte instructions to lookup gpa_mm.pgd >> KVM: MIPS: Introduce and use cpu_guest_has_ldpte >> KVM: MIPS: Use root tlb to control guest's CCA for Loongson-3 >> KVM: MIPS: Let indexed cacheops cause guest exit on Loongson-3 >> KVM: MIPS: Add more types of virtual interrupts >> KVM: MIPS: Add Loongson-3 Virtual IPI interrupt support >> KVM: MIPS: Add CPUCFG emulation for Loongson-3 >> KVM: MIPS: Add CONFIG6 and DIAG registers emulation >> KVM: MIPS: Add more MMIO load/store instructions emulation >> KVM: MIPS: Enable KVM support for Loongson-3 >> >> Signed-off-by: Huacai Chen <chenhc@lemote.com> >> --- >> arch/mips/Kconfig | 1 + >> arch/mips/include/asm/cpu-features.h | 3 + >> arch/mips/include/asm/kvm_host.h | 50 +++- >> arch/mips/include/asm/mipsregs.h | 7 + >> arch/mips/include/asm/pgtable-64.h | 4 +- >> arch/mips/include/uapi/asm/inst.h | 11 + >> arch/mips/kernel/cpu-probe.c | 2 + >> arch/mips/kvm/Kconfig | 1 + >> arch/mips/kvm/Makefile | 5 +- >> arch/mips/kvm/emulate.c | 461 >> ++++++++++++++++++++++++++++++++++- arch/mips/kvm/entry.c >> | 19 +- arch/mips/kvm/interrupt.c | 93 +------ >> arch/mips/kvm/interrupt.h | 14 +- >> arch/mips/kvm/loongson_ipi.c | 215 ++++++++++++++++ >> arch/mips/kvm/mips.c | 49 +++- >> arch/mips/kvm/tlb.c | 39 +++ >> arch/mips/kvm/trap_emul.c | 3 + >> arch/mips/kvm/vz.c | 204 +++++++++++----- >> 18 files changed, 1013 insertions(+), 168 deletions(-) >> create mode 100644 arch/mips/kvm/loongson_ipi.c >> -- >> 2.7.0
On Tue, 14 Apr 2020 09:40:26 +0800 maobibo <maobibo@loongson.cn> wrote: > On 04/13/2020 04:18 PM, Jiaxun Yang wrote: > > On Mon, 13 Apr 2020 15:30:09 +0800 > > Huacai Chen <chenhc@lemote.com> wrote: > > > >> We are preparing to add KVM support for Loongson-3. VZ extension is > >> fully supported in Loongson-3A R4+, and we will not care about old > >> CPUs (at least now). We already have a full functional Linux kernel > >> (based on Linux-5.4.x LTS) and QEMU (based on 5.0.0-rc2) and their > >> git repositories are here: > >> > >> QEMU: https://github.com/chenhuacai/qemu > >> Kernel: https://github.com/chenhuacai/linux > >> > >> Of course these two repositories need to be rework and not suitable > >> for upstream (especially the commits need to be splitted). We show > >> them here is just to tell others what we have done, and how > >> KVM/Loongson will look like. > >> > >> Our plan is make the KVM host side be upstream first, and after > >> that, we will make the KVM guest side and QEMU emulator be > >> upstream. > > > > + Aleksandar as QEMU/MIPS mainatiner > > > > I was involved in KVM/Loongson development a bit and also intend to > > help with mainline these works. > > > > After dealing with basic LS7A PCH kernel support, I'm going to > > cooperate with Huacai and anyone who interested in to deal with > > following stuff: > > > > - Basic QEMU/TCG support for Loongson64 instructions. > > Well, it seems unrelated with KVM, but that would make > > development easier with cross ISA emulation. I'm not going > > to implement all the features like Loongson's page table fast walk > > extension and binary translation extension but I'll ensure > > any binary compiled with march=loongson3a can run flawlessly on > > TCG. > > > > - Design of Loongson-VIRT QEMU machine > > It is nearly impossible to bring a real Loongson system into > > QEMU. Both RS780E and LS7A PCH have tons of unreasonable > > design that would make the emulation extremely complex, Loongson > > company's KVM implementation[1] has already proofed that, > > thay're now in the hell. So we all agreed that we should > > build a machine from draft. I think we should reuse existing infra > > as far as possible to reduce our work load. I'm planing to use > > pci-host-cam-generic together with VIRTIO PCI devices and a > > a strip down version of loongson,liointc-1.0a to build a > > pure PCI based system. But if any one have better idea please just > > tell us, I'm still considering how to implement SMP-IPI and > > ACPI stuff. Hi Bibo, Thanks for your response. + Xing Li as I heard he is in charge of KVM from Loongson's news post. > It is a good job to add kvm virtualization support on loongson64 > platform. I agree that we should define common virt machine hardware > system, however the compiled kernel binary should be the same with > host system, else it will bring out trouble for customers to > differentiate them between guest system and host system. I'm planing to use DeviceTree to pass device information between QEMU and guest kernel. So we can upgrade VM design at any moment without breaking Host Guest kernel compatibility. > For pci host bridge emulation, I suggest that gpex pcie host bridge > should be used, since it supports pcie hotplug and arm/riscv uses > this pcie host bridge. gpex is basically a pci-host-cam-generic at kernel point of view. I'm planing to reuse it too. > > For virtual interrupt controller, it should support MSI/MSIX > interrupt, irqchip in kernel, IRQFD, vhost/vfio etc. I have no idea > how to define virtual interrupt controller now. Yes, APIC from x86 and GIC from Arm are all bonded closely with their architecture so we can't reuse them. Probably what we need is a modified version of EXTIOI from Loongson-3A4000. Does Loongson have a plan to implement hardware virtual irqchip? If so we must align with it's design. My plan is we can firstly implement a very simple IRQCHIP instead of complex one which only handle UART and PCI INTx. That is enough to make the system work. After that we can sit and discuss how to implement a complicated version to archive more features. > > > regards > bibo,mao > [...]
Hi, all, On Tue, Apr 14, 2020 at 12:45 PM Jiaxun Yang <jiaxun.yang@flygoat.com> wrote: > > On Tue, 14 Apr 2020 09:40:26 +0800 > maobibo <maobibo@loongson.cn> wrote: > > > On 04/13/2020 04:18 PM, Jiaxun Yang wrote: > > > On Mon, 13 Apr 2020 15:30:09 +0800 > > > Huacai Chen <chenhc@lemote.com> wrote: > > > > > >> We are preparing to add KVM support for Loongson-3. VZ extension is > > >> fully supported in Loongson-3A R4+, and we will not care about old > > >> CPUs (at least now). We already have a full functional Linux kernel > > >> (based on Linux-5.4.x LTS) and QEMU (based on 5.0.0-rc2) and their > > >> git repositories are here: > > >> > > >> QEMU: https://github.com/chenhuacai/qemu > > >> Kernel: https://github.com/chenhuacai/linux > > >> > > >> Of course these two repositories need to be rework and not suitable > > >> for upstream (especially the commits need to be splitted). We show > > >> them here is just to tell others what we have done, and how > > >> KVM/Loongson will look like. > > >> > > >> Our plan is make the KVM host side be upstream first, and after > > >> that, we will make the KVM guest side and QEMU emulator be > > >> upstream. > > > > > > + Aleksandar as QEMU/MIPS mainatiner > > > > > > I was involved in KVM/Loongson development a bit and also intend to > > > help with mainline these works. > > > > > > After dealing with basic LS7A PCH kernel support, I'm going to > > > cooperate with Huacai and anyone who interested in to deal with > > > following stuff: > > > > > > - Basic QEMU/TCG support for Loongson64 instructions. > > > Well, it seems unrelated with KVM, but that would make > > > development easier with cross ISA emulation. I'm not going > > > to implement all the features like Loongson's page table fast walk > > > extension and binary translation extension but I'll ensure > > > any binary compiled with march=loongson3a can run flawlessly on > > > TCG. > > > > > > - Design of Loongson-VIRT QEMU machine > > > It is nearly impossible to bring a real Loongson system into > > > QEMU. Both RS780E and LS7A PCH have tons of unreasonable > > > design that would make the emulation extremely complex, Loongson > > > company's KVM implementation[1] has already proofed that, > > > thay're now in the hell. So we all agreed that we should > > > build a machine from draft. I think we should reuse existing infra > > > as far as possible to reduce our work load. I'm planing to use > > > pci-host-cam-generic together with VIRTIO PCI devices and a > > > a strip down version of loongson,liointc-1.0a to build a > > > pure PCI based system. But if any one have better idea please just > > > tell us, I'm still considering how to implement SMP-IPI and > > > ACPI stuff. > > Hi Bibo, > Thanks for your response. > > + Xing Li as I heard he is in charge of KVM from Loongson's news post. > > > It is a good job to add kvm virtualization support on loongson64 > > platform. I agree that we should define common virt machine hardware > > system, however the compiled kernel binary should be the same with > > host system, else it will bring out trouble for customers to > > differentiate them between guest system and host system. > > I'm planing to use DeviceTree to pass device information between QEMU > and guest kernel. So we can upgrade VM design at any moment without > breaking Host Guest kernel compatibility. > > > > For pci host bridge emulation, I suggest that gpex pcie host bridge > > should be used, since it supports pcie hotplug and arm/riscv uses > > this pcie host bridge. > > > gpex is basically a pci-host-cam-generic at kernel point of view. I'm > planing to reuse it too. I agree to use GPEX, and the qemu in github is updated to use GPEX. > > > > > For virtual interrupt controller, it should support MSI/MSIX > > interrupt, irqchip in kernel, IRQFD, vhost/vfio etc. I have no idea > > how to define virtual interrupt controller now. > > Yes, APIC from x86 and GIC from Arm are all bonded closely with their > architecture so we can't reuse them. Probably what we need is a > modified version of EXTIOI from Loongson-3A4000. > > Does Loongson have a plan to implement hardware virtual irqchip? If so > we must align with it's design. > > My plan is we can firstly implement a very simple IRQCHIP instead of > complex one which only handle UART and PCI INTx. That is enough to make > the system work. After that we can sit and discuss how to implement a > complicated version to archive more features. > > > > > > > regards > > bibo,mao > > > [...]
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