On 2/11/20 1:39 AM, Taylor Simpson wrote:
> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
> ---
> target/hexagon/hex_regs.h | 97 +++++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 97 insertions(+)
> create mode 100644 target/hexagon/hex_regs.h
>
> diff --git a/target/hexagon/hex_regs.h b/target/hexagon/hex_regs.h
> new file mode 100644
> index 0000000..ba1ae10
> --- /dev/null
> +++ b/target/hexagon/hex_regs.h
> @@ -0,0 +1,97 @@
> +/*
> + * Copyright (c) 2019 Qualcomm Innovation Center, Inc. All Rights Reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, see <http://www.gnu.org/licenses/>.
> + */
> +
> +#ifndef HEX_REGS_H
> +#define HEX_REGS_H
> +
If this isn't generated I'd rather use an enum.
> +#define HEX_REG_R00 0
> +#define HEX_REG_R01 1
> +#define HEX_REG_R02 2
> +#define HEX_REG_R03 3
> +#define HEX_REG_R04 4
> +#define HEX_REG_R05 5
> +#define HEX_REG_R06 6
> +#define HEX_REG_R07 7
> +#define HEX_REG_R08 8
> +#define HEX_REG_R09 9
> +#define HEX_REG_R10 10
> +#define HEX_REG_R11 11
> +#define HEX_REG_R12 12
> +#define HEX_REG_R13 13
> +#define HEX_REG_R14 14
> +#define HEX_REG_R15 15
> +#define HEX_REG_R16 16
> +#define HEX_REG_R17 17
> +#define HEX_REG_R18 18
> +#define HEX_REG_R19 19
> +#define HEX_REG_R20 20
> +#define HEX_REG_R21 21
> +#define HEX_REG_R22 22
> +#define HEX_REG_R23 23
> +#define HEX_REG_R24 24
> +#define HEX_REG_R25 25
> +#define HEX_REG_R26 26
> +#define HEX_REG_R27 27
> +#define HEX_REG_R28 28
> +#define HEX_REG_R29 29
> +#define HEX_REG_SP 29
> +#define HEX_REG_FP 30
> +#define HEX_REG_R30 30
> +#define HEX_REG_LR 31
> +#define HEX_REG_R31 31
> +#define HEX_REG_SA0 32
> +#define HEX_REG_LC0 33
> +#define HEX_REG_SA1 34
> +#define HEX_REG_LC1 35
> +#define HEX_REG_P3_0 36
> +#define HEX_REG_M0 38
> +#define HEX_REG_M1 39
> +#define HEX_REG_USR 40
> +#define HEX_REG_PC 41
> +#define HEX_REG_UGP 42
> +#define HEX_REG_GP 43
> +#define HEX_REG_CS0 44
> +#define HEX_REG_CS1 45
> +#define HEX_REG_UPCYCLELO 46
> +#define HEX_REG_UPCYCLEHI 47
> +#define HEX_REG_FRAMELIMIT 48
> +#define HEX_REG_FRAMEKEY 49
> +#define HEX_REG_PKTCNTLO 50
> +#define HEX_REG_PKTCNTHI 51
> +/* Use reserved control registers for qemu execution counts */
> +#define HEX_REG_QEMU_PKT_CNT 52
> +#define HEX_REG_QEMU_INSN_CNT 53
> +#define HEX_REG_QEMU_HVX_CNT 54
> +#define HEX_REG_UTIMERLO 62
> +#define HEX_REG_UTIMERHI 63
> +
> +#ifndef CONFIG_USER_ONLY
> +#define HEX_REG_SGP0 64
> +#define HEX_REG_SGP1 65
> +#define HEX_REG_STID 66
> +#define HEX_REG_ELR 67
> +#define HEX_REG_BADVA0 68
> +#define HEX_REG_BADVA1 69
> +#define HEX_REG_SSR 70
> +#define HEX_REG_CCR 71
> +#define HEX_REG_HTID 72
> +#define HEX_REG_BADVA 73
> +#define HEX_REG_IMASK 74
> +#define HEX_REG_GEVB 75
> +#endif
> +
> +#endif
>