[v4] target/mips: Misc MIPS fixes and improvements for 5.0

[PATCH v4 0/7] target/mips: Misc MIPS fixes and improvements for 5.0

Posted by Aleksandar Markovic 4 years, 3 months ago

From: Aleksandar Markovic <amarkovic@wavecomp.com>

This series contains a variety of fixes and improvements for
target MIPS.

v3->v4:

  - split micromips R6 disassembler patch to more manageable parts
  - added new field to disassemble_info structure
  - CRC32 refactoring is as is in this version, but refactoring is
    planned for near future

v2->v3:

  - added micromips R6 disassembler

Aleksandar Markovic (5):
  target/mips: Rectify documentation on deprecating r4k machine
  target/mips: Add support for MIPS<32|64>R6 CRC32 ISA
  disas: Add a field for target-dependant data
  disas: mips: Add micromips R6 disassembler - infrastructure and 16-bit
    instructions
  disas: mips: Add micromips R6 disassembler - 32-bit instructions

Yongbok Kim (2):
  target/mips: Amend CP0 WatchHi register implementation
  target/mips: Add implementation of GINVT instruction

 disas/Makefile.objs     |    1 +
 disas/micromips_r6.c    | 5670 +++++++++++++++++++++++++++++++++++++++++++++++
 disas/mips.c            |   10 +
 include/disas/dis-asm.h |    4 +
 qemu-deprecated.texi    |    2 +-
 target/mips/cpu.c       |    4 +
 target/mips/cpu.h       |    4 +-
 target/mips/helper.c    |   20 +-
 target/mips/helper.h    |    7 +
 target/mips/internal.h  |    1 +
 target/mips/machine.c   |    6 +-
 target/mips/op_helper.c |  171 +-
 target/mips/translate.c |  215 +-
 13 files changed, 6081 insertions(+), 34 deletions(-)
 create mode 100644 disas/micromips_r6.c

-- 
2.7.4

Re: [PATCH v4 0/7] target/mips: Misc MIPS fixes and improvements for 5.0

Posted by no-reply@patchew.org 4 years, 3 months ago

Patchew URL: https://patchew.org/QEMU/1579883929-1517-1-git-send-email-aleksandar.markovic@rt-rk.com/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Message-id: 1579883929-1517-1-git-send-email-aleksandar.markovic@rt-rk.com
Subject: [PATCH v4 0/7] target/mips: Misc MIPS fixes and improvements for 5.0

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Switched to a new branch 'test'
ea518ca disas: mips: Add micromips R6 disassembler - 32-bit instructions
411fb98 disas: mips: Add micromips R6 disassembler - infrastructure and 16-bit instructions
21156b5 disas: Add a field for target-dependant data
e1f78b4 target/mips: Add implementation of GINVT instruction
71cda0b target/mips: Amend CP0 WatchHi register implementation
4ba5d5b target/mips: Add support for MIPS<32|64>R6 CRC32 ISA
1a1d967 target/mips: Rectify documentation on deprecating r4k machine

=== OUTPUT BEGIN ===
1/7 Checking commit 1a1d96728818 (target/mips: Rectify documentation on deprecating r4k machine)
2/7 Checking commit 4ba5d5ba89b6 (target/mips: Add support for MIPS<32|64>R6 CRC32 ISA)
3/7 Checking commit 71cda0b1edd7 (target/mips: Amend CP0 WatchHi register implementation)
4/7 Checking commit e1f78b41860b (target/mips: Add implementation of GINVT instruction)
5/7 Checking commit 21156b50dd72 (disas: Add a field for target-dependant data)
6/7 Checking commit 411fb9817917 (disas: mips: Add micromips R6 disassembler - infrastructure and 16-bit instructions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#36: 
new file mode 100644

ERROR: space prohibited between function name and open parenthesis '('
#1297: FILE: include/disas/dis-asm.h:395:
+int print_insn_micromips_r6      (bfd_vma, disassemble_info*);

total: 1 errors, 1 warnings, 1272 lines checked

Patch 6/7 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

7/7 Checking commit ea518ca26f0d (disas: mips: Add micromips R6 disassembler - 32-bit instructions)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/1579883929-1517-1-git-send-email-aleksandar.markovic@rt-rk.com/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-devel@redhat.com

Re: [PATCH v4 0/7] target/mips: Misc MIPS fixes and improvements for 5.0

Posted by no-reply@patchew.org 4 years, 3 months ago

Patchew URL: https://patchew.org/QEMU/1579883929-1517-1-git-send-email-aleksandar.markovic@rt-rk.com/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Message-id: 1579883929-1517-1-git-send-email-aleksandar.markovic@rt-rk.com
Subject: [PATCH v4 0/7] target/mips: Misc MIPS fixes and improvements for 5.0

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 * [new tag]         patchew/1579883929-1517-1-git-send-email-aleksandar.markovic@rt-rk.com -> patchew/1579883929-1517-1-git-send-email-aleksandar.markovic@rt-rk.com
 * [new tag]         patchew/20200124162606.8787-1-peter.maydell@linaro.org -> patchew/20200124162606.8787-1-peter.maydell@linaro.org
 * [new tag]         patchew/20200124165335.422-1-robert.foley@linaro.org -> patchew/20200124165335.422-1-robert.foley@linaro.org
Switched to a new branch 'test'
3369823 disas: mips: Add micromips R6 disassembler - 32-bit instructions
9e98490 disas: mips: Add micromips R6 disassembler - infrastructure and 16-bit instructions
aa196ec disas: Add a field for target-dependant data
6984273 target/mips: Add implementation of GINVT instruction
5d74db1 target/mips: Amend CP0 WatchHi register implementation
f401c61 target/mips: Add support for MIPS<32|64>R6 CRC32 ISA
f7e500d target/mips: Rectify documentation on deprecating r4k machine

=== OUTPUT BEGIN ===
1/7 Checking commit f7e500d8e637 (target/mips: Rectify documentation on deprecating r4k machine)
2/7 Checking commit f401c61b627d (target/mips: Add support for MIPS<32|64>R6 CRC32 ISA)
3/7 Checking commit 5d74db174c4a (target/mips: Amend CP0 WatchHi register implementation)
4/7 Checking commit 6984273d2f0e (target/mips: Add implementation of GINVT instruction)
5/7 Checking commit aa196ec00346 (disas: Add a field for target-dependant data)
6/7 Checking commit 9e98490b5529 (disas: mips: Add micromips R6 disassembler - infrastructure and 16-bit instructions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#36: 
new file mode 100644

ERROR: space prohibited between function name and open parenthesis '('
#1297: FILE: include/disas/dis-asm.h:395:
+int print_insn_micromips_r6      (bfd_vma, disassemble_info*);

total: 1 errors, 1 warnings, 1272 lines checked

Patch 6/7 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

7/7 Checking commit 3369823f3598 (disas: mips: Add micromips R6 disassembler - 32-bit instructions)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/1579883929-1517-1-git-send-email-aleksandar.markovic@rt-rk.com/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-devel@redhat.com