[v1] Add CPU model for intel processor Cooper Lake

[Resend PATCH 0/3] Add CPU model for intel processor Cooper Lake

Posted by Cathy Zhang 4 years, 6 months ago

This patchset is to add CPU model for intel processor Cooper Lake. It
will inherit features from the existing CPU model Cascadelake-Server,
meanwhile, add the platform associated new instruction and feature
for speculative execution which the host supports. There are associated
feature bit and macro defined here as needed.

Cathy Zhang (3):
  i386: Add MSR feature bit for MDS-NO
  i386: Add macro for stibp
  i386: Add new CPU model Cooperlake

 target/i386/cpu.c | 60 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
 target/i386/cpu.h |  3 +++
 2 files changed, 63 insertions(+)

-- 
1.8.3.1

Re: [Resend PATCH 0/3] Add CPU model for intel processor Cooper Lake

Posted by Eduardo Habkost 4 years, 6 months ago

On Tue, Oct 22, 2019 at 03:35:25PM +0800, Cathy Zhang wrote:
> This patchset is to add CPU model for intel processor Cooper Lake. It
> will inherit features from the existing CPU model Cascadelake-Server,
> meanwhile, add the platform associated new instruction and feature
> for speculative execution which the host supports. There are associated
> feature bit and macro defined here as needed.

Queued, thanks.

> 
> Cathy Zhang (3):
>   i386: Add MSR feature bit for MDS-NO
>   i386: Add macro for stibp
>   i386: Add new CPU model Cooperlake
> 
>  target/i386/cpu.c | 60 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
>  target/i386/cpu.h |  3 +++
>  2 files changed, 63 insertions(+)
> 
> -- 
> 1.8.3.1
> 

-- 
Eduardo

Re: [Resend PATCH 0/3] Add CPU model for intel processor Cooper Lake

Posted by Bruce Rogers 4 years, 5 months ago

On Wed, 2019-10-23 at 23:52 -0300, Eduardo Habkost wrote:
> On Tue, Oct 22, 2019 at 03:35:25PM +0800, Cathy Zhang wrote:
> > This patchset is to add CPU model for intel processor Cooper Lake.
> > It
> > will inherit features from the existing CPU model Cascadelake-
> > Server,
> > meanwhile, add the platform associated new instruction and feature
> > for speculative execution which the host supports. There are
> > associated
> > feature bit and macro defined here as needed.
> 
> Queued, thanks.
> 
> > Cathy Zhang (3):
> >   i386: Add MSR feature bit for MDS-NO
> >   i386: Add macro for stibp
> >   i386: Add new CPU model Cooperlake
> > 
> >  target/i386/cpu.c | 60
> > +++++++++++++++++++++++++++++++++++++++++++++++++++++++
> >  target/i386/cpu.h |  3 +++
> >  2 files changed, 63 insertions(+)
> > 

Hi Eduardo,

Is this going to make it into v4.2?

Regards,
Bruce