From: Aleksandar Markovic <amarkovic@wavecomp.com>
Clean up handling of CP0 register 14.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
target/mips/cpu.h | 1 +
target/mips/translate.c | 8 ++++----
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 512e36e..8e6376a 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -363,6 +363,7 @@ typedef struct mips_def_t mips_def_t;
#define CP0_REG13__NESTEDEXC 5
/* CP0 Register 14 */
#define CP0_REG14__EPC 0
+#define CP0_REG14__NESTEDEPC 2
/* CP0 Register 15 */
#define CP0_REG15__PRID 0
#define CP0_REG15__EBASE 1
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 1373447..7644dda 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -7260,7 +7260,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case CP0_REGISTER_14:
switch (sel) {
- case 0:
+ case CP0_REG14__EPC:
tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_EPC));
tcg_gen_ext32s_tl(arg, arg);
register_name = "EPC";
@@ -7999,7 +7999,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case CP0_REGISTER_14:
switch (sel) {
- case 0:
+ case CP0_REG14__EPC:
tcg_gen_st_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_EPC));
register_name = "EPC";
break;
@@ -8749,7 +8749,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case CP0_REGISTER_14:
switch (sel) {
- case 0:
+ case CP0_REG14__EPC:
tcg_gen_ld_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_EPC));
register_name = "EPC";
break;
@@ -9476,7 +9476,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case CP0_REGISTER_14:
switch (sel) {
- case 0:
+ case CP0_REG14__EPC:
tcg_gen_st_tl(arg, cpu_env, offsetof(CPUMIPSState, CP0_EPC));
register_name = "EPC";
break;
--
2.7.4