target/mips: Adjusting the results when dividing by zero in MSA instructions

[Qemu-devel] [PATCH v2 0/2] target/mips: Adjusting the results when dividing by zero in MSA instructions

Mateja Marjanovic posted 2 patches 5 years ago

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Maintainers: Aleksandar Markovic <amarkovic@wavecomp.com>, Aurelien Jarno <aurelien@aurel32.net>, Aleksandar Rikalo <arikalo@wavecomp.com>

target/mips/msa_helper.c | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)

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[Qemu-devel] [PATCH v2 0/2] target/mips: Adjusting the results when dividing by zero in MSA instructions

Posted by Mateja Marjanovic 5 years ago

From: Mateja Marjanovic <Mateja.Marjanovic@rt-rk.com>

The behaviour when executing DIV_<U|S>.<B|H|W|D> and MOD_<U|S>.<B|H|W|D>
differs on a referent hardware (FPGA MIPS 64 r6, little endian) and on
QEMU, when the divisor is equal to zero. That is not a real bug, because
the behaviour in that case is unpredictable (references in commit
messages).

v2:
 - Add consistency in DIV_U.df and DIV_S.df helper implementation
 - Adjust the commit messages and the cover letter, making them
   clearer and more understandable
 - Correct the spelling in the commit messages and in the cover
   letter

Mateja Marjanovic (2):
  target/mips: Make the results of DIV_<U|S>.<B|H|W|D> the same as on
    hardware
  target/mips: Make the results of MOD_<U|S>.<B|H|W|D> the same as on
    hardware

 target/mips/msa_helper.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

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2.7.4